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* [PATCH 1/2] drm/i915: Bump skl+ wm blocks to 11 bits
@ 2019-02-05 20:50 Ville Syrjala
  2019-02-05 20:50 ` [PATCH 2/2] drm/i915: Just use icl+ definition for PLANE_WM blocks field Ville Syrjala
                   ` (3 more replies)
  0 siblings, 4 replies; 8+ messages in thread
From: Ville Syrjala @ 2019-02-05 20:50 UTC (permalink / raw)
  To: intel-gfx

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

On icl the plane watermark blocks field is 11 bits. Bump our define to
match so that readout won't ignore the extra bit. We can safely do this
for older platforms too since the unused bits are hardwired to zero.

Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 12964b0fbc54..2be34e13af78 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -6000,7 +6000,7 @@ enum {
 #define   PLANE_WM_EN		(1 << 31)
 #define   PLANE_WM_LINES_SHIFT	14
 #define   PLANE_WM_LINES_MASK	0x1f
-#define   PLANE_WM_BLOCKS_MASK	0x3ff
+#define   PLANE_WM_BLOCKS_MASK	0x7ff /* skl+: 10 bits, icl+ 11 bits */
 
 #define _CUR_WM_0(pipe) _PIPE(pipe, _CUR_WM_A_0, _CUR_WM_B_0)
 #define CUR_WM(pipe, level) _MMIO(_CUR_WM_0(pipe) + ((4) * (level)))
-- 
2.19.2

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 8+ messages in thread
* [PATCH 2/2] drm/i915: Just use icl+ definition for PLANE_WM blocks field
  2019-02-05 20:50 [PATCH 1/2] drm/i915: Bump skl+ wm blocks to 11 bits Ville Syrjala
@ 2019-02-05 20:50 ` Ville Syrjala
  2019-02-06  1:04   ` Souza, Jose
  2019-02-05 21:34 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Bump skl+ wm blocks to 11 bits Patchwork
                   ` (2 subsequent siblings)
  3 siblings, 1 reply; 8+ messages in thread
From: Ville Syrjala @ 2019-02-05 20:50 UTC (permalink / raw)
  To: intel-gfx

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

The unused bits on PLANE_WM & co. are hardwired to zero. So no
need to worry about reading the extra bit on pre-icl.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h | 3 +--
 drivers/gpu/drm/i915/intel_pm.c | 9 ++-------
 2 files changed, 3 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 2be34e13af78..638a586469f9 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -6784,8 +6784,7 @@ enum {
 
 #define _PLANE_BUF_CFG_1_B			0x7127c
 #define _PLANE_BUF_CFG_2_B			0x7137c
-#define  SKL_DDB_ENTRY_MASK			0x3FF
-#define  ICL_DDB_ENTRY_MASK			0x7FF
+#define  DDB_ENTRY_MASK				0x7FF /* skl+: 10 bits, icl+ 11 bits */
 #define  DDB_ENTRY_END_SHIFT			16
 #define _PLANE_BUF_CFG_1(pipe)	\
 	_PIPE(pipe, _PLANE_BUF_CFG_1_A, _PLANE_BUF_CFG_1_B)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 737005bf6816..0f15685529a0 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3927,14 +3927,9 @@ static unsigned int skl_cursor_allocation(int num_active)
 static void skl_ddb_entry_init_from_hw(struct drm_i915_private *dev_priv,
 				       struct skl_ddb_entry *entry, u32 reg)
 {
-	u16 mask;
 
-	if (INTEL_GEN(dev_priv) >= 11)
-		mask = ICL_DDB_ENTRY_MASK;
-	else
-		mask = SKL_DDB_ENTRY_MASK;
-	entry->start = reg & mask;
-	entry->end = (reg >> DDB_ENTRY_END_SHIFT) & mask;
+	entry->start = reg & DDB_ENTRY_MASK;
+	entry->end = (reg >> DDB_ENTRY_END_SHIFT) & DDB_ENTRY_MASK;
 
 	if (entry->end)
 		entry->end += 1;
-- 
2.19.2

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 8+ messages in thread
* ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Bump skl+ wm blocks to 11 bits
  2019-02-05 20:50 [PATCH 1/2] drm/i915: Bump skl+ wm blocks to 11 bits Ville Syrjala
  2019-02-05 20:50 ` [PATCH 2/2] drm/i915: Just use icl+ definition for PLANE_WM blocks field Ville Syrjala
@ 2019-02-05 21:34 ` Patchwork
  2019-02-06  0:47 ` [PATCH 1/2] " Souza, Jose
  2019-02-06  3:28 ` ✓ Fi.CI.IGT: success for series starting with [1/2] " Patchwork
  3 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2019-02-05 21:34 UTC (permalink / raw)
  To: Ville Syrjala; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/2] drm/i915: Bump skl+ wm blocks to 11 bits
URL   : https://patchwork.freedesktop.org/series/56252/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_5546 -> Patchwork_12148
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/56252/revisions/1/mbox/

Known issues
------------

  Here are the changes found in Patchwork_12148 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_suspend@basic-s3:
    - fi-blb-e6850:       PASS -> INCOMPLETE [fdo#107718]

  * igt@i915_module_load@reload-with-fault-injection:
    - fi-kbl-7567u:       PASS -> DMESG-WARN [fdo#103558] / [fdo#105602] / [fdo#108529] +1

  * igt@prime_vgem@basic-fence-flip:
    - fi-gdg-551:         PASS -> FAIL [fdo#103182] +1

  
#### Possible fixes ####

  * igt@kms_chamelium@common-hpd-after-suspend:
    - fi-kbl-7567u:       WARN [fdo#109380] -> PASS

  * igt@kms_pipe_crc_basic@nonblocking-crc-pipe-c:
    - fi-kbl-7567u:       {SKIP} [fdo#109271] -> PASS +33

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#103182]: https://bugs.freedesktop.org/show_bug.cgi?id=103182
  [fdo#103558]: https://bugs.freedesktop.org/show_bug.cgi?id=103558
  [fdo#105602]: https://bugs.freedesktop.org/show_bug.cgi?id=105602
  [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
  [fdo#108529]: https://bugs.freedesktop.org/show_bug.cgi?id=108529
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
  [fdo#109380]: https://bugs.freedesktop.org/show_bug.cgi?id=109380


Participating hosts (50 -> 43)
------------------------------

  Additional (1): fi-pnv-d510 
  Missing    (8): fi-kbl-soraka fi-ilk-m540 fi-bxt-dsi fi-hsw-4200u fi-byt-j1900 fi-byt-squawks fi-bsw-cyan fi-bdw-samus 


Build changes
-------------

    * Linux: CI_DRM_5546 -> Patchwork_12148

  CI_DRM_5546: 1830ea89ea6a42edac0fee7e7e48ebf9b5008873 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4811: 3bb24a9f2ae732a1299d18e921d88945c6bb00ea @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_12148: bec803ef4ca32fa8f5b19e1759ed14344a7fc06a @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

bec803ef4ca3 drm/i915: Just use icl+ definition for PLANE_WM blocks field
fc2692e07b12 drm/i915: Bump skl+ wm blocks to 11 bits

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12148/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 8+ messages in thread
* Re: [PATCH 1/2] drm/i915: Bump skl+ wm blocks to 11 bits
  2019-02-05 20:50 [PATCH 1/2] drm/i915: Bump skl+ wm blocks to 11 bits Ville Syrjala
  2019-02-05 20:50 ` [PATCH 2/2] drm/i915: Just use icl+ definition for PLANE_WM blocks field Ville Syrjala
  2019-02-05 21:34 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Bump skl+ wm blocks to 11 bits Patchwork
@ 2019-02-06  0:47 ` Souza, Jose
  2019-02-06  3:28 ` ✓ Fi.CI.IGT: success for series starting with [1/2] " Patchwork
  3 siblings, 0 replies; 8+ messages in thread
From: Souza, Jose @ 2019-02-06  0:47 UTC (permalink / raw)
  To: ville.syrjala, intel-gfx


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On Tue, 2019-02-05 at 22:50 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> On icl the plane watermark blocks field is 11 bits. Bump our define
> to
> match so that readout won't ignore the extra bit. We can safely do
> this
> for older platforms too since the unused bits are hardwired to zero.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> 
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/i915_reg.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_reg.h
> b/drivers/gpu/drm/i915/i915_reg.h
> index 12964b0fbc54..2be34e13af78 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -6000,7 +6000,7 @@ enum {
>  #define   PLANE_WM_EN		(1 << 31)
>  #define   PLANE_WM_LINES_SHIFT	14
>  #define   PLANE_WM_LINES_MASK	0x1f
> -#define   PLANE_WM_BLOCKS_MASK	0x3ff
> +#define   PLANE_WM_BLOCKS_MASK	0x7ff /* skl+: 10 bits, icl+ 11
> bits */
>  
>  #define _CUR_WM_0(pipe) _PIPE(pipe, _CUR_WM_A_0, _CUR_WM_B_0)
>  #define CUR_WM(pipe, level) _MMIO(_CUR_WM_0(pipe) + ((4) * (level)))

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_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 8+ messages in thread
* Re: [PATCH 2/2] drm/i915: Just use icl+ definition for PLANE_WM blocks field
  2019-02-05 20:50 ` [PATCH 2/2] drm/i915: Just use icl+ definition for PLANE_WM blocks field Ville Syrjala
@ 2019-02-06  1:04   ` Souza, Jose
  2019-02-06 13:18     ` Ville Syrjälä
  0 siblings, 1 reply; 8+ messages in thread
From: Souza, Jose @ 2019-02-06  1:04 UTC (permalink / raw)
  To: ville.syrjala, intel-gfx


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On Tue, 2019-02-05 at 22:50 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> The unused bits on PLANE_WM & co. are hardwired to zero. So no
> need to worry about reading the extra bit on pre-icl.
> 

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/i915_reg.h | 3 +--
>  drivers/gpu/drm/i915/intel_pm.c | 9 ++-------
>  2 files changed, 3 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_reg.h
> b/drivers/gpu/drm/i915/i915_reg.h
> index 2be34e13af78..638a586469f9 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -6784,8 +6784,7 @@ enum {
>  
>  #define _PLANE_BUF_CFG_1_B			0x7127c
>  #define _PLANE_BUF_CFG_2_B			0x7137c
> -#define  SKL_DDB_ENTRY_MASK			0x3FF
> -#define  ICL_DDB_ENTRY_MASK			0x7FF
> +#define  DDB_ENTRY_MASK				0x7FF /* skl+:
> 10 bits, icl+ 11 bits */
>  #define  DDB_ENTRY_END_SHIFT			16
>  #define _PLANE_BUF_CFG_1(pipe)	\
>  	_PIPE(pipe, _PLANE_BUF_CFG_1_A, _PLANE_BUF_CFG_1_B)
> diff --git a/drivers/gpu/drm/i915/intel_pm.c
> b/drivers/gpu/drm/i915/intel_pm.c
> index 737005bf6816..0f15685529a0 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3927,14 +3927,9 @@ static unsigned int skl_cursor_allocation(int
> num_active)
>  static void skl_ddb_entry_init_from_hw(struct drm_i915_private
> *dev_priv,
>  				       struct skl_ddb_entry *entry, u32
> reg)
>  {
> -	u16 mask;
>  
> -	if (INTEL_GEN(dev_priv) >= 11)
> -		mask = ICL_DDB_ENTRY_MASK;
> -	else
> -		mask = SKL_DDB_ENTRY_MASK;
> -	entry->start = reg & mask;
> -	entry->end = (reg >> DDB_ENTRY_END_SHIFT) & mask;
> +	entry->start = reg & DDB_ENTRY_MASK;
> +	entry->end = (reg >> DDB_ENTRY_END_SHIFT) & DDB_ENTRY_MASK;
>  
>  	if (entry->end)
>  		entry->end += 1;

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_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 8+ messages in thread
* ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915: Bump skl+ wm blocks to 11 bits
  2019-02-05 20:50 [PATCH 1/2] drm/i915: Bump skl+ wm blocks to 11 bits Ville Syrjala
                   ` (2 preceding siblings ...)
  2019-02-06  0:47 ` [PATCH 1/2] " Souza, Jose
@ 2019-02-06  3:28 ` Patchwork
  3 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2019-02-06  3:28 UTC (permalink / raw)
  To: Ville Syrjala; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/2] drm/i915: Bump skl+ wm blocks to 11 bits
URL   : https://patchwork.freedesktop.org/series/56252/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_5546_full -> Patchwork_12148_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Known issues
------------

  Here are the changes found in Patchwork_12148_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_suspend@basic:
    - shard-snb:          PASS -> INCOMPLETE [fdo#105411]

  * igt@kms_busy@extended-modeset-hang-newfb-render-a:
    - shard-hsw:          PASS -> DMESG-WARN [fdo#107956]

  * igt@kms_busy@extended-pageflip-hang-newfb-render-b:
    - shard-glk:          PASS -> DMESG-WARN [fdo#107956]

  * igt@kms_cursor_crc@cursor-128x128-random:
    - shard-apl:          PASS -> FAIL [fdo#103232] +2

  * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
    - shard-glk:          PASS -> FAIL [fdo#105363]

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-glk:          PASS -> FAIL [fdo#102887] / [fdo#105363]

  
#### Possible fixes ####

  * igt@kms_cursor_crc@cursor-256x256-random:
    - shard-apl:          FAIL [fdo#103232] -> PASS

  * igt@kms_cursor_crc@cursor-64x64-suspend:
    - shard-hsw:          INCOMPLETE [fdo#103540] -> PASS
    - shard-glk:          INCOMPLETE [fdo#103359] / [k.org#198133] -> PASS

  * igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy:
    - shard-hsw:          FAIL [fdo#105767] -> PASS

  * igt@kms_cursor_legacy@cursor-vs-flip-atomic:
    - shard-hsw:          FAIL [fdo#103355] -> PASS

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-pwrite:
    - shard-apl:          FAIL [fdo#103167] -> PASS +3

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-fullscreen:
    - shard-glk:          FAIL [fdo#103167] -> PASS +1

  * igt@kms_plane_multiple@atomic-pipe-c-tiling-none:
    - shard-glk:          FAIL [fdo#103166] -> PASS +1

  * igt@pm_rc6_residency@rc6-accuracy:
    - shard-snb:          {SKIP} [fdo#109271] -> PASS

  
#### Warnings ####

  * igt@i915_suspend@shrink:
    - shard-snb:          DMESG-WARN [fdo#109244] -> INCOMPLETE [fdo#105411] / [fdo#106886]

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-shrfb-fliptrack:
    - shard-apl:          {SKIP} [fdo#109271] -> INCOMPLETE [fdo#103927]

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#102887]: https://bugs.freedesktop.org/show_bug.cgi?id=102887
  [fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
  [fdo#103355]: https://bugs.freedesktop.org/show_bug.cgi?id=103355
  [fdo#103359]: https://bugs.freedesktop.org/show_bug.cgi?id=103359
  [fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
  [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
  [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
  [fdo#105411]: https://bugs.freedesktop.org/show_bug.cgi?id=105411
  [fdo#105767]: https://bugs.freedesktop.org/show_bug.cgi?id=105767
  [fdo#106886]: https://bugs.freedesktop.org/show_bug.cgi?id=106886
  [fdo#107956]: https://bugs.freedesktop.org/show_bug.cgi?id=107956
  [fdo#109244]: https://bugs.freedesktop.org/show_bug.cgi?id=109244
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
  [k.org#198133]: https://bugzilla.kernel.org/show_bug.cgi?id=198133


Participating hosts (7 -> 5)
------------------------------

  Missing    (2): shard-skl shard-iclb 


Build changes
-------------

    * Linux: CI_DRM_5546 -> Patchwork_12148

  CI_DRM_5546: 1830ea89ea6a42edac0fee7e7e48ebf9b5008873 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4811: 3bb24a9f2ae732a1299d18e921d88945c6bb00ea @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_12148: bec803ef4ca32fa8f5b19e1759ed14344a7fc06a @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12148/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 8+ messages in thread
* Re: [PATCH 2/2] drm/i915: Just use icl+ definition for PLANE_WM blocks field
  2019-02-06  1:04   ` Souza, Jose
@ 2019-02-06 13:18     ` Ville Syrjälä
  2019-02-07  0:21       ` Souza, Jose
  0 siblings, 1 reply; 8+ messages in thread
From: Ville Syrjälä @ 2019-02-06 13:18 UTC (permalink / raw)
  To: Souza, Jose; +Cc: intel-gfx

On Wed, Feb 06, 2019 at 01:04:19AM +0000, Souza, Jose wrote:
> On Tue, 2019-02-05 at 22:50 +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > 
> > The unused bits on PLANE_WM & co. are hardwired to zero. So no
> > need to worry about reading the extra bit on pre-icl.
> > 
> 
> Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

Thanks. Both patches pushes to dinq.

Do you still have enough motivation left to to read through
https://patchwork.freedesktop.org/patch/281614/  as well?

> 
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/i915_reg.h | 3 +--
> >  drivers/gpu/drm/i915/intel_pm.c | 9 ++-------
> >  2 files changed, 3 insertions(+), 9 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h
> > b/drivers/gpu/drm/i915/i915_reg.h
> > index 2be34e13af78..638a586469f9 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -6784,8 +6784,7 @@ enum {
> >  
> >  #define _PLANE_BUF_CFG_1_B			0x7127c
> >  #define _PLANE_BUF_CFG_2_B			0x7137c
> > -#define  SKL_DDB_ENTRY_MASK			0x3FF
> > -#define  ICL_DDB_ENTRY_MASK			0x7FF
> > +#define  DDB_ENTRY_MASK				0x7FF /* skl+:
> > 10 bits, icl+ 11 bits */
> >  #define  DDB_ENTRY_END_SHIFT			16
> >  #define _PLANE_BUF_CFG_1(pipe)	\
> >  	_PIPE(pipe, _PLANE_BUF_CFG_1_A, _PLANE_BUF_CFG_1_B)
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c
> > b/drivers/gpu/drm/i915/intel_pm.c
> > index 737005bf6816..0f15685529a0 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -3927,14 +3927,9 @@ static unsigned int skl_cursor_allocation(int
> > num_active)
> >  static void skl_ddb_entry_init_from_hw(struct drm_i915_private
> > *dev_priv,
> >  				       struct skl_ddb_entry *entry, u32
> > reg)
> >  {
> > -	u16 mask;
> >  
> > -	if (INTEL_GEN(dev_priv) >= 11)
> > -		mask = ICL_DDB_ENTRY_MASK;
> > -	else
> > -		mask = SKL_DDB_ENTRY_MASK;
> > -	entry->start = reg & mask;
> > -	entry->end = (reg >> DDB_ENTRY_END_SHIFT) & mask;
> > +	entry->start = reg & DDB_ENTRY_MASK;
> > +	entry->end = (reg >> DDB_ENTRY_END_SHIFT) & DDB_ENTRY_MASK;
> >  
> >  	if (entry->end)
> >  		entry->end += 1;



-- 
Ville Syrjälä
Intel
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 8+ messages in thread
* Re: [PATCH 2/2] drm/i915: Just use icl+ definition for PLANE_WM blocks field
  2019-02-06 13:18     ` Ville Syrjälä
@ 2019-02-07  0:21       ` Souza, Jose
  0 siblings, 0 replies; 8+ messages in thread
From: Souza, Jose @ 2019-02-07  0:21 UTC (permalink / raw)
  To: ville.syrjala; +Cc: intel-gfx


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On Wed, 2019-02-06 at 15:18 +0200, Ville Syrjälä wrote:
> On Wed, Feb 06, 2019 at 01:04:19AM +0000, Souza, Jose wrote:
> > On Tue, 2019-02-05 at 22:50 +0200, Ville Syrjala wrote:
> > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > 
> > > The unused bits on PLANE_WM & co. are hardwired to zero. So no
> > > need to worry about reading the extra bit on pre-icl.
> > > 
> > 
> > Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
> 
> Thanks. Both patches pushes to dinq.
> 
> Do you still have enough motivation left to to read through
> https://patchwork.freedesktop.org/patch/281614/  as well?

Ops I missed that one, now reviewed.

> 
> > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/i915_reg.h | 3 +--
> > >  drivers/gpu/drm/i915/intel_pm.c | 9 ++-------
> > >  2 files changed, 3 insertions(+), 9 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/i915_reg.h
> > > b/drivers/gpu/drm/i915/i915_reg.h
> > > index 2be34e13af78..638a586469f9 100644
> > > --- a/drivers/gpu/drm/i915/i915_reg.h
> > > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > > @@ -6784,8 +6784,7 @@ enum {
> > >  
> > >  #define _PLANE_BUF_CFG_1_B			0x7127c
> > >  #define _PLANE_BUF_CFG_2_B			0x7137c
> > > -#define  SKL_DDB_ENTRY_MASK			0x3FF
> > > -#define  ICL_DDB_ENTRY_MASK			0x7FF
> > > +#define  DDB_ENTRY_MASK				0x7FF /* skl+:
> > > 10 bits, icl+ 11 bits */
> > >  #define  DDB_ENTRY_END_SHIFT			16
> > >  #define _PLANE_BUF_CFG_1(pipe)	\
> > >  	_PIPE(pipe, _PLANE_BUF_CFG_1_A, _PLANE_BUF_CFG_1_B)
> > > diff --git a/drivers/gpu/drm/i915/intel_pm.c
> > > b/drivers/gpu/drm/i915/intel_pm.c
> > > index 737005bf6816..0f15685529a0 100644
> > > --- a/drivers/gpu/drm/i915/intel_pm.c
> > > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > > @@ -3927,14 +3927,9 @@ static unsigned int
> > > skl_cursor_allocation(int
> > > num_active)
> > >  static void skl_ddb_entry_init_from_hw(struct drm_i915_private
> > > *dev_priv,
> > >  				       struct skl_ddb_entry *entry, u32
> > > reg)
> > >  {
> > > -	u16 mask;
> > >  
> > > -	if (INTEL_GEN(dev_priv) >= 11)
> > > -		mask = ICL_DDB_ENTRY_MASK;
> > > -	else
> > > -		mask = SKL_DDB_ENTRY_MASK;
> > > -	entry->start = reg & mask;
> > > -	entry->end = (reg >> DDB_ENTRY_END_SHIFT) & mask;
> > > +	entry->start = reg & DDB_ENTRY_MASK;
> > > +	entry->end = (reg >> DDB_ENTRY_END_SHIFT) & DDB_ENTRY_MASK;
> > >  
> > >  	if (entry->end)
> > >  		entry->end += 1;
> 
> 

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_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 8+ messages in thread
end of thread, other threads:[~2019-02-07  0:21 UTC | newest]

Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-02-05 20:50 [PATCH 1/2] drm/i915: Bump skl+ wm blocks to 11 bits Ville Syrjala
2019-02-05 20:50 ` [PATCH 2/2] drm/i915: Just use icl+ definition for PLANE_WM blocks field Ville Syrjala
2019-02-06  1:04   ` Souza, Jose
2019-02-06 13:18     ` Ville Syrjälä
2019-02-07  0:21       ` Souza, Jose
2019-02-05 21:34 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Bump skl+ wm blocks to 11 bits Patchwork
2019-02-06  0:47 ` [PATCH 1/2] " Souza, Jose
2019-02-06  3:28 ` ✓ Fi.CI.IGT: success for series starting with [1/2] " Patchwork

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