[PATCH v4 0/2] add MDIO bus multiplexer driven by a regmap device

[PATCH v4 0/2] add MDIO bus multiplexer driven by a regmap device

[Pankaj Bansal]

Add support for an MDIO bus multiplexer controlled by a regmap device, like an FPGA.

These apis is an extension of the existing driver drivers/net/phy/mdio-mux-mmioreg.c.

The problem with mmioreg driver is that it can operate only on memory mapped devices.
but if we have a device that controls mdio muxing and that device is controlled using i2c or spi, then it will not work.

Therefore, added apis that can be used by regmap device to control mdio mux.

Tested on a NXP LX2160AQDS board which uses the "QIXIS" FPGA attached to the i2c bus.

This is my second attempt at this.
In my previous approach i wrote a separate driver for regmap apis.
But then i realized that it is not meant to control a specific device.
It is meant to control some registers of parent device.
Therefore, IMO this should not be a Platform driver and there should not be any "compatible" property to which this driver is associated.

The previous approach patches and discussion can be accessed here:
https://www.mail-archive.com/netdev@vger.kernel.org/msg252744.html

Cc: Varun Sethi <V.Sethi@nxp.com>
---

Notes:
	V3:
	- https://www.mail-archive.com/netdev@vger.kernel.org/msg282380.html
	V2:
	- https://www.mail-archive.com/netdev@vger.kernel.org/msg282176.html
	V1:
	- https://www.spinics.net/lists/netdev/msg548027.html


Pankaj Bansal (2):
  dt-bindings: net: add MDIO bus multiplexer driven by a regmap device
  netdev/phy: add MDIO bus multiplexer driven by a regmap

 .../bindings/net/mdio-mux-regmap.txt          | 167 +++++++++++++++++
 drivers/net/phy/Kconfig                       |  14 ++
 drivers/net/phy/Makefile                      |   1 +
 drivers/net/phy/mdio-mux-regmap.c             | 169 ++++++++++++++++++
 include/linux/mdio-mux.h                      |  33 ++++
 5 files changed, 384 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/net/mdio-mux-regmap.txt
 create mode 100644 drivers/net/phy/mdio-mux-regmap.c

-- 
2.17.1

[PATCH v4 1/2] dt-bindings: net: add MDIO bus multiplexer driven by a regmap device

[Pankaj Bansal]

Add support for an MDIO bus multiplexer controlled by a regmap
device, like an FPGA.

Tested on a NXP LX2160AQDS board which uses the "QIXIS" FPGA
attached to the i2c bus.

Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
---

Notes:
    V4:
    - No change
    V3:
    - No change
    V2:
    - New file describing the device tree bindings for regmap controlled devices'
      mdio mux

 .../bindings/net/mdio-mux-regmap.txt         | 167 +++++++++++++++++
 1 file changed, 167 insertions(+)

diff --git a/Documentation/devicetree/bindings/net/mdio-mux-regmap.txt b/Documentation/devicetree/bindings/net/mdio-mux-regmap.txt
new file mode 100644
index 000000000000..8968f317965f
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/mdio-mux-regmap.txt
@@ -0,0 +1,167 @@
+Properties for an MDIO bus multiplexer controlled by a regmap
+
+This is a special case of a MDIO bus multiplexer.  A regmap device,
+like an FPGA, is used to control which child bus is connected.  The mdio-mux
+node must be a child of the device that is controlled by a regmap.
+The driver currently only supports devices with upto 32-bit registers.
+
+Required properties in addition to the generic multiplexer properties:
+
+- reg : integer, contains the offset of the register that controls the bus
+	multiplexer. it can be 32 bit number.
+
+- mux-mask : integer, contains an 32 bit mask that specifies which
+	bits in the register control the actual bus multiplexer.  The
+	'reg' property of each child mdio-mux node must be constrained by
+	this mask.
+
+Example 1:
+
+The FPGA node defines a i2c connected FPGA with a register space of 0x30 bytes.
+For the "EMI2" MDIO bus, register 0x54 (BRDCFG4) controls the mux on that bus.
+A bitmask of 0x07 means that bits 0, 1 and 2 (bit 0 is lsb) are the bits on
+BRDCFG4 that control the actual mux.
+
+i2c@2000000 {
+	compatible = "fsl,vf610-i2c";
+	#address-cells = <1>;
+	#size-cells = <0>;
+	reg = <0x0 0x2000000 0x0 0x10000>;
+	interrupts = <0 34 0x4>; // Level high type
+	clock-names = "i2c";
+	clocks = <&clockgen 4 7>;
+	fsl-scl-gpio = <&gpio2 15 0>;
+	status = "okay";
+
+	/* The FPGA node */
+	fpga@66 {
+		compatible = "fsl,lx2160aqds-fpga", "fsl,fpga-qixis-i2c";
+		reg = <0x66>; // fpga device address on i2c bus
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		mdio-mux-2@54 {
+			mdio-parent-bus = <&emdio2>; /* MDIO bus */
+			reg = <0x54>;	    /* BRDCFG4 */
+			mux-mask = <0x07>;      /* EMI2_MDIO */
+			#address-cells=<1>;
+			#size-cells = <0>;
+
+			mdio@0 {   // Slot 1
+				reg = <0x00>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				ethernet-phy@@1 {
+					reg = <1>;
+					compatible = "ethernet-phy-id0210.7441";
+				};
+
+				ethernet-phy@@0 {
+					reg = <0>;
+					compatible = "ethernet-phy-id0210.7441";
+				};
+			};
+
+			mdio@1 {   // Slot 2
+				reg = <0x01>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+			};
+
+			mdio@2 {   // Slot 3
+				reg = <0x02>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+			};
+		};
+	};
+};
+
+/* The parent MDIO bus. */
+emdio2: mdio@0x8B97000 {
+	compatible = "fsl,fman-memac-mdio";
+	reg = <0x0 0x8B97000 0x0 0x1000>;
+	#address-cells = <1>;
+	#size-cells = <0>;
+	little-endian;
+};
+
+Example 2:
+
+The FPGA node defines a memory mapped FPGA with a register space of 0x100 bytes.
+For the "EMI1" MDIO bus, register 0x54 (BRDCFG4) controls the mux on that bus.
+A bitmask of 0xe0 means that bits 5, 6 and 7 (bit 0 is lsb) are the bits on
+BRDCFG4 that control the actual mux.
+
+ifc: ifc@1530000 {
+	compatible = "fsl,ifc", "simple-bus";
+	reg = <0x0 0x1530000 0x0 0x10000>;
+	interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
+	#address-cells = <2>;
+	#size-cells = <1>;
+	/* NOR, NAND Flashes and FPGA on board */
+	ranges = <0x0 0x0 0x0 0x60000000 0x08000000
+		  0x2 0x0 0x0 0x7e800000 0x00010000
+		  0x3 0x0 0x0 0x7fb00000 0x00000100>;
+	status = "okay";
+
+	/* The FPGA node */
+	fpga: board-control@3,0 {
+		compatible = "fsl,ls1021aqds-fpga", "fsl,fpga-qixis";
+		reg = <0x3 0x0 0x0000100>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		mdio-mux-1@54 {
+			mdio-parent-bus = <&emdio1>; /* MDIO bus */
+			reg = <0x54>;	    /* BRDCFG4 */
+			mux-mask = <0xe0>;      /* EMI1_MDIO */
+			#address-cells=<1>;
+			#size-cells = <0>;
+
+			mdio@0 {   // Onboard PHYs rgmii_phy1
+				reg = <0x00>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				ethernet-phy@@1 {
+					reg = <1>;
+					compatible = "ethernet-phy-ieee802.3-c22";
+				};
+			};
+
+			mdio@20 {   // Onboard PHYs rgmii_phy2
+				reg = <0x20>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				ethernet-phy@2 {
+					reg = <0x2>;
+					compatible = "ethernet-phy-ieee802.3-c22";
+				};
+			};
+
+			mdio@40 {   // Onboard PHYs rgmii_phy3
+				reg = <0x40>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				ethernet-phy@3 {
+					reg = <0x3>;
+					compatible = "ethernet-phy-ieee802.3-c22";
+				};
+			};
+		};
+	};
+};
+
+/* The parent MDIO bus. */
+emdio1: mdio@2d24000 {
+	compatible = "gianfar";
+	device_type = "mdio";
+	#address-cells = <1>;
+	#size-cells = <0>;
+	reg = <0x0 0x2d24000 0x0 0x4000>,
+	      <0x0 0x2d10030 0x0 0x4>;
+};
-- 
2.17.1

[PATCH v4 2/2] netdev/phy: add MDIO bus multiplexer driven by a regmap

[Pankaj Bansal]

Add support for an MDIO bus multiplexer controlled by a regmap
device, like an FPGA.

Tested on a NXP LX2160AQDS board which uses the "QIXIS" FPGA
attached to the i2c bus.

Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
---

Notes:
    V4:
    - Use IS_ENABLED macro in mdio-mux.h
    V3:
    - make the return type of uninit function to void
    - reorder the Make file change to be alphabetically sorted
    - fix the compilation error when mdio-mux-regmap is built as module
      by adding CONFIG_MDIO_BUS_MUX_REGMAP_MODULE macro in mdio-mux.h
    V2:
    - Added Kconfig entry for regmap based mdio mux
    - restrict the comment lines to 80 chars
    - use kerneldoc formatting for this function documentation.

 drivers/net/phy/Kconfig           |  14 +++
 drivers/net/phy/Makefile          |   1 +
 drivers/net/phy/mdio-mux-regmap.c | 169 ++++++++++++++++++++++++++++
 include/linux/mdio-mux.h          |  33 ++++++
 4 files changed, 217 insertions(+)

diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
index 3d187cd50eb0..93ef2505caba 100644
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -87,6 +87,20 @@ config MDIO_BUS_MUX_MMIOREG
 
 	  Currently, only 8/16/32 bits registers are supported.
 
+config MDIO_BUS_MUX_REGMAP
+	tristate "regmap device controlled MDIO bus multiplexers"
+	depends on OF_MDIO && REGMAP
+	select MDIO_BUS_MUX
+	help
+	  This module provides a driver for MDIO bus multiplexers that
+	  are controlled via a regmap device, like an FPGA connected to i2c bus
+	  or spi bus or memory mapped FPGA.
+	  The multiplexer connects one of several child MDIO busses to a
+	  parent bus.  Child bus selection is under the control of one of
+	  the FPGA's registers.
+
+	  Currently, only 32 bits registers are supported.
+
 config MDIO_CAVIUM
 	tristate
 
diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
index 5805c0b7d60e..99737128de8a 100644
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -29,6 +29,7 @@ obj-$(CONFIG_MDIO_BUS_MUX)	+= mdio-mux.o
 obj-$(CONFIG_MDIO_BUS_MUX_BCM_IPROC)	+= mdio-mux-bcm-iproc.o
 obj-$(CONFIG_MDIO_BUS_MUX_GPIO)	+= mdio-mux-gpio.o
 obj-$(CONFIG_MDIO_BUS_MUX_MMIOREG) += mdio-mux-mmioreg.o
+obj-$(CONFIG_MDIO_BUS_MUX_REGMAP)	+= mdio-mux-regmap.o
 obj-$(CONFIG_MDIO_CAVIUM)	+= mdio-cavium.o
 obj-$(CONFIG_MDIO_GPIO)		+= mdio-gpio.o
 obj-$(CONFIG_MDIO_HISI_FEMAC)	+= mdio-hisi-femac.o
diff --git a/drivers/net/phy/mdio-mux-regmap.c b/drivers/net/phy/mdio-mux-regmap.c
new file mode 100644
index 000000000000..bbec43b30f3c
--- /dev/null
+++ b/drivers/net/phy/mdio-mux-regmap.c
@@ -0,0 +1,169 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+/* Simple regmap based MDIO MUX driver
+ *
+ * Copyright 2018-2019 NXP
+ *
+ * Based on mdio-mux-mmioreg.c by Timur Tabi
+ *
+ * Author:
+ *     Pankaj Bansal <pankaj.bansal@nxp.com>
+ */
+
+#include <linux/platform_device.h>
+#include <linux/device.h>
+#include <linux/of_mdio.h>
+#include <linux/module.h>
+#include <linux/phy.h>
+#include <linux/mdio-mux.h>
+#include <linux/regmap.h>
+
+struct mdio_mux_regmap_state {
+	void		*mux_handle;
+	struct device	*dev;
+	struct regmap	*regmap;
+	u32		mux_reg;
+	u32		mask;
+};
+
+/**
+ * mdio_mux_regmap_switch_fn - This function is called by the mdio-mux layer
+ *			       when it thinks the mdio bus multiplexer needs
+ *			       to switch.
+ * @current_child:  current value of the mux register (masked via s->mask).
+ * @desired_child: value of the 'reg' property of the target child MDIO node.
+ * @data: Private data used by this switch_fn passed to mdio_mux_init function
+ *	  via mdio_mux_init(.., .., .., .., data, ..).
+ *
+ * The first time this function is called, current_child == -1.
+ * If current_child == desired_child, then the mux is already set to the
+ * correct bus.
+ */
+static int mdio_mux_regmap_switch_fn(int current_child, int desired_child,
+				     void *data)
+{
+	struct mdio_mux_regmap_state *s = data;
+	bool change;
+	int ret;
+
+	ret = regmap_update_bits_check(s->regmap,
+				       s->mux_reg,
+				       s->mask,
+				       desired_child,
+				       &change);
+
+	if (ret)
+		return ret;
+	if (change)
+		dev_dbg(s->dev, "%s %d -> %d\n", __func__, current_child,
+			desired_child);
+	return ret;
+}
+
+/**
+ * mdio_mux_regmap_init - control MDIO bus muxing using regmap constructs.
+ * @dev: device with which regmap construct is associated.
+ * @mux_node: mdio bus mux node that contains parent mdio bus phandle.
+ *	      This node also contains sub nodes, where each subnode denotes
+ *	      a child mdio bus. All the child mdio buses are muxed, i.e. at a
+ *	      time only one of the child mdio buses can be used.
+ * @data: to store the address of data allocated by this function
+ */
+int mdio_mux_regmap_init(struct device *dev,
+			 struct device_node *mux_node,
+			 void **data)
+{
+	struct device_node *child;
+	struct mdio_mux_regmap_state *s;
+	int ret;
+	u32 val;
+
+	dev_dbg(dev, "probing node %pOF\n", mux_node);
+
+	s = devm_kzalloc(dev, sizeof(*s), GFP_KERNEL);
+	if (!s)
+		return -ENOMEM;
+
+	s->regmap = dev_get_regmap(dev, NULL);
+	if (IS_ERR(s->regmap)) {
+		dev_err(dev, "Failed to get parent regmap\n");
+		return PTR_ERR(s->regmap);
+	}
+
+	ret = of_property_read_u32(mux_node, "reg", &s->mux_reg);
+	if (ret) {
+		dev_err(dev, "missing or invalid reg property\n");
+		return -ENODEV;
+	}
+
+	/* Test Register read write */
+	ret = regmap_read(s->regmap, s->mux_reg, &val);
+	if (ret) {
+		dev_err(dev, "error while reading reg\n");
+		return ret;
+	}
+
+	ret = regmap_write(s->regmap, s->mux_reg, val);
+	if (ret) {
+		dev_err(dev, "error while writing reg\n");
+		return ret;
+	}
+
+	ret = of_property_read_u32(mux_node, "mux-mask", &s->mask);
+	if (ret) {
+		dev_err(dev, "missing or invalid mux-mask property\n");
+		return -ENODEV;
+	}
+
+	/* Verify that the 'reg' property of each child MDIO bus does not
+	 * set any bits outside of the 'mask'.
+	 */
+	for_each_available_child_of_node(mux_node, child) {
+		ret = of_property_read_u32(child, "reg", &val);
+		if (ret) {
+			dev_err(dev, "%pOF is missing a 'reg' property\n",
+				child);
+			of_node_put(child);
+			return -ENODEV;
+		}
+		if (val & ~s->mask) {
+			dev_err(dev,
+				"%pOF has a 'reg' value with unmasked bits\n",
+				child);
+			of_node_put(child);
+			return -ENODEV;
+		}
+	}
+
+	ret = mdio_mux_init(dev, mux_node, mdio_mux_regmap_switch_fn,
+			    &s->mux_handle, s, NULL);
+	if (ret) {
+		if (ret != -EPROBE_DEFER)
+			dev_err(dev, "failed to register mdio-mux bus %pOF\n",
+				mux_node);
+		return ret;
+	}
+
+	*data = s;
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(mdio_mux_regmap_init);
+
+/**
+ * mdio_mux_regmap_uninit - relinquish the control of MDIO bus muxing using
+ *			    regmap constructs.
+ * @data: address of data allocated by mdio_mux_regmap_init
+ */
+void mdio_mux_regmap_uninit(void *data)
+{
+	struct mdio_mux_regmap_state *s = data;
+
+	mdio_mux_uninit(s->mux_handle);
+}
+EXPORT_SYMBOL_GPL(mdio_mux_regmap_uninit);
+
+MODULE_AUTHOR("Pankaj Bansal <pankaj.bansal@nxp.com>");
+MODULE_DESCRIPTION("regmap based MDIO MUX driver");
+MODULE_LICENSE("GPL");
+
diff --git a/include/linux/mdio-mux.h b/include/linux/mdio-mux.h
index a5d58f221939..bc358435b4b3 100644
--- a/include/linux/mdio-mux.h
+++ b/include/linux/mdio-mux.h
@@ -29,4 +29,37 @@ int mdio_mux_init(struct device *dev,
 
 void mdio_mux_uninit(void *mux_handle);
 
+#if IS_ENABLED(CONFIG_MDIO_BUS_MUX_REGMAP)
+/**
+ * mdio_mux_regmap_init - control MDIO bus muxing using regmap constructs.
+ * @dev: device with which regmap construct is associated.
+ * @mux_node: mdio bus mux node that contains parent mdio bus phandle.
+ *	      This node also contains sub nodes, where each subnode denotes
+ *	      a child mdio bus. All the child mdio buses are muxed, i.e. at a
+ *	      time only one of the child mdio buses can be used.
+ * @data: to store the address of data allocated by this function
+ */
+int mdio_mux_regmap_init(struct device *dev,
+			 struct device_node *mux_node,
+			 void **data);
+
+/**
+ * mdio_mux_regmap_uninit - relinquish the control of MDIO bus muxing using
+ *			    regmap constructs.
+ * @data: address of data allocated by mdio_mux_regmap_init
+ */
+void mdio_mux_regmap_uninit(void *data);
+#else /* IS_ENABLED(CONFIG_MDIO_BUS_MUX_REGMAP) */
+static inline int mdio_mux_regmap_init(struct device *dev,
+				       struct device_node *mux_node,
+				       void **data)
+{
+	return -ENODEV;
+}
+
+static inline void mdio_mux_regmap_uninit(void *data)
+{
+}
+#endif /* IS_ENABLED(CONFIG_MDIO_BUS_MUX_REGMAP) */
+
 #endif /* __LINUX_MDIO_MUX_H */
-- 
2.17.1

Re: [PATCH v4 1/2] dt-bindings: net: add MDIO bus multiplexer driven by a regmap device

[Andrew Lunn]

On Wed, Feb 06, 2019 at 06:20:39AM +0000, Pankaj Bansal wrote:
> Add support for an MDIO bus multiplexer controlled by a regmap
> device, like an FPGA.
> 
> Tested on a NXP LX2160AQDS board which uses the "QIXIS" FPGA
> attached to the i2c bus.
> 
> Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
> ---
> 
> Notes:
>     V4:
>     - No change
>     V3:
>     - No change
>     V2:
>     - New file describing the device tree bindings for regmap controlled devices'
>       mdio mux
> 
>  .../bindings/net/mdio-mux-regmap.txt         | 167 +++++++++++++++++
>  1 file changed, 167 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/net/mdio-mux-regmap.txt b/Documentation/devicetree/bindings/net/mdio-mux-regmap.txt
> new file mode 100644
> index 000000000000..8968f317965f
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/mdio-mux-regmap.txt
> @@ -0,0 +1,167 @@
> +Properties for an MDIO bus multiplexer controlled by a regmap
> +
> +This is a special case of a MDIO bus multiplexer.  A regmap device,
> +like an FPGA, is used to control which child bus is connected.  The mdio-mux
> +node must be a child of the device that is controlled by a regmap.
> +The driver currently only supports devices with upto 32-bit registers.
> +
> +Required properties in addition to the generic multiplexer properties:
> +
> +- reg : integer, contains the offset of the register that controls the bus
> +	multiplexer. it can be 32 bit number.
> +
> +- mux-mask : integer, contains an 32 bit mask that specifies which
> +	bits in the register control the actual bus multiplexer.  The
> +	'reg' property of each child mdio-mux node must be constrained by
> +	this mask.

Hi Pankaj

Maybe you can address the comment about not having a compatible flag
by commenting that this is a device tree fragment, which is expected
to appear inside the binding of some other device. It is not a
standalone device.

	   Andrew