* [PATCH 1/3] drm/amdgpu: Improve doorbell variable names
@ 2019-02-06 15:49 Zhao, Yong
[not found] ` <20190206154921.14463-1-Yong.Zhao-5C7GfCeVMHo@public.gmane.org>
0 siblings, 1 reply; 9+ messages in thread
From: Zhao, Yong @ 2019-02-06 15:49 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Zhao, Yong
Indicate that the doorbell offset and range is in dwords.
Change-Id: Ib0f2564ffa7b1940ffb8725cdc03f662184f5436
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 4 ++--
drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h | 3 ++-
drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h | 2 +-
drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c | 10 +++++-----
drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c | 10 +++++-----
drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c | 10 +++++-----
drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 3 ++-
drivers/gpu/drm/amd/amdgpu/soc15.c | 4 ++--
drivers/gpu/drm/amd/amdgpu/tonga_ih.c | 6 +++---
drivers/gpu/drm/amd/amdgpu/vega10_ih.c | 6 +++---
drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c | 6 +++++-
drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c | 6 +++++-
12 files changed, 40 insertions(+), 30 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index d67f8b1dfe80..88b3bbcea756 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -642,13 +642,13 @@ struct amdgpu_nbio_funcs {
void (*hdp_flush)(struct amdgpu_device *adev, struct amdgpu_ring *ring);
u32 (*get_memsize)(struct amdgpu_device *adev);
void (*sdma_doorbell_range)(struct amdgpu_device *adev, int instance,
- bool use_doorbell, int doorbell_index, int doorbell_size);
+ bool use_doorbell, int index_in_dw, int range_dw_size);
void (*enable_doorbell_aperture)(struct amdgpu_device *adev,
bool enable);
void (*enable_doorbell_selfring_aperture)(struct amdgpu_device *adev,
bool enable);
void (*ih_doorbell_range)(struct amdgpu_device *adev,
- bool use_doorbell, int doorbell_index);
+ bool use_doorbell, int index_in_dw);
void (*update_medium_grain_clock_gating)(struct amdgpu_device *adev,
bool enable);
void (*update_medium_grain_light_sleep)(struct amdgpu_device *adev,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
index 1cfec06f81d4..5c8d04c353d0 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
@@ -39,6 +39,7 @@ struct amdgpu_doorbell {
* can be 64-bit, so the index defined is in qword.
*/
struct amdgpu_doorbell_index {
+ uint32_t entry_dw_size;
uint32_t kiq;
uint32_t mec_ring0;
uint32_t mec_ring1;
@@ -73,7 +74,7 @@ struct amdgpu_doorbell_index {
};
uint32_t max_assignment;
/* Per engine SDMA doorbell size in dword */
- uint32_t sdma_doorbell_range;
+ uint32_t dw_range_per_sdma_eng;
};
typedef enum _AMDGPU_DOORBELL_ASSIGNMENT
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h
index 1ccb1831382a..2572191b394a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h
@@ -33,7 +33,7 @@ struct amdgpu_iv_entry;
struct amdgpu_ih_ring {
unsigned ring_size;
uint32_t ptr_mask;
- u32 doorbell_index;
+ u32 doorbell_idx_in_dw;
bool use_doorbell;
bool use_bus_addr;
diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c b/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c
index cc967dbfd631..bcc41c957b24 100644
--- a/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c
+++ b/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c
@@ -68,7 +68,7 @@ static u32 nbio_v6_1_get_memsize(struct amdgpu_device *adev)
}
static void nbio_v6_1_sdma_doorbell_range(struct amdgpu_device *adev, int instance,
- bool use_doorbell, int doorbell_index, int doorbell_size)
+ bool use_doorbell, int index_in_dw, int range_dw_size)
{
u32 reg = instance == 0 ? SOC15_REG_OFFSET(NBIO, 0, mmBIF_SDMA0_DOORBELL_RANGE) :
SOC15_REG_OFFSET(NBIO, 0, mmBIF_SDMA1_DOORBELL_RANGE);
@@ -76,8 +76,8 @@ static void nbio_v6_1_sdma_doorbell_range(struct amdgpu_device *adev, int instan
u32 doorbell_range = RREG32(reg);
if (use_doorbell) {
- doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, OFFSET, doorbell_index);
- doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, doorbell_size);
+ doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, OFFSET, index_in_dw);
+ doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, range_dw_size);
} else
doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, 0);
@@ -112,12 +112,12 @@ static void nbio_v6_1_enable_doorbell_selfring_aperture(struct amdgpu_device *ad
static void nbio_v6_1_ih_doorbell_range(struct amdgpu_device *adev,
- bool use_doorbell, int doorbell_index)
+ bool use_doorbell, int index_in_dw)
{
u32 ih_doorbell_range = RREG32_SOC15(NBIO, 0 , mmBIF_IH_DOORBELL_RANGE);
if (use_doorbell) {
- ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, BIF_IH_DOORBELL_RANGE, OFFSET, doorbell_index);
+ ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, BIF_IH_DOORBELL_RANGE, OFFSET, index_in_dw);
ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, BIF_IH_DOORBELL_RANGE, SIZE, 2);
} else
ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, BIF_IH_DOORBELL_RANGE, SIZE, 0);
diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c b/drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c
index 1cdb98ad2db3..02a9093b464a 100644
--- a/drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c
@@ -67,7 +67,7 @@ static u32 nbio_v7_0_get_memsize(struct amdgpu_device *adev)
}
static void nbio_v7_0_sdma_doorbell_range(struct amdgpu_device *adev, int instance,
- bool use_doorbell, int doorbell_index, int doorbell_size)
+ bool use_doorbell, int index_in_dw, int range_dw_size)
{
u32 reg = instance == 0 ? SOC15_REG_OFFSET(NBIO, 0, mmBIF_SDMA0_DOORBELL_RANGE) :
SOC15_REG_OFFSET(NBIO, 0, mmBIF_SDMA1_DOORBELL_RANGE);
@@ -75,8 +75,8 @@ static void nbio_v7_0_sdma_doorbell_range(struct amdgpu_device *adev, int instan
u32 doorbell_range = RREG32(reg);
if (use_doorbell) {
- doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, OFFSET, doorbell_index);
- doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, doorbell_size);
+ doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, OFFSET, index_in_dw);
+ doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, range_dw_size);
} else
doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, 0);
@@ -96,12 +96,12 @@ static void nbio_v7_0_enable_doorbell_selfring_aperture(struct amdgpu_device *ad
}
static void nbio_v7_0_ih_doorbell_range(struct amdgpu_device *adev,
- bool use_doorbell, int doorbell_index)
+ bool use_doorbell, int index_in_dw)
{
u32 ih_doorbell_range = RREG32_SOC15(NBIO, 0 , mmBIF_IH_DOORBELL_RANGE);
if (use_doorbell) {
- ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, BIF_IH_DOORBELL_RANGE, OFFSET, doorbell_index);
+ ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, BIF_IH_DOORBELL_RANGE, OFFSET, index_in_dw);
ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, BIF_IH_DOORBELL_RANGE, SIZE, 2);
} else
ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, BIF_IH_DOORBELL_RANGE, SIZE, 0);
diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c b/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c
index 221f26e50322..c32a5bd055d9 100644
--- a/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c
+++ b/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c
@@ -65,7 +65,7 @@ static u32 nbio_v7_4_get_memsize(struct amdgpu_device *adev)
}
static void nbio_v7_4_sdma_doorbell_range(struct amdgpu_device *adev, int instance,
- bool use_doorbell, int doorbell_index, int doorbell_size)
+ bool use_doorbell, int index_in_dw, int range_dw_size)
{
u32 reg = instance == 0 ? SOC15_REG_OFFSET(NBIO, 0, mmBIF_SDMA0_DOORBELL_RANGE) :
SOC15_REG_OFFSET(NBIO, 0, mmBIF_SDMA1_DOORBELL_RANGE);
@@ -73,8 +73,8 @@ static void nbio_v7_4_sdma_doorbell_range(struct amdgpu_device *adev, int instan
u32 doorbell_range = RREG32(reg);
if (use_doorbell) {
- doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, OFFSET, doorbell_index);
- doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, doorbell_size);
+ doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, OFFSET, index_in_dw);
+ doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, range_dw_size);
} else
doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, 0);
@@ -107,12 +107,12 @@ static void nbio_v7_4_enable_doorbell_selfring_aperture(struct amdgpu_device *ad
}
static void nbio_v7_4_ih_doorbell_range(struct amdgpu_device *adev,
- bool use_doorbell, int doorbell_index)
+ bool use_doorbell, int index_in_dw)
{
u32 ih_doorbell_range = RREG32_SOC15(NBIO, 0 , mmBIF_IH_DOORBELL_RANGE);
if (use_doorbell) {
- ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, BIF_IH_DOORBELL_RANGE, OFFSET, doorbell_index);
+ ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, BIF_IH_DOORBELL_RANGE, OFFSET, index_in_dw);
ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, BIF_IH_DOORBELL_RANGE, SIZE, 2);
} else
ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, BIF_IH_DOORBELL_RANGE, SIZE, 0);
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
index 127b85983e8f..e65e9bc52bd4 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
@@ -1520,7 +1520,8 @@ static int sdma_v4_0_sw_init(void *handle)
ring->use_doorbell?"true":"false");
/* doorbell size is 2 dwords, get DWORD offset */
- ring->doorbell_index = adev->doorbell_index.sdma_engine[i] << 1;
+ ring->doorbell_index = adev->doorbell_index.sdma_engine[i]
+ * adev->doorbell_index.entry_dw_size;
sprintf(ring->name, "sdma%d", i);
r = amdgpu_ring_init(adev, ring, 1024,
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
index 99ebcf29dcb0..fbf4dde22f6c 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -980,11 +980,11 @@ static void soc15_doorbell_range_init(struct amdgpu_device *adev)
ring = &adev->sdma.instance[i].ring;
adev->nbio_funcs->sdma_doorbell_range(adev, i,
ring->use_doorbell, ring->doorbell_index,
- adev->doorbell_index.sdma_doorbell_range);
+ adev->doorbell_index.dw_range_per_sdma_eng);
}
adev->nbio_funcs->ih_doorbell_range(adev, adev->irq.ih.use_doorbell,
- adev->irq.ih.doorbell_index);
+ adev->irq.ih.doorbell_idx_in_dw);
}
static int soc15_common_hw_init(void *handle)
diff --git a/drivers/gpu/drm/amd/amdgpu/tonga_ih.c b/drivers/gpu/drm/amd/amdgpu/tonga_ih.c
index a20b711a6756..96403ec5c98f 100644
--- a/drivers/gpu/drm/amd/amdgpu/tonga_ih.c
+++ b/drivers/gpu/drm/amd/amdgpu/tonga_ih.c
@@ -143,7 +143,7 @@ static int tonga_ih_irq_init(struct amdgpu_device *adev)
ih_doorbell_rtpr = RREG32(mmIH_DOORBELL_RPTR);
if (adev->irq.ih.use_doorbell) {
ih_doorbell_rtpr = REG_SET_FIELD(ih_doorbell_rtpr, IH_DOORBELL_RPTR,
- OFFSET, adev->irq.ih.doorbell_index);
+ OFFSET, adev->irq.ih.doorbell_idx_in_dw);
ih_doorbell_rtpr = REG_SET_FIELD(ih_doorbell_rtpr, IH_DOORBELL_RPTR,
ENABLE, 1);
} else {
@@ -254,7 +254,7 @@ static void tonga_ih_set_rptr(struct amdgpu_device *adev,
if (ih->use_doorbell) {
/* XXX check if swapping is necessary on BE */
*ih->rptr_cpu = ih->rptr;
- WDOORBELL32(ih->doorbell_index, ih->rptr);
+ WDOORBELL32(ih->doorbell_idx_in_dw, ih->rptr);
} else {
WREG32(mmIH_RB_RPTR, ih->rptr);
}
@@ -284,7 +284,7 @@ static int tonga_ih_sw_init(void *handle)
return r;
adev->irq.ih.use_doorbell = true;
- adev->irq.ih.doorbell_index = adev->doorbell_index.ih;
+ adev->irq.ih.doorbell_idx_in_dw = adev->doorbell_index.ih;
r = amdgpu_irq_init(adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/vega10_ih.c b/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
index 6d1f804277f8..796004896661 100644
--- a/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
+++ b/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
@@ -184,7 +184,7 @@ static int vega10_ih_irq_init(struct amdgpu_device *adev)
if (adev->irq.ih.use_doorbell) {
ih_doorbell_rtpr = REG_SET_FIELD(ih_doorbell_rtpr,
IH_DOORBELL_RPTR, OFFSET,
- adev->irq.ih.doorbell_index);
+ adev->irq.ih.doorbell_idx_in_dw);
ih_doorbell_rtpr = REG_SET_FIELD(ih_doorbell_rtpr,
IH_DOORBELL_RPTR,
ENABLE, 1);
@@ -377,7 +377,7 @@ static void vega10_ih_set_rptr(struct amdgpu_device *adev,
if (ih->use_doorbell) {
/* XXX check if swapping is necessary on BE */
*ih->rptr_cpu = ih->rptr;
- WDOORBELL32(ih->doorbell_index, ih->rptr);
+ WDOORBELL32(ih->doorbell_idx_in_dw, ih->rptr);
} else if (ih == &adev->irq.ih) {
WREG32_SOC15(OSSSYS, 0, mmIH_RB_RPTR, ih->rptr);
} else if (ih == &adev->irq.ih1) {
@@ -461,7 +461,7 @@ static int vega10_ih_sw_init(void *handle)
/* TODO add doorbell for IH1 & IH2 as well */
adev->irq.ih.use_doorbell = true;
- adev->irq.ih.doorbell_index = adev->doorbell_index.ih << 1;
+ adev->irq.ih.doorbell_idx_in_dw = adev->doorbell_index.ih << 1;
r = amdgpu_irq_init(adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c b/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c
index 4b5d60ea3e78..d2409df2dde9 100644
--- a/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c
+++ b/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c
@@ -58,6 +58,7 @@ int vega10_reg_base_init(struct amdgpu_device *adev)
void vega10_doorbell_index_init(struct amdgpu_device *adev)
{
+ adev->doorbell_index.entry_dw_size = 2;
adev->doorbell_index.kiq = AMDGPU_DOORBELL64_KIQ;
adev->doorbell_index.mec_ring0 = AMDGPU_DOORBELL64_MEC_RING0;
adev->doorbell_index.mec_ring1 = AMDGPU_DOORBELL64_MEC_RING1;
@@ -83,6 +84,9 @@ void vega10_doorbell_index_init(struct amdgpu_device *adev)
adev->doorbell_index.uvd_vce.vce_ring6_7 = AMDGPU_DOORBELL64_VCE_RING6_7;
/* In unit of dword doorbell */
adev->doorbell_index.max_assignment = AMDGPU_DOORBELL64_MAX_ASSIGNMENT << 1;
- adev->doorbell_index.sdma_doorbell_range = 4;
+ adev->doorbell_index.dw_range_per_sdma_eng =
+ (adev->doorbell_index.sdma_engine[1]
+ - adev->doorbell_index.sdma_engine[0])
+ * adev->doorbell_index.entry_dw_size;
}
diff --git a/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c b/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c
index 53716c593b2b..b28c5999d8f0 100644
--- a/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c
+++ b/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c
@@ -56,6 +56,7 @@ int vega20_reg_base_init(struct amdgpu_device *adev)
void vega20_doorbell_index_init(struct amdgpu_device *adev)
{
+ adev->doorbell_index.entry_dw_size = 2;
adev->doorbell_index.kiq = AMDGPU_VEGA20_DOORBELL_KIQ;
adev->doorbell_index.mec_ring0 = AMDGPU_VEGA20_DOORBELL_MEC_RING0;
adev->doorbell_index.mec_ring1 = AMDGPU_VEGA20_DOORBELL_MEC_RING1;
@@ -86,6 +87,9 @@ void vega20_doorbell_index_init(struct amdgpu_device *adev)
adev->doorbell_index.uvd_vce.vce_ring4_5 = AMDGPU_VEGA20_DOORBELL64_VCE_RING4_5;
adev->doorbell_index.uvd_vce.vce_ring6_7 = AMDGPU_VEGA20_DOORBELL64_VCE_RING6_7;
adev->doorbell_index.max_assignment = AMDGPU_VEGA20_DOORBELL_MAX_ASSIGNMENT << 1;
- adev->doorbell_index.sdma_doorbell_range = 20;
+ adev->doorbell_index.dw_range_per_sdma_eng =
+ (adev->doorbell_index.sdma_engine[1]
+ - adev->doorbell_index.sdma_engine[0])
+ * adev->doorbell_index.entry_dw_size;
}
--
2.17.1
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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 2/3] drm/amdgpu: Fix a typo in vega10_ih_set_rptr()
[not found] ` <20190206154921.14463-1-Yong.Zhao-5C7GfCeVMHo@public.gmane.org>
@ 2019-02-06 15:49 ` Zhao, Yong
[not found] ` <20190206154921.14463-2-Yong.Zhao-5C7GfCeVMHo@public.gmane.org>
2019-02-06 15:49 ` [PATCH 3/3] drm/amdgpu: Add dword term to the doorbell index in rings Zhao, Yong
2019-02-06 15:55 ` [PATCH 1/3] drm/amdgpu: Improve doorbell variable names Zhao, Yong
2 siblings, 1 reply; 9+ messages in thread
From: Zhao, Yong @ 2019-02-06 15:49 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Zhao, Yong
Clearly, it should be a 64-bit doorbell operation.
Change-Id: I644a2ebcb18c2ede24ee15692a6189efad10a35c
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
---
drivers/gpu/drm/amd/amdgpu/vega10_ih.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vega10_ih.c b/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
index 796004896661..36f0e3cada30 100644
--- a/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
+++ b/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
@@ -377,7 +377,7 @@ static void vega10_ih_set_rptr(struct amdgpu_device *adev,
if (ih->use_doorbell) {
/* XXX check if swapping is necessary on BE */
*ih->rptr_cpu = ih->rptr;
- WDOORBELL32(ih->doorbell_idx_in_dw, ih->rptr);
+ WDOORBELL64(ih->doorbell_idx_in_dw, ih->rptr);
} else if (ih == &adev->irq.ih) {
WREG32_SOC15(OSSSYS, 0, mmIH_RB_RPTR, ih->rptr);
} else if (ih == &adev->irq.ih1) {
--
2.17.1
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amd-gfx mailing list
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^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 3/3] drm/amdgpu: Add dword term to the doorbell index in rings
[not found] ` <20190206154921.14463-1-Yong.Zhao-5C7GfCeVMHo@public.gmane.org>
2019-02-06 15:49 ` [PATCH 2/3] drm/amdgpu: Fix a typo in vega10_ih_set_rptr() Zhao, Yong
@ 2019-02-06 15:49 ` Zhao, Yong
2019-02-06 15:55 ` [PATCH 1/3] drm/amdgpu: Improve doorbell variable names Zhao, Yong
2 siblings, 0 replies; 9+ messages in thread
From: Zhao, Yong @ 2019-02-06 15:49 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Zhao, Yong
When doorbells are 8-byte on SOC15, doorbell_index in rings no longer
reflects its true usage. So we should indicate its dword attribute as
a generic way to accommodate different doorbell sizes.
Change-Id: I053c69498af5d68df1783a7eb03106dd68f5e8cc
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 2 +-
drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c | 2 +-
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 6 +++---
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 16 ++++++++--------
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 20 ++++++++++----------
drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 6 +++---
drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 16 ++++++++--------
drivers/gpu/drm/amd/amdgpu/soc15.c | 2 +-
drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c | 8 ++++----
drivers/gpu/drm/amd/amdgpu/vce_v4_0.c | 8 ++++----
11 files changed, 44 insertions(+), 44 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
index 97a60da62004..6389ef068f4b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
@@ -250,7 +250,7 @@ int amdgpu_gfx_kiq_init_ring(struct amdgpu_device *adev,
ring->adev = NULL;
ring->ring_obj = NULL;
ring->use_doorbell = true;
- ring->doorbell_index = adev->doorbell_index.kiq;
+ ring->doorbell_dw_idx = adev->doorbell_index.kiq;
r = amdgpu_gfx_kiq_acquire(adev, ring);
if (r)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
index d7fae2676269..0c6fa7576a9f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
@@ -198,7 +198,7 @@ struct amdgpu_ring {
uint64_t mqd_gpu_addr;
void *mqd_ptr;
uint64_t eop_gpu_addr;
- u32 doorbell_index;
+ u32 doorbell_dw_idx;
bool use_doorbell;
bool use_pollmem;
unsigned wptr_offs;
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
index 305276c7e4bf..a6aff3f9ab9d 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
@@ -3109,7 +3109,7 @@ static int gfx_v6_0_sw_init(void *handle)
ring = &adev->gfx.compute_ring[i];
ring->ring_obj = NULL;
ring->use_doorbell = false;
- ring->doorbell_index = 0;
+ ring->doorbell_dw_idx = 0;
ring->me = 1;
ring->pipe = i;
ring->queue = i;
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
index 7984292f9282..3f11f0ac43fc 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
@@ -2641,7 +2641,7 @@ static void gfx_v7_0_ring_set_wptr_compute(struct amdgpu_ring *ring)
/* XXX check if swapping is necessary on BE */
adev->wb.wb[ring->wptr_offs] = lower_32_bits(ring->wptr);
- WDOORBELL32(ring->doorbell_index, lower_32_bits(ring->wptr));
+ WDOORBELL32(ring->doorbell_dw_idx, lower_32_bits(ring->wptr));
}
/**
@@ -2957,7 +2957,7 @@ static void gfx_v7_0_mqd_init(struct amdgpu_device *adev,
mqd->cp_hqd_pq_doorbell_control &=
~CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_OFFSET_MASK;
mqd->cp_hqd_pq_doorbell_control |=
- (ring->doorbell_index <<
+ (ring->doorbell_dw_idx <<
CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_OFFSET__SHIFT);
mqd->cp_hqd_pq_doorbell_control |=
CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_EN_MASK;
@@ -4363,7 +4363,7 @@ static int gfx_v7_0_compute_ring_init(struct amdgpu_device *adev, int ring_id,
ring->ring_obj = NULL;
ring->use_doorbell = true;
- ring->doorbell_index = adev->doorbell_index.mec_ring0 + ring_id;
+ ring->doorbell_dw_idx = adev->doorbell_index.mec_ring0 + ring_id;
sprintf(ring->name, "comp_%d.%d.%d", ring->me, ring->pipe, ring->queue);
irq_type = AMDGPU_CP_IRQ_COMPUTE_MEC1_PIPE0_EOP
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index a26747681ed6..a2ae1446e7a9 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -1890,7 +1890,7 @@ static int gfx_v8_0_compute_ring_init(struct amdgpu_device *adev, int ring_id,
ring->ring_obj = NULL;
ring->use_doorbell = true;
- ring->doorbell_index = adev->doorbell_index.mec_ring0 + ring_id;
+ ring->doorbell_dw_idx = adev->doorbell_index.mec_ring0 + ring_id;
ring->eop_gpu_addr = adev->gfx.mec.hpd_eop_gpu_addr
+ (ring_id * GFX8_MEC_HPD_SIZE);
sprintf(ring->name, "comp_%d.%d.%d", ring->me, ring->pipe, ring->queue);
@@ -2001,7 +2001,7 @@ static int gfx_v8_0_sw_init(void *handle)
/* no gfx doorbells on iceland */
if (adev->asic_type != CHIP_TOPAZ) {
ring->use_doorbell = true;
- ring->doorbell_index = adev->doorbell_index.gfx_ring0;
+ ring->doorbell_dw_idx = adev->doorbell_index.gfx_ring0;
}
r = amdgpu_ring_init(adev, ring, 1024, &adev->gfx.eop_irq,
@@ -4204,7 +4204,7 @@ static void gfx_v8_0_set_cpg_door_bell(struct amdgpu_device *adev, struct amdgpu
if (ring->use_doorbell) {
tmp = REG_SET_FIELD(tmp, CP_RB_DOORBELL_CONTROL,
- DOORBELL_OFFSET, ring->doorbell_index);
+ DOORBELL_OFFSET, ring->doorbell_dw_idx);
tmp = REG_SET_FIELD(tmp, CP_RB_DOORBELL_CONTROL,
DOORBELL_HIT, 0);
tmp = REG_SET_FIELD(tmp, CP_RB_DOORBELL_CONTROL,
@@ -4357,7 +4357,7 @@ static int gfx_v8_0_kiq_kcq_enable(struct amdgpu_device *adev)
amdgpu_ring_write(kiq_ring,
PACKET3_MAP_QUEUES_NUM_QUEUES(1));
amdgpu_ring_write(kiq_ring,
- PACKET3_MAP_QUEUES_DOORBELL_OFFSET(ring->doorbell_index) |
+ PACKET3_MAP_QUEUES_DOORBELL_OFFSET(ring->doorbell_dw_idx) |
PACKET3_MAP_QUEUES_QUEUE(ring->queue) |
PACKET3_MAP_QUEUES_PIPE(ring->pipe) |
PACKET3_MAP_QUEUES_ME(ring->me == 1 ? 0 : 1)); /* doorbell */
@@ -4475,7 +4475,7 @@ static int gfx_v8_0_mqd_init(struct amdgpu_ring *ring)
if (ring->use_doorbell) {
tmp = RREG32(mmCP_HQD_PQ_DOORBELL_CONTROL);
tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,
- DOORBELL_OFFSET, ring->doorbell_index);
+ DOORBELL_OFFSET, ring->doorbell_dw_idx);
tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,
DOORBELL_EN, 1);
@@ -4803,7 +4803,7 @@ static int gfx_v8_0_kcq_disable(struct amdgpu_device *adev)
PACKET3_UNMAP_QUEUES_QUEUE_SEL(0) |
PACKET3_UNMAP_QUEUES_ENGINE_SEL(0) |
PACKET3_UNMAP_QUEUES_NUM_QUEUES(1));
- amdgpu_ring_write(kiq_ring, PACKET3_UNMAP_QUEUES_DOORBELL_OFFSET0(ring->doorbell_index));
+ amdgpu_ring_write(kiq_ring, PACKET3_UNMAP_QUEUES_DOORBELL_OFFSET0(ring->doorbell_dw_idx));
amdgpu_ring_write(kiq_ring, 0);
amdgpu_ring_write(kiq_ring, 0);
amdgpu_ring_write(kiq_ring, 0);
@@ -5993,7 +5993,7 @@ static void gfx_v8_0_ring_set_wptr_gfx(struct amdgpu_ring *ring)
if (ring->use_doorbell) {
/* XXX check if swapping is necessary on BE */
adev->wb.wb[ring->wptr_offs] = lower_32_bits(ring->wptr);
- WDOORBELL32(ring->doorbell_index, lower_32_bits(ring->wptr));
+ WDOORBELL32(ring->doorbell_dw_idx, lower_32_bits(ring->wptr));
} else {
WREG32(mmCP_RB0_WPTR, lower_32_bits(ring->wptr));
(void)RREG32(mmCP_RB0_WPTR);
@@ -6169,7 +6169,7 @@ static void gfx_v8_0_ring_set_wptr_compute(struct amdgpu_ring *ring)
/* XXX check if swapping is necessary on BE */
adev->wb.wb[ring->wptr_offs] = lower_32_bits(ring->wptr);
- WDOORBELL32(ring->doorbell_index, lower_32_bits(ring->wptr));
+ WDOORBELL32(ring->doorbell_dw_idx, lower_32_bits(ring->wptr));
}
static void gfx_v8_0_ring_set_pipe_percent(struct amdgpu_ring *ring,
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index 262ee3cf6f1c..139515feef64 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -1580,7 +1580,7 @@ static int gfx_v9_0_compute_ring_init(struct amdgpu_device *adev, int ring_id,
ring->ring_obj = NULL;
ring->use_doorbell = true;
- ring->doorbell_index = (adev->doorbell_index.mec_ring0 + ring_id) << 1;
+ ring->doorbell_dw_idx = (adev->doorbell_index.mec_ring0 + ring_id) << 1;
ring->eop_gpu_addr = adev->gfx.mec.hpd_eop_gpu_addr
+ (ring_id * GFX9_MEC_HPD_SIZE);
sprintf(ring->name, "comp_%d.%d.%d", ring->me, ring->pipe, ring->queue);
@@ -1669,7 +1669,7 @@ static int gfx_v9_0_sw_init(void *handle)
else
sprintf(ring->name, "gfx_%d", i);
ring->use_doorbell = true;
- ring->doorbell_index = adev->doorbell_index.gfx_ring0 << 1;
+ ring->doorbell_dw_idx = adev->doorbell_index.gfx_ring0 << 1;
r = amdgpu_ring_init(adev, ring, 1024,
&adev->gfx.eop_irq, AMDGPU_CP_IRQ_GFX_EOP);
if (r)
@@ -2619,7 +2619,7 @@ static int gfx_v9_0_cp_gfx_resume(struct amdgpu_device *adev)
tmp = RREG32_SOC15(GC, 0, mmCP_RB_DOORBELL_CONTROL);
if (ring->use_doorbell) {
tmp = REG_SET_FIELD(tmp, CP_RB_DOORBELL_CONTROL,
- DOORBELL_OFFSET, ring->doorbell_index);
+ DOORBELL_OFFSET, ring->doorbell_dw_idx);
tmp = REG_SET_FIELD(tmp, CP_RB_DOORBELL_CONTROL,
DOORBELL_EN, 1);
} else {
@@ -2628,7 +2628,7 @@ static int gfx_v9_0_cp_gfx_resume(struct amdgpu_device *adev)
WREG32_SOC15(GC, 0, mmCP_RB_DOORBELL_CONTROL, tmp);
tmp = REG_SET_FIELD(0, CP_RB_DOORBELL_RANGE_LOWER,
- DOORBELL_RANGE_LOWER, ring->doorbell_index);
+ DOORBELL_RANGE_LOWER, ring->doorbell_dw_idx);
WREG32_SOC15(GC, 0, mmCP_RB_DOORBELL_RANGE_LOWER, tmp);
WREG32_SOC15(GC, 0, mmCP_RB_DOORBELL_RANGE_UPPER,
@@ -2769,7 +2769,7 @@ static int gfx_v9_0_kiq_kcq_enable(struct amdgpu_device *adev)
PACKET3_MAP_QUEUES_ALLOC_FORMAT(0) | /* alloc format: all_on_one_pipe */
PACKET3_MAP_QUEUES_ENGINE_SEL(0) | /* engine_sel: compute */
PACKET3_MAP_QUEUES_NUM_QUEUES(1)); /* num_queues: must be 1 */
- amdgpu_ring_write(kiq_ring, PACKET3_MAP_QUEUES_DOORBELL_OFFSET(ring->doorbell_index));
+ amdgpu_ring_write(kiq_ring, PACKET3_MAP_QUEUES_DOORBELL_OFFSET(ring->doorbell_dw_idx));
amdgpu_ring_write(kiq_ring, lower_32_bits(mqd_addr));
amdgpu_ring_write(kiq_ring, upper_32_bits(mqd_addr));
amdgpu_ring_write(kiq_ring, lower_32_bits(wptr_addr));
@@ -2821,7 +2821,7 @@ static int gfx_v9_0_mqd_init(struct amdgpu_ring *ring)
if (ring->use_doorbell) {
tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,
- DOORBELL_OFFSET, ring->doorbell_index);
+ DOORBELL_OFFSET, ring->doorbell_dw_idx);
tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,
DOORBELL_EN, 1);
tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,
@@ -2887,7 +2887,7 @@ static int gfx_v9_0_mqd_init(struct amdgpu_ring *ring)
if (ring->use_doorbell) {
tmp = RREG32_SOC15(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL);
tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,
- DOORBELL_OFFSET, ring->doorbell_index);
+ DOORBELL_OFFSET, ring->doorbell_dw_idx);
tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,
DOORBELL_EN, 1);
@@ -3288,7 +3288,7 @@ static int gfx_v9_0_kcq_disable(struct amdgpu_device *adev)
PACKET3_UNMAP_QUEUES_QUEUE_SEL(0) |
PACKET3_UNMAP_QUEUES_ENGINE_SEL(0) |
PACKET3_UNMAP_QUEUES_NUM_QUEUES(1));
- amdgpu_ring_write(kiq_ring, PACKET3_UNMAP_QUEUES_DOORBELL_OFFSET0(ring->doorbell_index));
+ amdgpu_ring_write(kiq_ring, PACKET3_UNMAP_QUEUES_DOORBELL_OFFSET0(ring->doorbell_dw_idx));
amdgpu_ring_write(kiq_ring, 0);
amdgpu_ring_write(kiq_ring, 0);
amdgpu_ring_write(kiq_ring, 0);
@@ -3933,7 +3933,7 @@ static void gfx_v9_0_ring_set_wptr_gfx(struct amdgpu_ring *ring)
if (ring->use_doorbell) {
/* XXX check if swapping is necessary on BE */
atomic64_set((atomic64_t*)&adev->wb.wb[ring->wptr_offs], ring->wptr);
- WDOORBELL64(ring->doorbell_index, ring->wptr);
+ WDOORBELL64(ring->doorbell_dw_idx, ring->wptr);
} else {
WREG32_SOC15(GC, 0, mmCP_RB0_WPTR, lower_32_bits(ring->wptr));
WREG32_SOC15(GC, 0, mmCP_RB0_WPTR_HI, upper_32_bits(ring->wptr));
@@ -4202,7 +4202,7 @@ static void gfx_v9_0_ring_set_wptr_compute(struct amdgpu_ring *ring)
/* XXX check if swapping is necessary on BE */
if (ring->use_doorbell) {
atomic64_set((atomic64_t*)&adev->wb.wb[ring->wptr_offs], ring->wptr);
- WDOORBELL64(ring->doorbell_index, ring->wptr);
+ WDOORBELL64(ring->doorbell_dw_idx, ring->wptr);
} else{
BUG(); /* only DOORBELL method supported on gfx9 now */
}
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
index 0ce8331baeb2..954a68e3aa80 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
@@ -387,7 +387,7 @@ static void sdma_v3_0_ring_set_wptr(struct amdgpu_ring *ring)
u32 *wb = (u32 *)&adev->wb.wb[ring->wptr_offs];
/* XXX check if swapping is necessary on BE */
WRITE_ONCE(*wb, (lower_32_bits(ring->wptr) << 2));
- WDOORBELL32(ring->doorbell_index, lower_32_bits(ring->wptr) << 2);
+ WDOORBELL32(ring->doorbell_dw_idx, lower_32_bits(ring->wptr) << 2);
} else if (ring->use_pollmem) {
u32 *wb = (u32 *)&adev->wb.wb[ring->wptr_offs];
@@ -702,7 +702,7 @@ static int sdma_v3_0_gfx_resume(struct amdgpu_device *adev)
if (ring->use_doorbell) {
doorbell = REG_SET_FIELD(doorbell, SDMA0_GFX_DOORBELL,
- OFFSET, ring->doorbell_index);
+ OFFSET, ring->doorbell_dw_idx);
doorbell = REG_SET_FIELD(doorbell, SDMA0_GFX_DOORBELL, ENABLE, 1);
} else {
doorbell = REG_SET_FIELD(doorbell, SDMA0_GFX_DOORBELL, ENABLE, 0);
@@ -1145,7 +1145,7 @@ static int sdma_v3_0_sw_init(void *handle)
ring->ring_obj = NULL;
if (!amdgpu_sriov_vf(adev)) {
ring->use_doorbell = true;
- ring->doorbell_index = adev->doorbell_index.sdma_engine[i];
+ ring->doorbell_dw_idx = adev->doorbell_index.sdma_engine[i];
} else {
ring->use_pollmem = true;
}
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
index e65e9bc52bd4..9136428aea13 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
@@ -408,8 +408,8 @@ static void sdma_v4_0_ring_set_wptr(struct amdgpu_ring *ring)
/* XXX check if swapping is necessary on BE */
WRITE_ONCE(*wb, (ring->wptr << 2));
DRM_DEBUG("calling WDOORBELL64(0x%08x, 0x%016llx)\n",
- ring->doorbell_index, ring->wptr << 2);
- WDOORBELL64(ring->doorbell_index, ring->wptr << 2);
+ ring->doorbell_dw_idx, ring->wptr << 2);
+ WDOORBELL64(ring->doorbell_dw_idx, ring->wptr << 2);
} else {
DRM_DEBUG("Not using doorbell -- "
"mmSDMA%i_GFX_RB_WPTR == 0x%08x "
@@ -465,7 +465,7 @@ static void sdma_v4_0_page_ring_set_wptr(struct amdgpu_ring *ring)
/* XXX check if swapping is necessary on BE */
WRITE_ONCE(*wb, (ring->wptr << 2));
- WDOORBELL64(ring->doorbell_index, ring->wptr << 2);
+ WDOORBELL64(ring->doorbell_dw_idx, ring->wptr << 2);
} else {
uint64_t wptr = ring->wptr << 2;
@@ -831,7 +831,7 @@ static void sdma_v4_0_gfx_resume(struct amdgpu_device *adev, unsigned int i)
ring->use_doorbell);
doorbell_offset = REG_SET_FIELD(doorbell_offset,
SDMA0_GFX_DOORBELL_OFFSET,
- OFFSET, ring->doorbell_index);
+ OFFSET, ring->doorbell_dw_idx);
WREG32_SDMA(i, mmSDMA0_GFX_DOORBELL, doorbell);
WREG32_SDMA(i, mmSDMA0_GFX_DOORBELL_OFFSET, doorbell_offset);
@@ -921,7 +921,7 @@ static void sdma_v4_0_page_resume(struct amdgpu_device *adev, unsigned int i)
ring->use_doorbell);
doorbell_offset = REG_SET_FIELD(doorbell_offset,
SDMA0_PAGE_DOORBELL_OFFSET,
- OFFSET, ring->doorbell_index);
+ OFFSET, ring->doorbell_dw_idx);
WREG32_SDMA(i, mmSDMA0_PAGE_DOORBELL, doorbell);
WREG32_SDMA(i, mmSDMA0_PAGE_DOORBELL_OFFSET, doorbell_offset);
@@ -1520,7 +1520,7 @@ static int sdma_v4_0_sw_init(void *handle)
ring->use_doorbell?"true":"false");
/* doorbell size is 2 dwords, get DWORD offset */
- ring->doorbell_index = adev->doorbell_index.sdma_engine[i]
+ ring->doorbell_dw_idx = adev->doorbell_index.sdma_engine[i]
* adev->doorbell_index.entry_dw_size;
sprintf(ring->name, "sdma%d", i);
@@ -1540,8 +1540,8 @@ static int sdma_v4_0_sw_init(void *handle)
/* paging queue use same doorbell index/routing as gfx queue
* with 0x400 (4096 dwords) offset on second doorbell page
*/
- ring->doorbell_index = adev->doorbell_index.sdma_engine[i] << 1;
- ring->doorbell_index += 0x400;
+ ring->doorbell_dw_idx = adev->doorbell_index.sdma_engine[i] << 1;
+ ring->doorbell_dw_idx += 0x400;
sprintf(ring->name, "page%d", i);
r = amdgpu_ring_init(adev, ring, 1024,
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
index fbf4dde22f6c..db2fa4482e2c 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -979,7 +979,7 @@ static void soc15_doorbell_range_init(struct amdgpu_device *adev)
for (i = 0; i < adev->sdma.num_instances; i++) {
ring = &adev->sdma.instance[i].ring;
adev->nbio_funcs->sdma_doorbell_range(adev, i,
- ring->use_doorbell, ring->doorbell_index,
+ ring->use_doorbell, ring->doorbell_dw_idx,
adev->doorbell_index.dw_range_per_sdma_eng);
}
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
index dc461df48da0..6b3cd7b39394 100644
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
@@ -154,7 +154,7 @@ static void uvd_v7_0_enc_ring_set_wptr(struct amdgpu_ring *ring)
if (ring->use_doorbell) {
/* XXX check if swapping is necessary on BE */
adev->wb.wb[ring->wptr_offs] = lower_32_bits(ring->wptr);
- WDOORBELL32(ring->doorbell_index, lower_32_bits(ring->wptr));
+ WDOORBELL32(ring->doorbell_dw_idx, lower_32_bits(ring->wptr));
return;
}
@@ -451,9 +451,9 @@ static int uvd_v7_0_sw_init(void *handle)
* sriov, so set unused location for other unused rings.
*/
if (i == 0)
- ring->doorbell_index = adev->doorbell_index.uvd_vce.uvd_ring0_1 * 2;
+ ring->doorbell_dw_idx = adev->doorbell_index.uvd_vce.uvd_ring0_1 * 2;
else
- ring->doorbell_index = adev->doorbell_index.uvd_vce.uvd_ring2_3 * 2 + 1;
+ ring->doorbell_dw_idx = adev->doorbell_index.uvd_vce.uvd_ring2_3 * 2 + 1;
}
r = amdgpu_ring_init(adev, ring, 512, &adev->uvd.inst[j].irq, 0);
if (r)
@@ -721,7 +721,7 @@ static int uvd_v7_0_mmsch_start(struct amdgpu_device *adev,
for (i = 0; i < adev->uvd.num_uvd_inst; ++i) {
if (adev->uvd.harvest_config & (1 << i))
continue;
- WDOORBELL32(adev->uvd.inst[i].ring_enc[0].doorbell_index, 0);
+ WDOORBELL32(adev->uvd.inst[i].ring_enc[0].doorbell_dw_idx, 0);
adev->wb.wb[adev->uvd.inst[i].ring_enc[0].wptr_offs] = 0;
adev->uvd.inst[i].ring_enc[0].wptr = 0;
adev->uvd.inst[i].ring_enc[0].wptr_old = 0;
diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c b/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
index aadc3e66ebd7..fc76132085d9 100644
--- a/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
@@ -106,7 +106,7 @@ static void vce_v4_0_ring_set_wptr(struct amdgpu_ring *ring)
if (ring->use_doorbell) {
/* XXX check if swapping is necessary on BE */
adev->wb.wb[ring->wptr_offs] = lower_32_bits(ring->wptr);
- WDOORBELL32(ring->doorbell_index, lower_32_bits(ring->wptr));
+ WDOORBELL32(ring->doorbell_dw_idx, lower_32_bits(ring->wptr));
return;
}
@@ -175,7 +175,7 @@ static int vce_v4_0_mmsch_start(struct amdgpu_device *adev,
/* 4, set resp to zero */
WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_MMSCH_VF_MAILBOX_RESP), 0);
- WDOORBELL32(adev->vce.ring[0].doorbell_index, 0);
+ WDOORBELL32(adev->vce.ring[0].doorbell_dw_idx, 0);
adev->wb.wb[adev->vce.ring[0].wptr_offs] = 0;
adev->vce.ring[0].wptr = 0;
adev->vce.ring[0].wptr_old = 0;
@@ -466,9 +466,9 @@ static int vce_v4_0_sw_init(void *handle)
* so set unused location for other unused rings.
*/
if (i == 0)
- ring->doorbell_index = adev->doorbell_index.uvd_vce.vce_ring0_1 * 2;
+ ring->doorbell_dw_idx = adev->doorbell_index.uvd_vce.vce_ring0_1 * 2;
else
- ring->doorbell_index = adev->doorbell_index.uvd_vce.vce_ring2_3 * 2 + 1;
+ ring->doorbell_dw_idx = adev->doorbell_index.uvd_vce.vce_ring2_3 * 2 + 1;
}
r = amdgpu_ring_init(adev, ring, 512, &adev->vce.irq, 0);
if (r)
--
2.17.1
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH 1/3] drm/amdgpu: Improve doorbell variable names
[not found] ` <20190206154921.14463-1-Yong.Zhao-5C7GfCeVMHo@public.gmane.org>
2019-02-06 15:49 ` [PATCH 2/3] drm/amdgpu: Fix a typo in vega10_ih_set_rptr() Zhao, Yong
2019-02-06 15:49 ` [PATCH 3/3] drm/amdgpu: Add dword term to the doorbell index in rings Zhao, Yong
@ 2019-02-06 15:55 ` Zhao, Yong
2 siblings, 0 replies; 9+ messages in thread
From: Zhao, Yong @ 2019-02-06 15:55 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
[-- Attachment #1.1: Type: text/plain, Size: 18825 bytes --]
Hi Alex,
I only add the corresponding changes for IH, but not for GFX as GFX does not use the similar range functions.
Regards,
Yong
________________________________
From: Zhao, Yong
Sent: Wednesday, February 6, 2019 10:49 AM
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Cc: Zhao, Yong
Subject: [PATCH 1/3] drm/amdgpu: Improve doorbell variable names
Indicate that the doorbell offset and range is in dwords.
Change-Id: Ib0f2564ffa7b1940ffb8725cdc03f662184f5436
Signed-off-by: Yong Zhao <Yong.Zhao-5C7GfCeVMHo@public.gmane.org>
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 4 ++--
drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h | 3 ++-
drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h | 2 +-
drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c | 10 +++++-----
drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c | 10 +++++-----
drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c | 10 +++++-----
drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 3 ++-
drivers/gpu/drm/amd/amdgpu/soc15.c | 4 ++--
drivers/gpu/drm/amd/amdgpu/tonga_ih.c | 6 +++---
drivers/gpu/drm/amd/amdgpu/vega10_ih.c | 6 +++---
drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c | 6 +++++-
drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c | 6 +++++-
12 files changed, 40 insertions(+), 30 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index d67f8b1dfe80..88b3bbcea756 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -642,13 +642,13 @@ struct amdgpu_nbio_funcs {
void (*hdp_flush)(struct amdgpu_device *adev, struct amdgpu_ring *ring);
u32 (*get_memsize)(struct amdgpu_device *adev);
void (*sdma_doorbell_range)(struct amdgpu_device *adev, int instance,
- bool use_doorbell, int doorbell_index, int doorbell_size);
+ bool use_doorbell, int index_in_dw, int range_dw_size);
void (*enable_doorbell_aperture)(struct amdgpu_device *adev,
bool enable);
void (*enable_doorbell_selfring_aperture)(struct amdgpu_device *adev,
bool enable);
void (*ih_doorbell_range)(struct amdgpu_device *adev,
- bool use_doorbell, int doorbell_index);
+ bool use_doorbell, int index_in_dw);
void (*update_medium_grain_clock_gating)(struct amdgpu_device *adev,
bool enable);
void (*update_medium_grain_light_sleep)(struct amdgpu_device *adev,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
index 1cfec06f81d4..5c8d04c353d0 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
@@ -39,6 +39,7 @@ struct amdgpu_doorbell {
* can be 64-bit, so the index defined is in qword.
*/
struct amdgpu_doorbell_index {
+ uint32_t entry_dw_size;
uint32_t kiq;
uint32_t mec_ring0;
uint32_t mec_ring1;
@@ -73,7 +74,7 @@ struct amdgpu_doorbell_index {
};
uint32_t max_assignment;
/* Per engine SDMA doorbell size in dword */
- uint32_t sdma_doorbell_range;
+ uint32_t dw_range_per_sdma_eng;
};
typedef enum _AMDGPU_DOORBELL_ASSIGNMENT
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h
index 1ccb1831382a..2572191b394a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h
@@ -33,7 +33,7 @@ struct amdgpu_iv_entry;
struct amdgpu_ih_ring {
unsigned ring_size;
uint32_t ptr_mask;
- u32 doorbell_index;
+ u32 doorbell_idx_in_dw;
bool use_doorbell;
bool use_bus_addr;
diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c b/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c
index cc967dbfd631..bcc41c957b24 100644
--- a/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c
+++ b/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c
@@ -68,7 +68,7 @@ static u32 nbio_v6_1_get_memsize(struct amdgpu_device *adev)
}
static void nbio_v6_1_sdma_doorbell_range(struct amdgpu_device *adev, int instance,
- bool use_doorbell, int doorbell_index, int doorbell_size)
+ bool use_doorbell, int index_in_dw, int range_dw_size)
{
u32 reg = instance == 0 ? SOC15_REG_OFFSET(NBIO, 0, mmBIF_SDMA0_DOORBELL_RANGE) :
SOC15_REG_OFFSET(NBIO, 0, mmBIF_SDMA1_DOORBELL_RANGE);
@@ -76,8 +76,8 @@ static void nbio_v6_1_sdma_doorbell_range(struct amdgpu_device *adev, int instan
u32 doorbell_range = RREG32(reg);
if (use_doorbell) {
- doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, OFFSET, doorbell_index);
- doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, doorbell_size);
+ doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, OFFSET, index_in_dw);
+ doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, range_dw_size);
} else
doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, 0);
@@ -112,12 +112,12 @@ static void nbio_v6_1_enable_doorbell_selfring_aperture(struct amdgpu_device *ad
static void nbio_v6_1_ih_doorbell_range(struct amdgpu_device *adev,
- bool use_doorbell, int doorbell_index)
+ bool use_doorbell, int index_in_dw)
{
u32 ih_doorbell_range = RREG32_SOC15(NBIO, 0 , mmBIF_IH_DOORBELL_RANGE);
if (use_doorbell) {
- ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, BIF_IH_DOORBELL_RANGE, OFFSET, doorbell_index);
+ ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, BIF_IH_DOORBELL_RANGE, OFFSET, index_in_dw);
ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, BIF_IH_DOORBELL_RANGE, SIZE, 2);
} else
ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, BIF_IH_DOORBELL_RANGE, SIZE, 0);
diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c b/drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c
index 1cdb98ad2db3..02a9093b464a 100644
--- a/drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c
@@ -67,7 +67,7 @@ static u32 nbio_v7_0_get_memsize(struct amdgpu_device *adev)
}
static void nbio_v7_0_sdma_doorbell_range(struct amdgpu_device *adev, int instance,
- bool use_doorbell, int doorbell_index, int doorbell_size)
+ bool use_doorbell, int index_in_dw, int range_dw_size)
{
u32 reg = instance == 0 ? SOC15_REG_OFFSET(NBIO, 0, mmBIF_SDMA0_DOORBELL_RANGE) :
SOC15_REG_OFFSET(NBIO, 0, mmBIF_SDMA1_DOORBELL_RANGE);
@@ -75,8 +75,8 @@ static void nbio_v7_0_sdma_doorbell_range(struct amdgpu_device *adev, int instan
u32 doorbell_range = RREG32(reg);
if (use_doorbell) {
- doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, OFFSET, doorbell_index);
- doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, doorbell_size);
+ doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, OFFSET, index_in_dw);
+ doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, range_dw_size);
} else
doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, 0);
@@ -96,12 +96,12 @@ static void nbio_v7_0_enable_doorbell_selfring_aperture(struct amdgpu_device *ad
}
static void nbio_v7_0_ih_doorbell_range(struct amdgpu_device *adev,
- bool use_doorbell, int doorbell_index)
+ bool use_doorbell, int index_in_dw)
{
u32 ih_doorbell_range = RREG32_SOC15(NBIO, 0 , mmBIF_IH_DOORBELL_RANGE);
if (use_doorbell) {
- ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, BIF_IH_DOORBELL_RANGE, OFFSET, doorbell_index);
+ ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, BIF_IH_DOORBELL_RANGE, OFFSET, index_in_dw);
ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, BIF_IH_DOORBELL_RANGE, SIZE, 2);
} else
ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, BIF_IH_DOORBELL_RANGE, SIZE, 0);
diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c b/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c
index 221f26e50322..c32a5bd055d9 100644
--- a/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c
+++ b/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c
@@ -65,7 +65,7 @@ static u32 nbio_v7_4_get_memsize(struct amdgpu_device *adev)
}
static void nbio_v7_4_sdma_doorbell_range(struct amdgpu_device *adev, int instance,
- bool use_doorbell, int doorbell_index, int doorbell_size)
+ bool use_doorbell, int index_in_dw, int range_dw_size)
{
u32 reg = instance == 0 ? SOC15_REG_OFFSET(NBIO, 0, mmBIF_SDMA0_DOORBELL_RANGE) :
SOC15_REG_OFFSET(NBIO, 0, mmBIF_SDMA1_DOORBELL_RANGE);
@@ -73,8 +73,8 @@ static void nbio_v7_4_sdma_doorbell_range(struct amdgpu_device *adev, int instan
u32 doorbell_range = RREG32(reg);
if (use_doorbell) {
- doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, OFFSET, doorbell_index);
- doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, doorbell_size);
+ doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, OFFSET, index_in_dw);
+ doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, range_dw_size);
} else
doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, 0);
@@ -107,12 +107,12 @@ static void nbio_v7_4_enable_doorbell_selfring_aperture(struct amdgpu_device *ad
}
static void nbio_v7_4_ih_doorbell_range(struct amdgpu_device *adev,
- bool use_doorbell, int doorbell_index)
+ bool use_doorbell, int index_in_dw)
{
u32 ih_doorbell_range = RREG32_SOC15(NBIO, 0 , mmBIF_IH_DOORBELL_RANGE);
if (use_doorbell) {
- ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, BIF_IH_DOORBELL_RANGE, OFFSET, doorbell_index);
+ ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, BIF_IH_DOORBELL_RANGE, OFFSET, index_in_dw);
ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, BIF_IH_DOORBELL_RANGE, SIZE, 2);
} else
ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, BIF_IH_DOORBELL_RANGE, SIZE, 0);
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
index 127b85983e8f..e65e9bc52bd4 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
@@ -1520,7 +1520,8 @@ static int sdma_v4_0_sw_init(void *handle)
ring->use_doorbell?"true":"false");
/* doorbell size is 2 dwords, get DWORD offset */
- ring->doorbell_index = adev->doorbell_index.sdma_engine[i] << 1;
+ ring->doorbell_index = adev->doorbell_index.sdma_engine[i]
+ * adev->doorbell_index.entry_dw_size;
sprintf(ring->name, "sdma%d", i);
r = amdgpu_ring_init(adev, ring, 1024,
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
index 99ebcf29dcb0..fbf4dde22f6c 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -980,11 +980,11 @@ static void soc15_doorbell_range_init(struct amdgpu_device *adev)
ring = &adev->sdma.instance[i].ring;
adev->nbio_funcs->sdma_doorbell_range(adev, i,
ring->use_doorbell, ring->doorbell_index,
- adev->doorbell_index.sdma_doorbell_range);
+ adev->doorbell_index.dw_range_per_sdma_eng);
}
adev->nbio_funcs->ih_doorbell_range(adev, adev->irq.ih.use_doorbell,
- adev->irq.ih.doorbell_index);
+ adev->irq.ih.doorbell_idx_in_dw);
}
static int soc15_common_hw_init(void *handle)
diff --git a/drivers/gpu/drm/amd/amdgpu/tonga_ih.c b/drivers/gpu/drm/amd/amdgpu/tonga_ih.c
index a20b711a6756..96403ec5c98f 100644
--- a/drivers/gpu/drm/amd/amdgpu/tonga_ih.c
+++ b/drivers/gpu/drm/amd/amdgpu/tonga_ih.c
@@ -143,7 +143,7 @@ static int tonga_ih_irq_init(struct amdgpu_device *adev)
ih_doorbell_rtpr = RREG32(mmIH_DOORBELL_RPTR);
if (adev->irq.ih.use_doorbell) {
ih_doorbell_rtpr = REG_SET_FIELD(ih_doorbell_rtpr, IH_DOORBELL_RPTR,
- OFFSET, adev->irq.ih.doorbell_index);
+ OFFSET, adev->irq.ih.doorbell_idx_in_dw);
ih_doorbell_rtpr = REG_SET_FIELD(ih_doorbell_rtpr, IH_DOORBELL_RPTR,
ENABLE, 1);
} else {
@@ -254,7 +254,7 @@ static void tonga_ih_set_rptr(struct amdgpu_device *adev,
if (ih->use_doorbell) {
/* XXX check if swapping is necessary on BE */
*ih->rptr_cpu = ih->rptr;
- WDOORBELL32(ih->doorbell_index, ih->rptr);
+ WDOORBELL32(ih->doorbell_idx_in_dw, ih->rptr);
} else {
WREG32(mmIH_RB_RPTR, ih->rptr);
}
@@ -284,7 +284,7 @@ static int tonga_ih_sw_init(void *handle)
return r;
adev->irq.ih.use_doorbell = true;
- adev->irq.ih.doorbell_index = adev->doorbell_index.ih;
+ adev->irq.ih.doorbell_idx_in_dw = adev->doorbell_index.ih;
r = amdgpu_irq_init(adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/vega10_ih.c b/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
index 6d1f804277f8..796004896661 100644
--- a/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
+++ b/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
@@ -184,7 +184,7 @@ static int vega10_ih_irq_init(struct amdgpu_device *adev)
if (adev->irq.ih.use_doorbell) {
ih_doorbell_rtpr = REG_SET_FIELD(ih_doorbell_rtpr,
IH_DOORBELL_RPTR, OFFSET,
- adev->irq.ih.doorbell_index);
+ adev->irq.ih.doorbell_idx_in_dw);
ih_doorbell_rtpr = REG_SET_FIELD(ih_doorbell_rtpr,
IH_DOORBELL_RPTR,
ENABLE, 1);
@@ -377,7 +377,7 @@ static void vega10_ih_set_rptr(struct amdgpu_device *adev,
if (ih->use_doorbell) {
/* XXX check if swapping is necessary on BE */
*ih->rptr_cpu = ih->rptr;
- WDOORBELL32(ih->doorbell_index, ih->rptr);
+ WDOORBELL32(ih->doorbell_idx_in_dw, ih->rptr);
} else if (ih == &adev->irq.ih) {
WREG32_SOC15(OSSSYS, 0, mmIH_RB_RPTR, ih->rptr);
} else if (ih == &adev->irq.ih1) {
@@ -461,7 +461,7 @@ static int vega10_ih_sw_init(void *handle)
/* TODO add doorbell for IH1 & IH2 as well */
adev->irq.ih.use_doorbell = true;
- adev->irq.ih.doorbell_index = adev->doorbell_index.ih << 1;
+ adev->irq.ih.doorbell_idx_in_dw = adev->doorbell_index.ih << 1;
r = amdgpu_irq_init(adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c b/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c
index 4b5d60ea3e78..d2409df2dde9 100644
--- a/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c
+++ b/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c
@@ -58,6 +58,7 @@ int vega10_reg_base_init(struct amdgpu_device *adev)
void vega10_doorbell_index_init(struct amdgpu_device *adev)
{
+ adev->doorbell_index.entry_dw_size = 2;
adev->doorbell_index.kiq = AMDGPU_DOORBELL64_KIQ;
adev->doorbell_index.mec_ring0 = AMDGPU_DOORBELL64_MEC_RING0;
adev->doorbell_index.mec_ring1 = AMDGPU_DOORBELL64_MEC_RING1;
@@ -83,6 +84,9 @@ void vega10_doorbell_index_init(struct amdgpu_device *adev)
adev->doorbell_index.uvd_vce.vce_ring6_7 = AMDGPU_DOORBELL64_VCE_RING6_7;
/* In unit of dword doorbell */
adev->doorbell_index.max_assignment = AMDGPU_DOORBELL64_MAX_ASSIGNMENT << 1;
- adev->doorbell_index.sdma_doorbell_range = 4;
+ adev->doorbell_index.dw_range_per_sdma_eng =
+ (adev->doorbell_index.sdma_engine[1]
+ - adev->doorbell_index.sdma_engine[0])
+ * adev->doorbell_index.entry_dw_size;
}
diff --git a/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c b/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c
index 53716c593b2b..b28c5999d8f0 100644
--- a/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c
+++ b/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c
@@ -56,6 +56,7 @@ int vega20_reg_base_init(struct amdgpu_device *adev)
void vega20_doorbell_index_init(struct amdgpu_device *adev)
{
+ adev->doorbell_index.entry_dw_size = 2;
adev->doorbell_index.kiq = AMDGPU_VEGA20_DOORBELL_KIQ;
adev->doorbell_index.mec_ring0 = AMDGPU_VEGA20_DOORBELL_MEC_RING0;
adev->doorbell_index.mec_ring1 = AMDGPU_VEGA20_DOORBELL_MEC_RING1;
@@ -86,6 +87,9 @@ void vega20_doorbell_index_init(struct amdgpu_device *adev)
adev->doorbell_index.uvd_vce.vce_ring4_5 = AMDGPU_VEGA20_DOORBELL64_VCE_RING4_5;
adev->doorbell_index.uvd_vce.vce_ring6_7 = AMDGPU_VEGA20_DOORBELL64_VCE_RING6_7;
adev->doorbell_index.max_assignment = AMDGPU_VEGA20_DOORBELL_MAX_ASSIGNMENT << 1;
- adev->doorbell_index.sdma_doorbell_range = 20;
+ adev->doorbell_index.dw_range_per_sdma_eng =
+ (adev->doorbell_index.sdma_engine[1]
+ - adev->doorbell_index.sdma_engine[0])
+ * adev->doorbell_index.entry_dw_size;
}
--
2.17.1
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^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH 2/3] drm/amdgpu: Fix a typo in vega10_ih_set_rptr()
[not found] ` <20190206154921.14463-2-Yong.Zhao-5C7GfCeVMHo@public.gmane.org>
@ 2019-02-06 16:26 ` Kuehling, Felix
[not found] ` <DM5PR12MB1707AB38B8039A41F07FC1E7926F0-2J9CzHegvk9TCtO+SvGBKwdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
0 siblings, 1 reply; 9+ messages in thread
From: Kuehling, Felix @ 2019-02-06 16:26 UTC (permalink / raw)
To: Zhao, Yong, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
Are you sure about this? Typically 64-bit doorbells don't wrap around. But this one does. If the IH doorbell wraps around, there is no reason why it needs to be 64-bit, so I suspect it may still be a 32-bit doorbell.
AFAIK, not all doorbells on Vega10 are 64-bit. It depends on the IP block. Therefore, maybe some of your other renaming changes should be reconsidered if they assume that all doorbells are 64-bit. Maybe it makes more sense to think of 64-bit doorbells as using 2 doorbell indexes.
Regards,
Felix
________________________________________
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of Zhao, Yong <Yong.Zhao@amd.com>
Sent: Wednesday, February 6, 2019 10:49 AM
To: amd-gfx@lists.freedesktop.org
Cc: Zhao, Yong
Subject: [PATCH 2/3] drm/amdgpu: Fix a typo in vega10_ih_set_rptr()
Clearly, it should be a 64-bit doorbell operation.
Change-Id: I644a2ebcb18c2ede24ee15692a6189efad10a35c
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
---
drivers/gpu/drm/amd/amdgpu/vega10_ih.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vega10_ih.c b/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
index 796004896661..36f0e3cada30 100644
--- a/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
+++ b/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
@@ -377,7 +377,7 @@ static void vega10_ih_set_rptr(struct amdgpu_device *adev,
if (ih->use_doorbell) {
/* XXX check if swapping is necessary on BE */
*ih->rptr_cpu = ih->rptr;
- WDOORBELL32(ih->doorbell_idx_in_dw, ih->rptr);
+ WDOORBELL64(ih->doorbell_idx_in_dw, ih->rptr);
} else if (ih == &adev->irq.ih) {
WREG32_SOC15(OSSSYS, 0, mmIH_RB_RPTR, ih->rptr);
} else if (ih == &adev->irq.ih1) {
--
2.17.1
_______________________________________________
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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
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^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH 2/3] drm/amdgpu: Fix a typo in vega10_ih_set_rptr()
[not found] ` <DM5PR12MB1707AB38B8039A41F07FC1E7926F0-2J9CzHegvk9TCtO+SvGBKwdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
@ 2019-02-06 17:01 ` Zhao, Yong
[not found] ` <SN1PR12MB23657F8FB9109F776FD56F46F06F0-z7L1TMIYDg7+b/GE5JWDHAdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
0 siblings, 1 reply; 9+ messages in thread
From: Zhao, Yong @ 2019-02-06 17:01 UTC (permalink / raw)
To: Kuehling, Felix, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
[-- Attachment #1.1: Type: text/plain, Size: 2814 bytes --]
Not too sure about this, but it looks strange in the code when all other similar code uses 64-bit.
"Maybe it makes more sense to think of 64-bit doorbells as using 2 doorbell indexes". You mean the alternative is to multiply all the current 64 doorbell index constants with 2, right? That might be easier and cleaner, and we need to make sure that the *2 and << 1 conversions from 64-bit index to dword index are all removed.
Regards,
Yong
________________________________
From: Kuehling, Felix
Sent: Wednesday, February 6, 2019 11:26 AM
To: Zhao, Yong; amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Subject: Re: [PATCH 2/3] drm/amdgpu: Fix a typo in vega10_ih_set_rptr()
Are you sure about this? Typically 64-bit doorbells don't wrap around. But this one does. If the IH doorbell wraps around, there is no reason why it needs to be 64-bit, so I suspect it may still be a 32-bit doorbell.
AFAIK, not all doorbells on Vega10 are 64-bit. It depends on the IP block. Therefore, maybe some of your other renaming changes should be reconsidered if they assume that all doorbells are 64-bit. Maybe it makes more sense to think of 64-bit doorbells as using 2 doorbell indexes.
Regards,
Felix
________________________________________
From: amd-gfx <amd-gfx-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org> on behalf of Zhao, Yong <Yong.Zhao-5C7GfCeVMHo@public.gmane.org>
Sent: Wednesday, February 6, 2019 10:49 AM
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Cc: Zhao, Yong
Subject: [PATCH 2/3] drm/amdgpu: Fix a typo in vega10_ih_set_rptr()
Clearly, it should be a 64-bit doorbell operation.
Change-Id: I644a2ebcb18c2ede24ee15692a6189efad10a35c
Signed-off-by: Yong Zhao <Yong.Zhao-5C7GfCeVMHo@public.gmane.org>
---
drivers/gpu/drm/amd/amdgpu/vega10_ih.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vega10_ih.c b/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
index 796004896661..36f0e3cada30 100644
--- a/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
+++ b/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
@@ -377,7 +377,7 @@ static void vega10_ih_set_rptr(struct amdgpu_device *adev,
if (ih->use_doorbell) {
/* XXX check if swapping is necessary on BE */
*ih->rptr_cpu = ih->rptr;
- WDOORBELL32(ih->doorbell_idx_in_dw, ih->rptr);
+ WDOORBELL64(ih->doorbell_idx_in_dw, ih->rptr);
} else if (ih == &adev->irq.ih) {
WREG32_SOC15(OSSSYS, 0, mmIH_RB_RPTR, ih->rptr);
} else if (ih == &adev->irq.ih1) {
--
2.17.1
_______________________________________________
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amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
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https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH 2/3] drm/amdgpu: Fix a typo in vega10_ih_set_rptr()
[not found] ` <SN1PR12MB23657F8FB9109F776FD56F46F06F0-z7L1TMIYDg7+b/GE5JWDHAdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
@ 2019-02-06 18:17 ` Alex Deucher
[not found] ` <CADnq5_P0VfVkk5cepB=Jbm0dJWDPCY00Gu+220yoCVfwP_qVHw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
0 siblings, 1 reply; 9+ messages in thread
From: Alex Deucher @ 2019-02-06 18:17 UTC (permalink / raw)
To: Zhao, Yong; +Cc: Kuehling, Felix, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
On Wed, Feb 6, 2019 at 12:01 PM Zhao, Yong <Yong.Zhao@amd.com> wrote:
>
> Not too sure about this, but it looks strange in the code when all other similar code uses 64-bit.
It's worth double checking, but Felix is right. A number of IPs still
used 32 bit doorbells on vega10. E.g., multi-media for example.
Alex
>
> "Maybe it makes more sense to think of 64-bit doorbells as using 2 doorbell indexes". You mean the alternative is to multiply all the current 64 doorbell index constants with 2, right? That might be easier and cleaner, and we need to make sure that the *2 and << 1 conversions from 64-bit index to dword index are all removed.
>
> Regards,
> Yong
> ________________________________
> From: Kuehling, Felix
> Sent: Wednesday, February 6, 2019 11:26 AM
> To: Zhao, Yong; amd-gfx@lists.freedesktop.org
> Subject: Re: [PATCH 2/3] drm/amdgpu: Fix a typo in vega10_ih_set_rptr()
>
> Are you sure about this? Typically 64-bit doorbells don't wrap around. But this one does. If the IH doorbell wraps around, there is no reason why it needs to be 64-bit, so I suspect it may still be a 32-bit doorbell.
>
> AFAIK, not all doorbells on Vega10 are 64-bit. It depends on the IP block. Therefore, maybe some of your other renaming changes should be reconsidered if they assume that all doorbells are 64-bit. Maybe it makes more sense to think of 64-bit doorbells as using 2 doorbell indexes.
>
> Regards,
> Felix
>
> ________________________________________
> From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of Zhao, Yong <Yong.Zhao@amd.com>
> Sent: Wednesday, February 6, 2019 10:49 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Zhao, Yong
> Subject: [PATCH 2/3] drm/amdgpu: Fix a typo in vega10_ih_set_rptr()
>
> Clearly, it should be a 64-bit doorbell operation.
>
> Change-Id: I644a2ebcb18c2ede24ee15692a6189efad10a35c
> Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/vega10_ih.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/vega10_ih.c b/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
> index 796004896661..36f0e3cada30 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
> @@ -377,7 +377,7 @@ static void vega10_ih_set_rptr(struct amdgpu_device *adev,
> if (ih->use_doorbell) {
> /* XXX check if swapping is necessary on BE */
> *ih->rptr_cpu = ih->rptr;
> - WDOORBELL32(ih->doorbell_idx_in_dw, ih->rptr);
> + WDOORBELL64(ih->doorbell_idx_in_dw, ih->rptr);
> } else if (ih == &adev->irq.ih) {
> WREG32_SOC15(OSSSYS, 0, mmIH_RB_RPTR, ih->rptr);
> } else if (ih == &adev->irq.ih1) {
> --
> 2.17.1
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 2/3] drm/amdgpu: Fix a typo in vega10_ih_set_rptr()
[not found] ` <CADnq5_P0VfVkk5cepB=Jbm0dJWDPCY00Gu+220yoCVfwP_qVHw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
@ 2019-02-06 18:20 ` Christian König
[not found] ` <83f8b6a8-996b-fec5-54e9-ae402034cad6-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
0 siblings, 1 reply; 9+ messages in thread
From: Christian König @ 2019-02-06 18:20 UTC (permalink / raw)
To: Alex Deucher, Zhao, Yong
Cc: Kuehling, Felix, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
Am 06.02.19 um 19:17 schrieb Alex Deucher:
> On Wed, Feb 6, 2019 at 12:01 PM Zhao, Yong <Yong.Zhao@amd.com> wrote:
>> Not too sure about this, but it looks strange in the code when all other similar code uses 64-bit.
> It's worth double checking, but Felix is right. A number of IPs still
> used 32 bit doorbells on vega10. E.g., multi-media for example.
I agree, the IH is certainly a 32bit doorbell on Vega10.
Christian.
>
> Alex
>
>> "Maybe it makes more sense to think of 64-bit doorbells as using 2 doorbell indexes". You mean the alternative is to multiply all the current 64 doorbell index constants with 2, right? That might be easier and cleaner, and we need to make sure that the *2 and << 1 conversions from 64-bit index to dword index are all removed.
>>
>> Regards,
>> Yong
>> ________________________________
>> From: Kuehling, Felix
>> Sent: Wednesday, February 6, 2019 11:26 AM
>> To: Zhao, Yong; amd-gfx@lists.freedesktop.org
>> Subject: Re: [PATCH 2/3] drm/amdgpu: Fix a typo in vega10_ih_set_rptr()
>>
>> Are you sure about this? Typically 64-bit doorbells don't wrap around. But this one does. If the IH doorbell wraps around, there is no reason why it needs to be 64-bit, so I suspect it may still be a 32-bit doorbell.
>>
>> AFAIK, not all doorbells on Vega10 are 64-bit. It depends on the IP block. Therefore, maybe some of your other renaming changes should be reconsidered if they assume that all doorbells are 64-bit. Maybe it makes more sense to think of 64-bit doorbells as using 2 doorbell indexes.
>>
>> Regards,
>> Felix
>>
>> ________________________________________
>> From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of Zhao, Yong <Yong.Zhao@amd.com>
>> Sent: Wednesday, February 6, 2019 10:49 AM
>> To: amd-gfx@lists.freedesktop.org
>> Cc: Zhao, Yong
>> Subject: [PATCH 2/3] drm/amdgpu: Fix a typo in vega10_ih_set_rptr()
>>
>> Clearly, it should be a 64-bit doorbell operation.
>>
>> Change-Id: I644a2ebcb18c2ede24ee15692a6189efad10a35c
>> Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
>> ---
>> drivers/gpu/drm/amd/amdgpu/vega10_ih.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/vega10_ih.c b/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
>> index 796004896661..36f0e3cada30 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
>> @@ -377,7 +377,7 @@ static void vega10_ih_set_rptr(struct amdgpu_device *adev,
>> if (ih->use_doorbell) {
>> /* XXX check if swapping is necessary on BE */
>> *ih->rptr_cpu = ih->rptr;
>> - WDOORBELL32(ih->doorbell_idx_in_dw, ih->rptr);
>> + WDOORBELL64(ih->doorbell_idx_in_dw, ih->rptr);
>> } else if (ih == &adev->irq.ih) {
>> WREG32_SOC15(OSSSYS, 0, mmIH_RB_RPTR, ih->rptr);
>> } else if (ih == &adev->irq.ih1) {
>> --
>> 2.17.1
>>
>> _______________________________________________
>> amd-gfx mailing list
>> amd-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
>> _______________________________________________
>> amd-gfx mailing list
>> amd-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 2/3] drm/amdgpu: Fix a typo in vega10_ih_set_rptr()
[not found] ` <83f8b6a8-996b-fec5-54e9-ae402034cad6-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
@ 2019-02-06 20:08 ` Zhao, Yong
0 siblings, 0 replies; 9+ messages in thread
From: Zhao, Yong @ 2019-02-06 20:08 UTC (permalink / raw)
To: Alex Deucher, Koenig, Christian
Cc: Kuehling, Felix, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
[-- Attachment #1.1: Type: text/plain, Size: 4162 bytes --]
I see. I will drop this. How about the other two patches?
Regards,
Yong
________________________________
From: Christian K?nig <ckoenig.leichtzumerken-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Sent: Wednesday, February 6, 2019 1:20 PM
To: Alex Deucher; Zhao, Yong
Cc: Kuehling, Felix; amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Subject: Re: [PATCH 2/3] drm/amdgpu: Fix a typo in vega10_ih_set_rptr()
Am 06.02.19 um 19:17 schrieb Alex Deucher:
> On Wed, Feb 6, 2019 at 12:01 PM Zhao, Yong <Yong.Zhao-5C7GfCeVMHo@public.gmane.org> wrote:
>> Not too sure about this, but it looks strange in the code when all other similar code uses 64-bit.
> It's worth double checking, but Felix is right. A number of IPs still
> used 32 bit doorbells on vega10. E.g., multi-media for example.
I agree, the IH is certainly a 32bit doorbell on Vega10.
Christian.
>
> Alex
>
>> "Maybe it makes more sense to think of 64-bit doorbells as using 2 doorbell indexes". You mean the alternative is to multiply all the current 64 doorbell index constants with 2, right? That might be easier and cleaner, and we need to make sure that the *2 and << 1 conversions from 64-bit index to dword index are all removed.
>>
>> Regards,
>> Yong
>> ________________________________
>> From: Kuehling, Felix
>> Sent: Wednesday, February 6, 2019 11:26 AM
>> To: Zhao, Yong; amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
>> Subject: Re: [PATCH 2/3] drm/amdgpu: Fix a typo in vega10_ih_set_rptr()
>>
>> Are you sure about this? Typically 64-bit doorbells don't wrap around. But this one does. If the IH doorbell wraps around, there is no reason why it needs to be 64-bit, so I suspect it may still be a 32-bit doorbell.
>>
>> AFAIK, not all doorbells on Vega10 are 64-bit. It depends on the IP block. Therefore, maybe some of your other renaming changes should be reconsidered if they assume that all doorbells are 64-bit. Maybe it makes more sense to think of 64-bit doorbells as using 2 doorbell indexes.
>>
>> Regards,
>> Felix
>>
>> ________________________________________
>> From: amd-gfx <amd-gfx-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org> on behalf of Zhao, Yong <Yong.Zhao-5C7GfCeVMHo@public.gmane.org>
>> Sent: Wednesday, February 6, 2019 10:49 AM
>> To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
>> Cc: Zhao, Yong
>> Subject: [PATCH 2/3] drm/amdgpu: Fix a typo in vega10_ih_set_rptr()
>>
>> Clearly, it should be a 64-bit doorbell operation.
>>
>> Change-Id: I644a2ebcb18c2ede24ee15692a6189efad10a35c
>> Signed-off-by: Yong Zhao <Yong.Zhao-5C7GfCeVMHo@public.gmane.org>
>> ---
>> drivers/gpu/drm/amd/amdgpu/vega10_ih.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/vega10_ih.c b/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
>> index 796004896661..36f0e3cada30 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
>> @@ -377,7 +377,7 @@ static void vega10_ih_set_rptr(struct amdgpu_device *adev,
>> if (ih->use_doorbell) {
>> /* XXX check if swapping is necessary on BE */
>> *ih->rptr_cpu = ih->rptr;
>> - WDOORBELL32(ih->doorbell_idx_in_dw, ih->rptr);
>> + WDOORBELL64(ih->doorbell_idx_in_dw, ih->rptr);
>> } else if (ih == &adev->irq.ih) {
>> WREG32_SOC15(OSSSYS, 0, mmIH_RB_RPTR, ih->rptr);
>> } else if (ih == &adev->irq.ih1) {
>> --
>> 2.17.1
>>
>> _______________________________________________
>> amd-gfx mailing list
>> amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
>> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
>> _______________________________________________
>> amd-gfx mailing list
>> amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
>> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
> _______________________________________________
> amd-gfx mailing list
> amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
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_______________________________________________
amd-gfx mailing list
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https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2019-02-06 20:08 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-02-06 15:49 [PATCH 1/3] drm/amdgpu: Improve doorbell variable names Zhao, Yong
[not found] ` <20190206154921.14463-1-Yong.Zhao-5C7GfCeVMHo@public.gmane.org>
2019-02-06 15:49 ` [PATCH 2/3] drm/amdgpu: Fix a typo in vega10_ih_set_rptr() Zhao, Yong
[not found] ` <20190206154921.14463-2-Yong.Zhao-5C7GfCeVMHo@public.gmane.org>
2019-02-06 16:26 ` Kuehling, Felix
[not found] ` <DM5PR12MB1707AB38B8039A41F07FC1E7926F0-2J9CzHegvk9TCtO+SvGBKwdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2019-02-06 17:01 ` Zhao, Yong
[not found] ` <SN1PR12MB23657F8FB9109F776FD56F46F06F0-z7L1TMIYDg7+b/GE5JWDHAdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2019-02-06 18:17 ` Alex Deucher
[not found] ` <CADnq5_P0VfVkk5cepB=Jbm0dJWDPCY00Gu+220yoCVfwP_qVHw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2019-02-06 18:20 ` Christian König
[not found] ` <83f8b6a8-996b-fec5-54e9-ae402034cad6-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2019-02-06 20:08 ` Zhao, Yong
2019-02-06 15:49 ` [PATCH 3/3] drm/amdgpu: Add dword term to the doorbell index in rings Zhao, Yong
2019-02-06 15:55 ` [PATCH 1/3] drm/amdgpu: Improve doorbell variable names Zhao, Yong
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