* [PATCH 1/3] Revert "drm/i915: W/A for underruns with WM1+ disabled on icl"
@ 2019-02-13 16:54 Ville Syrjala
2019-02-13 16:54 ` [PATCH 2/3] drm/i915: Include "ignore lines" in skl+ wm state Ville Syrjala
` (6 more replies)
0 siblings, 7 replies; 12+ messages in thread
From: Ville Syrjala @ 2019-02-13 16:54 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
This reverts commit bf002c100740f4ae01d0d86b44f65a712ee14031.
The hw team has come up with a better workaround. So
let's get rid of this one.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 1 -
drivers/gpu/drm/i915/intel_display.c | 6 ------
2 files changed, 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 0df8c6e76da7..f3f0b53c9e0e 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7653,7 +7653,6 @@ enum {
#define _PIPEB_CHICKEN 0x71038
#define _PIPEC_CHICKEN 0x72038
#define PER_PIXEL_ALPHA_BYPASS_EN (1 << 7)
-#define PM_FILL_MAINTAIN_DBUF_FULLNESS (1 << 0)
#define PIPE_CHICKEN(pipe) _MMIO_PIPE(pipe, _PIPEA_CHICKEN,\
_PIPEB_CHICKEN)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 0a8913b2059e..73a107b6eb9a 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3971,12 +3971,6 @@ static void icl_set_pipe_chicken(struct intel_crtc *crtc)
*/
tmp |= PER_PIXEL_ALPHA_BYPASS_EN;
- /*
- * W/A for underruns with linear/X-tiled with
- * WM1+ disabled.
- */
- tmp |= PM_FILL_MAINTAIN_DBUF_FULLNESS;
-
I915_WRITE(PIPE_CHICKEN(pipe), tmp);
}
--
2.19.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH 2/3] drm/i915: Include "ignore lines" in skl+ wm state 2019-02-13 16:54 [PATCH 1/3] Revert "drm/i915: W/A for underruns with WM1+ disabled on icl" Ville Syrjala @ 2019-02-13 16:54 ` Ville Syrjala 2019-02-13 19:44 ` Clinton Taylor 2019-02-13 16:54 ` [PATCH 3/3] drm/i915: Implement new w/a for underruns with wm1+ disabled Ville Syrjala ` (5 subsequent siblings) 6 siblings, 1 reply; 12+ messages in thread From: Ville Syrjala @ 2019-02-13 16:54 UTC (permalink / raw) To: intel-gfx From: Ville Syrjälä <ville.syrjala@linux.intel.com> We'll need to poke at the "ignore lines" bit in the skl+ watermark registers for a w/a. Include that bit in the wm state. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/intel_pm.c | 44 +++++++++++++++++++++------------ 3 files changed, 30 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 17fe942eaafa..5c8d0489a1cd 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1126,6 +1126,7 @@ struct skl_wm_level { u16 plane_res_b; u8 plane_res_l; bool plane_en; + bool ignore_lines; }; /* Stores plane specific WM parameters */ diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index f3f0b53c9e0e..7b3c41e9771f 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -6032,6 +6032,7 @@ enum { #define _CUR_WM_TRANS_A_0 0x70168 #define _CUR_WM_TRANS_B_0 0x71168 #define PLANE_WM_EN (1 << 31) +#define PLANE_WM_IGNORE_LINES (1 << 30) #define PLANE_WM_LINES_SHIFT 14 #define PLANE_WM_LINES_MASK 0x1f #define PLANE_WM_BLOCKS_MASK 0x7ff /* skl+: 10 bits, icl+ 11 bits */ diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index ea492fff6bf8..7dd2ab0ca21b 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -5056,11 +5056,12 @@ static void skl_write_wm_level(struct drm_i915_private *dev_priv, { u32 val = 0; - if (level->plane_en) { + if (level->plane_en) val |= PLANE_WM_EN; - val |= level->plane_res_b; - val |= level->plane_res_l << PLANE_WM_LINES_SHIFT; - } + if (level->ignore_lines) + val |= PLANE_WM_IGNORE_LINES; + val |= level->plane_res_b; + val |= level->plane_res_l << PLANE_WM_LINES_SHIFT; I915_WRITE_FW(reg, val); } @@ -5126,6 +5127,7 @@ bool skl_wm_level_equals(const struct skl_wm_level *l1, const struct skl_wm_level *l2) { return l1->plane_en == l2->plane_en && + l1->ignore_lines == l2->ignore_lines && l1->plane_res_l == l2->plane_res_l && l1->plane_res_b == l2->plane_res_b; } @@ -5334,19 +5336,28 @@ skl_print_wm_changes(struct intel_atomic_state *state) enast(new_wm->wm[6].plane_en), enast(new_wm->wm[7].plane_en), enast(new_wm->trans_wm.plane_en)); - DRM_DEBUG_KMS("[PLANE:%d:%s] lines %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d" - " -> %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d\n", + DRM_DEBUG_KMS("[PLANE:%d:%s] lines %c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d" + " -> %c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d\n", plane->base.base.id, plane->base.name, - old_wm->wm[0].plane_res_l, old_wm->wm[1].plane_res_l, - old_wm->wm[2].plane_res_l, old_wm->wm[3].plane_res_l, - old_wm->wm[4].plane_res_l, old_wm->wm[5].plane_res_l, - old_wm->wm[6].plane_res_l, old_wm->wm[7].plane_res_l, - old_wm->trans_wm.plane_res_l, - new_wm->wm[0].plane_res_l, new_wm->wm[1].plane_res_l, - new_wm->wm[2].plane_res_l, new_wm->wm[3].plane_res_l, - new_wm->wm[4].plane_res_l, new_wm->wm[5].plane_res_l, - new_wm->wm[6].plane_res_l, new_wm->wm[7].plane_res_l, - new_wm->trans_wm.plane_res_l); + enast(old_wm->wm[0].ignore_lines), old_wm->wm[0].plane_res_l, + enast(old_wm->wm[1].ignore_lines), old_wm->wm[1].plane_res_l, + enast(old_wm->wm[2].ignore_lines), old_wm->wm[2].plane_res_l, + enast(old_wm->wm[3].ignore_lines), old_wm->wm[3].plane_res_l, + enast(old_wm->wm[4].ignore_lines), old_wm->wm[4].plane_res_l, + enast(old_wm->wm[5].ignore_lines), old_wm->wm[5].plane_res_l, + enast(old_wm->wm[6].ignore_lines), old_wm->wm[6].plane_res_l, + enast(old_wm->wm[7].ignore_lines), old_wm->wm[7].plane_res_l, + enast(old_wm->trans_wm.ignore_lines), old_wm->trans_wm.plane_res_l, + + enast(new_wm->wm[0].ignore_lines), new_wm->wm[0].plane_res_l, + enast(new_wm->wm[1].ignore_lines), new_wm->wm[1].plane_res_l, + enast(new_wm->wm[2].ignore_lines), new_wm->wm[2].plane_res_l, + enast(new_wm->wm[3].ignore_lines), new_wm->wm[3].plane_res_l, + enast(new_wm->wm[4].ignore_lines), new_wm->wm[4].plane_res_l, + enast(new_wm->wm[5].ignore_lines), new_wm->wm[5].plane_res_l, + enast(new_wm->wm[6].ignore_lines), new_wm->wm[6].plane_res_l, + enast(new_wm->wm[7].ignore_lines), new_wm->wm[7].plane_res_l, + enast(new_wm->trans_wm.ignore_lines), new_wm->trans_wm.plane_res_l); DRM_DEBUG_KMS("[PLANE:%d:%s] blocks %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d" " -> %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d\n", @@ -5689,6 +5700,7 @@ static inline void skl_wm_level_from_reg_val(u32 val, struct skl_wm_level *level) { level->plane_en = val & PLANE_WM_EN; + level->ignore_lines = val & PLANE_WM_IGNORE_LINES; level->plane_res_b = val & PLANE_WM_BLOCKS_MASK; level->plane_res_l = (val >> PLANE_WM_LINES_SHIFT) & PLANE_WM_LINES_MASK; -- 2.19.2 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH 2/3] drm/i915: Include "ignore lines" in skl+ wm state 2019-02-13 16:54 ` [PATCH 2/3] drm/i915: Include "ignore lines" in skl+ wm state Ville Syrjala @ 2019-02-13 19:44 ` Clinton Taylor 2019-02-13 21:28 ` Ville Syrjälä 0 siblings, 1 reply; 12+ messages in thread From: Clinton Taylor @ 2019-02-13 19:44 UTC (permalink / raw) To: Ville Syrjala, intel-gfx On 2/13/19 8:54 AM, Ville Syrjala wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > We'll need to poke at the "ignore lines" bit in the skl+ > watermark registers for a w/a. Include that bit in the wm > state. > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- > drivers/gpu/drm/i915/i915_drv.h | 1 + > drivers/gpu/drm/i915/i915_reg.h | 1 + > drivers/gpu/drm/i915/intel_pm.c | 44 +++++++++++++++++++++------------ > 3 files changed, 30 insertions(+), 16 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index 17fe942eaafa..5c8d0489a1cd 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -1126,6 +1126,7 @@ struct skl_wm_level { > u16 plane_res_b; > u8 plane_res_l; > bool plane_en; > + bool ignore_lines; > }; > > /* Stores plane specific WM parameters */ > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index f3f0b53c9e0e..7b3c41e9771f 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -6032,6 +6032,7 @@ enum { > #define _CUR_WM_TRANS_A_0 0x70168 > #define _CUR_WM_TRANS_B_0 0x71168 > #define PLANE_WM_EN (1 << 31) > +#define PLANE_WM_IGNORE_LINES (1 << 30) > #define PLANE_WM_LINES_SHIFT 14 > #define PLANE_WM_LINES_MASK 0x1f > #define PLANE_WM_BLOCKS_MASK 0x7ff /* skl+: 10 bits, icl+ 11 bits */ > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index ea492fff6bf8..7dd2ab0ca21b 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -5056,11 +5056,12 @@ static void skl_write_wm_level(struct drm_i915_private *dev_priv, > { > u32 val = 0; > > - if (level->plane_en) { > + if (level->plane_en) > val |= PLANE_WM_EN; > - val |= level->plane_res_b; > - val |= level->plane_res_l << PLANE_WM_LINES_SHIFT; > - } > + if (level->ignore_lines) > + val |= PLANE_WM_IGNORE_LINES; > + val |= level->plane_res_b; > + val |= level->plane_res_l << PLANE_WM_LINES_SHIFT; Is there a reason to program IGNORE_LINES, plane_res_b, and plane_res_l even when PLANE_WM_EN is not set? This is a change to functionality not described in the commit message. Since the WM is not enabled anyway: Reviewed-by: Clint Taylor <Clinton.A.Taylor@intel.com> -Clint > > I915_WRITE_FW(reg, val); > } > @@ -5126,6 +5127,7 @@ bool skl_wm_level_equals(const struct skl_wm_level *l1, > const struct skl_wm_level *l2) > { > return l1->plane_en == l2->plane_en && > + l1->ignore_lines == l2->ignore_lines && > l1->plane_res_l == l2->plane_res_l && > l1->plane_res_b == l2->plane_res_b; > } > @@ -5334,19 +5336,28 @@ skl_print_wm_changes(struct intel_atomic_state *state) > enast(new_wm->wm[6].plane_en), enast(new_wm->wm[7].plane_en), > enast(new_wm->trans_wm.plane_en)); > > - DRM_DEBUG_KMS("[PLANE:%d:%s] lines %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d" > - " -> %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d\n", > + DRM_DEBUG_KMS("[PLANE:%d:%s] lines %c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d" > + " -> %c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d\n", > plane->base.base.id, plane->base.name, > - old_wm->wm[0].plane_res_l, old_wm->wm[1].plane_res_l, > - old_wm->wm[2].plane_res_l, old_wm->wm[3].plane_res_l, > - old_wm->wm[4].plane_res_l, old_wm->wm[5].plane_res_l, > - old_wm->wm[6].plane_res_l, old_wm->wm[7].plane_res_l, > - old_wm->trans_wm.plane_res_l, > - new_wm->wm[0].plane_res_l, new_wm->wm[1].plane_res_l, > - new_wm->wm[2].plane_res_l, new_wm->wm[3].plane_res_l, > - new_wm->wm[4].plane_res_l, new_wm->wm[5].plane_res_l, > - new_wm->wm[6].plane_res_l, new_wm->wm[7].plane_res_l, > - new_wm->trans_wm.plane_res_l); > + enast(old_wm->wm[0].ignore_lines), old_wm->wm[0].plane_res_l, > + enast(old_wm->wm[1].ignore_lines), old_wm->wm[1].plane_res_l, > + enast(old_wm->wm[2].ignore_lines), old_wm->wm[2].plane_res_l, > + enast(old_wm->wm[3].ignore_lines), old_wm->wm[3].plane_res_l, > + enast(old_wm->wm[4].ignore_lines), old_wm->wm[4].plane_res_l, > + enast(old_wm->wm[5].ignore_lines), old_wm->wm[5].plane_res_l, > + enast(old_wm->wm[6].ignore_lines), old_wm->wm[6].plane_res_l, > + enast(old_wm->wm[7].ignore_lines), old_wm->wm[7].plane_res_l, > + enast(old_wm->trans_wm.ignore_lines), old_wm->trans_wm.plane_res_l, > + > + enast(new_wm->wm[0].ignore_lines), new_wm->wm[0].plane_res_l, > + enast(new_wm->wm[1].ignore_lines), new_wm->wm[1].plane_res_l, > + enast(new_wm->wm[2].ignore_lines), new_wm->wm[2].plane_res_l, > + enast(new_wm->wm[3].ignore_lines), new_wm->wm[3].plane_res_l, > + enast(new_wm->wm[4].ignore_lines), new_wm->wm[4].plane_res_l, > + enast(new_wm->wm[5].ignore_lines), new_wm->wm[5].plane_res_l, > + enast(new_wm->wm[6].ignore_lines), new_wm->wm[6].plane_res_l, > + enast(new_wm->wm[7].ignore_lines), new_wm->wm[7].plane_res_l, > + enast(new_wm->trans_wm.ignore_lines), new_wm->trans_wm.plane_res_l); > > DRM_DEBUG_KMS("[PLANE:%d:%s] blocks %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d" > " -> %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d\n", > @@ -5689,6 +5700,7 @@ static inline void skl_wm_level_from_reg_val(u32 val, > struct skl_wm_level *level) > { > level->plane_en = val & PLANE_WM_EN; > + level->ignore_lines = val & PLANE_WM_IGNORE_LINES; > level->plane_res_b = val & PLANE_WM_BLOCKS_MASK; > level->plane_res_l = (val >> PLANE_WM_LINES_SHIFT) & > PLANE_WM_LINES_MASK; _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 2/3] drm/i915: Include "ignore lines" in skl+ wm state 2019-02-13 19:44 ` Clinton Taylor @ 2019-02-13 21:28 ` Ville Syrjälä 0 siblings, 0 replies; 12+ messages in thread From: Ville Syrjälä @ 2019-02-13 21:28 UTC (permalink / raw) To: Clinton Taylor; +Cc: intel-gfx On Wed, Feb 13, 2019 at 11:44:44AM -0800, Clinton Taylor wrote: > > On 2/13/19 8:54 AM, Ville Syrjala wrote: > > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > > > We'll need to poke at the "ignore lines" bit in the skl+ > > watermark registers for a w/a. Include that bit in the wm > > state. > > > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > > --- > > drivers/gpu/drm/i915/i915_drv.h | 1 + > > drivers/gpu/drm/i915/i915_reg.h | 1 + > > drivers/gpu/drm/i915/intel_pm.c | 44 +++++++++++++++++++++------------ > > 3 files changed, 30 insertions(+), 16 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > > index 17fe942eaafa..5c8d0489a1cd 100644 > > --- a/drivers/gpu/drm/i915/i915_drv.h > > +++ b/drivers/gpu/drm/i915/i915_drv.h > > @@ -1126,6 +1126,7 @@ struct skl_wm_level { > > u16 plane_res_b; > > u8 plane_res_l; > > bool plane_en; > > + bool ignore_lines; > > }; > > > > /* Stores plane specific WM parameters */ > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > > index f3f0b53c9e0e..7b3c41e9771f 100644 > > --- a/drivers/gpu/drm/i915/i915_reg.h > > +++ b/drivers/gpu/drm/i915/i915_reg.h > > @@ -6032,6 +6032,7 @@ enum { > > #define _CUR_WM_TRANS_A_0 0x70168 > > #define _CUR_WM_TRANS_B_0 0x71168 > > #define PLANE_WM_EN (1 << 31) > > +#define PLANE_WM_IGNORE_LINES (1 << 30) > > #define PLANE_WM_LINES_SHIFT 14 > > #define PLANE_WM_LINES_MASK 0x1f > > #define PLANE_WM_BLOCKS_MASK 0x7ff /* skl+: 10 bits, icl+ 11 bits */ > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > > index ea492fff6bf8..7dd2ab0ca21b 100644 > > --- a/drivers/gpu/drm/i915/intel_pm.c > > +++ b/drivers/gpu/drm/i915/intel_pm.c > > @@ -5056,11 +5056,12 @@ static void skl_write_wm_level(struct drm_i915_private *dev_priv, > > { > > u32 val = 0; > > > > - if (level->plane_en) { > > + if (level->plane_en) > > val |= PLANE_WM_EN; > > - val |= level->plane_res_b; > > - val |= level->plane_res_l << PLANE_WM_LINES_SHIFT; > > - } > > + if (level->ignore_lines) > > + val |= PLANE_WM_IGNORE_LINES; > > + val |= level->plane_res_b; > > + val |= level->plane_res_l << PLANE_WM_LINES_SHIFT; > > Is there a reason to program IGNORE_LINES, plane_res_b, and plane_res_l > even when PLANE_WM_EN is not set? This is a change to functionality not > described in the commit message. Everything will be zero when the wm is disabled, except in this special case for wm1. Just programming everything always makes the code less messy. > > Since the WM is not enabled anyway: > > Reviewed-by: Clint Taylor <Clinton.A.Taylor@intel.com> > > -Clint > > > > > > I915_WRITE_FW(reg, val); > > } > > @@ -5126,6 +5127,7 @@ bool skl_wm_level_equals(const struct skl_wm_level *l1, > > const struct skl_wm_level *l2) > > { > > return l1->plane_en == l2->plane_en && > > + l1->ignore_lines == l2->ignore_lines && > > l1->plane_res_l == l2->plane_res_l && > > l1->plane_res_b == l2->plane_res_b; > > } > > @@ -5334,19 +5336,28 @@ skl_print_wm_changes(struct intel_atomic_state *state) > > enast(new_wm->wm[6].plane_en), enast(new_wm->wm[7].plane_en), > > enast(new_wm->trans_wm.plane_en)); > > > > - DRM_DEBUG_KMS("[PLANE:%d:%s] lines %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d" > > - " -> %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d\n", > > + DRM_DEBUG_KMS("[PLANE:%d:%s] lines %c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d" > > + " -> %c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d\n", > > plane->base.base.id, plane->base.name, > > - old_wm->wm[0].plane_res_l, old_wm->wm[1].plane_res_l, > > - old_wm->wm[2].plane_res_l, old_wm->wm[3].plane_res_l, > > - old_wm->wm[4].plane_res_l, old_wm->wm[5].plane_res_l, > > - old_wm->wm[6].plane_res_l, old_wm->wm[7].plane_res_l, > > - old_wm->trans_wm.plane_res_l, > > - new_wm->wm[0].plane_res_l, new_wm->wm[1].plane_res_l, > > - new_wm->wm[2].plane_res_l, new_wm->wm[3].plane_res_l, > > - new_wm->wm[4].plane_res_l, new_wm->wm[5].plane_res_l, > > - new_wm->wm[6].plane_res_l, new_wm->wm[7].plane_res_l, > > - new_wm->trans_wm.plane_res_l); > > + enast(old_wm->wm[0].ignore_lines), old_wm->wm[0].plane_res_l, > > + enast(old_wm->wm[1].ignore_lines), old_wm->wm[1].plane_res_l, > > + enast(old_wm->wm[2].ignore_lines), old_wm->wm[2].plane_res_l, > > + enast(old_wm->wm[3].ignore_lines), old_wm->wm[3].plane_res_l, > > + enast(old_wm->wm[4].ignore_lines), old_wm->wm[4].plane_res_l, > > + enast(old_wm->wm[5].ignore_lines), old_wm->wm[5].plane_res_l, > > + enast(old_wm->wm[6].ignore_lines), old_wm->wm[6].plane_res_l, > > + enast(old_wm->wm[7].ignore_lines), old_wm->wm[7].plane_res_l, > > + enast(old_wm->trans_wm.ignore_lines), old_wm->trans_wm.plane_res_l, > > + > > + enast(new_wm->wm[0].ignore_lines), new_wm->wm[0].plane_res_l, > > + enast(new_wm->wm[1].ignore_lines), new_wm->wm[1].plane_res_l, > > + enast(new_wm->wm[2].ignore_lines), new_wm->wm[2].plane_res_l, > > + enast(new_wm->wm[3].ignore_lines), new_wm->wm[3].plane_res_l, > > + enast(new_wm->wm[4].ignore_lines), new_wm->wm[4].plane_res_l, > > + enast(new_wm->wm[5].ignore_lines), new_wm->wm[5].plane_res_l, > > + enast(new_wm->wm[6].ignore_lines), new_wm->wm[6].plane_res_l, > > + enast(new_wm->wm[7].ignore_lines), new_wm->wm[7].plane_res_l, > > + enast(new_wm->trans_wm.ignore_lines), new_wm->trans_wm.plane_res_l); > > > > DRM_DEBUG_KMS("[PLANE:%d:%s] blocks %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d" > > " -> %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d\n", > > @@ -5689,6 +5700,7 @@ static inline void skl_wm_level_from_reg_val(u32 val, > > struct skl_wm_level *level) > > { > > level->plane_en = val & PLANE_WM_EN; > > + level->ignore_lines = val & PLANE_WM_IGNORE_LINES; > > level->plane_res_b = val & PLANE_WM_BLOCKS_MASK; > > level->plane_res_l = (val >> PLANE_WM_LINES_SHIFT) & > > PLANE_WM_LINES_MASK; -- Ville Syrjälä Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 3/3] drm/i915: Implement new w/a for underruns with wm1+ disabled 2019-02-13 16:54 [PATCH 1/3] Revert "drm/i915: W/A for underruns with WM1+ disabled on icl" Ville Syrjala 2019-02-13 16:54 ` [PATCH 2/3] drm/i915: Include "ignore lines" in skl+ wm state Ville Syrjala @ 2019-02-13 16:54 ` Ville Syrjala 2019-02-13 20:04 ` Clinton Taylor 2019-02-13 19:40 ` [PATCH 1/3] Revert "drm/i915: W/A for underruns with WM1+ disabled on icl" Clinton Taylor ` (4 subsequent siblings) 6 siblings, 1 reply; 12+ messages in thread From: Ville Syrjala @ 2019-02-13 16:54 UTC (permalink / raw) To: intel-gfx From: Ville Syrjälä <ville.syrjala@linux.intel.com> The new workaround from the hw team involves programming the leaving WM1 still disabled but programming the blocks value identically to WM0, and we also need to set the "ignore lines watermark" bit for WM1. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> --- drivers/gpu/drm/i915/intel_pm.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 7dd2ab0ca21b..4c0e43caa5cd 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4466,6 +4466,13 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate, for_each_plane_id_on_crtc(intel_crtc, plane_id) { wm = &cstate->wm.skl.optimal.planes[plane_id]; memset(&wm->wm[level], 0, sizeof(wm->wm[level])); + + /* W/A for underruns with WM1+ disabled */ + if (IS_ICELAKE(dev_priv) && + level == 1 && wm->wm[0].plane_en) { + wm->wm[level].plane_res_b = wm->wm[0].plane_res_b; + wm->wm[level].ignore_lines = true; + } } } -- 2.19.2 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH 3/3] drm/i915: Implement new w/a for underruns with wm1+ disabled 2019-02-13 16:54 ` [PATCH 3/3] drm/i915: Implement new w/a for underruns with wm1+ disabled Ville Syrjala @ 2019-02-13 20:04 ` Clinton Taylor 2019-02-13 20:36 ` Clinton Taylor 0 siblings, 1 reply; 12+ messages in thread From: Clinton Taylor @ 2019-02-13 20:04 UTC (permalink / raw) To: Ville Syrjala, intel-gfx Reviewed-by: Clint Taylor <Clinton.A.Taylor@intel.com> -Clint On 2/13/19 8:54 AM, Ville Syrjala wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > The new workaround from the hw team involves programming the > leaving WM1 still disabled but programming the blocks value > identically to WM0, and we also need to set the "ignore > lines watermark" bit for WM1. > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- > drivers/gpu/drm/i915/intel_pm.c | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index 7dd2ab0ca21b..4c0e43caa5cd 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -4466,6 +4466,13 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate, > for_each_plane_id_on_crtc(intel_crtc, plane_id) { > wm = &cstate->wm.skl.optimal.planes[plane_id]; > memset(&wm->wm[level], 0, sizeof(wm->wm[level])); > + > + /* W/A for underruns with WM1+ disabled */ > + if (IS_ICELAKE(dev_priv) && > + level == 1 && wm->wm[0].plane_en) { > + wm->wm[level].plane_res_b = wm->wm[0].plane_res_b; > + wm->wm[level].ignore_lines = true; > + } > } > } > _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 3/3] drm/i915: Implement new w/a for underruns with wm1+ disabled 2019-02-13 20:04 ` Clinton Taylor @ 2019-02-13 20:36 ` Clinton Taylor 0 siblings, 0 replies; 12+ messages in thread From: Clinton Taylor @ 2019-02-13 20:36 UTC (permalink / raw) To: Ville Syrjala, intel-gfx Tested with dual CRTC configuration shows many FIFO underruns even with this code. Single CRTC has not produced a FIFO underrun yet. [ 7037.510737] [drm:intel_cpu_fifo_underrun_irq_handler] *ERROR* CPU pipe A FIFO underrun [ 7040.769741] [drm:intel_cpu_fifo_underrun_irq_handler] *ERROR* CPU pipe A FIFO underrun [ 7042.029447] [drm:intel_cpu_fifo_underrun_irq_handler] *ERROR* CPU pipe B FIFO underrun [ 7056.579801] [drm:intel_cpu_fifo_underrun_irq_handler] *ERROR* CPU pipe A FIFO underrun [ 7057.105212] [drm:intel_cpu_fifo_underrun_irq_handler] *ERROR* CPU pipe B FIFO underrun [ 7063.600646] [drm:intel_cpu_fifo_underrun_irq_handler] *ERROR* CPU pipe A FIFO underrun [ 7072.373733] [drm:intel_cpu_fifo_underrun_irq_handler] *ERROR* CPU pipe B FIFO underrun -Clint On 2/13/19 12:04 PM, Clinton Taylor wrote: > Reviewed-by: Clint Taylor <Clinton.A.Taylor@intel.com> > > -Clint > > On 2/13/19 8:54 AM, Ville Syrjala wrote: >> From: Ville Syrjälä <ville.syrjala@linux.intel.com> >> >> The new workaround from the hw team involves programming the >> leaving WM1 still disabled but programming the blocks value >> identically to WM0, and we also need to set the "ignore >> lines watermark" bit for WM1. >> >> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> >> --- >> drivers/gpu/drm/i915/intel_pm.c | 7 +++++++ >> 1 file changed, 7 insertions(+) >> >> diff --git a/drivers/gpu/drm/i915/intel_pm.c >> b/drivers/gpu/drm/i915/intel_pm.c >> index 7dd2ab0ca21b..4c0e43caa5cd 100644 >> --- a/drivers/gpu/drm/i915/intel_pm.c >> +++ b/drivers/gpu/drm/i915/intel_pm.c >> @@ -4466,6 +4466,13 @@ skl_allocate_pipe_ddb(struct intel_crtc_state >> *cstate, >> for_each_plane_id_on_crtc(intel_crtc, plane_id) { >> wm = &cstate->wm.skl.optimal.planes[plane_id]; >> memset(&wm->wm[level], 0, sizeof(wm->wm[level])); >> + >> + /* W/A for underruns with WM1+ disabled */ >> + if (IS_ICELAKE(dev_priv) && >> + level == 1 && wm->wm[0].plane_en) { >> + wm->wm[level].plane_res_b = wm->wm[0].plane_res_b; >> + wm->wm[level].ignore_lines = true; >> + } >> } >> } > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 1/3] Revert "drm/i915: W/A for underruns with WM1+ disabled on icl" 2019-02-13 16:54 [PATCH 1/3] Revert "drm/i915: W/A for underruns with WM1+ disabled on icl" Ville Syrjala 2019-02-13 16:54 ` [PATCH 2/3] drm/i915: Include "ignore lines" in skl+ wm state Ville Syrjala 2019-02-13 16:54 ` [PATCH 3/3] drm/i915: Implement new w/a for underruns with wm1+ disabled Ville Syrjala @ 2019-02-13 19:40 ` Clinton Taylor 2019-02-14 12:47 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] " Patchwork ` (3 subsequent siblings) 6 siblings, 0 replies; 12+ messages in thread From: Clinton Taylor @ 2019-02-13 19:40 UTC (permalink / raw) To: Ville Syrjala, intel-gfx Reviewed-by: Clint Taylor <Clinton.A.Taylor@intel.com> -Clint On 2/13/19 8:54 AM, Ville Syrjala wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > This reverts commit bf002c100740f4ae01d0d86b44f65a712ee14031. > > The hw team has come up with a better workaround. So > let's get rid of this one. > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- > drivers/gpu/drm/i915/i915_reg.h | 1 - > drivers/gpu/drm/i915/intel_display.c | 6 ------ > 2 files changed, 7 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index 0df8c6e76da7..f3f0b53c9e0e 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -7653,7 +7653,6 @@ enum { > #define _PIPEB_CHICKEN 0x71038 > #define _PIPEC_CHICKEN 0x72038 > #define PER_PIXEL_ALPHA_BYPASS_EN (1 << 7) > -#define PM_FILL_MAINTAIN_DBUF_FULLNESS (1 << 0) > #define PIPE_CHICKEN(pipe) _MMIO_PIPE(pipe, _PIPEA_CHICKEN,\ > _PIPEB_CHICKEN) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index 0a8913b2059e..73a107b6eb9a 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -3971,12 +3971,6 @@ static void icl_set_pipe_chicken(struct intel_crtc *crtc) > */ > tmp |= PER_PIXEL_ALPHA_BYPASS_EN; > > - /* > - * W/A for underruns with linear/X-tiled with > - * WM1+ disabled. > - */ > - tmp |= PM_FILL_MAINTAIN_DBUF_FULLNESS; > - > I915_WRITE(PIPE_CHICKEN(pipe), tmp); > } > _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 12+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] Revert "drm/i915: W/A for underruns with WM1+ disabled on icl" 2019-02-13 16:54 [PATCH 1/3] Revert "drm/i915: W/A for underruns with WM1+ disabled on icl" Ville Syrjala ` (2 preceding siblings ...) 2019-02-13 19:40 ` [PATCH 1/3] Revert "drm/i915: W/A for underruns with WM1+ disabled on icl" Clinton Taylor @ 2019-02-14 12:47 ` Patchwork 2019-02-14 12:49 ` ✗ Fi.CI.SPARSE: " Patchwork ` (2 subsequent siblings) 6 siblings, 0 replies; 12+ messages in thread From: Patchwork @ 2019-02-14 12:47 UTC (permalink / raw) To: intel-gfx == Series Details == Series: series starting with [1/3] Revert "drm/i915: W/A for underruns with WM1+ disabled on icl" URL : https://patchwork.freedesktop.org/series/56621/ State : warning == Summary == $ dim checkpatch origin/drm-tip 1176d3c29c8b Revert "drm/i915: W/A for underruns with WM1+ disabled on icl" 24095acba352 drm/i915: Include "ignore lines" in skl+ wm state -:96: WARNING:LONG_LINE: line over 100 characters #96: FILE: drivers/gpu/drm/i915/intel_pm.c:5350: + enast(old_wm->trans_wm.ignore_lines), old_wm->trans_wm.plane_res_l, -:106: WARNING:LONG_LINE: line over 100 characters #106: FILE: drivers/gpu/drm/i915/intel_pm.c:5360: + enast(new_wm->trans_wm.ignore_lines), new_wm->trans_wm.plane_res_l); total: 0 errors, 2 warnings, 0 checks, 84 lines checked 3c91357d53ae drm/i915: Implement new w/a for underruns with wm1+ disabled _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 12+ messages in thread
* ✗ Fi.CI.SPARSE: warning for series starting with [1/3] Revert "drm/i915: W/A for underruns with WM1+ disabled on icl" 2019-02-13 16:54 [PATCH 1/3] Revert "drm/i915: W/A for underruns with WM1+ disabled on icl" Ville Syrjala ` (3 preceding siblings ...) 2019-02-14 12:47 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] " Patchwork @ 2019-02-14 12:49 ` Patchwork 2019-02-14 13:07 ` ✓ Fi.CI.BAT: success " Patchwork 2019-02-14 16:47 ` ✓ Fi.CI.IGT: " Patchwork 6 siblings, 0 replies; 12+ messages in thread From: Patchwork @ 2019-02-14 12:49 UTC (permalink / raw) To: intel-gfx == Series Details == Series: series starting with [1/3] Revert "drm/i915: W/A for underruns with WM1+ disabled on icl" URL : https://patchwork.freedesktop.org/series/56621/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: Revert "drm/i915: W/A for underruns with WM1+ disabled on icl" Okay! Commit: drm/i915: Include "ignore lines" in skl+ wm state -drivers/gpu/drm/i915/selftests/../i915_drv.h:3566:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_drv.h:3567:16: warning: expression using sizeof(void) Commit: drm/i915: Implement new w/a for underruns with wm1+ disabled Okay! _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 12+ messages in thread
* ✓ Fi.CI.BAT: success for series starting with [1/3] Revert "drm/i915: W/A for underruns with WM1+ disabled on icl" 2019-02-13 16:54 [PATCH 1/3] Revert "drm/i915: W/A for underruns with WM1+ disabled on icl" Ville Syrjala ` (4 preceding siblings ...) 2019-02-14 12:49 ` ✗ Fi.CI.SPARSE: " Patchwork @ 2019-02-14 13:07 ` Patchwork 2019-02-14 16:47 ` ✓ Fi.CI.IGT: " Patchwork 6 siblings, 0 replies; 12+ messages in thread From: Patchwork @ 2019-02-14 13:07 UTC (permalink / raw) To: intel-gfx == Series Details == Series: series starting with [1/3] Revert "drm/i915: W/A for underruns with WM1+ disabled on icl" URL : https://patchwork.freedesktop.org/series/56621/ State : success == Summary == CI Bug Log - changes from CI_DRM_5599 -> Patchwork_12216 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/56621/revisions/1/mbox/ Known issues ------------ Here are the changes found in Patchwork_12216 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@i915_module_load@reload-with-fault-injection: - fi-kbl-7567u: PASS -> DMESG-WARN [fdo#105602] / [fdo#108529] +1 * igt@kms_chamelium@common-hpd-after-suspend: - fi-kbl-7500u: NOTRUN -> DMESG-WARN [fdo#102505] / [fdo#103558] / [fdo#105079] / [fdo#105602] - fi-kbl-7567u: PASS -> DMESG-FAIL [fdo#105079] * igt@kms_chamelium@hdmi-hpd-fast: - fi-kbl-7500u: NOTRUN -> FAIL [fdo#109485] * igt@pm_rpm@module-reload: - fi-kbl-7567u: PASS -> DMESG-WARN [fdo#108529] * igt@prime_vgem@basic-fence-flip: - fi-gdg-551: PASS -> FAIL [fdo#103182] #### Possible fixes #### * igt@i915_module_load@reload: - fi-blb-e6850: INCOMPLETE [fdo#107718] -> PASS * igt@i915_selftest@live_workarounds: - {fi-icl-u2}: INCOMPLETE [fdo#109626] -> PASS * igt@kms_busy@basic-flip-a: - fi-gdg-551: FAIL [fdo#103182] -> PASS * igt@kms_chamelium@dp-crc-fast: - fi-kbl-7500u: DMESG-FAIL [fdo#109627] -> PASS * igt@kms_flip@basic-flip-vs-dpms: - fi-skl-6700hq: DMESG-WARN [fdo#105998] -> PASS * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: - fi-byt-clapper: FAIL [fdo#103191] / [fdo#107362] -> PASS +2 {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo#102505]: https://bugs.freedesktop.org/show_bug.cgi?id=102505 [fdo#103182]: https://bugs.freedesktop.org/show_bug.cgi?id=103182 [fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191 [fdo#103558]: https://bugs.freedesktop.org/show_bug.cgi?id=103558 [fdo#105079]: https://bugs.freedesktop.org/show_bug.cgi?id=105079 [fdo#105602]: https://bugs.freedesktop.org/show_bug.cgi?id=105602 [fdo#105998]: https://bugs.freedesktop.org/show_bug.cgi?id=105998 [fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362 [fdo#107383]: https://bugs.freedesktop.org/show_bug.cgi?id=107383 [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718 [fdo#108529]: https://bugs.freedesktop.org/show_bug.cgi?id=108529 [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278 [fdo#109485]: https://bugs.freedesktop.org/show_bug.cgi?id=109485 [fdo#109527]: https://bugs.freedesktop.org/show_bug.cgi?id=109527 [fdo#109626]: https://bugs.freedesktop.org/show_bug.cgi?id=109626 [fdo#109627]: https://bugs.freedesktop.org/show_bug.cgi?id=109627 Participating hosts (43 -> 42) ------------------------------ Additional (6): fi-skl-6260u fi-whl-u fi-ivb-3770 fi-bsw-kefka fi-kbl-7560u fi-snb-2600 Missing (7): fi-kbl-soraka fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-glk-j4005 fi-icl-u3 fi-bdw-samus Build changes ------------- * Linux: CI_DRM_5599 -> Patchwork_12216 CI_DRM_5599: 39119c9b385742d49446c25d6902864a60eda6b6 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4824: e55d439a9ba744227fb4c9d727338276b78871d4 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_12216: 3c91357d53aedbec2b33dcb3d95037fefeb726ec @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 3c91357d53ae drm/i915: Implement new w/a for underruns with wm1+ disabled 24095acba352 drm/i915: Include "ignore lines" in skl+ wm state 1176d3c29c8b Revert "drm/i915: W/A for underruns with WM1+ disabled on icl" == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12216/ _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 12+ messages in thread
* ✓ Fi.CI.IGT: success for series starting with [1/3] Revert "drm/i915: W/A for underruns with WM1+ disabled on icl" 2019-02-13 16:54 [PATCH 1/3] Revert "drm/i915: W/A for underruns with WM1+ disabled on icl" Ville Syrjala ` (5 preceding siblings ...) 2019-02-14 13:07 ` ✓ Fi.CI.BAT: success " Patchwork @ 2019-02-14 16:47 ` Patchwork 6 siblings, 0 replies; 12+ messages in thread From: Patchwork @ 2019-02-14 16:47 UTC (permalink / raw) To: intel-gfx == Series Details == Series: series starting with [1/3] Revert "drm/i915: W/A for underruns with WM1+ disabled on icl" URL : https://patchwork.freedesktop.org/series/56621/ State : success == Summary == CI Bug Log - changes from CI_DRM_5599_full -> Patchwork_12216_full ==================================================== Summary ------- **SUCCESS** No regressions found. Known issues ------------ Here are the changes found in Patchwork_12216_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@kms_busy@extended-modeset-hang-newfb-render-a: - shard-iclb: NOTRUN -> DMESG-WARN [fdo#107956] * igt@kms_busy@extended-modeset-hang-newfb-render-b: - shard-glk: NOTRUN -> DMESG-WARN [fdo#107956] * igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-b: - shard-glk: PASS -> DMESG-WARN [fdo#107956] * igt@kms_cursor_crc@cursor-128x128-random: - shard-apl: PASS -> FAIL [fdo#103232] +2 * igt@kms_cursor_crc@cursor-128x128-sliding: - shard-iclb: NOTRUN -> FAIL [fdo#103232] * igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy: - shard-hsw: PASS -> FAIL [fdo#105767] +1 * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-move: - shard-apl: PASS -> FAIL [fdo#103167] +1 * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render: - shard-apl: NOTRUN -> FAIL [fdo#103167] * igt@kms_frontbuffer_tracking@fbc-1p-rte: - shard-apl: PASS -> FAIL [fdo#103167] / [fdo#105682] * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-pwrite: - shard-iclb: PASS -> FAIL [fdo#103167] +1 * igt@kms_plane_alpha_blend@pipe-a-alpha-transparant-fb: - shard-apl: NOTRUN -> FAIL [fdo#108145] - shard-kbl: NOTRUN -> FAIL [fdo#108145] * igt@kms_plane_alpha_blend@pipe-b-alpha-opaque-fb: - shard-glk: NOTRUN -> FAIL [fdo#108145] * igt@kms_plane_multiple@atomic-pipe-b-tiling-x: - shard-apl: PASS -> FAIL [fdo#103166] +2 * igt@kms_plane_multiple@atomic-pipe-b-tiling-y: - shard-glk: PASS -> FAIL [fdo#103166] +1 * igt@kms_plane_scaling@pipe-b-scaler-with-rotation: - shard-iclb: NOTRUN -> DMESG-WARN [fdo#107724] * igt@kms_sysfs_edid_timing: - shard-apl: NOTRUN -> FAIL [fdo#100047] - shard-kbl: NOTRUN -> FAIL [fdo#100047] * igt@perf@short-reads: - shard-kbl: PASS -> FAIL [fdo#103183] * igt@pm_rpm@sysfs-read: - shard-iclb: PASS -> DMESG-WARN [fdo#107724] #### Possible fixes #### * igt@gem_eio@reset-stress: - shard-snb: FAIL [fdo#107799] -> PASS * igt@i915_selftest@live_workarounds: - shard-iclb: DMESG-FAIL [fdo#108954] -> PASS * igt@kms_color@pipe-b-legacy-gamma: - shard-apl: FAIL [fdo#104782] -> PASS * igt@kms_cursor_crc@cursor-256x85-sliding: - shard-apl: FAIL [fdo#103232] -> PASS +3 * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt: - shard-apl: FAIL [fdo#103167] -> PASS +1 * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-fullscreen: - shard-iclb: FAIL [fdo#103167] -> PASS * igt@kms_plane@pixel-format-pipe-c-planes-source-clamping: - shard-apl: INCOMPLETE [fdo#103927] -> PASS * igt@kms_plane_multiple@atomic-pipe-b-tiling-none: - shard-apl: FAIL [fdo#103166] -> PASS +2 * igt@kms_plane_multiple@atomic-pipe-b-tiling-y: - shard-iclb: FAIL [fdo#103166] -> PASS +2 * igt@kms_plane_multiple@atomic-pipe-c-tiling-none: - shard-glk: FAIL [fdo#103166] -> PASS +1 * igt@kms_rotation_crc@multiplane-rotation-cropping-bottom: - shard-kbl: DMESG-FAIL [fdo#105763] -> PASS * igt@kms_setmode@basic: - shard-apl: FAIL [fdo#99912] -> PASS - shard-kbl: FAIL [fdo#99912] -> PASS * igt@pm_rpm@gem-evict-pwrite: - shard-iclb: DMESG-WARN [fdo#107724] -> PASS +5 * igt@pm_rpm@legacy-planes: - shard-iclb: DMESG-WARN [fdo#107732] -> PASS * igt@tools_test@tools_test: - shard-iclb: {SKIP} [fdo#109352] -> PASS #### Warnings #### * igt@i915_selftest@live_contexts: - shard-iclb: DMESG-FAIL [fdo#108569] -> INCOMPLETE [fdo#108569] / [fdo#109226] * igt@i915_suspend@shrink: - shard-apl: INCOMPLETE [fdo#103927] / [fdo#106886] -> DMESG-WARN [fdo#107886] / [fdo#109244] {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo#100047]: https://bugs.freedesktop.org/show_bug.cgi?id=100047 [fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166 [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167 [fdo#103183]: https://bugs.freedesktop.org/show_bug.cgi?id=103183 [fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232 [fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540 [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927 [fdo#104782]: https://bugs.freedesktop.org/show_bug.cgi?id=104782 [fdo#105682]: https://bugs.freedesktop.org/show_bug.cgi?id=105682 [fdo#105763]: https://bugs.freedesktop.org/show_bug.cgi?id=105763 [fdo#105767]: https://bugs.freedesktop.org/show_bug.cgi?id=105767 [fdo#106886]: https://bugs.freedesktop.org/show_bug.cgi?id=106886 [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724 [fdo#107732]: https://bugs.freedesktop.org/show_bug.cgi?id=107732 [fdo#107799]: https://bugs.freedesktop.org/show_bug.cgi?id=107799 [fdo#107886]: https://bugs.freedesktop.org/show_bug.cgi?id=107886 [fdo#107956]: https://bugs.freedesktop.org/show_bug.cgi?id=107956 [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145 [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569 [fdo#108654]: https://bugs.freedesktop.org/show_bug.cgi?id=108654 [fdo#108756]: https://bugs.freedesktop.org/show_bug.cgi?id=108756 [fdo#108954]: https://bugs.freedesktop.org/show_bug.cgi?id=108954 [fdo#109226]: https://bugs.freedesktop.org/show_bug.cgi?id=109226 [fdo#109244]: https://bugs.freedesktop.org/show_bug.cgi?id=109244 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274 [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276 [fdo#109277]: https://bugs.freedesktop.org/show_bug.cgi?id=109277 [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278 [fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280 [fdo#109281]: https://bugs.freedesktop.org/show_bug.cgi?id=109281 [fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284 [fdo#109287]: https://bugs.freedesktop.org/show_bug.cgi?id=109287 [fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291 [fdo#109352]: https://bugs.freedesktop.org/show_bug.cgi?id=109352 [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441 [fdo#109624]: https://bugs.freedesktop.org/show_bug.cgi?id=109624 [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912 Participating hosts (7 -> 6) ------------------------------ Missing (1): shard-skl Build changes ------------- * Linux: CI_DRM_5599 -> Patchwork_12216 CI_DRM_5599: 39119c9b385742d49446c25d6902864a60eda6b6 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4824: e55d439a9ba744227fb4c9d727338276b78871d4 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_12216: 3c91357d53aedbec2b33dcb3d95037fefeb726ec @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12216/ _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2019-02-14 16:47 UTC | newest] Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2019-02-13 16:54 [PATCH 1/3] Revert "drm/i915: W/A for underruns with WM1+ disabled on icl" Ville Syrjala 2019-02-13 16:54 ` [PATCH 2/3] drm/i915: Include "ignore lines" in skl+ wm state Ville Syrjala 2019-02-13 19:44 ` Clinton Taylor 2019-02-13 21:28 ` Ville Syrjälä 2019-02-13 16:54 ` [PATCH 3/3] drm/i915: Implement new w/a for underruns with wm1+ disabled Ville Syrjala 2019-02-13 20:04 ` Clinton Taylor 2019-02-13 20:36 ` Clinton Taylor 2019-02-13 19:40 ` [PATCH 1/3] Revert "drm/i915: W/A for underruns with WM1+ disabled on icl" Clinton Taylor 2019-02-14 12:47 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] " Patchwork 2019-02-14 12:49 ` ✗ Fi.CI.SPARSE: " Patchwork 2019-02-14 13:07 ` ✓ Fi.CI.BAT: success " Patchwork 2019-02-14 16:47 ` ✓ Fi.CI.IGT: " Patchwork
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.