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* [PATCH] net: dsa: qca8k: Enable delay for RGMII_ID mode
@ 2019-02-18 13:03 Vinod Koul
  2019-02-18 13:33 ` Andrew Lunn
                   ` (2 more replies)
  0 siblings, 3 replies; 6+ messages in thread
From: Vinod Koul @ 2019-02-18 13:03 UTC (permalink / raw)
  To: David S Miller
  Cc: linux-arm-msm, Bjorn Andersson, Vinod Koul, netdev,
	Niklas Cassel, Andrew Lunn, Florian Fainelli,
	Michal Vokáč

RGMII_ID specifies that we should have internal delay, so resurrect the
delay addition routine but under the RGMII_ID mode.

Fixes: 40269aa9f40a ("net: dsa: qca8k: disable delay for RGMII mode")
Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
 drivers/net/dsa/qca8k.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/drivers/net/dsa/qca8k.c b/drivers/net/dsa/qca8k.c
index a4b6cda38016..aa1f7f1b20d3 100644
--- a/drivers/net/dsa/qca8k.c
+++ b/drivers/net/dsa/qca8k.c
@@ -443,6 +443,18 @@ qca8k_set_pad_ctrl(struct qca8k_priv *priv, int port, int mode)
 		val = QCA8K_PORT_PAD_RGMII_EN;
 		qca8k_write(priv, reg, val);
 		break;
+	case PHY_INTERFACE_MODE_RGMII_ID:
+		/* RGMII_ID needs internal delay. This is enabled through
+		 * PORT5_PAD_CTRL for all ports, rather than individual port
+		 * registers
+		 */
+		qca8k_write(priv, reg,
+			    QCA8K_PORT_PAD_RGMII_EN |
+			    QCA8K_PORT_PAD_RGMII_TX_DELAY(3) |
+			    QCA8K_PORT_PAD_RGMII_RX_DELAY(3));
+		qca8k_write(priv, QCA8K_REG_PORT5_PAD_CTRL,
+			    QCA8K_PORT_PAD_RGMII_RX_DELAY_EN);
+		break;
 	case PHY_INTERFACE_MODE_SGMII:
 		qca8k_write(priv, reg, QCA8K_PORT_PAD_SGMII_EN);
 		break;
-- 
2.20.1

^ permalink raw reply related	[flat|nested] 6+ messages in thread
* Re: [PATCH] net: dsa: qca8k: Enable delay for RGMII_ID mode
  2019-02-18 13:03 [PATCH] net: dsa: qca8k: Enable delay for RGMII_ID mode Vinod Koul
@ 2019-02-18 13:33 ` Andrew Lunn
  2019-02-19  4:59   ` Vinod Koul
  2019-02-18 13:35 ` Michal Vokáč
  2019-02-18 13:36 ` Andrew Lunn
  2 siblings, 1 reply; 6+ messages in thread
From: Andrew Lunn @ 2019-02-18 13:33 UTC (permalink / raw)
  To: Vinod Koul
  Cc: David S Miller, linux-arm-msm, Bjorn Andersson, netdev,
	Niklas Cassel, Florian Fainelli, Michal Vokáč

On Mon, Feb 18, 2019 at 06:33:51PM +0530, Vinod Koul wrote:
> RGMII_ID specifies that we should have internal delay, so resurrect the
> delay addition routine but under the RGMII_ID mode.
> 
> Fixes: 40269aa9f40a ("net: dsa: qca8k: disable delay for RGMII mode")
> Signed-off-by: Vinod Koul <vkoul@kernel.org>
> ---
>  drivers/net/dsa/qca8k.c | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
> 
> diff --git a/drivers/net/dsa/qca8k.c b/drivers/net/dsa/qca8k.c
> index a4b6cda38016..aa1f7f1b20d3 100644
> --- a/drivers/net/dsa/qca8k.c
> +++ b/drivers/net/dsa/qca8k.c
> @@ -443,6 +443,18 @@ qca8k_set_pad_ctrl(struct qca8k_priv *priv, int port, int mode)
>  		val = QCA8K_PORT_PAD_RGMII_EN;
>  		qca8k_write(priv, reg, val);
>  		break;
> +	case PHY_INTERFACE_MODE_RGMII_ID:
> +		/* RGMII_ID needs internal delay. This is enabled through
> +		 * PORT5_PAD_CTRL for all ports, rather than individual port
> +		 * registers
> +		 */
> +		qca8k_write(priv, reg,
> +			    QCA8K_PORT_PAD_RGMII_EN |
> +			    QCA8K_PORT_PAD_RGMII_TX_DELAY(3) |
> +			    QCA8K_PORT_PAD_RGMII_RX_DELAY(3));
> +		qca8k_write(priv, QCA8K_REG_PORT5_PAD_CTRL,
> +			    QCA8K_PORT_PAD_RGMII_RX_DELAY_EN);
> +		break;

Hi Vinod

So i'm still confused if this is global, or per-port. The first
register written looks to be per-port, although only for ports 0 and
6. The second write seems to be global.

Is there a danger that port 0 has PHY_INTERFACE_MODE_RGMII_ID and port
6 has PHY_INTERFACE_MODE_RGMII, and we end up with delays disabled?
Maybe we should try to detect this, and return an error?

>  	case PHY_INTERFACE_MODE_SGMII:
>  		qca8k_write(priv, reg, QCA8K_PORT_PAD_SGMII_EN);
>  		break;

I think it would be good to add the other two PHY_INTERFACE_MODE_RGMII
modes to the default clause so we get an error reported that they are
not implemented.

    Andrew

^ permalink raw reply	[flat|nested] 6+ messages in thread
* Re: [PATCH] net: dsa: qca8k: Enable delay for RGMII_ID mode
  2019-02-18 13:03 [PATCH] net: dsa: qca8k: Enable delay for RGMII_ID mode Vinod Koul
  2019-02-18 13:33 ` Andrew Lunn
@ 2019-02-18 13:35 ` Michal Vokáč
  2019-02-18 13:36 ` Andrew Lunn
  2 siblings, 0 replies; 6+ messages in thread
From: Michal Vokáč @ 2019-02-18 13:35 UTC (permalink / raw)
  To: Vinod Koul, David S Miller
  Cc: linux-arm-msm, Bjorn Andersson, netdev, Niklas Cassel,
	Andrew Lunn, Florian Fainelli

On 18. 02. 19 14:03, Vinod Koul wrote:
> RGMII_ID specifies that we should have internal delay, so resurrect the
> delay addition routine but under the RGMII_ID mode.
> 
> Fixes: 40269aa9f40a ("net: dsa: qca8k: disable delay for RGMII mode")
> Signed-off-by: Vinod Koul <vkoul@kernel.org>

Fixes the problem on my imx6dl platform with QCA8334 switch.
Thank you!

Tested-by: Michal Vokáč <michal.vokac@ysoft.com>

> ---
>   drivers/net/dsa/qca8k.c | 12 ++++++++++++
>   1 file changed, 12 insertions(+)
> 
> diff --git a/drivers/net/dsa/qca8k.c b/drivers/net/dsa/qca8k.c
> index a4b6cda38016..aa1f7f1b20d3 100644
> --- a/drivers/net/dsa/qca8k.c
> +++ b/drivers/net/dsa/qca8k.c
> @@ -443,6 +443,18 @@ qca8k_set_pad_ctrl(struct qca8k_priv *priv, int port, int mode)
>   		val = QCA8K_PORT_PAD_RGMII_EN;
>   		qca8k_write(priv, reg, val);
>   		break;
> +	case PHY_INTERFACE_MODE_RGMII_ID:
> +		/* RGMII_ID needs internal delay. This is enabled through
> +		 * PORT5_PAD_CTRL for all ports, rather than individual port
> +		 * registers
> +		 */
> +		qca8k_write(priv, reg,
> +			    QCA8K_PORT_PAD_RGMII_EN |
> +			    QCA8K_PORT_PAD_RGMII_TX_DELAY(3) |
> +			    QCA8K_PORT_PAD_RGMII_RX_DELAY(3));
> +		qca8k_write(priv, QCA8K_REG_PORT5_PAD_CTRL,
> +			    QCA8K_PORT_PAD_RGMII_RX_DELAY_EN);
> +		break;
>   	case PHY_INTERFACE_MODE_SGMII:
>   		qca8k_write(priv, reg, QCA8K_PORT_PAD_SGMII_EN);
>   		break;
> 

^ permalink raw reply	[flat|nested] 6+ messages in thread
* Re: [PATCH] net: dsa: qca8k: Enable delay for RGMII_ID mode
  2019-02-18 13:03 [PATCH] net: dsa: qca8k: Enable delay for RGMII_ID mode Vinod Koul
  2019-02-18 13:33 ` Andrew Lunn
  2019-02-18 13:35 ` Michal Vokáč
@ 2019-02-18 13:36 ` Andrew Lunn
  2019-02-19  5:00   ` Vinod Koul
  2 siblings, 1 reply; 6+ messages in thread
From: Andrew Lunn @ 2019-02-18 13:36 UTC (permalink / raw)
  To: Vinod Koul
  Cc: David S Miller, linux-arm-msm, Bjorn Andersson, netdev,
	Niklas Cassel, Florian Fainelli, Michal Vokáč

On Mon, Feb 18, 2019 at 06:33:51PM +0530, Vinod Koul wrote:
> +	case PHY_INTERFACE_MODE_RGMII_ID:
> +		/* RGMII_ID needs internal delay. This is enabled through
> +		 * PORT5_PAD_CTRL for all ports, rather than individual port
> +		 * registers
> +		 */
> +		qca8k_write(priv, reg,
> +			    QCA8K_PORT_PAD_RGMII_EN |
> +			    QCA8K_PORT_PAD_RGMII_TX_DELAY(3) |
> +			    QCA8K_PORT_PAD_RGMII_RX_DELAY(3));

Hi Vinod

Could you add some #defines for the delay values?

    Thanks
	Andrew

^ permalink raw reply	[flat|nested] 6+ messages in thread
* Re: [PATCH] net: dsa: qca8k: Enable delay for RGMII_ID mode
  2019-02-18 13:33 ` Andrew Lunn
@ 2019-02-19  4:59   ` Vinod Koul
  0 siblings, 0 replies; 6+ messages in thread
From: Vinod Koul @ 2019-02-19  4:59 UTC (permalink / raw)
  To: Andrew Lunn
  Cc: David S Miller, linux-arm-msm, Bjorn Andersson, netdev,
	Niklas Cassel, Florian Fainelli, Michal Vokáč

Hi Andrew,

On 18-02-19, 14:33, Andrew Lunn wrote:
> On Mon, Feb 18, 2019 at 06:33:51PM +0530, Vinod Koul wrote:
> > RGMII_ID specifies that we should have internal delay, so resurrect the
> > delay addition routine but under the RGMII_ID mode.
> > 
> > Fixes: 40269aa9f40a ("net: dsa: qca8k: disable delay for RGMII mode")
> > Signed-off-by: Vinod Koul <vkoul@kernel.org>
> > ---
> >  drivers/net/dsa/qca8k.c | 12 ++++++++++++
> >  1 file changed, 12 insertions(+)
> > 
> > diff --git a/drivers/net/dsa/qca8k.c b/drivers/net/dsa/qca8k.c
> > index a4b6cda38016..aa1f7f1b20d3 100644
> > --- a/drivers/net/dsa/qca8k.c
> > +++ b/drivers/net/dsa/qca8k.c
> > @@ -443,6 +443,18 @@ qca8k_set_pad_ctrl(struct qca8k_priv *priv, int port, int mode)
> >  		val = QCA8K_PORT_PAD_RGMII_EN;
> >  		qca8k_write(priv, reg, val);
> >  		break;
> > +	case PHY_INTERFACE_MODE_RGMII_ID:
> > +		/* RGMII_ID needs internal delay. This is enabled through
> > +		 * PORT5_PAD_CTRL for all ports, rather than individual port
> > +		 * registers
> > +		 */
> > +		qca8k_write(priv, reg,
> > +			    QCA8K_PORT_PAD_RGMII_EN |
> > +			    QCA8K_PORT_PAD_RGMII_TX_DELAY(3) |
> > +			    QCA8K_PORT_PAD_RGMII_RX_DELAY(3));
> > +		qca8k_write(priv, QCA8K_REG_PORT5_PAD_CTRL,
> > +			    QCA8K_PORT_PAD_RGMII_RX_DELAY_EN);
> > +		break;
> 
> Hi Vinod
> 
> So i'm still confused if this is global, or per-port. The first
> register written looks to be per-port, although only for ports 0 and
> 6. The second write seems to be global.

This is still a global write which enables the delay in all the ports
(as was the case previously)

> Is there a danger that port 0 has PHY_INTERFACE_MODE_RGMII_ID and port
> 6 has PHY_INTERFACE_MODE_RGMII, and we end up with delays disabled?
> Maybe we should try to detect this, and return an error?

If that was the case, I would presume people would have reported an
issue that it doesn't work for them..?

> >  	case PHY_INTERFACE_MODE_SGMII:
> >  		qca8k_write(priv, reg, QCA8K_PORT_PAD_SGMII_EN);
> >  		break;
> 
> I think it would be good to add the other two PHY_INTERFACE_MODE_RGMII
> modes to the default clause so we get an error reported that they are
> not implemented.

That is still the case:

        default:
                pr_err("xMII mode %d not supported\n", mode);
                return -EINVAL;

-- 
~Vinod

^ permalink raw reply	[flat|nested] 6+ messages in thread
* Re: [PATCH] net: dsa: qca8k: Enable delay for RGMII_ID mode
  2019-02-18 13:36 ` Andrew Lunn
@ 2019-02-19  5:00   ` Vinod Koul
  0 siblings, 0 replies; 6+ messages in thread
From: Vinod Koul @ 2019-02-19  5:00 UTC (permalink / raw)
  To: Andrew Lunn
  Cc: David S Miller, linux-arm-msm, Bjorn Andersson, netdev,
	Niklas Cassel, Florian Fainelli, Michal Vokáč

On 18-02-19, 14:36, Andrew Lunn wrote:
> On Mon, Feb 18, 2019 at 06:33:51PM +0530, Vinod Koul wrote:
> > +	case PHY_INTERFACE_MODE_RGMII_ID:
> > +		/* RGMII_ID needs internal delay. This is enabled through
> > +		 * PORT5_PAD_CTRL for all ports, rather than individual port
> > +		 * registers
> > +		 */
> > +		qca8k_write(priv, reg,
> > +			    QCA8K_PORT_PAD_RGMII_EN |
> > +			    QCA8K_PORT_PAD_RGMII_TX_DELAY(3) |
> > +			    QCA8K_PORT_PAD_RGMII_RX_DELAY(3));
> 
> Hi Vinod
> 
> Could you add some #defines for the delay values?

Sure will update the patch

-- 
~Vinod

^ permalink raw reply	[flat|nested] 6+ messages in thread
end of thread, other threads:[~2019-02-19  5:00 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-02-18 13:03 [PATCH] net: dsa: qca8k: Enable delay for RGMII_ID mode Vinod Koul
2019-02-18 13:33 ` Andrew Lunn
2019-02-19  4:59   ` Vinod Koul
2019-02-18 13:35 ` Michal Vokáč
2019-02-18 13:36 ` Andrew Lunn
2019-02-19  5:00   ` Vinod Koul

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