[PATCH 0/3] soc: fsl: dpio: enable and configure cache stashing

[PATCH 0/3] soc: fsl: dpio: enable and configure cache stashing

[Ioana Ciornei]

The first two patches enable cache stashing and configure the core cluster
destination per software portal while the third patch is the one
configuring the amount of stashing on a queue.

Ioana Ciornei (3):
  soc: fsl: dpio: enable frame data cache stashing per software portal
  soc: fsl: dpio: configure cache stashing destination
  dpaa2-eth: configure the cache stashing amount on a queue

 drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c |  7 +++-
 drivers/soc/fsl/Kconfig                          |  1 +
 drivers/soc/fsl/dpio/dpio-cmd.h                  |  5 +++
 drivers/soc/fsl/dpio/dpio-driver.c               | 52 ++++++++++++++++++++++++
 drivers/soc/fsl/dpio/dpio.c                      | 16 ++++++++
 drivers/soc/fsl/dpio/dpio.h                      |  5 +++
 drivers/soc/fsl/dpio/qbman-portal.c              |  4 +-
 7 files changed, 87 insertions(+), 3 deletions(-)

-- 
1.9.1

[PATCH 1/3] soc: fsl: dpio: enable frame data cache stashing per software portal

[Ioana Ciornei]

Enable cache stashing on the frame data dequeued using this software
portal. Also, enable dropping a stash request transaction when the
target request queue is almost full.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
---
 drivers/soc/fsl/dpio/qbman-portal.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/soc/fsl/dpio/qbman-portal.c b/drivers/soc/fsl/dpio/qbman-portal.c
index 5a73397..d020135 100644
--- a/drivers/soc/fsl/dpio/qbman-portal.c
+++ b/drivers/soc/fsl/dpio/qbman-portal.c
@@ -169,9 +169,9 @@ struct qbman_swp *qbman_swp_init(const struct qbman_swp_desc *d)
 				3, /* RPM: Valid bit mode, RCR in array mode */
 				2, /* DCM: Discrete consumption ack mode */
 				3, /* EPM: Valid bit mode, EQCR in array mode */
-				0, /* mem stashing drop enable == FALSE */
+				1, /* mem stashing drop enable == TRUE */
 				1, /* mem stashing priority == TRUE */
-				0, /* mem stashing enable == FALSE */
+				1, /* mem stashing enable == TRUE */
 				1, /* dequeue stashing priority == TRUE */
 				0, /* dequeue stashing enable == FALSE */
 				0); /* EQCR_CI stashing priority == FALSE */
-- 
1.9.1

[PATCH 2/3] soc: fsl: dpio: configure cache stashing destination

[Ioana Ciornei]

Depending on the SoC version and the CPU id, configure the cache
stashing destination for a specific dpio.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
---
 drivers/soc/fsl/Kconfig            |  1 +
 drivers/soc/fsl/dpio/dpio-cmd.h    |  5 ++++
 drivers/soc/fsl/dpio/dpio-driver.c | 52 ++++++++++++++++++++++++++++++++++++++
 drivers/soc/fsl/dpio/dpio.c        | 16 ++++++++++++
 drivers/soc/fsl/dpio/dpio.h        |  5 ++++
 5 files changed, 79 insertions(+)

diff --git a/drivers/soc/fsl/Kconfig b/drivers/soc/fsl/Kconfig
index 8f80e8b..61f8e14 100644
--- a/drivers/soc/fsl/Kconfig
+++ b/drivers/soc/fsl/Kconfig
@@ -22,6 +22,7 @@ config FSL_GUTS
 config FSL_MC_DPIO
         tristate "QorIQ DPAA2 DPIO driver"
         depends on FSL_MC_BUS
+        select SOC_BUS
         help
 	  Driver for the DPAA2 DPIO object.  A DPIO provides queue and
 	  buffer management facilities for software to interact with
diff --git a/drivers/soc/fsl/dpio/dpio-cmd.h b/drivers/soc/fsl/dpio/dpio-cmd.h
index 5814d2f..e13fd3a 100644
--- a/drivers/soc/fsl/dpio/dpio-cmd.h
+++ b/drivers/soc/fsl/dpio/dpio-cmd.h
@@ -26,6 +26,7 @@
 #define DPIO_CMDID_DISABLE				DPIO_CMD(0x003)
 #define DPIO_CMDID_GET_ATTR				DPIO_CMD(0x004)
 #define DPIO_CMDID_RESET				DPIO_CMD(0x005)
+#define DPIO_CMDID_SET_STASHING_DEST			DPIO_CMD(0x120)
 
 struct dpio_cmd_open {
 	__le32 dpio_id;
@@ -47,4 +48,8 @@ struct dpio_rsp_get_attr {
 	__le32 qbman_version;
 };
 
+struct dpio_stashing_dest {
+	u8 sdest;
+};
+
 #endif /* _FSL_DPIO_CMD_H */
diff --git a/drivers/soc/fsl/dpio/dpio-driver.c b/drivers/soc/fsl/dpio/dpio-driver.c
index a28799b..c0cdc89 100644
--- a/drivers/soc/fsl/dpio/dpio-driver.c
+++ b/drivers/soc/fsl/dpio/dpio-driver.c
@@ -14,6 +14,7 @@
 #include <linux/dma-mapping.h>
 #include <linux/delay.h>
 #include <linux/io.h>
+#include <linux/sys_soc.h>
 
 #include <linux/fsl/mc.h>
 #include <soc/fsl/dpaa2-io.h>
@@ -32,6 +33,46 @@ struct dpio_priv {
 
 static cpumask_var_t cpus_unused_mask;
 
+static const struct soc_device_attribute ls1088a_soc[] = {
+	{.family = "QorIQ LS1088A"},
+	{ /* sentinel */ }
+};
+
+static const struct soc_device_attribute ls2080a_soc[] = {
+	{.family = "QorIQ LS2080A"},
+	{ /* sentinel */ }
+};
+
+static const struct soc_device_attribute ls2088a_soc[] = {
+	{.family = "QorIQ LS2088A"},
+	{ /* sentinel */ }
+};
+
+static const struct soc_device_attribute lx2160a_soc[] = {
+	{.family = "QorIQ LX2160A"},
+	{ /* sentinel */ }
+};
+
+static int dpaa2_dpio_get_cluster_sdest(struct fsl_mc_device *dpio_dev, int cpu)
+{
+	int cluster_base, cluster_size;
+
+	if (soc_device_match(ls1088a_soc)) {
+		cluster_base = 2;
+		cluster_size = 4;
+	} else if (soc_device_match(ls2080a_soc) ||
+		   soc_device_match(ls2088a_soc) ||
+		   soc_device_match(lx2160a_soc)) {
+		cluster_base = 0;
+		cluster_size = 2;
+	} else {
+		dev_err(&dpio_dev->dev, "unknown SoC version\n");
+		return -1;
+	}
+
+	return cluster_base + cpu / cluster_size;
+}
+
 static irqreturn_t dpio_irq_handler(int irq_num, void *arg)
 {
 	struct device *dev = (struct device *)arg;
@@ -89,6 +130,7 @@ static int dpaa2_dpio_probe(struct fsl_mc_device *dpio_dev)
 	int err = -ENOMEM;
 	struct device *dev = &dpio_dev->dev;
 	int possible_next_cpu;
+	int sdest;
 
 	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
 	if (!priv)
@@ -145,6 +187,16 @@ static int dpaa2_dpio_probe(struct fsl_mc_device *dpio_dev)
 	desc.cpu = possible_next_cpu;
 	cpumask_clear_cpu(possible_next_cpu, cpus_unused_mask);
 
+	sdest = dpaa2_dpio_get_cluster_sdest(dpio_dev, desc.cpu);
+	if (sdest >= 0) {
+		err = dpio_set_stashing_destination(dpio_dev->mc_io, 0,
+						    dpio_dev->mc_handle,
+						    sdest);
+		if (err)
+			dev_err(dev, "dpio_set_stashing_destination failed for cpu%d\n",
+				desc.cpu);
+	}
+
 	/*
 	 * Set the CENA regs to be the cache inhibited area of the portal to
 	 * avoid coherency issues if a user migrates to another core.
diff --git a/drivers/soc/fsl/dpio/dpio.c b/drivers/soc/fsl/dpio/dpio.c
index 521bc69..af74c59 100644
--- a/drivers/soc/fsl/dpio/dpio.c
+++ b/drivers/soc/fsl/dpio/dpio.c
@@ -166,6 +166,22 @@ int dpio_get_attributes(struct fsl_mc_io *mc_io,
 	return 0;
 }
 
+int dpio_set_stashing_destination(struct fsl_mc_io *mc_io,
+				  u32 cmd_flags,
+				  u16 token,
+				  u8 sdest)
+{
+	struct fsl_mc_command cmd = { 0 };
+	struct dpio_stashing_dest *dpio_cmd;
+
+	cmd.header = mc_encode_cmd_header(DPIO_CMDID_SET_STASHING_DEST,
+					  cmd_flags, token);
+	dpio_cmd = (struct dpio_stashing_dest *)cmd.params;
+	dpio_cmd->sdest = sdest;
+
+	return mc_send_command(mc_io, &cmd);
+}
+
 /**
  * dpio_get_api_version - Get Data Path I/O API version
  * @mc_io:	Pointer to MC portal's DPIO object
diff --git a/drivers/soc/fsl/dpio/dpio.h b/drivers/soc/fsl/dpio/dpio.h
index b2ac4ba..da06f72 100644
--- a/drivers/soc/fsl/dpio/dpio.h
+++ b/drivers/soc/fsl/dpio/dpio.h
@@ -75,6 +75,11 @@ int dpio_get_attributes(struct fsl_mc_io	*mc_io,
 			u16		token,
 			struct dpio_attr	*attr);
 
+int dpio_set_stashing_destination(struct fsl_mc_io *mc_io,
+				  u32 cmd_flags,
+				  u16 token,
+				  u8 dest);
+
 int dpio_get_api_version(struct fsl_mc_io *mc_io,
 			 u32 cmd_flags,
 			 u16 *major_ver,
-- 
1.9.1

[PATCH 3/3] dpaa2-eth: configure the cache stashing amount on a queue

[Ioana Ciornei]

Configure the amount of 64 bytes of frame, annotation and context data
that will be cache stashed for a specific frame queue.  Since the frame
context is not used, configure that only 64 bytes of frame data and 64
bytes of annotation will be stashed.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
---
 drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c b/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c
index c500ea7..3c03fca8 100644
--- a/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c
+++ b/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c
@@ -2303,9 +2303,14 @@ static int setup_rx_flow(struct dpaa2_eth_priv *priv,
 	queue.destination.type = DPNI_DEST_DPCON;
 	queue.destination.priority = 1;
 	queue.user_context = (u64)(uintptr_t)fq;
+	queue.flc.stash_control = 1;
+	queue.flc.value &= 0xFFFFFFFFFFFFFFC0;
+	/* 01 01 00 - data, annotation, flow context */
+	queue.flc.value |= 0x14;
 	err = dpni_set_queue(priv->mc_io, 0, priv->mc_token,
 			     DPNI_QUEUE_RX, 0, fq->flowid,
-			     DPNI_QUEUE_OPT_USER_CTX | DPNI_QUEUE_OPT_DEST,
+			     DPNI_QUEUE_OPT_USER_CTX | DPNI_QUEUE_OPT_DEST |
+			     DPNI_QUEUE_OPT_FLC,
 			     &queue);
 	if (err) {
 		dev_err(dev, "dpni_set_queue(RX) failed\n");
-- 
1.9.1

Re: [PATCH 0/3] soc: fsl: dpio: enable and configure cache stashing

[David Miller]

From: Ioana Ciornei <ioana.ciornei@nxp.com>
Date: Sat, 23 Feb 2019 08:48:42 +0000

> The first two patches enable cache stashing and configure the core cluster
> destination per software portal while the third patch is the one
> configuring the amount of stashing on a queue.

Should I merge this series in via my networking tree?

Thanks.

RE: [PATCH 0/3] soc: fsl: dpio: enable and configure cache stashing

[Ioana Ciornei]

> Subject: Re: [PATCH 0/3] soc: fsl: dpio: enable and configure cache stashing
> 
> From: Ioana Ciornei <ioana.ciornei@nxp.com>
> Date: Sat, 23 Feb 2019 08:48:42 +0000
> 
> > The first two patches enable cache stashing and configure the core
> > cluster destination per software portal while the third patch is the
> > one configuring the amount of stashing on a queue.
> 
> Should I merge this series in via my networking tree?

Even though it would be really good to have this on the networking tree as soon as possible, I am afraid that patch 2/3 is not going to apply cleanly because it touches the same areas of code that some other patches on Leo's tree are.

Thanks,
Ioana C

Re: [PATCH 0/3] soc: fsl: dpio: enable and configure cache stashing

[Li Yang]

On Mon, Feb 25, 2019 at 1:01 AM Ioana Ciornei <ioana.ciornei@nxp.com> wrote:
>
> > Subject: Re: [PATCH 0/3] soc: fsl: dpio: enable and configure cache stashing
> >
> > From: Ioana Ciornei <ioana.ciornei@nxp.com>
> > Date: Sat, 23 Feb 2019 08:48:42 +0000
> >
> > > The first two patches enable cache stashing and configure the core
> > > cluster destination per software portal while the third patch is the
> > > one configuring the amount of stashing on a queue.
> >
> > Should I merge this series in via my networking tree?
>
> Even though it would be really good to have this on the networking tree as soon as possible, I am afraid that patch 2/3 is not going to apply cleanly because it touches the same areas of code that some other patches on Leo's tree are.

Hi David,

What shall we do if we want to get this in the 5.1?  Since the change
on the ethernet driver is pretty small, can I get your ACK on that
patch and merge the series through my tree?  Otherwise I can also try
to get the dpio patches in next merge window, and you can apply the
Ethernet patch after that.

Regards,
Leo

Re: [PATCH 0/3] soc: fsl: dpio: enable and configure cache stashing

[David Miller]

From: Li Yang <leoyang.li@nxp.com>
Date: Tue, 26 Feb 2019 13:03:17 -0600

> On Mon, Feb 25, 2019 at 1:01 AM Ioana Ciornei <ioana.ciornei@nxp.com> wrote:
>>
>> > Subject: Re: [PATCH 0/3] soc: fsl: dpio: enable and configure cache stashing
>> >
>> > From: Ioana Ciornei <ioana.ciornei@nxp.com>
>> > Date: Sat, 23 Feb 2019 08:48:42 +0000
>> >
>> > > The first two patches enable cache stashing and configure the core
>> > > cluster destination per software portal while the third patch is the
>> > > one configuring the amount of stashing on a queue.
>> >
>> > Should I merge this series in via my networking tree?
>>
>> Even though it would be really good to have this on the networking tree as soon as possible, I am afraid that patch 2/3 is not going to apply cleanly because it touches the same areas of code that some other patches on Leo's tree are.
> 
> Hi David,
> 
> What shall we do if we want to get this in the 5.1?  Since the change
> on the ethernet driver is pretty small, can I get your ACK on that
> patch and merge the series through my tree?

Sure.

Acked-by: David S. Miller <davem@davemloft.net>

Re: [PATCH 0/3] soc: fsl: dpio: enable and configure cache stashing

[Li Yang]

On Sat, Feb 23, 2019 at 2:49 AM Ioana Ciornei <ioana.ciornei@nxp.com> wrote:
>
> The first two patches enable cache stashing and configure the core cluster
> destination per software portal while the third patch is the one
> configuring the amount of stashing on a queue.

Series applied for next.  Thanks.

Regards,
Leo
>
> Ioana Ciornei (3):
>   soc: fsl: dpio: enable frame data cache stashing per software portal
>   soc: fsl: dpio: configure cache stashing destination
>   dpaa2-eth: configure the cache stashing amount on a queue
>
>  drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c |  7 +++-
>  drivers/soc/fsl/Kconfig                          |  1 +
>  drivers/soc/fsl/dpio/dpio-cmd.h                  |  5 +++
>  drivers/soc/fsl/dpio/dpio-driver.c               | 52 ++++++++++++++++++++++++
>  drivers/soc/fsl/dpio/dpio.c                      | 16 ++++++++
>  drivers/soc/fsl/dpio/dpio.h                      |  5 +++
>  drivers/soc/fsl/dpio/qbman-portal.c              |  4 +-
>  7 files changed, 87 insertions(+), 3 deletions(-)
>
> --
> 1.9.1
>