[PATCH] spi: sh-msiof: Restrict bits per word to 8/16/24/32 on R-Car Gen2/3

[PATCH] spi: sh-msiof: Restrict bits per word to 8/16/24/32 on R-Car Gen2/3

[Geert Uytterhoeven]

While the MSIOF variants in older SuperH and SH/R-Mobile SoCs support
bits-per-word values in the full range 8..32, the variants present in
R-Car Gen2 and Gen3 SoCs are restricted to 8, 16, 24, or 32.

Obtain the value from family-specific sh_msiof_chipdata to fix this.

Reported-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
Tested on SH-Mobile AG5 with 12 bits per word.

 drivers/spi/spi-sh-msiof.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/spi/spi-sh-msiof.c b/drivers/spi/spi-sh-msiof.c
index 6e83368874839d09..48535e95102c9b08 100644
--- a/drivers/spi/spi-sh-msiof.c
+++ b/drivers/spi/spi-sh-msiof.c
@@ -32,6 +32,7 @@
 #include <asm/unaligned.h>
 
 struct sh_msiof_chipdata {
+	u32 bits_per_word_mask;
 	u16 tx_fifo_size;
 	u16 rx_fifo_size;
 	u16 ctlr_flags;
@@ -1072,6 +1073,7 @@ static int sh_msiof_transfer_one(struct spi_controller *ctlr,
 }
 
 static const struct sh_msiof_chipdata sh_data = {
+	.bits_per_word_mask = SPI_BPW_RANGE_MASK(8, 32),
 	.tx_fifo_size = 64,
 	.rx_fifo_size = 64,
 	.ctlr_flags = 0,
@@ -1079,6 +1081,8 @@ static const struct sh_msiof_chipdata sh_data = {
 };
 
 static const struct sh_msiof_chipdata rcar_gen2_data = {
+	.bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16) |
+			      SPI_BPW_MASK(24) | SPI_BPW_MASK(32),
 	.tx_fifo_size = 64,
 	.rx_fifo_size = 64,
 	.ctlr_flags = SPI_CONTROLLER_MUST_TX,
@@ -1086,6 +1090,8 @@ static const struct sh_msiof_chipdata rcar_gen2_data = {
 };
 
 static const struct sh_msiof_chipdata rcar_gen3_data = {
+	.bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16) |
+			      SPI_BPW_MASK(24) | SPI_BPW_MASK(32),
 	.tx_fifo_size = 64,
 	.rx_fifo_size = 64,
 	.ctlr_flags = SPI_CONTROLLER_MUST_TX,
@@ -1410,7 +1416,7 @@ static int sh_msiof_spi_probe(struct platform_device *pdev)
 	ctlr->setup = sh_msiof_spi_setup;
 	ctlr->prepare_message = sh_msiof_prepare_message;
 	ctlr->slave_abort = sh_msiof_slave_abort;
-	ctlr->bits_per_word_mask = SPI_BPW_RANGE_MASK(8, 32);
+	ctlr->bits_per_word_mask = chipdata->bits_per_word_mask;
 	ctlr->auto_runtime_pm = true;
 	ctlr->transfer_one = sh_msiof_transfer_one;
 
-- 
2.17.1

Re: [PATCH] spi: sh-msiof: Restrict bits per word to 8/16/24/32 on R-Car Gen2/3

[Simon Horman]

On Thu, Feb 28, 2019 at 12:05:13PM +0100, Geert Uytterhoeven wrote:
> While the MSIOF variants in older SuperH and SH/R-Mobile SoCs support
> bits-per-word values in the full range 8..32, the variants present in
> R-Car Gen2 and Gen3 SoCs are restricted to 8, 16, 24, or 32.
> 
> Obtain the value from family-specific sh_msiof_chipdata to fix this.
> 
> Reported-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

> ---
> Tested on SH-Mobile AG5 with 12 bits per word.
> 
>  drivers/spi/spi-sh-msiof.c | 8 +++++++-
>  1 file changed, 7 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/spi/spi-sh-msiof.c b/drivers/spi/spi-sh-msiof.c
> index 6e83368874839d09..48535e95102c9b08 100644
> --- a/drivers/spi/spi-sh-msiof.c
> +++ b/drivers/spi/spi-sh-msiof.c
> @@ -32,6 +32,7 @@
>  #include <asm/unaligned.h>
>  
>  struct sh_msiof_chipdata {
> +	u32 bits_per_word_mask;
>  	u16 tx_fifo_size;
>  	u16 rx_fifo_size;
>  	u16 ctlr_flags;
> @@ -1072,6 +1073,7 @@ static int sh_msiof_transfer_one(struct spi_controller *ctlr,
>  }
>  
>  static const struct sh_msiof_chipdata sh_data = {
> +	.bits_per_word_mask = SPI_BPW_RANGE_MASK(8, 32),
>  	.tx_fifo_size = 64,
>  	.rx_fifo_size = 64,
>  	.ctlr_flags = 0,
> @@ -1079,6 +1081,8 @@ static const struct sh_msiof_chipdata sh_data = {
>  };
>  
>  static const struct sh_msiof_chipdata rcar_gen2_data = {
> +	.bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16) |
> +			      SPI_BPW_MASK(24) | SPI_BPW_MASK(32),
>  	.tx_fifo_size = 64,
>  	.rx_fifo_size = 64,
>  	.ctlr_flags = SPI_CONTROLLER_MUST_TX,
> @@ -1086,6 +1090,8 @@ static const struct sh_msiof_chipdata rcar_gen2_data = {
>  };
>  
>  static const struct sh_msiof_chipdata rcar_gen3_data = {
> +	.bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16) |
> +			      SPI_BPW_MASK(24) | SPI_BPW_MASK(32),
>  	.tx_fifo_size = 64,
>  	.rx_fifo_size = 64,
>  	.ctlr_flags = SPI_CONTROLLER_MUST_TX,
> @@ -1410,7 +1416,7 @@ static int sh_msiof_spi_probe(struct platform_device *pdev)
>  	ctlr->setup = sh_msiof_spi_setup;
>  	ctlr->prepare_message = sh_msiof_prepare_message;
>  	ctlr->slave_abort = sh_msiof_slave_abort;
> -	ctlr->bits_per_word_mask = SPI_BPW_RANGE_MASK(8, 32);
> +	ctlr->bits_per_word_mask = chipdata->bits_per_word_mask;
>  	ctlr->auto_runtime_pm = true;
>  	ctlr->transfer_one = sh_msiof_transfer_one;
>  
> -- 
> 2.17.1
> 

Applied "spi: sh-msiof: Restrict bits per word to 8/16/24/32 on R-Car Gen2/3" to the spi tree

[Mark Brown]

The patch

   spi: sh-msiof: Restrict bits per word to 8/16/24/32 on R-Car Gen2/3

has been applied to the spi tree at

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git 

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.  

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark

From 0e836c3bea7da04cd4e2ed22d8c20654d5a09273 Mon Sep 17 00:00:00 2001
From: Geert Uytterhoeven <geert+renesas@glider.be>
Date: Thu, 28 Feb 2019 12:05:13 +0100
Subject: [PATCH] spi: sh-msiof: Restrict bits per word to 8/16/24/32 on R-Car
 Gen2/3

While the MSIOF variants in older SuperH and SH/R-Mobile SoCs support
bits-per-word values in the full range 8..32, the variants present in
R-Car Gen2 and Gen3 SoCs are restricted to 8, 16, 24, or 32.

Obtain the value from family-specific sh_msiof_chipdata to fix this.

Reported-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Mark Brown <broonie@kernel.org>
---
 drivers/spi/spi-sh-msiof.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/spi/spi-sh-msiof.c b/drivers/spi/spi-sh-msiof.c
index b20e70a2bdd1..e2eb466db10a 100644
--- a/drivers/spi/spi-sh-msiof.c
+++ b/drivers/spi/spi-sh-msiof.c
@@ -32,6 +32,7 @@
 #include <asm/unaligned.h>
 
 struct sh_msiof_chipdata {
+	u32 bits_per_word_mask;
 	u16 tx_fifo_size;
 	u16 rx_fifo_size;
 	u16 ctlr_flags;
@@ -1048,6 +1049,7 @@ static int sh_msiof_transfer_one(struct spi_controller *ctlr,
 }
 
 static const struct sh_msiof_chipdata sh_data = {
+	.bits_per_word_mask = SPI_BPW_RANGE_MASK(8, 32),
 	.tx_fifo_size = 64,
 	.rx_fifo_size = 64,
 	.ctlr_flags = 0,
@@ -1055,6 +1057,8 @@ static const struct sh_msiof_chipdata sh_data = {
 };
 
 static const struct sh_msiof_chipdata rcar_gen2_data = {
+	.bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16) |
+			      SPI_BPW_MASK(24) | SPI_BPW_MASK(32),
 	.tx_fifo_size = 64,
 	.rx_fifo_size = 64,
 	.ctlr_flags = SPI_CONTROLLER_MUST_TX,
@@ -1062,6 +1066,8 @@ static const struct sh_msiof_chipdata rcar_gen2_data = {
 };
 
 static const struct sh_msiof_chipdata rcar_gen3_data = {
+	.bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16) |
+			      SPI_BPW_MASK(24) | SPI_BPW_MASK(32),
 	.tx_fifo_size = 64,
 	.rx_fifo_size = 64,
 	.ctlr_flags = SPI_CONTROLLER_MUST_TX,
@@ -1386,7 +1392,7 @@ static int sh_msiof_spi_probe(struct platform_device *pdev)
 	ctlr->setup = sh_msiof_spi_setup;
 	ctlr->prepare_message = sh_msiof_prepare_message;
 	ctlr->slave_abort = sh_msiof_slave_abort;
-	ctlr->bits_per_word_mask = SPI_BPW_RANGE_MASK(8, 32);
+	ctlr->bits_per_word_mask = chipdata->bits_per_word_mask;
 	ctlr->auto_runtime_pm = true;
 	ctlr->transfer_one = sh_msiof_transfer_one;
 
-- 
2.20.1