[igt-dev] [RFC v2 0/5] Add support for fp16 formats

[igt-dev] [RFC v2 0/5] Add support for fp16 formats

[Kevin Strasser]

This series adds support for testing new fp16 formats. As these formats
haven't yet landed in the kernel I am sharing this as an RFC.

In particular coverage is added to the following tests which
already enumerate through all formats advertised by each plane:
  kms_available_modes_crc
  kms_rotation_crc
  kms_plane_scaling

Kevin Strasser (5):
  lib: Add halffloat implementation
  include: Add fp16 format defines
  tests/kms_available_modes_crc: Add cases for 64bit formats
  lib/igt_fb: Add support for fp16 formats through conversion
  tests/kms_plane_scaling: Skip testing unsupported fp16 features

 COPYING                         |  22 ++++
 include/drm-uapi/drm_fourcc.h   |  10 ++
 lib/Makefile.sources            |   2 +
 lib/igt_fb.c                    | 148 ++++++++++++++++++++++++-
 lib/igt_fb.h                    |   1 +
 lib/igt_halffloat.c             | 234 ++++++++++++++++++++++++++++++++++++++++
 lib/igt_halffloat.h             |  27 +++++
 lib/igt_x86.c                   |   9 ++
 lib/igt_x86.h                   |   1 +
 lib/meson.build                 |   1 +
 tests/kms_available_modes_crc.c |  19 +++-
 tests/kms_plane_scaling.c       |  15 ++-
 12 files changed, 485 insertions(+), 4 deletions(-)
 create mode 100644 lib/igt_halffloat.c
 create mode 100644 lib/igt_halffloat.h

-- 
2.7.4

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[igt-dev] [RFC v2 1/5] lib: Add halffloat implementation

[Kevin Strasser]

Probe for and make an API available for tests to use f16c intrinsics to
generate needed fp16 pixel data.

Also import a pure c fp32 <-> fp16 conversion implementation from Mesa
18.3.4, which will act as a fallback when f16c is unavailable.

rfc2:
- Change API to reduce number of function calls (Maarten)

Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
---
 COPYING              |  22 +++++
 lib/Makefile.sources |   2 +
 lib/igt_halffloat.c  | 234 +++++++++++++++++++++++++++++++++++++++++++++++++++
 lib/igt_halffloat.h  |  27 ++++++
 lib/igt_x86.c        |   9 ++
 lib/igt_x86.h        |   1 +
 lib/meson.build      |   1 +
 7 files changed, 296 insertions(+)
 create mode 100644 lib/igt_halffloat.c
 create mode 100644 lib/igt_halffloat.h

diff --git a/COPYING b/COPYING
index 29e0238..0fe6584 100644
--- a/COPYING
+++ b/COPYING
@@ -126,3 +126,25 @@ SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
 ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
 OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+
+Copyright (C) 1999-2007  Brian Paul   All Rights Reserved.
+Copyright 2015 Philip Taylor <philip@zaynar.co.uk>
+Copyright 2018 Advanced Micro Devices, Inc.
+
+Permission is hereby granted, free of charge, to any person obtaining a
+copy of this software and associated documentation files (the "Software"),
+to deal in the Software without restriction, including without limitation
+the rights to use, copy, modify, merge, publish, distribute, sublicense,
+and/or sell copies of the Software, and to permit persons to whom the
+Software is furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included
+in all copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+OTHER DEALINGS IN THE SOFTWARE.
diff --git a/lib/Makefile.sources b/lib/Makefile.sources
index cf27209..89f6ce5 100644
--- a/lib/Makefile.sources
+++ b/lib/Makefile.sources
@@ -30,6 +30,8 @@ lib_source_list =	 	\
 	igt_gt.h		\
 	igt_gvt.c		\
 	igt_gvt.h		\
+	igt_halffloat.c		\
+	igt_halffloat.h		\
 	igt_matrix.c		\
 	igt_matrix.h		\
 	igt_primes.c		\
diff --git a/lib/igt_halffloat.c b/lib/igt_halffloat.c
new file mode 100644
index 0000000..fc09930
--- /dev/null
+++ b/lib/igt_halffloat.c
@@ -0,0 +1,234 @@
+/*
+ * Copyright (C) 1999-2007  Brian Paul   All Rights Reserved.
+ * Copyright 2015 Philip Taylor <philip@zaynar.co.uk>
+ * Copyright 2018 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <assert.h>
+#include <math.h>
+
+#include "igt_halffloat.h"
+#include "igt_x86.h"
+
+typedef union { float f; int32_t i; uint32_t u; } fi_type;
+
+/**
+ * Convert a 4-byte float to a 2-byte half float.
+ *
+ * Not all float32 values can be represented exactly as a float16 value. We
+ * round such intermediate float32 values to the nearest float16. When the
+ * float32 lies exactly between to float16 values, we round to the one with
+ * an even mantissa.
+ *
+ * This rounding behavior has several benefits:
+ *   - It has no sign bias.
+ *
+ *   - It reproduces the behavior of real hardware: opcode F32TO16 in Intel's
+ *     GPU ISA.
+ *
+ *   - By reproducing the behavior of the GPU (at least on Intel hardware),
+ *     compile-time evaluation of constant packHalf2x16 GLSL expressions will
+ *     result in the same value as if the expression were executed on the GPU.
+ */
+static inline uint16_t _float_to_half(float val)
+{
+	const fi_type fi = {val};
+	const int flt_m = fi.i & 0x7fffff;
+	const int flt_e = (fi.i >> 23) & 0xff;
+	const int flt_s = (fi.i >> 31) & 0x1;
+	int s, e, m = 0;
+	uint16_t result;
+
+	/* sign bit */
+	s = flt_s;
+
+	/* handle special cases */
+	if ((flt_e == 0) && (flt_m == 0)) {
+		/* zero */
+		/* m = 0; - already set */
+		e = 0;
+	} else if ((flt_e == 0) && (flt_m != 0)) {
+		/* denorm -- denorm float maps to 0 half */
+		/* m = 0; - already set */
+		e = 0;
+	} else if ((flt_e == 0xff) && (flt_m == 0)) {
+		/* infinity */
+		/* m = 0; - already set */
+		e = 31;
+	} else if ((flt_e == 0xff) && (flt_m != 0)) {
+		/* NaN */
+		m = 1;
+		e = 31;
+	} else {
+		/* regular number */
+		const int new_exp = flt_e - 127;
+		if (new_exp < -14) {
+			/* The float32 lies in the range (0.0, min_normal16) and
+			 * is rounded to a nearby float16 value. The result will
+			 * be either zero, subnormal, or normal.
+			 */
+			e = 0;
+			m = lrintf((1 << 24) * fabsf(fi.f));
+		} else if (new_exp > 15) {
+			/* map this value to infinity */
+			/* m = 0; - already set */
+			e = 31;
+		} else {
+			/* The float32 lies in the range
+			 *   [min_normal16, max_normal16 + max_step16)
+			 * and is rounded to a nearby float16 value. The result
+			 * will be either normal or infinite.
+			 */
+			e = new_exp + 15;
+			m = lrintf(flt_m / (float)(1 << 13));
+		}
+	}
+
+	assert(0 <= m && m <= 1024);
+	if (m == 1024) {
+		/* The float32 was rounded upwards into the range of the next
+		 * exponent, so bump the exponent. This correctly handles the
+		 * case where f32 should be rounded up to float16 infinity.
+		 */
+		++e;
+		m = 0;
+	}
+
+	result = (s << 15) | (e << 10) | m;
+	return result;
+}
+
+/**
+ * Convert a 2-byte half float to a 4-byte float.
+ * Based on code from:
+ * http://www.opengl.org/discussion_boards/ubb/Forum3/HTML/008786.html
+ */
+static inline float _half_to_float(uint16_t val)
+{
+	/* XXX could also use a 64K-entry lookup table */
+	const int m = val & 0x3ff;
+	const int e = (val >> 10) & 0x1f;
+	const int s = (val >> 15) & 0x1;
+	int flt_m, flt_e, flt_s;
+	fi_type fi;
+
+	/* sign bit */
+	flt_s = s;
+
+	/* handle special cases */
+	if ((e == 0) && (m == 0)) {
+		/* zero */
+		flt_m = 0;
+		flt_e = 0;
+	} else if ((e == 0) && (m != 0)) {
+		/* denorm -- denorm half will fit in non-denorm single */
+		const float half_denorm = 1.0f / 16384.0f; /* 2^-14 */
+		float mantissa = ((float) (m)) / 1024.0f;
+		float sign = s ? -1.0f : 1.0f;
+		return sign * mantissa * half_denorm;
+	} else if ((e == 31) && (m == 0)) {
+		/* infinity */
+		flt_e = 0xff;
+		flt_m = 0;
+	} else if ((e == 31) && (m != 0)) {
+		/* NaN */
+		flt_e = 0xff;
+		flt_m = 1;
+	} else {
+		/* regular */
+		flt_e = e + 112;
+		flt_m = m << 13;
+	}
+
+	fi.i = (flt_s << 31) | (flt_e << 23) | flt_m;
+	return fi.f;
+}
+
+#if defined(__x86_64__) && !defined(__clang__)
+#pragma GCC push_options
+#pragma GCC target("f16c")
+
+#include <immintrin.h>
+
+static void float_to_half_f16c(const float *f, uint16_t *h, unsigned int num)
+{
+	for (int i = 0; i < num; i++)
+		h[i] = _cvtss_sh(f[i], 0);
+}
+
+static void half_to_float_f16c(const uint16_t *h, float *f, unsigned int num)
+{
+	for (int i = 0; i < num; i++)
+		f[i] = _cvtsh_ss(h[i]);
+}
+
+static void float_to_half(const float *f, uint16_t *h, unsigned int num)
+{
+	for (int i = 0; i < num; i++)
+		h[i] = _float_to_half(f[i]);
+}
+
+static void half_to_float(const uint16_t *h, float *f, unsigned int num)
+{
+	for (int i = 0; i < num; i++)
+		f[i] = _half_to_float(h[i]);
+}
+
+#pragma GCC pop_options
+
+static void (*resolve_float_to_half(void))(const float *f, uint16_t *h, unsigned int num)
+{
+	if (igt_x86_features() & F16C)
+		return float_to_half_f16c;
+
+	return float_to_half;
+}
+
+void igt_float_to_half(const float *f, uint16_t *h, unsigned int num)
+	__attribute__((ifunc("resolve_float_to_half")));
+
+static void (*resolve_half_to_float(void))(const uint16_t *h, float *f, unsigned int num)
+{
+	if (igt_x86_features() & F16C)
+		return half_to_float_f16c;
+
+	return half_to_float;
+}
+
+void igt_half_to_float(const uint16_t *h, float *f, unsigned int num)
+	__attribute__((ifunc("resolve_half_to_float")));
+
+#else
+
+void igt_float_to_half(const float *f, uint16_t *h, unsigned int num)
+{
+	for (int i = 0; i < num; i++)
+		h[i] = _float_to_half(f[i]);
+}
+
+float igt_half_to_float(const uint16_t *h, float *f, unsigned int num)
+{
+	for (int i = 0; i < num; i++)
+		f[i] = _half_to_float(h[i]);
+}
+
+#endif
+
diff --git a/lib/igt_halffloat.h b/lib/igt_halffloat.h
new file mode 100644
index 0000000..8db448a
--- /dev/null
+++ b/lib/igt_halffloat.h
@@ -0,0 +1,27 @@
+/*
+ * Copyright (C) 1999-2007  Brian Paul   All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <stdint.h>
+
+void igt_float_to_half(const float *f, uint16_t *h, unsigned int num);
+void igt_half_to_float(const uint16_t *h, float *f, unsigned int num);
+
diff --git a/lib/igt_x86.c b/lib/igt_x86.c
index 88e514d..9d28e6b 100644
--- a/lib/igt_x86.c
+++ b/lib/igt_x86.c
@@ -88,6 +88,10 @@
 #define bit_AVX		(1 << 28)
 #endif
 
+#ifndef bit_F16C
+#define bit_F16C	(1 << 29)
+#endif
+
 #ifndef bit_AVX2
 #define bit_AVX2	(1<<5)
 #endif
@@ -138,6 +142,9 @@ unsigned igt_x86_features(void)
 
 		if (edx & bit_SSE2)
 			features |= SSE2;
+
+		if (edx & bit_F16C)
+			features |= F16C;
 	}
 
 	if (max >= 7) {
@@ -174,6 +181,8 @@ char *igt_x86_features_to_string(unsigned features, char *line)
 		line += sprintf(line, ", avx");
 	if (features & AVX2)
 		line += sprintf(line, ", avx2");
+	if (features & F16C)
+		line += sprintf(line, ", f16c");
 
 	(void)line;
 
diff --git a/lib/igt_x86.h b/lib/igt_x86.h
index d4f8c34..c7b84de 100644
--- a/lib/igt_x86.h
+++ b/lib/igt_x86.h
@@ -39,6 +39,7 @@
 #define SSE4_2	0x40
 #define AVX	0x80
 #define AVX2	0x100
+#define F16C	0x200
 
 #if defined(__x86_64__) || defined(__i386__)
 unsigned igt_x86_features(void);
diff --git a/lib/meson.build b/lib/meson.build
index 0eb5585..edf0a66 100644
--- a/lib/meson.build
+++ b/lib/meson.build
@@ -11,6 +11,7 @@ lib_sources = [
 	'igt_aux.c',
 	'igt_gt.c',
 	'igt_gvt.c',
+	'igt_halffloat.c',
 	'igt_matrix.c',
 	'igt_primes.c',
 	'igt_rand.c',
-- 
2.7.4

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[igt-dev] [RFC v2 2/5] include: Add fp16 format defines

[Kevin Strasser]

Adds fp16 formats needed for testing.

NOTE: This should not be merged until defines have actually landed in the
drm-next uapi headers.

Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
---
 include/drm-uapi/drm_fourcc.h | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/include/drm-uapi/drm_fourcc.h b/include/drm-uapi/drm_fourcc.h
index bab2029..6302070 100644
--- a/include/drm-uapi/drm_fourcc.h
+++ b/include/drm-uapi/drm_fourcc.h
@@ -144,6 +144,16 @@ extern "C" {
 #define DRM_FORMAT_RGBA1010102	fourcc_code('R', 'A', '3', '0') /* [31:0] R:G:B:A 10:10:10:2 little endian */
 #define DRM_FORMAT_BGRA1010102	fourcc_code('B', 'A', '3', '0') /* [31:0] B:G:R:A 10:10:10:2 little endian */
 
+/* Floating point 64 bpp RGB
+ * IEEE 754-2008 binary16 half-precision float
+ * [15:0] sign:exponent:mantissa 1:5:10
+ */
+#define DRM_FORMAT_XRGB16161616F fourcc_code('X', 'R', '4', 'H') /* [63:0] x:R:G:B 16:16:16:16 little endian */
+#define DRM_FORMAT_XBGR16161616F fourcc_code('X', 'B', '4', 'H') /* [63:0] x:B:G:R 16:16:16:16 little endian */
+
+#define DRM_FORMAT_ARGB16161616F fourcc_code('A', 'R', '4', 'H') /* [63:0] A:R:G:B 16:16:16:16 little endian */
+#define DRM_FORMAT_ABGR16161616F fourcc_code('A', 'B', '4', 'H') /* [63:0] A:B:G:R 16:16:16:16 little endian */
+
 /* packed YCbCr */
 #define DRM_FORMAT_YUYV		fourcc_code('Y', 'U', 'Y', 'V') /* [31:0] Cr0:Y1:Cb0:Y0 8:8:8:8 little endian */
 #define DRM_FORMAT_YVYU		fourcc_code('Y', 'V', 'Y', 'U') /* [31:0] Cb0:Y1:Cr0:Y0 8:8:8:8 little endian */
-- 
2.7.4

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[igt-dev] [RFC v2 3/5] tests/kms_available_modes_crc: Add cases for 64bit formats

[Kevin Strasser]

This test iterates through all supported formats, add cases for new 64 bit
formats so it continues passing.

rfc2:
-Use uint64_t (Maarten)

Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
---
 tests/kms_available_modes_crc.c | 19 ++++++++++++++++++-
 1 file changed, 18 insertions(+), 1 deletion(-)

diff --git a/tests/kms_available_modes_crc.c b/tests/kms_available_modes_crc.c
index 7ff385f..33c8ab1 100644
--- a/tests/kms_available_modes_crc.c
+++ b/tests/kms_available_modes_crc.c
@@ -124,10 +124,11 @@ static const struct {
 	enum		{ BYTES_PP_1=1,
 				BYTES_PP_2=2,
 				BYTES_PP_4=4,
+				BYTES_PP_8=8,
 				NV12,
 				P010,
 				SKIP4 } bpp;
-	uint32_t	value;
+	uint64_t	value;
 } fillers[] = {
 	{ DRM_FORMAT_C8, 0, BYTES_PP_1, 0xff},
 	{ DRM_FORMAT_RGB565, 0, BYTES_PP_2, 0xffff},
@@ -146,6 +147,11 @@ static const struct {
 	{ DRM_FORMAT_XRGB2101010, 0, BYTES_PP_4, 0xffffffff},
 	{ DRM_FORMAT_XBGR2101010, 0, BYTES_PP_4, 0xffffffff},
 
+	{ DRM_FORMAT_XRGB16161616F, 0, BYTES_PP_8, 0x3c003c003c003c00},
+	{ DRM_FORMAT_XBGR16161616F, 0, BYTES_PP_8, 0x3c003c003c003c00},
+	{ DRM_FORMAT_ARGB16161616F, 0, BYTES_PP_8, 0x3c003c003c003c00},
+	{ DRM_FORMAT_ABGR16161616F, 0, BYTES_PP_8, 0x3c003c003c003c00},
+
 	{ DRM_FORMAT_YUYV, 0, BYTES_PP_4, 0x80eb80eb},
 	{ DRM_FORMAT_YVYU, 0, BYTES_PP_4, 0x80eb80eb},
 	{ DRM_FORMAT_VYUY, 0, BYTES_PP_4, 0xeb80eb80},
@@ -177,6 +183,7 @@ static bool fill_in_fb(data_t *data, igt_output_t *output, igt_plane_t *plane,
 	signed i, c, writesize;
 	unsigned short* ptemp_16_buf;
 	unsigned int* ptemp_32_buf;
+	unsigned long int* ptemp_64_buf;
 
 	for( i = 0; fillers[i].fourcc != 0; i++ ) {
 		if( fillers[i].fourcc == format )
@@ -184,6 +191,12 @@ static bool fill_in_fb(data_t *data, igt_output_t *output, igt_plane_t *plane,
 	}
 
 	switch (fillers[i].bpp) {
+	case BYTES_PP_8:
+		ptemp_64_buf = (uint64_t*)data->buf;
+		for (c = 0; c < data->size/8; c++)
+			ptemp_64_buf[c] = fillers[i].value;
+		writesize = data->size;
+		break;
 	case BYTES_PP_4:
 		ptemp_32_buf = (unsigned int*)data->buf;
 		for (c = 0; c < data->size/4; c++)
@@ -291,6 +304,10 @@ static bool setup_fb(data_t *data, igt_output_t *output, igt_plane_t *plane,
 	case BYTES_PP_4:
 		bpp = 32;
 		break;
+
+	case BYTES_PP_8:
+		bpp = 64;
+		break;
 	}
 
 	igt_get_fb_tile_size(data->gfx_fd, tiling, bpp,
-- 
2.7.4

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[igt-dev] [RFC v2 4/5] lib/igt_fb: Add support for fp16 formats through conversion

[Kevin Strasser]

Follow design of P01x conversion to support tests needing pixel data in fp16
(half float 64 bpp).

rfc2:
- Convert whole rows of pixels if possible (Maarten)
- Treat rgbx like rgba, let hardware ignore alpha (Maarten)

Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
---
 lib/igt_fb.c | 148 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-
 lib/igt_fb.h |   1 +
 2 files changed, 148 insertions(+), 1 deletion(-)

diff --git a/lib/igt_fb.c b/lib/igt_fb.c
index 9dca2a4..451b2c2 100644
--- a/lib/igt_fb.c
+++ b/lib/igt_fb.c
@@ -35,6 +35,7 @@
 #include "igt_aux.h"
 #include "igt_color_encoding.h"
 #include "igt_fb.h"
+#include "igt_halffloat.h"
 #include "igt_kms.h"
 #include "igt_matrix.h"
 #include "igt_vc4.h"
@@ -161,6 +162,22 @@ static const struct format_desc_struct {
 	  .num_planes = 1, .plane_bpp = { 32, },
 	  .hsub = 1, .vsub = 1,
 	},
+	{ .name = "XRGB16161616F", .depth = -1, .drm_id = DRM_FORMAT_XRGB16161616F,
+	  .cairo_id = CAIRO_FORMAT_RGBA128F,
+	  .num_planes = 1, .plane_bpp = { 64, },
+	},
+	{ .name = "ARGB16161616F", .depth = -1, .drm_id = DRM_FORMAT_ARGB16161616F,
+	  .cairo_id = CAIRO_FORMAT_RGBA128F,
+	  .num_planes = 1, .plane_bpp = { 64, },
+	},
+	{ .name = "XBGR16161616F", .depth = -1, .drm_id = DRM_FORMAT_XBGR16161616F,
+	  .cairo_id = CAIRO_FORMAT_RGBA128F,
+	  .num_planes = 1, .plane_bpp = { 64, },
+	},
+	{ .name = "ABGR16161616F", .depth = -1, .drm_id = DRM_FORMAT_ABGR16161616F,
+	  .cairo_id = CAIRO_FORMAT_RGBA128F,
+	  .num_planes = 1, .plane_bpp = { 64, },
+	},
 	{ .name = "NV12", .depth = -1, .drm_id = DRM_FORMAT_NV12,
 	  .cairo_id = CAIRO_FORMAT_RGB24,
 	  .num_planes = 2, .plane_bpp = { 8, 16, },
@@ -661,7 +678,8 @@ static int create_bo_for_fb(struct igt_fb *fb)
 	 * them, so we need to make sure to use a device BO then.
 	 */
 	if (fb->tiling || fb->size || fb->strides[0] ||
-	    (is_i915_device(fd) && igt_format_is_yuv(fb->drm_format)))
+	    (is_i915_device(fd) && igt_format_is_yuv(fb->drm_format)) ||
+	    (is_i915_device(fd) && igt_format_is_fp16(fb->drm_format)))
 		device_bo = true;
 
 	/* Sets offets and stride if necessary. */
@@ -2202,6 +2220,102 @@ static void convert_float_to_yuv16(struct fb_convert *cvt)
 	}
 }
 
+/* { R, G, B, X } */
+static const unsigned char swizzle_rgbx[] = { 0, 1, 2, 3 };
+static const unsigned char swizzle_bgrx[] = { 2, 1, 0, 3 };
+
+static const unsigned char *rgbx_swizzle(uint32_t format)
+{
+	switch (format) {
+	default:
+	case DRM_FORMAT_XRGB16161616F:
+	case DRM_FORMAT_ARGB16161616F:
+		return swizzle_bgrx;
+	case DRM_FORMAT_XBGR16161616F:
+	case DRM_FORMAT_ABGR16161616F:
+		return swizzle_rgbx;
+	}
+}
+
+static void convert_fp16_to_float(struct fb_convert *cvt)
+{
+	int i, j;
+	uint16_t *fp16;
+	float *ptr = cvt->dst.ptr;
+	unsigned int float_stride = cvt->dst.fb->strides[0] / sizeof(*ptr);
+	unsigned int fp16_stride = cvt->src.fb->strides[0] / sizeof(*fp16);
+	const unsigned char *swz = rgbx_swizzle(cvt->src.fb->drm_format);
+	bool needs_reswizzle = swz != swizzle_rgbx;
+
+	uint16_t *buf = convert_src_get(cvt);
+	fp16 = buf + cvt->src.fb->offsets[0] / sizeof(*buf);
+
+	for (i = 0; i < cvt->dst.fb->height; i++) {
+		if (needs_reswizzle) {
+			const uint16_t *fp16_tmp = fp16;
+			float *rgb_tmp = ptr;
+
+			for (j = 0; j < cvt->dst.fb->width; j++) {
+				struct igt_vec4 rgb;
+
+				igt_half_to_float(fp16_tmp, rgb.d, 4);
+
+				rgb_tmp[0] = rgb.d[swz[0]];
+				rgb_tmp[1] = rgb.d[swz[1]];
+				rgb_tmp[2] = rgb.d[swz[2]];
+				rgb_tmp[3] = rgb.d[swz[3]];
+
+				rgb_tmp += 4;
+				fp16_tmp += 4;
+			}
+		} else {
+			igt_half_to_float(fp16, ptr, cvt->dst.fb->width * 4);
+		}
+
+		ptr += float_stride;
+		fp16 += fp16_stride;
+	}
+
+	convert_src_put(cvt, buf);
+}
+
+static void convert_float_to_fp16(struct fb_convert *cvt)
+{
+	int i, j;
+	uint16_t *fp16 = cvt->dst.ptr + cvt->dst.fb->offsets[0];
+	const float *ptr = cvt->src.ptr;
+	unsigned float_stride = cvt->src.fb->strides[0] / sizeof(*ptr);
+	unsigned fp16_stride = cvt->dst.fb->strides[0] / sizeof(*fp16);
+	const unsigned char *swz = rgbx_swizzle(cvt->dst.fb->drm_format);
+	bool needs_reswizzle = swz != swizzle_rgbx;
+
+	for (i = 0; i < cvt->dst.fb->height; i++) {
+		if (needs_reswizzle) {
+			const float *rgb_tmp = ptr;
+			uint16_t *fp16_tmp = fp16;
+
+			for (j = 0; j < cvt->dst.fb->width; j++) {
+				struct igt_vec4 rgb;
+
+				rgb.d[0] = rgb_tmp[swz[0]];
+				rgb.d[1] = rgb_tmp[swz[1]];
+				rgb.d[2] = rgb_tmp[swz[2]];
+				rgb.d[3] = rgb_tmp[swz[3]];
+
+				igt_float_to_half(rgb.d, fp16_tmp, 4);
+
+				rgb_tmp += 4;
+				fp16_tmp += 4;
+			}
+		} else {
+			igt_float_to_half(ptr, fp16, cvt->dst.fb->width * 4);
+		}
+
+		ptr += float_stride;
+		fp16 += fp16_stride;
+	}
+}
+
 static void convert_pixman(struct fb_convert *cvt)
 {
 	pixman_format_code_t src_pixman = drm_format_to_pixman(cvt->src.fb->drm_format);
@@ -2290,6 +2404,12 @@ static void fb_convert(struct fb_convert *cvt)
 		case DRM_FORMAT_P016:
 			convert_yuv16_to_float(cvt);
 			return;
+		case DRM_FORMAT_XRGB16161616F:
+		case DRM_FORMAT_XBGR16161616F:
+		case DRM_FORMAT_ARGB16161616F:
+		case DRM_FORMAT_ABGR16161616F:
+			convert_fp16_to_float(cvt);
+			return;
 		}
 	} else if (cvt->src.fb->drm_format == IGT_FORMAT_FLOAT) {
 		switch (cvt->dst.fb->drm_format) {
@@ -2298,6 +2418,12 @@ static void fb_convert(struct fb_convert *cvt)
 		case DRM_FORMAT_P016:
 			convert_float_to_yuv16(cvt);
 			return;
+		case DRM_FORMAT_XRGB16161616F:
+		case DRM_FORMAT_XBGR16161616F:
+		case DRM_FORMAT_ARGB16161616F:
+		case DRM_FORMAT_ABGR16161616F:
+			convert_float_to_fp16(cvt);
+			return;
 		}
 	}
 
@@ -2453,6 +2579,7 @@ cairo_surface_t *igt_get_cairo_surface(int fd, struct igt_fb *fb)
 
 	if (fb->cairo_surface == NULL) {
 		if (igt_format_is_yuv(fb->drm_format) ||
+		    igt_format_is_fp16(fb->drm_format) ||
 		    ((f->cairo_id == CAIRO_FORMAT_INVALID) &&
 		     (f->pixman_id != PIXMAN_invalid)))
 			create_cairo_surface__convert(fd, fb);
@@ -2762,6 +2889,25 @@ bool igt_format_is_yuv(uint32_t drm_format)
 }
 
 /**
+ * igt_format_is_fp16
+ * @drm_format: drm fourcc
+ *
+ * Check if the format is fp16.
+ */
+bool igt_format_is_fp16(uint32_t drm_format)
+{
+	switch (drm_format) {
+	case DRM_FORMAT_XRGB16161616F:
+	case DRM_FORMAT_ARGB16161616F:
+	case DRM_FORMAT_XBGR16161616F:
+	case DRM_FORMAT_ABGR16161616F:
+		return true;
+	default:
+		return false;
+	}
+}
+
+/**
  * igt_format_plane_bpp:
  * @drm_format: drm fourcc
  * @plane: format plane index
diff --git a/lib/igt_fb.h b/lib/igt_fb.h
index e1d885e..07b6814 100644
--- a/lib/igt_fb.h
+++ b/lib/igt_fb.h
@@ -182,6 +182,7 @@ uint32_t igt_drm_format_to_bpp(uint32_t drm_format);
 const char *igt_format_str(uint32_t drm_format);
 bool igt_fb_supported_format(uint32_t drm_format);
 bool igt_format_is_yuv(uint32_t drm_format);
+bool igt_format_is_fp16(uint32_t drm_format);
 int igt_format_plane_bpp(uint32_t drm_format, int plane);
 void igt_format_array_fill(uint32_t **formats_array, unsigned int *count,
 			   bool allow_yuv);
-- 
2.7.4

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[igt-dev] [RFC v2 5/5] tests/kms_plane_scaling: Skip testing unsupported fp16 features

[Kevin Strasser]

Disallow Yf tiling and Y-tiled 90/270 rotation for fp16 on Intel hardware.

rfc2:
- Move check into can_rotate (Maarten)
- Use igt_plane_has_format_mod (Maarten)

Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
---
 tests/kms_plane_scaling.c | 15 +++++++++++++--
 1 file changed, 13 insertions(+), 2 deletions(-)

diff --git a/tests/kms_plane_scaling.c b/tests/kms_plane_scaling.c
index 1015c80..29b28cb 100644
--- a/tests/kms_plane_scaling.c
+++ b/tests/kms_plane_scaling.c
@@ -167,12 +167,19 @@ static const igt_rotation_t rotations[] = {
 	IGT_ROTATION_270,
 };
 
-static bool can_rotate(data_t *d, unsigned format)
+static bool can_rotate(data_t *d, unsigned format, uint64_t tiling,
+		       igt_rotation_t rot)
 {
 	if (format == DRM_FORMAT_C8 ||
 	    (intel_gen(d->devid) < 11 && format == DRM_FORMAT_RGB565))
 		return false;
 
+	// Y-tiled 90/270 rotation isn't supported for fp16 on Intel
+	if (is_i915_device(d->drm_fd) && igt_format_is_fp16(format) &&
+	    tiling == LOCAL_I915_FORMAT_MOD_Y_TILED &&
+	    (rot == IGT_ROTATION_90 || rot == IGT_ROTATION_270))
+		return false;
+
 	return true;
 }
 
@@ -193,8 +200,9 @@ static void test_scaler_with_rotation_pipe(data_t *d, enum pipe pipe,
 			igt_rotation_t rot = rotations[i];
 			for (int j = 0; j < plane->drm_plane->count_formats; j++) {
 				unsigned format = plane->drm_plane->formats[j];
+
 				if (igt_fb_supported_format(format) &&
-				    can_rotate(d, format))
+				    can_rotate(d, format, tiling, rot))
 					check_scaling_pipe_plane_rot(d, plane, format,
 								     tiling, pipe,
 								     output, rot);
@@ -227,6 +235,9 @@ static void test_scaler_with_pixel_format_pipe(data_t *d, enum pipe pipe, igt_ou
 			for (int j = 0; j < plane->drm_plane->count_formats; j++) {
 				uint32_t format = plane->drm_plane->formats[j];
 
+				if (!igt_plane_has_format_mod(plane, format, tiling))
+					continue;
+
 				if (igt_fb_supported_format(format))
 					check_scaling_pipe_plane_rot(d, plane,
 								     format, tiling,
-- 
2.7.4

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[igt-dev] ✓ Fi.CI.BAT: success for Add support for fp16 formats (rev2)

[Patchwork]

== Series Details ==

Series: Add support for fp16 formats (rev2)
URL   : https://patchwork.freedesktop.org/series/57473/
State : success

== Summary ==

CI Bug Log - changes from IGT_4872 -> IGTPW_2557
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/57473/revisions/2/mbox/

Known issues
------------

  Here are the changes found in IGTPW_2557 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_pm_rpm@module-reload:
    - fi-skl-6770hq:      PASS -> FAIL [fdo#108511]

  * igt@kms_chamelium@common-hpd-after-suspend:
    - fi-kbl-7567u:       PASS -> DMESG-FAIL [fdo#105079]

  * igt@kms_pipe_crc_basic@nonblocking-crc-pipe-c:
    - fi-kbl-7567u:       PASS -> SKIP [fdo#109271] +27

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
    - fi-byt-clapper:     PASS -> FAIL [fdo#103191] / [fdo#107362] +1

  
#### Possible fixes ####

  * igt@debugfs_test@read_all_entries:
    - fi-kbl-7567u:       DMESG-WARN [fdo#103558] / [fdo#105602] -> PASS

  * igt@gem_exec_suspend@basic-s3:
    - fi-kbl-7567u:       DMESG-WARN [fdo#103558] / [fdo#105079] / [fdo#105602] -> PASS

  * igt@i915_selftest@live_execlists:
    - fi-apl-guc:         INCOMPLETE [fdo#103927] / [fdo#109720] -> PASS

  * igt@kms_busy@basic-flip-a:
    - fi-kbl-7567u:       SKIP [fdo#109271] / [fdo#109278] -> PASS +2

  * igt@kms_chamelium@hdmi-edid-read:
    - fi-kbl-7567u:       FAIL [fdo#109569] -> PASS +1

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-kbl-7567u:       FAIL [fdo#109800] -> PASS

  * igt@kms_frontbuffer_tracking@basic:
    - fi-icl-u3:          FAIL [fdo#103167] -> PASS
    - fi-byt-clapper:     FAIL [fdo#103167] -> PASS

  * igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence:
    - fi-byt-clapper:     FAIL [fdo#103191] / [fdo#107362] -> PASS

  
#### Warnings ####

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
    - fi-kbl-7567u:       DMESG-WARN [fdo#103558] / [fdo#105079] / [fdo#105602] -> SKIP [fdo#109271]

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
    - fi-kbl-7567u:       DMESG-FAIL [fdo#105079] -> SKIP [fdo#109271]

  
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
  [fdo#103558]: https://bugs.freedesktop.org/show_bug.cgi?id=103558
  [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
  [fdo#105079]: https://bugs.freedesktop.org/show_bug.cgi?id=105079
  [fdo#105602]: https://bugs.freedesktop.org/show_bug.cgi?id=105602
  [fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362
  [fdo#108511]: https://bugs.freedesktop.org/show_bug.cgi?id=108511
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
  [fdo#109569]: https://bugs.freedesktop.org/show_bug.cgi?id=109569
  [fdo#109720]: https://bugs.freedesktop.org/show_bug.cgi?id=109720
  [fdo#109800]: https://bugs.freedesktop.org/show_bug.cgi?id=109800


Participating hosts (47 -> 42)
------------------------------

  Missing    (5): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-bdw-samus 


Build changes
-------------

    * IGT: IGT_4872 -> IGTPW_2557

  CI_DRM_5708: afd34c5dec857362de91fb3044f09d90e83ad6a5 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_2557: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2557/
  IGT_4872: 67c72249d963a30a681c204b5aad1563dc98d92c @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2557/
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[igt-dev] ✗ Fi.CI.IGT: failure for Add support for fp16 formats (rev2)

[Patchwork]

== Series Details ==

Series: Add support for fp16 formats (rev2)
URL   : https://patchwork.freedesktop.org/series/57473/
State : failure

== Summary ==

CI Bug Log - changes from IGT_4872_full -> IGTPW_2557_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with IGTPW_2557_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in IGTPW_2557_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/57473/revisions/2/mbox/

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_2557_full:

### IGT changes ###

#### Possible regressions ####

  * igt@gem_media_vme:
    - shard-glk:          PASS -> FAIL

  
Known issues
------------

  Here are the changes found in IGTPW_2557_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_atomic_transition@plane-all-modeset-transition:
    - shard-kbl:          PASS -> INCOMPLETE [fdo#103665]
    - shard-apl:          PASS -> INCOMPLETE [fdo#103927] +1

  * igt@kms_busy@basic-flip-d:
    - shard-glk:          NOTRUN -> SKIP [fdo#109271] / [fdo#109278]

  * igt@kms_busy@extended-modeset-hang-newfb-render-c:
    - shard-kbl:          PASS -> DMESG-WARN [fdo#107956]

  * igt@kms_busy@extended-modeset-hang-newfb-render-d:
    - shard-kbl:          NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +2

  * igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-b:
    - shard-hsw:          PASS -> DMESG-WARN [fdo#107956]

  * igt@kms_color@pipe-c-degamma:
    - shard-apl:          PASS -> FAIL [fdo#104782]

  * igt@kms_cursor_crc@cursor-64x21-random:
    - shard-apl:          PASS -> FAIL [fdo#103232] +8
    - shard-kbl:          PASS -> FAIL [fdo#103232] +2

  * igt@kms_cursor_crc@cursor-64x64-suspend:
    - shard-apl:          PASS -> FAIL [fdo#103191] / [fdo#103232]
    - shard-kbl:          PASS -> FAIL [fdo#103191] / [fdo#103232]

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt:
    - shard-kbl:          PASS -> FAIL [fdo#103167] +2

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-pwrite:
    - shard-apl:          PASS -> FAIL [fdo#103167] +4

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-onoff:
    - shard-glk:          PASS -> FAIL [fdo#103167] +6

  * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes:
    - shard-hsw:          PASS -> INCOMPLETE [fdo#103540]
    - shard-glk:          PASS -> INCOMPLETE [fdo#103359] / [k.org#198133]

  * igt@kms_plane@plane-position-covered-pipe-c-planes:
    - shard-apl:          PASS -> FAIL [fdo#103166] +5

  * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-max:
    - shard-glk:          PASS -> FAIL [fdo#108145]
    - shard-apl:          PASS -> FAIL [fdo#108145]

  * igt@kms_plane_multiple@atomic-pipe-b-tiling-x:
    - shard-glk:          PASS -> FAIL [fdo#103166] +1
    - shard-kbl:          PASS -> FAIL [fdo#103166]

  * igt@kms_rotation_crc@multiplane-rotation:
    - shard-kbl:          PASS -> FAIL [fdo#109016]

  * igt@kms_vblank@pipe-a-ts-continuation-dpms-rpm:
    - shard-apl:          PASS -> FAIL [fdo#104894] +1

  * igt@kms_vblank@pipe-c-ts-continuation-modeset-rpm:
    - shard-kbl:          NOTRUN -> FAIL [fdo#104894]

  * igt@perf_pmu@rc6:
    - shard-kbl:          PASS -> SKIP [fdo#109271]

  * igt@prime_nv_api@nv_self_import:
    - shard-glk:          NOTRUN -> SKIP [fdo#109271] +4

  * igt@prime_nv_pcopy@test2:
    - shard-kbl:          NOTRUN -> SKIP [fdo#109271] +29

  * igt@prime_vgem@coherency-gtt:
    - shard-apl:          NOTRUN -> SKIP [fdo#109271] +6

  
#### Possible fixes ####

  * igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-b:
    - shard-glk:          DMESG-WARN [fdo#107956] -> PASS

  * igt@kms_color@pipe-a-degamma:
    - shard-apl:          FAIL [fdo#104782] / [fdo#108145] -> PASS
    - shard-kbl:          FAIL [fdo#104782] / [fdo#108145] -> PASS

  * igt@kms_cursor_crc@cursor-256x256-random:
    - shard-kbl:          FAIL [fdo#103232] -> PASS

  * igt@kms_cursor_crc@cursor-256x256-suspend:
    - shard-apl:          FAIL [fdo#103191] / [fdo#103232] -> PASS

  * igt@kms_cursor_crc@cursor-256x85-random:
    - shard-apl:          FAIL [fdo#103232] -> PASS +2

  * igt@kms_flip@flip-vs-expired-vblank:
    - shard-glk:          FAIL [fdo#102887] / [fdo#105363] -> PASS

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move:
    - shard-glk:          FAIL [fdo#103167] -> PASS +4

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
    - shard-kbl:          INCOMPLETE [fdo#103665] -> PASS

  * igt@kms_plane@pixel-format-pipe-a-planes:
    - shard-kbl:          FAIL [fdo#103166] -> PASS

  * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-max:
    - shard-glk:          FAIL [fdo#108145] -> PASS +1
    - shard-kbl:          FAIL [fdo#108145] -> PASS

  * igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb:
    - shard-apl:          FAIL [fdo#108145] -> PASS +1

  * igt@kms_plane_multiple@atomic-pipe-b-tiling-none:
    - shard-glk:          FAIL [fdo#103166] -> PASS +5

  * igt@kms_plane_multiple@atomic-pipe-c-tiling-yf:
    - shard-apl:          FAIL [fdo#103166] -> PASS +2

  * igt@kms_rotation_crc@cursor-rotation-180:
    - shard-kbl:          DMESG-WARN [fdo#103313] / [fdo#105345] -> PASS

  * igt@kms_rotation_crc@multiplane-rotation:
    - shard-glk:          DMESG-FAIL [fdo#105763] / [fdo#106538] -> PASS

  * igt@kms_rotation_crc@multiplane-rotation-cropping-bottom:
    - shard-kbl:          DMESG-FAIL [fdo#105763] -> PASS

  * igt@kms_vblank@pipe-b-ts-continuation-modeset:
    - shard-apl:          FAIL [fdo#104894] -> PASS

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#102887]: https://bugs.freedesktop.org/show_bug.cgi?id=102887
  [fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
  [fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
  [fdo#103313]: https://bugs.freedesktop.org/show_bug.cgi?id=103313
  [fdo#103359]: https://bugs.freedesktop.org/show_bug.cgi?id=103359
  [fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
  [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
  [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
  [fdo#104782]: https://bugs.freedesktop.org/show_bug.cgi?id=104782
  [fdo#104894]: https://bugs.freedesktop.org/show_bug.cgi?id=104894
  [fdo#105345]: https://bugs.freedesktop.org/show_bug.cgi?id=105345
  [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
  [fdo#105763]: https://bugs.freedesktop.org/show_bug.cgi?id=105763
  [fdo#106538]: https://bugs.freedesktop.org/show_bug.cgi?id=106538
  [fdo#107956]: https://bugs.freedesktop.org/show_bug.cgi?id=107956
  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#109016]: https://bugs.freedesktop.org/show_bug.cgi?id=109016
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
  [k.org#198133]: https://bugzilla.kernel.org/show_bug.cgi?id=198133


Participating hosts (6 -> 4)
------------------------------

  Missing    (2): shard-snb shard-skl 


Build changes
-------------

    * IGT: IGT_4872 -> IGTPW_2557

  CI_DRM_5708: afd34c5dec857362de91fb3044f09d90e83ad6a5 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_2557: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2557/
  IGT_4872: 67c72249d963a30a681c204b5aad1563dc98d92c @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2557/
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Re: [igt-dev] [RFC v2 1/5] lib: Add halffloat implementation

[Ville Syrjälä]

On Tue, Mar 05, 2019 at 06:18:33PM -0800, Kevin Strasser wrote:
> Probe for and make an API available for tests to use f16c intrinsics to
> generate needed fp16 pixel data.
> 
> Also import a pure c fp32 <-> fp16 conversion implementation from Mesa
> 18.3.4, which will act as a fallback when f16c is unavailable.

Ugh. I just realized we didn't get this stuff merged. Sorry. Let's try
to remedy that.

> 
> rfc2:
> - Change API to reduce number of function calls (Maarten)
> 
> Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
> ---
>  COPYING              |  22 +++++
>  lib/Makefile.sources |   2 +
>  lib/igt_halffloat.c  | 234 +++++++++++++++++++++++++++++++++++++++++++++++++++
>  lib/igt_halffloat.h  |  27 ++++++
>  lib/igt_x86.c        |   9 ++
>  lib/igt_x86.h        |   1 +
>  lib/meson.build      |   1 +
>  7 files changed, 296 insertions(+)
>  create mode 100644 lib/igt_halffloat.c
>  create mode 100644 lib/igt_halffloat.h
> 
> diff --git a/COPYING b/COPYING
> index 29e0238..0fe6584 100644
> --- a/COPYING
> +++ b/COPYING
> @@ -126,3 +126,25 @@ SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
>  WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
>  ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
>  OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
> +
> +Copyright (C) 1999-2007  Brian Paul   All Rights Reserved.
> +Copyright 2015 Philip Taylor <philip@zaynar.co.uk>
> +Copyright 2018 Advanced Micro Devices, Inc.
> +
> +Permission is hereby granted, free of charge, to any person obtaining a
> +copy of this software and associated documentation files (the "Software"),
> +to deal in the Software without restriction, including without limitation
> +the rights to use, copy, modify, merge, publish, distribute, sublicense,
> +and/or sell copies of the Software, and to permit persons to whom the
> +Software is furnished to do so, subject to the following conditions:
> +
> +The above copyright notice and this permission notice shall be included
> +in all copies or substantial portions of the Software.
> +
> +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
> +OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> +FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> +THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
> +OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> +ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> +OTHER DEALINGS IN THE SOFTWARE.
> diff --git a/lib/Makefile.sources b/lib/Makefile.sources
> index cf27209..89f6ce5 100644
> --- a/lib/Makefile.sources
> +++ b/lib/Makefile.sources
> @@ -30,6 +30,8 @@ lib_source_list =	 	\
>  	igt_gt.h		\
>  	igt_gvt.c		\
>  	igt_gvt.h		\
> +	igt_halffloat.c		\
> +	igt_halffloat.h		\
>  	igt_matrix.c		\
>  	igt_matrix.h		\
>  	igt_primes.c		\
> diff --git a/lib/igt_halffloat.c b/lib/igt_halffloat.c
> new file mode 100644
> index 0000000..fc09930
> --- /dev/null
> +++ b/lib/igt_halffloat.c
> @@ -0,0 +1,234 @@
> +/*
> + * Copyright (C) 1999-2007  Brian Paul   All Rights Reserved.
> + * Copyright 2015 Philip Taylor <philip@zaynar.co.uk>
> + * Copyright 2018 Advanced Micro Devices, Inc.
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice shall be included
> + * in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
> + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
> + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +#include <assert.h>
> +#include <math.h>
> +
> +#include "igt_halffloat.h"
> +#include "igt_x86.h"
> +
> +typedef union { float f; int32_t i; uint32_t u; } fi_type;
> +
> +/**
> + * Convert a 4-byte float to a 2-byte half float.
> + *
> + * Not all float32 values can be represented exactly as a float16 value. We
> + * round such intermediate float32 values to the nearest float16. When the
> + * float32 lies exactly between to float16 values, we round to the one with
> + * an even mantissa.
> + *
> + * This rounding behavior has several benefits:
> + *   - It has no sign bias.
> + *
> + *   - It reproduces the behavior of real hardware: opcode F32TO16 in Intel's
> + *     GPU ISA.
> + *
> + *   - By reproducing the behavior of the GPU (at least on Intel hardware),
> + *     compile-time evaluation of constant packHalf2x16 GLSL expressions will
> + *     result in the same value as if the expression were executed on the GPU.
> + */
> +static inline uint16_t _float_to_half(float val)
> +{
> +	const fi_type fi = {val};
> +	const int flt_m = fi.i & 0x7fffff;
> +	const int flt_e = (fi.i >> 23) & 0xff;
> +	const int flt_s = (fi.i >> 31) & 0x1;
> +	int s, e, m = 0;
> +	uint16_t result;
> +
> +	/* sign bit */
> +	s = flt_s;
> +
> +	/* handle special cases */
> +	if ((flt_e == 0) && (flt_m == 0)) {
> +		/* zero */
> +		/* m = 0; - already set */
> +		e = 0;
> +	} else if ((flt_e == 0) && (flt_m != 0)) {
> +		/* denorm -- denorm float maps to 0 half */
> +		/* m = 0; - already set */
> +		e = 0;
> +	} else if ((flt_e == 0xff) && (flt_m == 0)) {
> +		/* infinity */
> +		/* m = 0; - already set */
> +		e = 31;
> +	} else if ((flt_e == 0xff) && (flt_m != 0)) {
> +		/* NaN */
> +		m = 1;
> +		e = 31;
> +	} else {
> +		/* regular number */
> +		const int new_exp = flt_e - 127;
> +		if (new_exp < -14) {
> +			/* The float32 lies in the range (0.0, min_normal16) and
> +			 * is rounded to a nearby float16 value. The result will
> +			 * be either zero, subnormal, or normal.
> +			 */
> +			e = 0;
> +			m = lrintf((1 << 24) * fabsf(fi.f));
> +		} else if (new_exp > 15) {
> +			/* map this value to infinity */
> +			/* m = 0; - already set */
> +			e = 31;
> +		} else {
> +			/* The float32 lies in the range
> +			 *   [min_normal16, max_normal16 + max_step16)
> +			 * and is rounded to a nearby float16 value. The result
> +			 * will be either normal or infinite.
> +			 */
> +			e = new_exp + 15;
> +			m = lrintf(flt_m / (float)(1 << 13));
> +		}
> +	}
> +
> +	assert(0 <= m && m <= 1024);
> +	if (m == 1024) {
> +		/* The float32 was rounded upwards into the range of the next
> +		 * exponent, so bump the exponent. This correctly handles the
> +		 * case where f32 should be rounded up to float16 infinity.
> +		 */
> +		++e;
> +		m = 0;
> +	}
> +
> +	result = (s << 15) | (e << 10) | m;
> +	return result;
> +}
> +
> +/**
> + * Convert a 2-byte half float to a 4-byte float.
> + * Based on code from:
> + * http://www.opengl.org/discussion_boards/ubb/Forum3/HTML/008786.html
> + */
> +static inline float _half_to_float(uint16_t val)
> +{
> +	/* XXX could also use a 64K-entry lookup table */
> +	const int m = val & 0x3ff;
> +	const int e = (val >> 10) & 0x1f;
> +	const int s = (val >> 15) & 0x1;
> +	int flt_m, flt_e, flt_s;
> +	fi_type fi;
> +
> +	/* sign bit */
> +	flt_s = s;
> +
> +	/* handle special cases */
> +	if ((e == 0) && (m == 0)) {
> +		/* zero */
> +		flt_m = 0;
> +		flt_e = 0;
> +	} else if ((e == 0) && (m != 0)) {
> +		/* denorm -- denorm half will fit in non-denorm single */
> +		const float half_denorm = 1.0f / 16384.0f; /* 2^-14 */
> +		float mantissa = ((float) (m)) / 1024.0f;
> +		float sign = s ? -1.0f : 1.0f;
> +		return sign * mantissa * half_denorm;
> +	} else if ((e == 31) && (m == 0)) {
> +		/* infinity */
> +		flt_e = 0xff;
> +		flt_m = 0;
> +	} else if ((e == 31) && (m != 0)) {
> +		/* NaN */
> +		flt_e = 0xff;
> +		flt_m = 1;
> +	} else {
> +		/* regular */
> +		flt_e = e + 112;
> +		flt_m = m << 13;
> +	}
> +
> +	fi.i = (flt_s << 31) | (flt_e << 23) | flt_m;
> +	return fi.f;
> +}
> +
> +#if defined(__x86_64__) && !defined(__clang__)
> +#pragma GCC push_options
> +#pragma GCC target("f16c")
> +
> +#include <immintrin.h>
> +
> +static void float_to_half_f16c(const float *f, uint16_t *h, unsigned int num)
> +{
> +	for (int i = 0; i < num; i++)
> +		h[i] = _cvtss_sh(f[i], 0);
> +}
> +
> +static void half_to_float_f16c(const uint16_t *h, float *f, unsigned int num)
> +{
> +	for (int i = 0; i < num; i++)
> +		f[i] = _cvtsh_ss(h[i]);
> +}
> +
> +static void float_to_half(const float *f, uint16_t *h, unsigned int num)
> +{
> +	for (int i = 0; i < num; i++)
> +		h[i] = _float_to_half(f[i]);
> +}
> +
> +static void half_to_float(const uint16_t *h, float *f, unsigned int num)
> +{
> +	for (int i = 0; i < num; i++)
> +		f[i] = _half_to_float(h[i]);
> +}
> +
> +#pragma GCC pop_options

That needs to be before the fallback implementations or else the
compiler happily emits AVX code for the fallbacks. Didn't go down so
well on my core2 :/

> +
> +static void (*resolve_float_to_half(void))(const float *f, uint16_t *h, unsigned int num)
> +{
> +	if (igt_x86_features() & F16C)
> +		return float_to_half_f16c;
> +
> +	return float_to_half;
> +}
> +
> +void igt_float_to_half(const float *f, uint16_t *h, unsigned int num)
> +	__attribute__((ifunc("resolve_float_to_half")));
> +
> +static void (*resolve_half_to_float(void))(const uint16_t *h, float *f, unsigned int num)
> +{
> +	if (igt_x86_features() & F16C)
> +		return half_to_float_f16c;
> +
> +	return half_to_float;
> +}
> +
> +void igt_half_to_float(const uint16_t *h, float *f, unsigned int num)
> +	__attribute__((ifunc("resolve_half_to_float")));
> +
> +#else
> +
> +void igt_float_to_half(const float *f, uint16_t *h, unsigned int num)
> +{
> +	for (int i = 0; i < num; i++)
> +		h[i] = _float_to_half(f[i]);
> +}
> +
> +float igt_half_to_float(const uint16_t *h, float *f, unsigned int num)
> +{
> +	for (int i = 0; i < num; i++)
> +		f[i] = _half_to_float(h[i]);
> +}
> +
> +#endif
> +
> diff --git a/lib/igt_halffloat.h b/lib/igt_halffloat.h
> new file mode 100644
> index 0000000..8db448a
> --- /dev/null
> +++ b/lib/igt_halffloat.h
> @@ -0,0 +1,27 @@
> +/*
> + * Copyright (C) 1999-2007  Brian Paul   All Rights Reserved.
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice shall be included
> + * in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
> + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
> + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +#include <stdint.h>
> +
> +void igt_float_to_half(const float *f, uint16_t *h, unsigned int num);
> +void igt_half_to_float(const uint16_t *h, float *f, unsigned int num);
> +
> diff --git a/lib/igt_x86.c b/lib/igt_x86.c
> index 88e514d..9d28e6b 100644
> --- a/lib/igt_x86.c
> +++ b/lib/igt_x86.c
> @@ -88,6 +88,10 @@
>  #define bit_AVX		(1 << 28)
>  #endif
>  
> +#ifndef bit_F16C
> +#define bit_F16C	(1 << 29)
> +#endif
> +
>  #ifndef bit_AVX2
>  #define bit_AVX2	(1<<5)
>  #endif
> @@ -138,6 +142,9 @@ unsigned igt_x86_features(void)
>  
>  		if (edx & bit_SSE2)
>  			features |= SSE2;
> +
> +		if (edx & bit_F16C)

Should be ecx

My snb didn't like this one.

With those fixed this is
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> +			features |= F16C;
>  	}
>  
>  	if (max >= 7) {
> @@ -174,6 +181,8 @@ char *igt_x86_features_to_string(unsigned features, char *line)
>  		line += sprintf(line, ", avx");
>  	if (features & AVX2)
>  		line += sprintf(line, ", avx2");
> +	if (features & F16C)
> +		line += sprintf(line, ", f16c");
>  
>  	(void)line;
>  
> diff --git a/lib/igt_x86.h b/lib/igt_x86.h
> index d4f8c34..c7b84de 100644
> --- a/lib/igt_x86.h
> +++ b/lib/igt_x86.h
> @@ -39,6 +39,7 @@
>  #define SSE4_2	0x40
>  #define AVX	0x80
>  #define AVX2	0x100
> +#define F16C	0x200
>  
>  #if defined(__x86_64__) || defined(__i386__)
>  unsigned igt_x86_features(void);
> diff --git a/lib/meson.build b/lib/meson.build
> index 0eb5585..edf0a66 100644
> --- a/lib/meson.build
> +++ b/lib/meson.build
> @@ -11,6 +11,7 @@ lib_sources = [
>  	'igt_aux.c',
>  	'igt_gt.c',
>  	'igt_gvt.c',
> +	'igt_halffloat.c',
>  	'igt_matrix.c',
>  	'igt_primes.c',
>  	'igt_rand.c',
> -- 
> 2.7.4

-- 
Ville Syrjälä
Intel
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Re: [igt-dev] [RFC v2 4/5] lib/igt_fb: Add support for fp16 formats through conversion

[Ville Syrjälä]

On Tue, Mar 05, 2019 at 06:18:36PM -0800, Kevin Strasser wrote:
> Follow design of P01x conversion to support tests needing pixel data in fp16
> (half float 64 bpp).
> 
> rfc2:
> - Convert whole rows of pixels if possible (Maarten)
> - Treat rgbx like rgba, let hardware ignore alpha (Maarten)
> 
> Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>

lgtm

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  lib/igt_fb.c | 148 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-
>  lib/igt_fb.h |   1 +
>  2 files changed, 148 insertions(+), 1 deletion(-)
> 
> diff --git a/lib/igt_fb.c b/lib/igt_fb.c
> index 9dca2a4..451b2c2 100644
> --- a/lib/igt_fb.c
> +++ b/lib/igt_fb.c
> @@ -35,6 +35,7 @@
>  #include "igt_aux.h"
>  #include "igt_color_encoding.h"
>  #include "igt_fb.h"
> +#include "igt_halffloat.h"
>  #include "igt_kms.h"
>  #include "igt_matrix.h"
>  #include "igt_vc4.h"
> @@ -161,6 +162,22 @@ static const struct format_desc_struct {
>  	  .num_planes = 1, .plane_bpp = { 32, },
>  	  .hsub = 1, .vsub = 1,
>  	},
> +	{ .name = "XRGB16161616F", .depth = -1, .drm_id = DRM_FORMAT_XRGB16161616F,
> +	  .cairo_id = CAIRO_FORMAT_RGBA128F,
> +	  .num_planes = 1, .plane_bpp = { 64, },
> +	},
> +	{ .name = "ARGB16161616F", .depth = -1, .drm_id = DRM_FORMAT_ARGB16161616F,
> +	  .cairo_id = CAIRO_FORMAT_RGBA128F,
> +	  .num_planes = 1, .plane_bpp = { 64, },
> +	},
> +	{ .name = "XBGR16161616F", .depth = -1, .drm_id = DRM_FORMAT_XBGR16161616F,
> +	  .cairo_id = CAIRO_FORMAT_RGBA128F,
> +	  .num_planes = 1, .plane_bpp = { 64, },
> +	},
> +	{ .name = "ABGR16161616F", .depth = -1, .drm_id = DRM_FORMAT_ABGR16161616F,
> +	  .cairo_id = CAIRO_FORMAT_RGBA128F,
> +	  .num_planes = 1, .plane_bpp = { 64, },
> +	},
>  	{ .name = "NV12", .depth = -1, .drm_id = DRM_FORMAT_NV12,
>  	  .cairo_id = CAIRO_FORMAT_RGB24,
>  	  .num_planes = 2, .plane_bpp = { 8, 16, },
> @@ -661,7 +678,8 @@ static int create_bo_for_fb(struct igt_fb *fb)
>  	 * them, so we need to make sure to use a device BO then.
>  	 */
>  	if (fb->tiling || fb->size || fb->strides[0] ||
> -	    (is_i915_device(fd) && igt_format_is_yuv(fb->drm_format)))
> +	    (is_i915_device(fd) && igt_format_is_yuv(fb->drm_format)) ||
> +	    (is_i915_device(fd) && igt_format_is_fp16(fb->drm_format)))
>  		device_bo = true;
>  
>  	/* Sets offets and stride if necessary. */
> @@ -2202,6 +2220,102 @@ static void convert_float_to_yuv16(struct fb_convert *cvt)
>  	}
>  }
>  
> +/* { R, G, B, X } */
> +static const unsigned char swizzle_rgbx[] = { 0, 1, 2, 3 };
> +static const unsigned char swizzle_bgrx[] = { 2, 1, 0, 3 };
> +
> +static const unsigned char *rgbx_swizzle(uint32_t format)
> +{
> +	switch (format) {
> +	default:
> +	case DRM_FORMAT_XRGB16161616F:
> +	case DRM_FORMAT_ARGB16161616F:
> +		return swizzle_bgrx;
> +	case DRM_FORMAT_XBGR16161616F:
> +	case DRM_FORMAT_ABGR16161616F:
> +		return swizzle_rgbx;
> +	}
> +}
> +
> +static void convert_fp16_to_float(struct fb_convert *cvt)
> +{
> +	int i, j;
> +	uint16_t *fp16;
> +	float *ptr = cvt->dst.ptr;
> +	unsigned int float_stride = cvt->dst.fb->strides[0] / sizeof(*ptr);
> +	unsigned int fp16_stride = cvt->src.fb->strides[0] / sizeof(*fp16);
> +	const unsigned char *swz = rgbx_swizzle(cvt->src.fb->drm_format);
> +	bool needs_reswizzle = swz != swizzle_rgbx;
> +
> +	uint16_t *buf = convert_src_get(cvt);
> +	fp16 = buf + cvt->src.fb->offsets[0] / sizeof(*buf);
> +
> +	for (i = 0; i < cvt->dst.fb->height; i++) {
> +		if (needs_reswizzle) {
> +			const uint16_t *fp16_tmp = fp16;
> +			float *rgb_tmp = ptr;
> +
> +			for (j = 0; j < cvt->dst.fb->width; j++) {
> +				struct igt_vec4 rgb;
> +
> +				igt_half_to_float(fp16_tmp, rgb.d, 4);
> +
> +				rgb_tmp[0] = rgb.d[swz[0]];
> +				rgb_tmp[1] = rgb.d[swz[1]];
> +				rgb_tmp[2] = rgb.d[swz[2]];
> +				rgb_tmp[3] = rgb.d[swz[3]];
> +
> +				rgb_tmp += 4;
> +				fp16_tmp += 4;
> +			}
> +		} else {
> +			igt_half_to_float(fp16, ptr, cvt->dst.fb->width * 4);
> +		}
> +
> +		ptr += float_stride;
> +		fp16 += fp16_stride;
> +	}
> +
> +	convert_src_put(cvt, buf);
> +}
> +
> +static void convert_float_to_fp16(struct fb_convert *cvt)
> +{
> +	int i, j;
> +	uint16_t *fp16 = cvt->dst.ptr + cvt->dst.fb->offsets[0];
> +	const float *ptr = cvt->src.ptr;
> +	unsigned float_stride = cvt->src.fb->strides[0] / sizeof(*ptr);
> +	unsigned fp16_stride = cvt->dst.fb->strides[0] / sizeof(*fp16);
> +	const unsigned char *swz = rgbx_swizzle(cvt->dst.fb->drm_format);
> +	bool needs_reswizzle = swz != swizzle_rgbx;
> +
> +	for (i = 0; i < cvt->dst.fb->height; i++) {
> +		if (needs_reswizzle) {
> +			const float *rgb_tmp = ptr;
> +			uint16_t *fp16_tmp = fp16;
> +
> +			for (j = 0; j < cvt->dst.fb->width; j++) {
> +				struct igt_vec4 rgb;
> +
> +				rgb.d[0] = rgb_tmp[swz[0]];
> +				rgb.d[1] = rgb_tmp[swz[1]];
> +				rgb.d[2] = rgb_tmp[swz[2]];
> +				rgb.d[3] = rgb_tmp[swz[3]];
> +
> +				igt_float_to_half(rgb.d, fp16_tmp, 4);
> +
> +				rgb_tmp += 4;
> +				fp16_tmp += 4;
> +			}
> +		} else {
> +			igt_float_to_half(ptr, fp16, cvt->dst.fb->width * 4);
> +		}
> +
> +		ptr += float_stride;
> +		fp16 += fp16_stride;
> +	}
> +}
> +
>  static void convert_pixman(struct fb_convert *cvt)
>  {
>  	pixman_format_code_t src_pixman = drm_format_to_pixman(cvt->src.fb->drm_format);
> @@ -2290,6 +2404,12 @@ static void fb_convert(struct fb_convert *cvt)
>  		case DRM_FORMAT_P016:
>  			convert_yuv16_to_float(cvt);
>  			return;
> +		case DRM_FORMAT_XRGB16161616F:
> +		case DRM_FORMAT_XBGR16161616F:
> +		case DRM_FORMAT_ARGB16161616F:
> +		case DRM_FORMAT_ABGR16161616F:
> +			convert_fp16_to_float(cvt);
> +			return;
>  		}
>  	} else if (cvt->src.fb->drm_format == IGT_FORMAT_FLOAT) {
>  		switch (cvt->dst.fb->drm_format) {
> @@ -2298,6 +2418,12 @@ static void fb_convert(struct fb_convert *cvt)
>  		case DRM_FORMAT_P016:
>  			convert_float_to_yuv16(cvt);
>  			return;
> +		case DRM_FORMAT_XRGB16161616F:
> +		case DRM_FORMAT_XBGR16161616F:
> +		case DRM_FORMAT_ARGB16161616F:
> +		case DRM_FORMAT_ABGR16161616F:
> +			convert_float_to_fp16(cvt);
> +			return;
>  		}
>  	}
>  
> @@ -2453,6 +2579,7 @@ cairo_surface_t *igt_get_cairo_surface(int fd, struct igt_fb *fb)
>  
>  	if (fb->cairo_surface == NULL) {
>  		if (igt_format_is_yuv(fb->drm_format) ||
> +		    igt_format_is_fp16(fb->drm_format) ||
>  		    ((f->cairo_id == CAIRO_FORMAT_INVALID) &&
>  		     (f->pixman_id != PIXMAN_invalid)))
>  			create_cairo_surface__convert(fd, fb);
> @@ -2762,6 +2889,25 @@ bool igt_format_is_yuv(uint32_t drm_format)
>  }
>  
>  /**
> + * igt_format_is_fp16
> + * @drm_format: drm fourcc
> + *
> + * Check if the format is fp16.
> + */
> +bool igt_format_is_fp16(uint32_t drm_format)
> +{
> +	switch (drm_format) {
> +	case DRM_FORMAT_XRGB16161616F:
> +	case DRM_FORMAT_ARGB16161616F:
> +	case DRM_FORMAT_XBGR16161616F:
> +	case DRM_FORMAT_ABGR16161616F:
> +		return true;
> +	default:
> +		return false;
> +	}
> +}
> +
> +/**
>   * igt_format_plane_bpp:
>   * @drm_format: drm fourcc
>   * @plane: format plane index
> diff --git a/lib/igt_fb.h b/lib/igt_fb.h
> index e1d885e..07b6814 100644
> --- a/lib/igt_fb.h
> +++ b/lib/igt_fb.h
> @@ -182,6 +182,7 @@ uint32_t igt_drm_format_to_bpp(uint32_t drm_format);
>  const char *igt_format_str(uint32_t drm_format);
>  bool igt_fb_supported_format(uint32_t drm_format);
>  bool igt_format_is_yuv(uint32_t drm_format);
> +bool igt_format_is_fp16(uint32_t drm_format);
>  int igt_format_plane_bpp(uint32_t drm_format, int plane);
>  void igt_format_array_fill(uint32_t **formats_array, unsigned int *count,
>  			   bool allow_yuv);
> -- 
> 2.7.4

-- 
Ville Syrjälä
Intel
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Re: [igt-dev] [RFC v2 1/5] lib: Add halffloat implementation

[Strasser, Kevin]

Ville Syrjälä wrote:
> On Tue, Mar 05, 2019 at 06:18:33PM -0800, Kevin Strasser wrote:
> > Probe for and make an API available for tests to use f16c intrinsics to
> > generate needed fp16 pixel data.
> >
> > Also import a pure c fp32 <-> fp16 conversion implementation from Mesa
> > 18.3.4, which will act as a fallback when f16c is unavailable.
>
> Ugh. I just realized we didn't get this stuff merged. Sorry. Let's try
> to remedy that.

I have a rebased version of this series, I will send it out shortly.

Thanks,
Kevin
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Re: [igt-dev] [RFC v2 3/5] tests/kms_available_modes_crc: Add cases for 64bit formats

[Ville Syrjälä]

On Tue, Mar 05, 2019 at 06:18:35PM -0800, Kevin Strasser wrote:
> This test iterates through all supported formats, add cases for new 64 bit
> formats so it continues passing.
> 
> rfc2:
> -Use uint64_t (Maarten)
> 
> Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>

Looks sensible enough to me.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  tests/kms_available_modes_crc.c | 19 ++++++++++++++++++-
>  1 file changed, 18 insertions(+), 1 deletion(-)
> 
> diff --git a/tests/kms_available_modes_crc.c b/tests/kms_available_modes_crc.c
> index 7ff385f..33c8ab1 100644
> --- a/tests/kms_available_modes_crc.c
> +++ b/tests/kms_available_modes_crc.c
> @@ -124,10 +124,11 @@ static const struct {
>  	enum		{ BYTES_PP_1=1,
>  				BYTES_PP_2=2,
>  				BYTES_PP_4=4,
> +				BYTES_PP_8=8,
>  				NV12,
>  				P010,
>  				SKIP4 } bpp;
> -	uint32_t	value;
> +	uint64_t	value;
>  } fillers[] = {
>  	{ DRM_FORMAT_C8, 0, BYTES_PP_1, 0xff},
>  	{ DRM_FORMAT_RGB565, 0, BYTES_PP_2, 0xffff},
> @@ -146,6 +147,11 @@ static const struct {
>  	{ DRM_FORMAT_XRGB2101010, 0, BYTES_PP_4, 0xffffffff},
>  	{ DRM_FORMAT_XBGR2101010, 0, BYTES_PP_4, 0xffffffff},
>  
> +	{ DRM_FORMAT_XRGB16161616F, 0, BYTES_PP_8, 0x3c003c003c003c00},
> +	{ DRM_FORMAT_XBGR16161616F, 0, BYTES_PP_8, 0x3c003c003c003c00},
> +	{ DRM_FORMAT_ARGB16161616F, 0, BYTES_PP_8, 0x3c003c003c003c00},
> +	{ DRM_FORMAT_ABGR16161616F, 0, BYTES_PP_8, 0x3c003c003c003c00},
> +
>  	{ DRM_FORMAT_YUYV, 0, BYTES_PP_4, 0x80eb80eb},
>  	{ DRM_FORMAT_YVYU, 0, BYTES_PP_4, 0x80eb80eb},
>  	{ DRM_FORMAT_VYUY, 0, BYTES_PP_4, 0xeb80eb80},
> @@ -177,6 +183,7 @@ static bool fill_in_fb(data_t *data, igt_output_t *output, igt_plane_t *plane,
>  	signed i, c, writesize;
>  	unsigned short* ptemp_16_buf;
>  	unsigned int* ptemp_32_buf;
> +	unsigned long int* ptemp_64_buf;
>  
>  	for( i = 0; fillers[i].fourcc != 0; i++ ) {
>  		if( fillers[i].fourcc == format )
> @@ -184,6 +191,12 @@ static bool fill_in_fb(data_t *data, igt_output_t *output, igt_plane_t *plane,
>  	}
>  
>  	switch (fillers[i].bpp) {
> +	case BYTES_PP_8:
> +		ptemp_64_buf = (uint64_t*)data->buf;
> +		for (c = 0; c < data->size/8; c++)
> +			ptemp_64_buf[c] = fillers[i].value;
> +		writesize = data->size;
> +		break;
>  	case BYTES_PP_4:
>  		ptemp_32_buf = (unsigned int*)data->buf;
>  		for (c = 0; c < data->size/4; c++)
> @@ -291,6 +304,10 @@ static bool setup_fb(data_t *data, igt_output_t *output, igt_plane_t *plane,
>  	case BYTES_PP_4:
>  		bpp = 32;
>  		break;
> +
> +	case BYTES_PP_8:
> +		bpp = 64;
> +		break;
>  	}
>  
>  	igt_get_fb_tile_size(data->gfx_fd, tiling, bpp,
> -- 
> 2.7.4

-- 
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Re: [igt-dev] [RFC v2 5/5] tests/kms_plane_scaling: Skip testing unsupported fp16 features

[Ville Syrjälä]

On Tue, Mar 05, 2019 at 06:18:37PM -0800, Kevin Strasser wrote:
> Disallow Yf tiling and Y-tiled 90/270 rotation for fp16 on Intel hardware.
> 
> rfc2:
> - Move check into can_rotate (Maarten)
> - Use igt_plane_has_format_mod (Maarten)
> 
> Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
> ---
>  tests/kms_plane_scaling.c | 15 +++++++++++++--
>  1 file changed, 13 insertions(+), 2 deletions(-)
> 
> diff --git a/tests/kms_plane_scaling.c b/tests/kms_plane_scaling.c
> index 1015c80..29b28cb 100644
> --- a/tests/kms_plane_scaling.c
> +++ b/tests/kms_plane_scaling.c
> @@ -167,12 +167,19 @@ static const igt_rotation_t rotations[] = {
>  	IGT_ROTATION_270,
>  };
>  
> -static bool can_rotate(data_t *d, unsigned format)
> +static bool can_rotate(data_t *d, unsigned format, uint64_t tiling,
> +		       igt_rotation_t rot)
>  {
>  	if (format == DRM_FORMAT_C8 ||
>  	    (intel_gen(d->devid) < 11 && format == DRM_FORMAT_RGB565))
>  		return false;
>  
> +	// Y-tiled 90/270 rotation isn't supported for fp16 on Intel
> +	if (is_i915_device(d->drm_fd) && igt_format_is_fp16(format) &&
> +	    tiling == LOCAL_I915_FORMAT_MOD_Y_TILED &&

We can drop the Y tile check here. No way to do 90/270 rotation
w/o Y tiling anyway.

With that
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> +	    (rot == IGT_ROTATION_90 || rot == IGT_ROTATION_270))
> +		return false;
> +
>  	return true;
>  }
>  
> @@ -193,8 +200,9 @@ static void test_scaler_with_rotation_pipe(data_t *d, enum pipe pipe,
>  			igt_rotation_t rot = rotations[i];
>  			for (int j = 0; j < plane->drm_plane->count_formats; j++) {
>  				unsigned format = plane->drm_plane->formats[j];
> +
>  				if (igt_fb_supported_format(format) &&
> -				    can_rotate(d, format))
> +				    can_rotate(d, format, tiling, rot))
>  					check_scaling_pipe_plane_rot(d, plane, format,
>  								     tiling, pipe,
>  								     output, rot);
> @@ -227,6 +235,9 @@ static void test_scaler_with_pixel_format_pipe(data_t *d, enum pipe pipe, igt_ou
>  			for (int j = 0; j < plane->drm_plane->count_formats; j++) {
>  				uint32_t format = plane->drm_plane->formats[j];
>  
> +				if (!igt_plane_has_format_mod(plane, format, tiling))
> +					continue;
> +
>  				if (igt_fb_supported_format(format))
>  					check_scaling_pipe_plane_rot(d, plane,
>  								     format, tiling,
> -- 
> 2.7.4

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Re: [igt-dev] [RFC v2 3/5] tests/kms_available_modes_crc: Add cases for 64bit formats

[Strasser, Kevin]

Ville Syrjälä wrote:
> On Tue, Mar 05, 2019 at 06:18:35PM -0800, Kevin Strasser wrote:
> > This test iterates through all supported formats, add cases for new 64 bit
> > formats so it continues passing.
> >
> > rfc2:
> > -Use uint64_t (Maarten)
> >
> > Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
>
> Looks sensible enough to me.
>
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

I'm actually intending to drop this patch as the test was changed to only cover
C8 and XBGR2101010.

Thanks,
Kevin
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Re: [igt-dev] [RFC v2 3/5] tests/kms_available_modes_crc: Add cases for 64bit formats

[Ville Syrjälä]

On Fri, Apr 05, 2019 at 07:43:31PM +0000, Strasser, Kevin wrote:
> Ville Syrjälä wrote:
> > On Tue, Mar 05, 2019 at 06:18:35PM -0800, Kevin Strasser wrote:
> > > This test iterates through all supported formats, add cases for new 64 bit
> > > formats so it continues passing.
> > >
> > > rfc2:
> > > -Use uint64_t (Maarten)
> > >
> > > Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
> >
> > Looks sensible enough to me.
> >
> > Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> I'm actually intending to drop this patch as the test was changed to only cover
> C8 and XBGR2101010.

Fine by me.

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