[U-Boot] [PATCH 0/5] arm: k3: Fixup msmc dt node

[U-Boot] [PATCH 0/5] arm: k3: Fixup msmc dt node

[Lokesh Vutla]

This series adds support for getting available msmc sram from
dmsc using TISCI protocol. Using this information updates the
kernel dt before jumping to kernel.

Lokesh Vutla (5):
  firmware: Add support for querying msmc memory
  arm: k3: Add a wrapper to get tisci handle
  arm: k3: Add support for updating msmc dt node
  board: ti: am65x: Enable fixing up msmc sram node
  configs: am65x_evm_a53: Enable CONFIG_OF_BOARD_SETUP

 arch/arm/mach-k3/common.c                 | 88 +++++++++++++++++++++++
 arch/arm/mach-k3/include/mach/sys_proto.h |  3 +-
 board/ti/am65x/evm.c                      | 14 ++++
 configs/am65x_evm_a53_defconfig           |  1 +
 drivers/firmware/ti_sci.c                 | 53 ++++++++++++++
 drivers/firmware/ti_sci.h                 | 19 +++++
 include/linux/soc/ti/ti_sci_protocol.h    |  4 ++
 7 files changed, 181 insertions(+), 1 deletion(-)

-- 
2.21.0

[U-Boot] [PATCH 1/5] firmware: Add support for querying msmc memory

[Lokesh Vutla]

DMSC can use certain amount of msmc memory available in the
system. Also certain part of msmc memory can be marked as L3
cache using board config. But users might not know what size
is being used and the remaining available msmc memory. In order
to fix this TISCI protocol provides a messages that can query
the available msmc memory in the system. Add support for this
message.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
 drivers/firmware/ti_sci.c              | 53 ++++++++++++++++++++++++++
 drivers/firmware/ti_sci.h              | 19 +++++++++
 include/linux/soc/ti/ti_sci_protocol.h |  4 ++
 3 files changed, 76 insertions(+)

diff --git a/drivers/firmware/ti_sci.c b/drivers/firmware/ti_sci.c
index 9148126041..599768b2f3 100644
--- a/drivers/firmware/ti_sci.c
+++ b/drivers/firmware/ti_sci.c
@@ -1441,6 +1441,58 @@ static int ti_sci_cmd_core_reboot(const struct ti_sci_handle *handle)
 	return ret;
 }
 
+/**
+ * ti_sci_cmd_query_msmc() - Command to query currently available msmc memory
+ * @handle:		pointer to TI SCI handle
+ * @msms_start:		MSMC start as returned by tisci
+ * @msmc_end:		MSMC end as returned by tisci
+ *
+ * Return: 0 if all went well, else returns appropriate error value.
+ */
+static int ti_sci_cmd_query_msmc(const struct ti_sci_handle *handle,
+				 u64 *msmc_start, u64 *msmc_end)
+{
+	struct ti_sci_msg_resp_query_msmc *resp;
+	struct ti_sci_msg_hdr req;
+	struct ti_sci_info *info;
+	struct ti_sci_xfer *xfer;
+	int ret = 0;
+
+	if (IS_ERR(handle))
+		return PTR_ERR(handle);
+	if (!handle)
+		return -EINVAL;
+
+	info = handle_to_ti_sci_info(handle);
+
+	xfer = ti_sci_setup_one_xfer(info, TISCI_MSG_QUERY_MSMC,
+				     TI_SCI_FLAG_REQ_ACK_ON_PROCESSED,
+				     (u32 *)&req, sizeof(req), sizeof(*resp));
+	if (IS_ERR(xfer)) {
+		ret = PTR_ERR(xfer);
+		dev_err(info->dev, "Message alloc failed(%d)\n", ret);
+		return ret;
+	}
+
+	ret = ti_sci_do_xfer(info, xfer);
+	if (ret) {
+		dev_err(dev, "Mbox send fail %d\n", ret);
+		return ret;
+	}
+
+	resp = (struct ti_sci_msg_resp_query_msmc *)xfer->tx_message.buf;
+
+	if (!ti_sci_is_response_ack(resp))
+		return -ENODEV;
+
+	*msmc_start = ((u64)resp->msmc_start_high << TISCI_ADDR_HIGH_SHIFT) |
+			resp->msmc_start_low;
+	*msmc_end = ((u64)resp->msmc_end_high << TISCI_ADDR_HIGH_SHIFT) |
+			resp->msmc_end_low;
+
+	return ret;
+}
+
 /**
  * ti_sci_cmd_proc_request() - Command to request a physical processor control
  * @handle:	Pointer to TI SCI handle
@@ -1849,6 +1901,7 @@ static void ti_sci_setup_ops(struct ti_sci_info *info)
 	cops->get_freq = ti_sci_cmd_clk_get_freq;
 
 	core_ops->reboot_device = ti_sci_cmd_core_reboot;
+	core_ops->query_msmc = ti_sci_cmd_query_msmc;
 
 	pops->proc_request = ti_sci_cmd_proc_request;
 	pops->proc_release = ti_sci_cmd_proc_release;
diff --git a/drivers/firmware/ti_sci.h b/drivers/firmware/ti_sci.h
index 81591fb0c7..8b83d6537b 100644
--- a/drivers/firmware/ti_sci.h
+++ b/drivers/firmware/ti_sci.h
@@ -25,6 +25,7 @@
 #define TI_SCI_MSG_BOARD_CONFIG_RM	0x000c
 #define TI_SCI_MSG_BOARD_CONFIG_SECURITY  0x000d
 #define TI_SCI_MSG_BOARD_CONFIG_PM	0x000e
+#define TISCI_MSG_QUERY_MSMC		0x0020
 
 /* Device requests */
 #define TI_SCI_MSG_SET_DEVICE_STATE	0x0200
@@ -133,6 +134,24 @@ struct ti_sci_msg_board_config {
 	u16 boardcfg_size;
 } __packed;
 
+/**
+ * struct ti_sci_msg_resp_query_msmc - Query msmc message response structure
+ * @hdr:		Generic Header
+ * @msmc_start_low:	Lower 32 bit of msmc start
+ * @msmc_start_high:	Upper 32 bit of msmc start
+ * @msmc_end_low:	Lower 32 bit of msmc end
+ * @msmc_end_high:	Upper 32 bit of msmc end
+ *
+ * Response to a generic message with message type TISCI_MSG_QUERY_MSMC
+ */
+struct ti_sci_msg_resp_query_msmc {
+	struct ti_sci_msg_hdr hdr;
+	u32 msmc_start_low;
+	u32 msmc_start_high;
+	u32 msmc_end_low;
+	u32 msmc_end_high;
+} __packed;
+
 /**
  * struct ti_sci_msg_req_set_device_state - Set the desired state of the device
  * @hdr:		Generic header
diff --git a/include/linux/soc/ti/ti_sci_protocol.h b/include/linux/soc/ti/ti_sci_protocol.h
index 90d5053636..4f6aaf6e7e 100644
--- a/include/linux/soc/ti/ti_sci_protocol.h
+++ b/include/linux/soc/ti/ti_sci_protocol.h
@@ -217,9 +217,13 @@ struct ti_sci_clk_ops {
  * @reboot_device: Reboot the SoC
  *		Returns 0 for successful request(ideally should never return),
  *		else returns corresponding error value.
+ * @query_msmc: Query the size of available msmc
+ *		Return 0 for successful query else appropriate error value.
  */
 struct ti_sci_core_ops {
 	int (*reboot_device)(const struct ti_sci_handle *handle);
+	int (*query_msmc)(const struct ti_sci_handle *handle,
+			  u64 *msmc_start, u64 *msmc_end);
 };
 
 /**
-- 
2.21.0

[U-Boot] [PATCH 2/5] arm: k3: Add a wrapper to get tisci handle

[Lokesh Vutla]

Create a wrapper to get the ti sci handle.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
 arch/arm/mach-k3/common.c                 | 13 +++++++++++++
 arch/arm/mach-k3/include/mach/sys_proto.h |  1 +
 2 files changed, 14 insertions(+)

diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c
index 5909bbfa8f..23cd37c3c7 100644
--- a/arch/arm/mach-k3/common.c
+++ b/arch/arm/mach-k3/common.c
@@ -11,6 +11,19 @@
 #include "common.h"
 #include <dm.h>
 #include <remoteproc.h>
+#include <linux/soc/ti/ti_sci_protocol.h>
+
+struct ti_sci_handle *get_ti_sci_handle(void)
+{
+	struct udevice *dev;
+	int ret;
+
+	ret = uclass_get_device_by_name(UCLASS_FIRMWARE, "dmsc", &dev);
+	if (ret)
+		panic("Failed to get SYSFW (%d)\n", ret);
+
+	return (struct ti_sci_handle *)ti_sci_get_handle_from_sysfw(dev);
+}
 
 #ifdef CONFIG_SYS_K3_SPL_ATF
 void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
diff --git a/arch/arm/mach-k3/include/mach/sys_proto.h b/arch/arm/mach-k3/include/mach/sys_proto.h
index 0b2007981a..6c773ac7b6 100644
--- a/arch/arm/mach-k3/include/mach/sys_proto.h
+++ b/arch/arm/mach-k3/include/mach/sys_proto.h
@@ -10,5 +10,6 @@
 void sdelay(unsigned long loops);
 u32 wait_on_value(u32 read_bit_mask, u32 match_value, void *read_addr,
 		  u32 bound);
+struct ti_sci_handle *get_ti_sci_handle(void);
 
 #endif
-- 
2.21.0

[U-Boot] [PATCH 3/5] arm: k3: Add support for updating msmc dt node

[Lokesh Vutla]

Certain parts of msmc sram can be used by DMSC or can be
marked as L3 cache. Since the available size can vary, changing
DT every time the size varies might be painful. So, query this
information using TISCI cmd and fixup the DT for kernel.
Fixing up DT does the following:
- Create a sram node if not available
- update the reg property with available size
- update ranges property
- loop through available sub nodes and delete it if:
	- mentioned size is out if available range
	- subnode represents l3 cache or dmsc usage.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
 arch/arm/mach-k3/common.c                 | 75 +++++++++++++++++++++++
 arch/arm/mach-k3/include/mach/sys_proto.h |  2 +-
 2 files changed, 76 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c
index 23cd37c3c7..03f01d07ea 100644
--- a/arch/arm/mach-k3/common.c
+++ b/arch/arm/mach-k3/common.c
@@ -12,6 +12,7 @@
 #include <dm.h>
 #include <remoteproc.h>
 #include <linux/soc/ti/ti_sci_protocol.h>
+#include <fdt_support.h>
 
 struct ti_sci_handle *get_ti_sci_handle(void)
 {
@@ -55,3 +56,77 @@ void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
 		asm volatile("wfe");
 }
 #endif
+
+#if defined(CONFIG_OF_LIBFDT)
+int fdt_fixup_msmc_ram(void *blob, char *parent_path, char *node_name)
+{
+	u64 msmc_start = 0, msmc_end = 0, msmc_size, reg[2];
+	struct ti_sci_handle *ti_sci = get_ti_sci_handle();
+	int ret, node, subnode, len, prev_node;
+	u32 range[4], addr, size;
+	const fdt32_t *sub_reg;
+
+	ti_sci->ops.core_ops.query_msmc(ti_sci, &msmc_start, &msmc_end);
+	msmc_size = msmc_end - msmc_start + 1;
+	debug("%s: msmc_start = 0x%llx, msmc_size = 0x%llx\n", __func__,
+	      msmc_start, msmc_size);
+
+	/* find or create "msmc_sram node */
+	ret = fdt_path_offset(blob, parent_path);
+	if (ret < 0)
+		return ret;
+
+	node = fdt_find_or_add_subnode(blob, ret, node_name);
+	if (node < 0)
+		return node;
+
+	ret = fdt_setprop_string(blob, node, "compatible", "mmio-sram");
+	if (ret < 0)
+		return ret;
+
+	reg[0] = cpu_to_fdt64(msmc_start);
+	reg[1] = cpu_to_fdt64(msmc_size);
+	ret = fdt_setprop(blob, node, "reg", reg, sizeof(reg));
+	if (ret < 0)
+		return ret;
+
+	fdt_setprop_cell(blob, node, "#address-cells", 1);
+	fdt_setprop_cell(blob, node, "#size-cells", 1);
+
+	range[0] = 0;
+	range[1] = cpu_to_fdt32(msmc_start >> 32);
+	range[2] = cpu_to_fdt32(msmc_start & 0xffffffff);
+	range[3] = cpu_to_fdt32(msmc_size);
+	ret = fdt_setprop(blob, node, "ranges", range, sizeof(range));
+	if (ret < 0)
+		return ret;
+
+	subnode = fdt_first_subnode(blob, node);
+	prev_node = 0;
+
+	/* Look for invalid subnodes and delete them */
+	while (subnode >= 0) {
+		sub_reg = fdt_getprop(blob, subnode, "reg", &len);
+		addr = fdt_read_number(sub_reg, 1);
+		sub_reg++;
+		size = fdt_read_number(sub_reg, 1);
+		debug("%s: subnode = %d, addr = 0x%x. size = 0x%x\n", __func__,
+		      subnode, addr, size);
+		if (addr + size > msmc_size ||
+		    !strncmp(fdt_get_name(blob, subnode, &len), "sysfw", 5) ||
+		    !strncmp(fdt_get_name(blob, subnode, &len), "l3cache", 7)) {
+			fdt_del_node(blob, subnode);
+			debug("%s: deleting subnode %d\n", __func__, subnode);
+			if (!prev_node)
+				subnode = fdt_first_subnode(blob, node);
+			else
+				subnode = fdt_next_subnode(blob, prev_node);
+		} else {
+			prev_node = subnode;
+			subnode = fdt_next_subnode(blob, prev_node);
+		}
+	}
+
+	return 0;
+}
+#endif
diff --git a/arch/arm/mach-k3/include/mach/sys_proto.h b/arch/arm/mach-k3/include/mach/sys_proto.h
index 6c773ac7b6..018725b4d1 100644
--- a/arch/arm/mach-k3/include/mach/sys_proto.h
+++ b/arch/arm/mach-k3/include/mach/sys_proto.h
@@ -11,5 +11,5 @@ void sdelay(unsigned long loops);
 u32 wait_on_value(u32 read_bit_mask, u32 match_value, void *read_addr,
 		  u32 bound);
 struct ti_sci_handle *get_ti_sci_handle(void);
-
+int fdt_fixup_msmc_ram(void *blob, char *parent_path, char *node_name);
 #endif
-- 
2.21.0

[U-Boot] [PATCH 4/5] board: ti: am65x: Enable fixing up msmc sram node

[Lokesh Vutla]

Create a ft_board_setup() api that gets called as part of
DT fixup before jumping to kernel. In this ft_board_setup()
call fdt_fixup_msmc_ram that update msmc sram node.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
 board/ti/am65x/evm.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/board/ti/am65x/evm.c b/board/ti/am65x/evm.c
index 784b2b0191..52f5d6b11e 100644
--- a/board/ti/am65x/evm.c
+++ b/board/ti/am65x/evm.c
@@ -10,6 +10,7 @@
 #include <common.h>
 #include <asm/io.h>
 #include <spl.h>
+#include <asm/arch/sys_proto.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -66,3 +67,16 @@ int board_fit_config_name_match(const char *name)
 	return -1;
 }
 #endif
+
+#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
+int ft_board_setup(void *blob, bd_t *bd)
+{
+	int ret;
+
+	ret = fdt_fixup_msmc_ram(blob, "/interconnect at 100000", "sram at 70000000");
+	if (ret)
+		printf("%s: fixing up msmc ram failed %d\n", __func__, ret);
+
+	return ret;
+}
+#endif
-- 
2.21.0

[U-Boot] [PATCH 5/5] configs: am65x_evm_a53: Enable CONFIG_OF_BOARD_SETUP

[Lokesh Vutla]

Enable CONFIG_OF_BOARD_SETUP so that msmc sram dt nodes
are updated correctly.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
 configs/am65x_evm_a53_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/am65x_evm_a53_defconfig b/configs/am65x_evm_a53_defconfig
index 8f6fd25531..0b54418b63 100644
--- a/configs/am65x_evm_a53_defconfig
+++ b/configs/am65x_evm_a53_defconfig
@@ -15,6 +15,7 @@ CONFIG_DISTRO_DEFAULTS=y
 CONFIG_NR_DRAM_BANKS=2
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_SPL_LOAD_FIT=y
+CONFIG_OF_BOARD_SETUP=y
 CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run get_kern_${boot}; run get_fdt_${boot}; run run_kern"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-- 
2.21.0

[U-Boot] [U-Boot, 1/5] firmware: Add support for querying msmc memory

[Tom Rini]

On Fri, Mar 08, 2019 at 11:47:32AM +0530, Lokesh Vutla wrote:

> DMSC can use certain amount of msmc memory available in the
> system. Also certain part of msmc memory can be marked as L3
> cache using board config. But users might not know what size
> is being used and the remaining available msmc memory. In order
> to fix this TISCI protocol provides a messages that can query
> the available msmc memory in the system. Add support for this
> message.
> 
> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>

Applied to u-boot/master, thanks!

-- 
Tom
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[U-Boot] [U-Boot, 2/5] arm: k3: Add a wrapper to get tisci handle

[Tom Rini]

On Fri, Mar 08, 2019 at 11:47:33AM +0530, Lokesh Vutla wrote:

> Create a wrapper to get the ti sci handle.
> 
> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>

Applied to u-boot/master, thanks!

-- 
Tom
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[U-Boot] [U-Boot, 3/5] arm: k3: Add support for updating msmc dt node

[Tom Rini]

On Fri, Mar 08, 2019 at 11:47:34AM +0530, Lokesh Vutla wrote:

> Certain parts of msmc sram can be used by DMSC or can be
> marked as L3 cache. Since the available size can vary, changing
> DT every time the size varies might be painful. So, query this
> information using TISCI cmd and fixup the DT for kernel.
> Fixing up DT does the following:
> - Create a sram node if not available
> - update the reg property with available size
> - update ranges property
> - loop through available sub nodes and delete it if:
> 	- mentioned size is out if available range
> 	- subnode represents l3 cache or dmsc usage.
> 
> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>

Applied to u-boot/master, thanks!

-- 
Tom
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[U-Boot] [U-Boot, 4/5] board: ti: am65x: Enable fixing up msmc sram node

[Tom Rini]

On Fri, Mar 08, 2019 at 11:47:35AM +0530, Lokesh Vutla wrote:

> Create a ft_board_setup() api that gets called as part of
> DT fixup before jumping to kernel. In this ft_board_setup()
> call fdt_fixup_msmc_ram that update msmc sram node.
> 
> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>

Applied to u-boot/master, thanks!

-- 
Tom
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[U-Boot] [U-Boot, 5/5] configs: am65x_evm_a53: Enable CONFIG_OF_BOARD_SETUP

[Tom Rini]

On Fri, Mar 08, 2019 at 11:47:36AM +0530, Lokesh Vutla wrote:

> Enable CONFIG_OF_BOARD_SETUP so that msmc sram dt nodes
> are updated correctly.
> 
> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>

Applied to u-boot/master, thanks!

-- 
Tom
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