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From: Michael Tretter <m.tretter@pengutronix.de>
To: linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Cc: kernel@pengutronix.de,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Michal Simek <michal.simek@xilinx.com>,
	Jolly Shah <jolly.shah@xilinx.com>,
	Michael Tretter <m.tretter@pengutronix.de>
Subject: [PATCH 1/5] clk: zynqmp: fix check for fractional clock
Date: Tue, 12 Mar 2019 12:00:12 +0100	[thread overview]
Message-ID: <20190312110016.29174-2-m.tretter@pengutronix.de> (raw)
In-Reply-To: <20190312110016.29174-1-m.tretter@pengutronix.de>

CLK_FRAC is not set in the divider->flags, but in the hw->flags.

The firmware sets CLK_FRAC for fractional clocks in the clkflag field.
When registering the devider, these clkflags are copied to hw->flags.

Moreover, divider->flags field is a u8 type, but CLK_FRAG is BIT(13). So
this check would never work.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
---
 drivers/clk/zynqmp/divider.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/zynqmp/divider.c b/drivers/clk/zynqmp/divider.c
index a371c66e72ef..fc70950c1e24 100644
--- a/drivers/clk/zynqmp/divider.c
+++ b/drivers/clk/zynqmp/divider.c
@@ -117,7 +117,7 @@ static long zynqmp_clk_divider_round_rate(struct clk_hw *hw,
 	bestdiv = zynqmp_divider_get_val(*prate, rate);
 
 	if ((clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT) &&
-	    (divider->flags & CLK_FRAC))
+	    (clk_hw_get_flags(hw) & CLK_FRAC))
 		bestdiv = rate % *prate ? 1 : bestdiv;
 	*prate = rate * bestdiv;
 
-- 
2.20.1


WARNING: multiple messages have this Message-ID (diff)
From: Michael Tretter <m.tretter@pengutronix.de>
To: linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Cc: Stephen Boyd <sboyd@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Michal Simek <michal.simek@xilinx.com>,
	Michael Tretter <m.tretter@pengutronix.de>,
	kernel@pengutronix.de, Jolly Shah <jolly.shah@xilinx.com>
Subject: [PATCH 1/5] clk: zynqmp: fix check for fractional clock
Date: Tue, 12 Mar 2019 12:00:12 +0100	[thread overview]
Message-ID: <20190312110016.29174-2-m.tretter@pengutronix.de> (raw)
In-Reply-To: <20190312110016.29174-1-m.tretter@pengutronix.de>

CLK_FRAC is not set in the divider->flags, but in the hw->flags.

The firmware sets CLK_FRAC for fractional clocks in the clkflag field.
When registering the devider, these clkflags are copied to hw->flags.

Moreover, divider->flags field is a u8 type, but CLK_FRAG is BIT(13). So
this check would never work.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
---
 drivers/clk/zynqmp/divider.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/zynqmp/divider.c b/drivers/clk/zynqmp/divider.c
index a371c66e72ef..fc70950c1e24 100644
--- a/drivers/clk/zynqmp/divider.c
+++ b/drivers/clk/zynqmp/divider.c
@@ -117,7 +117,7 @@ static long zynqmp_clk_divider_round_rate(struct clk_hw *hw,
 	bestdiv = zynqmp_divider_get_val(*prate, rate);
 
 	if ((clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT) &&
-	    (divider->flags & CLK_FRAC))
+	    (clk_hw_get_flags(hw) & CLK_FRAC))
 		bestdiv = rate % *prate ? 1 : bestdiv;
 	*prate = rate * bestdiv;
 
-- 
2.20.1


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  reply	other threads:[~2019-03-12 11:00 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-12 11:00 [PATCH 0/5] clk: zynqmp: fix CLK_FRAC and various cleanups Michael Tretter
2019-03-12 11:00 ` Michael Tretter
2019-03-12 11:00 ` Michael Tretter [this message]
2019-03-12 11:00   ` [PATCH 1/5] clk: zynqmp: fix check for fractional clock Michael Tretter
2019-03-12 16:49   ` Stephen Boyd
2019-03-12 16:49     ` Stephen Boyd
2019-03-12 17:25     ` Michael Tretter
2019-03-12 17:25       ` Michael Tretter
2019-03-13 16:24       ` Stephen Boyd
2019-03-13 16:24         ` Stephen Boyd
2019-03-14  8:38         ` Michael Tretter
2019-03-14  8:38           ` Michael Tretter
2019-03-14 15:45           ` Stephen Boyd
2019-03-14 15:45             ` Stephen Boyd
2019-03-19  0:56           ` Jolly Shah
2019-03-19  0:56             ` Jolly Shah
2019-03-19 10:19             ` Michael Tretter
2019-03-19 10:19               ` Michael Tretter
2019-03-12 11:00 ` [PATCH 2/5] clk: zynqmp: fix doc of __zynqmp_clock_get_parents Michael Tretter
2019-03-12 11:00   ` Michael Tretter
2019-03-13 14:48   ` Michal Simek
2019-03-13 14:48     ` Michal Simek
2019-03-12 11:00 ` [PATCH 3/5] clk: zynqmp: do not export zynqmp_clk_register_mux Michael Tretter
2019-03-12 11:00   ` Michael Tretter
2019-03-12 16:52   ` Stephen Boyd
2019-03-12 16:52     ` Stephen Boyd
2019-03-12 17:26     ` Michael Tretter
2019-03-12 17:26       ` Michael Tretter
2019-03-12 11:00 ` [PATCH 4/5] clk: zynqmp: cleanup sizes of firmware responses Michael Tretter
2019-03-12 11:00   ` Michael Tretter
2019-03-13 16:37   ` Stephen Boyd
2019-03-13 16:37     ` Stephen Boyd
2019-03-12 11:00 ` [PATCH 5/5] clk: zynqmp: make field definitions of query responses consistent Michael Tretter
2019-03-12 11:00   ` Michael Tretter
2019-03-12 11:19   ` Michael Tretter
2019-03-12 11:19     ` Michael Tretter
2019-03-19  0:47   ` Jolly Shah
2019-03-19  0:47     ` Jolly Shah
2019-03-13 14:49 ` [PATCH 0/5] clk: zynqmp: fix CLK_FRAC and various cleanups Michal Simek
2019-03-13 14:49   ` Michal Simek

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