[PATCH 1/5] drm/i915: Add broadcast RGB property for DP MST

[PATCH 1/5] drm/i915: Add broadcast RGB property for DP MST

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Add the "Broadcast RGB" property to MST connectors, and implement
the same logic for it as we have in the SST code.

Cc: Ivan Vlk <ari@adyline.sk>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108821
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_dp_mst.c | 29 +++++++++++++++++++++++++++--
 1 file changed, 27 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c b/drivers/gpu/drm/i915/intel_dp_mst.c
index fb67cd931117..2b791d67a43f 100644
--- a/drivers/gpu/drm/i915/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/intel_dp_mst.c
@@ -38,6 +38,8 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
 	struct intel_digital_port *intel_dig_port = intel_mst->primary;
 	struct intel_dp *intel_dp = &intel_dig_port->dp;
 	struct drm_connector *connector = conn_state->connector;
+	struct intel_digital_connector_state *intel_conn_state =
+		to_intel_digital_connector_state(conn_state);
 	void *port = to_intel_connector(connector)->port;
 	struct drm_atomic_state *state = pipe_config->base.state;
 	struct drm_crtc *crtc = pipe_config->base.crtc;
@@ -77,6 +79,21 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
 	if (drm_dp_mst_port_has_audio(&intel_dp->mst_mgr, port))
 		pipe_config->has_audio = true;
 
+	if (intel_conn_state->broadcast_rgb == INTEL_BROADCAST_RGB_AUTO) {
+		/*
+		 * See:
+		 * CEA-861-E - 5.1 Default Encoding Parameters
+		 * VESA DisplayPort Ver.1.2a - 5.1.1.1 Video Colorimetry
+		 */
+		pipe_config->limited_color_range =
+			pipe_config->pipe_bpp != 18 &&
+			drm_default_rgb_quant_range(adjusted_mode) ==
+			HDMI_QUANTIZATION_RANGE_LIMITED;
+	} else {
+		pipe_config->limited_color_range =
+			intel_conn_state->broadcast_rgb == INTEL_BROADCAST_RGB_LIMITED;
+	}
+
 	mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock, bpp);
 	pipe_config->pbn = mst_pbn;
 
@@ -117,7 +134,11 @@ intel_dp_mst_atomic_check(struct drm_connector *connector,
 	struct drm_crtc *new_crtc = new_conn_state->crtc;
 	struct drm_crtc_state *crtc_state;
 	struct drm_dp_mst_topology_mgr *mgr;
-	int ret = 0;
+	int ret;
+
+	ret = intel_digital_connector_atomic_check(connector, new_conn_state);
+	if (ret)
+		return ret;
 
 	if (!old_conn_state->crtc)
 		return 0;
@@ -354,11 +375,13 @@ intel_dp_mst_detect(struct drm_connector *connector, bool force)
 static const struct drm_connector_funcs intel_dp_mst_connector_funcs = {
 	.detect = intel_dp_mst_detect,
 	.fill_modes = drm_helper_probe_single_connector_modes,
+	.atomic_get_property = intel_digital_connector_atomic_get_property,
+	.atomic_set_property = intel_digital_connector_atomic_set_property,
 	.late_register = intel_connector_register,
 	.early_unregister = intel_connector_unregister,
 	.destroy = intel_connector_destroy,
 	.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
-	.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
+	.atomic_duplicate_state = intel_digital_connector_duplicate_state,
 };
 
 static int intel_dp_mst_get_modes(struct drm_connector *connector)
@@ -487,6 +510,8 @@ static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topolo
 	if (ret)
 		goto err;
 
+	intel_attach_broadcast_rgb_property(connector);
+
 	return connector;
 
 err:
-- 
2.19.2

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[PATCH 2/5] drm/i915: Expose the force_audio property with DP MST

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

We already expose the force_audio property with SST. Do the same
with MST.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_dp_mst.c | 12 +++++++++---
 1 file changed, 9 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c b/drivers/gpu/drm/i915/intel_dp_mst.c
index 2b791d67a43f..f9ce9e87d35b 100644
--- a/drivers/gpu/drm/i915/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/intel_dp_mst.c
@@ -64,6 +64,14 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
 		DRM_DEBUG_KMS("Setting pipe bpp to %d\n",
 			      bpp);
 	}
+
+	if (intel_conn_state->force_audio == HDMI_AUDIO_AUTO)
+		pipe_config->has_audio =
+			drm_dp_mst_port_has_audio(&intel_dp->mst_mgr, port);
+	else
+		pipe_config->has_audio =
+			intel_conn_state->force_audio == HDMI_AUDIO_ON;
+
 	/*
 	 * for MST we always configure max link bw - the spec doesn't
 	 * seem to suggest we should do otherwise.
@@ -76,9 +84,6 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
 
 	pipe_config->port_clock = intel_dp_max_link_rate(intel_dp);
 
-	if (drm_dp_mst_port_has_audio(&intel_dp->mst_mgr, port))
-		pipe_config->has_audio = true;
-
 	if (intel_conn_state->broadcast_rgb == INTEL_BROADCAST_RGB_AUTO) {
 		/*
 		 * See:
@@ -510,6 +515,7 @@ static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topolo
 	if (ret)
 		goto err;
 
+	intel_attach_force_audio_property(connector);
 	intel_attach_broadcast_rgb_property(connector);
 
 	return connector;
-- 
2.19.2

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[PATCH 3/5] drm/i915: Remove the 8bpc shackles from DP MST

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Allow DP MST to output any color depth. This means deep color as
well as falling back to 6bpc if we would otherwise require too
much bandwidth.

TODO: We should probably extend bw_contstrained scheme to force
all streams on the link to 6bpc if we can't fit the new stream(s)
otherwise.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_dp.c     |   8 +-
 drivers/gpu/drm/i915/intel_dp_mst.c | 120 +++++++++++++++++-----------
 drivers/gpu/drm/i915/intel_drv.h    |   8 ++
 3 files changed, 83 insertions(+), 53 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index f40b3342d82a..e1ab50980b83 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1724,12 +1724,6 @@ void intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock,
 	}
 }
 
-struct link_config_limits {
-	int min_clock, max_clock;
-	int min_lane_count, max_lane_count;
-	int min_bpp, max_bpp;
-};
-
 static bool intel_dp_source_supports_fec(struct intel_dp *intel_dp,
 					 const struct intel_crtc_state *pipe_config)
 {
@@ -1792,7 +1786,7 @@ static int intel_dp_compute_bpp(struct intel_dp *intel_dp,
 }
 
 /* Adjust link config limits based on compliance test requests. */
-static void
+void
 intel_dp_adjust_compliance_config(struct intel_dp *intel_dp,
 				  struct intel_crtc_state *pipe_config,
 				  struct link_config_limits *limits)
diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c b/drivers/gpu/drm/i915/intel_dp_mst.c
index f9ce9e87d35b..df8b396cbcdc 100644
--- a/drivers/gpu/drm/i915/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/intel_dp_mst.c
@@ -29,41 +29,81 @@
 #include <drm/drm_edid.h>
 #include <drm/drm_probe_helper.h>
 
+static int intel_dp_mst_compute_link_config(struct intel_encoder *encoder,
+					    struct intel_crtc_state *crtc_state,
+					    struct drm_connector_state *conn_state,
+					    struct link_config_limits *limits)
+{
+	struct drm_atomic_state *state = crtc_state->base.state;
+	struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
+	struct intel_dp *intel_dp = &intel_mst->primary->dp;
+	struct intel_connector *connector =
+		to_intel_connector(conn_state->connector);
+	const struct drm_display_mode *adjusted_mode =
+		&crtc_state->base.adjusted_mode;
+	void *port = connector->port;
+	bool constant_n = drm_dp_has_quirk(&intel_dp->desc,
+					   DP_DPCD_QUIRK_CONSTANT_N);
+	int slots;
+
+	for (;;) {
+		crtc_state->lane_count = limits->max_lane_count;
+		crtc_state->port_clock = limits->max_clock;
+		crtc_state->pipe_bpp = limits->max_bpp;
+
+		crtc_state->pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock,
+						       crtc_state->pipe_bpp);
+
+		slots = drm_dp_atomic_find_vcpi_slots(state, &intel_dp->mst_mgr,
+						      port, crtc_state->pbn);
+		if (slots == -EDEADLK)
+			return slots;
+		if (slots >= 0)
+			break;
+
+		if (limits->max_bpp > limits->min_bpp) {
+			limits->max_bpp -= 2 * 3;
+			continue;
+		}
+
+		DRM_DEBUG_KMS("failed finding vcpi slots:%d\n", slots);
+
+		return slots;
+	}
+
+	intel_link_compute_m_n(crtc_state->pipe_bpp,
+			       crtc_state->lane_count,
+			       adjusted_mode->crtc_clock,
+			       crtc_state->port_clock,
+			       &crtc_state->dp_m_n,
+			       constant_n);
+	crtc_state->dp_m_n.tu = slots;
+
+	return 0;
+}
+
 static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
 				       struct intel_crtc_state *pipe_config,
 				       struct drm_connector_state *conn_state)
 {
 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 	struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
-	struct intel_digital_port *intel_dig_port = intel_mst->primary;
-	struct intel_dp *intel_dp = &intel_dig_port->dp;
-	struct drm_connector *connector = conn_state->connector;
+	struct intel_dp *intel_dp = &intel_mst->primary->dp;
+	struct intel_connector *connector =
+		to_intel_connector(conn_state->connector);
 	struct intel_digital_connector_state *intel_conn_state =
 		to_intel_digital_connector_state(conn_state);
-	void *port = to_intel_connector(connector)->port;
-	struct drm_atomic_state *state = pipe_config->base.state;
-	struct drm_crtc *crtc = pipe_config->base.crtc;
-	struct drm_crtc_state *old_crtc_state =
-		drm_atomic_get_old_crtc_state(state, crtc);
-	int bpp;
-	int lane_count, slots =
-		to_intel_crtc_state(old_crtc_state)->dp_m_n.tu;
-	const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
-	int mst_pbn;
-	bool constant_n = drm_dp_has_quirk(&intel_dp->desc,
-					   DP_DPCD_QUIRK_CONSTANT_N);
+	const struct drm_display_mode *adjusted_mode =
+		&pipe_config->base.adjusted_mode;
+	void *port = connector->port;
+	struct link_config_limits limits;
+	int ret;
 
 	if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
 		return -EINVAL;
 
 	pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
 	pipe_config->has_pch_encoder = false;
-	bpp = 24;
-	if (intel_dp->compliance.test_data.bpc) {
-		bpp = intel_dp->compliance.test_data.bpc * 3;
-		DRM_DEBUG_KMS("Setting pipe bpp to %d\n",
-			      bpp);
-	}
 
 	if (intel_conn_state->force_audio == HDMI_AUDIO_AUTO)
 		pipe_config->has_audio =
@@ -76,13 +116,21 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
 	 * for MST we always configure max link bw - the spec doesn't
 	 * seem to suggest we should do otherwise.
 	 */
-	lane_count = intel_dp_max_lane_count(intel_dp);
+	limits.min_clock =
+	limits.max_clock = intel_dp_max_link_rate(intel_dp);
+
+	limits.min_lane_count =
+	limits.max_lane_count = intel_dp_max_lane_count(intel_dp);
 
-	pipe_config->lane_count = lane_count;
+	limits.min_bpp = 6 * 3;
+	limits.max_bpp = pipe_config->pipe_bpp;
 
-	pipe_config->pipe_bpp = bpp;
+	intel_dp_adjust_compliance_config(intel_dp, pipe_config, &limits);
 
-	pipe_config->port_clock = intel_dp_max_link_rate(intel_dp);
+	ret = intel_dp_mst_compute_link_config(encoder, pipe_config,
+					       conn_state, &limits);
+	if (ret)
+		return ret;
 
 	if (intel_conn_state->broadcast_rgb == INTEL_BROADCAST_RGB_AUTO) {
 		/*
@@ -99,25 +147,6 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
 			intel_conn_state->broadcast_rgb == INTEL_BROADCAST_RGB_LIMITED;
 	}
 
-	mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock, bpp);
-	pipe_config->pbn = mst_pbn;
-
-	slots = drm_dp_atomic_find_vcpi_slots(state, &intel_dp->mst_mgr, port,
-					      mst_pbn);
-	if (slots < 0) {
-		DRM_DEBUG_KMS("failed finding vcpi slots:%d\n",
-			      slots);
-		return slots;
-	}
-
-	intel_link_compute_m_n(bpp, lane_count,
-			       adjusted_mode->crtc_clock,
-			       pipe_config->port_clock,
-			       &pipe_config->dp_m_n,
-			       constant_n);
-
-	pipe_config->dp_m_n.tu = slots;
-
 	if (IS_GEN9_LP(dev_priv))
 		pipe_config->lane_lat_optim_mask =
 			bxt_ddi_phy_calc_lane_lat_optim_mask(pipe_config->lane_count);
@@ -401,7 +430,6 @@ intel_dp_mst_mode_valid(struct drm_connector *connector,
 	struct intel_connector *intel_connector = to_intel_connector(connector);
 	struct intel_dp *intel_dp = intel_connector->mst_port;
 	int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
-	int bpp = 24; /* MST uses fixed bpp */
 	int max_rate, mode_rate, max_lanes, max_link_clock;
 
 	if (drm_connector_is_unregistered(connector))
@@ -414,7 +442,7 @@ intel_dp_mst_mode_valid(struct drm_connector *connector,
 	max_lanes = intel_dp_max_lane_count(intel_dp);
 
 	max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes);
-	mode_rate = intel_dp_link_required(mode->clock, bpp);
+	mode_rate = intel_dp_link_required(mode->clock, 18);
 
 	/* TODO - validate mode against available PBN for link */
 	if (mode->clock < 10000)
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 40ebc94b2187..fe05ed7ff749 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1904,6 +1904,14 @@ void intel_csr_ucode_suspend(struct drm_i915_private *);
 void intel_csr_ucode_resume(struct drm_i915_private *);
 
 /* intel_dp.c */
+struct link_config_limits {
+	int min_clock, max_clock;
+	int min_lane_count, max_lane_count;
+	int min_bpp, max_bpp;
+};
+void intel_dp_adjust_compliance_config(struct intel_dp *intel_dp,
+				       struct intel_crtc_state *pipe_config,
+				       struct link_config_limits *limits);
 bool intel_dp_port_enabled(struct drm_i915_private *dev_priv,
 			   i915_reg_t dp_reg, enum port port,
 			   enum pipe *pipe);
-- 
2.19.2

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[PATCH 4/5] drm/i915: Add max_bpc property for DP MST

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Allow the user to limit the output bpc with DP MST.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_dp_mst.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c b/drivers/gpu/drm/i915/intel_dp_mst.c
index df8b396cbcdc..23ca2ab88fd1 100644
--- a/drivers/gpu/drm/i915/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/intel_dp_mst.c
@@ -545,6 +545,7 @@ static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topolo
 
 	intel_attach_force_audio_property(connector);
 	intel_attach_broadcast_rgb_property(connector);
+	drm_connector_attach_max_bpc_property(connector, 6, 12);
 
 	return connector;
 
-- 
2.19.2

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[PATCH 5/5] drm/i915: Update TRANS_MSA_MISC for fastsets

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Update the DP MSA MISC bits for fastsets. This is needed
when we change between limited and full range RGB output.

On HSW+ changing limited_range does not currently result in a
full modeset since we have don't have the readout code for it
(for DP we could, and probably should, readout from TRANS_MSA_MISC
itself, for HDMI we would have to rely on the infoframe). So
the PIPE_CONF_CHECK() is only performed for pre-HSW platforms.
That means any change in the value will result in a fastset
instead. Fortunately there is no prohibition to changing
TRANS_MSA_MISC dynamically, so it looks like we can legally do
fastsets for this.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_ddi.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 7e3b4e8fdf3a..3d9ad4526cf9 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -3556,6 +3556,8 @@ static void intel_ddi_update_pipe_dp(struct intel_encoder *encoder,
 {
 	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
 
+	intel_ddi_set_pipe_settings(crtc_state);
+
 	intel_psr_update(intel_dp, crtc_state);
 	intel_edp_drrs_enable(intel_dp, crtc_state);
 
-- 
2.19.2

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✗ Fi.CI.CHECKPATCH: warning for series starting with [1/5] drm/i915: Add broadcast RGB property for DP MST

[Patchwork]

== Series Details ==

Series: series starting with [1/5] drm/i915: Add broadcast RGB property for DP MST
URL   : https://patchwork.freedesktop.org/series/57766/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
3a9a15b38816 drm/i915: Add broadcast RGB property for DP MST
8f0b667de193 drm/i915: Expose the force_audio property with DP MST
124b25ae1de0 drm/i915: Remove the 8bpc shackles from DP MST
-:234: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations
#234: FILE: drivers/gpu/drm/i915/intel_drv.h:1912:
+};
+void intel_dp_adjust_compliance_config(struct intel_dp *intel_dp,

total: 0 errors, 0 warnings, 1 checks, 201 lines checked
0147c94c2c5b drm/i915: Add max_bpc property for DP MST
ccb2723ec15a drm/i915: Update TRANS_MSA_MISC for fastsets

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✓ Fi.CI.BAT: success for series starting with [1/5] drm/i915: Add broadcast RGB property for DP MST

[Patchwork]

== Series Details ==

Series: series starting with [1/5] drm/i915: Add broadcast RGB property for DP MST
URL   : https://patchwork.freedesktop.org/series/57766/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_5728 -> Patchwork_12424
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/57766/revisions/1/mbox/

Known issues
------------

  Here are the changes found in Patchwork_12424 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@amdgpu/amd_basic@cs-compute:
    - fi-kbl-8809g:       NOTRUN -> FAIL [fdo#108094]

  * igt@gem_exec_basic@gtt-bsd2:
    - fi-byt-clapper:     NOTRUN -> SKIP [fdo#109271] +57

  * igt@gem_exec_basic@readonly-bsd2:
    - fi-pnv-d510:        NOTRUN -> SKIP [fdo#109271] +76

  * igt@kms_busy@basic-flip-b:
    - fi-gdg-551:         PASS -> FAIL [fdo#103182]

  * igt@kms_busy@basic-flip-c:
    - fi-byt-j1900:       NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
    - fi-byt-clapper:     NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
    - fi-pnv-d510:        NOTRUN -> SKIP [fdo#109271] / [fdo#109278]

  * igt@kms_chamelium@hdmi-crc-fast:
    - fi-byt-j1900:       NOTRUN -> SKIP [fdo#109271] +52

  * igt@kms_frontbuffer_tracking@basic:
    - fi-byt-clapper:     NOTRUN -> FAIL [fdo#103167]

  * igt@kms_pipe_crc_basic@hang-read-crc-pipe-b:
    - fi-byt-clapper:     NOTRUN -> FAIL [fdo#103191] / [fdo#107362]

  * igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a:
    - fi-byt-clapper:     NOTRUN -> FAIL [fdo#107362]

  
#### Possible fixes ####

  * igt@amdgpu/amd_basic@userptr:
    - fi-kbl-8809g:       DMESG-WARN [fdo#108965] -> PASS

  
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103182]: https://bugs.freedesktop.org/show_bug.cgi?id=103182
  [fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
  [fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362
  [fdo#108094]: https://bugs.freedesktop.org/show_bug.cgi?id=108094
  [fdo#108965]: https://bugs.freedesktop.org/show_bug.cgi?id=108965
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278


Participating hosts (42 -> 43)
------------------------------

  Additional (3): fi-byt-j1900 fi-byt-clapper fi-pnv-d510 
  Missing    (2): fi-ilk-m540 fi-bdw-samus 


Build changes
-------------

    * Linux: CI_DRM_5728 -> Patchwork_12424

  CI_DRM_5728: 78b288a16a32e8828f93c5e2e9eb3c1b73bfdce7 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4877: d15ad69be07a987d5c2ba408201b287adae8ca59 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_12424: ccb2723ec15a18ab1dcbfc69269004e4ce87dd79 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

ccb2723ec15a drm/i915: Update TRANS_MSA_MISC for fastsets
0147c94c2c5b drm/i915: Add max_bpc property for DP MST
124b25ae1de0 drm/i915: Remove the 8bpc shackles from DP MST
8f0b667de193 drm/i915: Expose the force_audio property with DP MST
3a9a15b38816 drm/i915: Add broadcast RGB property for DP MST

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12424/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✓ Fi.CI.IGT: success for series starting with [1/5] drm/i915: Add broadcast RGB property for DP MST

[Patchwork]

== Series Details ==

Series: series starting with [1/5] drm/i915: Add broadcast RGB property for DP MST
URL   : https://patchwork.freedesktop.org/series/57766/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_5728_full -> Patchwork_12424_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_12424_full:

### IGT changes ###

#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@kms_frontbuffer_tracking@fbc-2p-indfb-fliptrack:
    - {shard-iclb}:       NOTRUN -> SKIP +11

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-pwrite:
    - {shard-iclb}:       PASS -> FAIL +24

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-onoff:
    - {shard-iclb}:       NOTRUN -> FAIL +1

  * igt@perf_pmu@busy-accuracy-50-vecs0:
    - {shard-iclb}:       PASS -> TIMEOUT

  * igt@perf_pmu@busy-start-vecs0:
    - {shard-iclb}:       PASS -> INCOMPLETE +1

  * igt@runner@aborted:
    - {shard-iclb}:       ( 7 FAIL ) [fdo#106612] -> ( 5 FAIL )

  
Known issues
------------

  Here are the changes found in Patchwork_12424_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_cpu_reloc@full:
    - shard-apl:          PASS -> INCOMPLETE [fdo#103927]

  * igt@gem_userptr_blits@process-exit-gtt:
    - shard-glk:          NOTRUN -> SKIP [fdo#109271] +41

  * igt@i915_pm_lpsp@screens-disabled:
    - shard-skl:          NOTRUN -> SKIP [fdo#109271] +73

  * igt@i915_pm_rpm@modeset-lpsp:
    - shard-skl:          PASS -> INCOMPLETE [fdo#107807]

  * igt@kms_atomic_transition@3x-modeset-transitions-nonblocking:
    - shard-skl:          NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +3

  * igt@kms_busy@basic-flip-d:
    - shard-glk:          NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +5

  * igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-c:
    - shard-hsw:          PASS -> DMESG-WARN [fdo#107956]

  * igt@kms_color@pipe-a-ctm-max:
    - shard-apl:          PASS -> FAIL [fdo#108147]
    - shard-glk:          NOTRUN -> FAIL [fdo#108147]

  * igt@kms_cursor_crc@cursor-128x128-onscreen:
    - shard-apl:          PASS -> FAIL [fdo#103232] +3

  * igt@kms_cursor_crc@cursor-128x42-random:
    - shard-glk:          NOTRUN -> FAIL [fdo#103232] +1

  * igt@kms_cursor_crc@cursor-size-change:
    - shard-skl:          NOTRUN -> FAIL [fdo#103232] +1

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-onoff:
    - shard-apl:          PASS -> FAIL [fdo#103167] +1

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
    - shard-skl:          PASS -> INCOMPLETE [fdo#104108]

  * igt@kms_plane@pixel-format-pipe-b-planes:
    - shard-skl:          NOTRUN -> FAIL [fdo#103166]

  * igt@kms_plane@pixel-format-pipe-c-planes-source-clamping:
    - shard-skl:          NOTRUN -> DMESG-WARN [fdo#106885]

  * igt@kms_plane@plane-position-covered-pipe-a-planes:
    - shard-glk:          NOTRUN -> FAIL [fdo#103166]

  * igt@kms_plane_alpha_blend@pipe-b-alpha-basic:
    - shard-skl:          NOTRUN -> FAIL [fdo#107815] / [fdo#108145]

  * igt@kms_plane_alpha_blend@pipe-b-alpha-opaque-fb:
    - shard-glk:          NOTRUN -> FAIL [fdo#108145]

  * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
    - shard-skl:          NOTRUN -> FAIL [fdo#107815]

  * igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb:
    - shard-skl:          NOTRUN -> FAIL [fdo#108145]

  * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min:
    - shard-skl:          PASS -> FAIL [fdo#108145]

  * igt@kms_plane_multiple@atomic-pipe-b-tiling-none:
    - shard-apl:          PASS -> FAIL [fdo#103166] +2

  * igt@kms_plane_multiple@atomic-pipe-b-tiling-yf:
    - shard-glk:          PASS -> FAIL [fdo#103166]

  * igt@kms_rotation_crc@multiplane-rotation:
    - shard-kbl:          PASS -> INCOMPLETE [fdo#103665]

  * igt@kms_rotation_crc@multiplane-rotation-cropping-bottom:
    - shard-kbl:          PASS -> DMESG-FAIL [fdo#105763]

  * igt@kms_universal_plane@disable-primary-vs-flip-pipe-f:
    - shard-apl:          NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +1

  * igt@prime_nv_api@i915_nv_import_vs_close:
    - shard-apl:          NOTRUN -> SKIP [fdo#109271] +31

  
#### Possible fixes ####

  * igt@gem_ctx_isolation@vcs0-none:
    - {shard-iclb}:       DMESG-FAIL -> PASS

  * igt@gem_eio@wait-wedge-immediate:
    - {shard-iclb}:       WARN -> PASS

  * igt@i915_pm_rpm@basic-pci-d3-state:
    - shard-skl:          INCOMPLETE [fdo#107807] -> PASS

  * igt@kms_color@pipe-a-degamma:
    - shard-apl:          FAIL [fdo#104782] / [fdo#108145] -> PASS

  * igt@kms_color@pipe-a-legacy-gamma:
    - shard-skl:          FAIL [fdo#104782] / [fdo#108145] -> PASS

  * igt@kms_cursor_crc@cursor-128x42-random:
    - shard-skl:          FAIL [fdo#103232] -> PASS

  * igt@kms_cursor_crc@cursor-64x21-random:
    - shard-apl:          FAIL [fdo#103232] -> PASS

  * igt@kms_cursor_crc@cursor-alpha-opaque:
    - shard-apl:          FAIL [fdo#109350] -> PASS

  * igt@kms_flip@flip-vs-suspend:
    - shard-skl:          INCOMPLETE [fdo#109507] -> PASS

  * igt@kms_flip_tiling@flip-yf-tiled:
    - shard-skl:          FAIL [fdo#108145] -> PASS +2

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render:
    - shard-apl:          FAIL [fdo#103167] -> PASS +3

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move:
    - shard-glk:          FAIL [fdo#103167] -> PASS +4

  * igt@kms_frontbuffer_tracking@fbc-badstride:
    - {shard-iclb}:       FAIL [fdo#103167] -> PASS +5

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-mmap-cpu:
    - shard-skl:          FAIL [fdo#103167] -> PASS +1

  * igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-cpu:
    - {shard-iclb}:       FAIL [fdo#105682] -> PASS

  * igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-pwrite:
    - shard-skl:          FAIL [fdo#105682] -> PASS +1

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-pwrite:
    - {shard-iclb}:       FAIL -> PASS +7

  * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes:
    - shard-glk:          INCOMPLETE [fdo#103359] / [k.org#198133] -> PASS +1
    - {shard-iclb}:       DMESG-WARN -> PASS +1

  * igt@kms_plane@plane-position-covered-pipe-c-planes:
    - shard-apl:          FAIL [fdo#103166] -> PASS +1
    - shard-glk:          FAIL [fdo#103166] -> PASS +2

  * igt@kms_plane_multiple@atomic-pipe-c-tiling-y:
    - {shard-iclb}:       FAIL [fdo#103166] -> PASS

  * igt@kms_psr@cursor_render:
    - {shard-iclb}:       FAIL [fdo#107383] -> PASS +2

  * igt@kms_psr@psr2_sprite_render:
    - {shard-iclb}:       SKIP [fdo#109441] -> PASS

  * igt@kms_setmode@basic:
    - shard-glk:          FAIL [fdo#99912] -> PASS

  * igt@perf_pmu@busy-idle-vcs0:
    - {shard-iclb}:       INCOMPLETE -> PASS

  
#### Warnings ####

  * igt@i915_pm_rpm@pc8-residency:
    - shard-skl:          INCOMPLETE [fdo#107807] -> SKIP [fdo#109271]

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
  [fdo#103355]: https://bugs.freedesktop.org/show_bug.cgi?id=103355
  [fdo#103359]: https://bugs.freedesktop.org/show_bug.cgi?id=103359
  [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
  [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
  [fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
  [fdo#104782]: https://bugs.freedesktop.org/show_bug.cgi?id=104782
  [fdo#105682]: https://bugs.freedesktop.org/show_bug.cgi?id=105682
  [fdo#105763]: https://bugs.freedesktop.org/show_bug.cgi?id=105763
  [fdo#106612]: https://bugs.freedesktop.org/show_bug.cgi?id=106612
  [fdo#106885]: https://bugs.freedesktop.org/show_bug.cgi?id=106885
  [fdo#107383]: https://bugs.freedesktop.org/show_bug.cgi?id=107383
  [fdo#107807]: https://bugs.freedesktop.org/show_bug.cgi?id=107807
  [fdo#107815]: https://bugs.freedesktop.org/show_bug.cgi?id=107815
  [fdo#107956]: https://bugs.freedesktop.org/show_bug.cgi?id=107956
  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#108147]: https://bugs.freedesktop.org/show_bug.cgi?id=108147
  [fdo#108948]: https://bugs.freedesktop.org/show_bug.cgi?id=108948
  [fdo#109052]: https://bugs.freedesktop.org/show_bug.cgi?id=109052
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109277]: https://bugs.freedesktop.org/show_bug.cgi?id=109277
  [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
  [fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279
  [fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
  [fdo#109283]: https://bugs.freedesktop.org/show_bug.cgi?id=109283
  [fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [fdo#109287]: https://bugs.freedesktop.org/show_bug.cgi?id=109287
  [fdo#109288]: https://bugs.freedesktop.org/show_bug.cgi?id=109288
  [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
  [fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291
  [fdo#109301]: https://bugs.freedesktop.org/show_bug.cgi?id=109301
  [fdo#109308]: https://bugs.freedesktop.org/show_bug.cgi?id=109308
  [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
  [fdo#109350]: https://bugs.freedesktop.org/show_bug.cgi?id=109350
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109502]: https://bugs.freedesktop.org/show_bug.cgi?id=109502
  [fdo#109507]: https://bugs.freedesktop.org/show_bug.cgi?id=109507
  [fdo#109559]: https://bugs.freedesktop.org/show_bug.cgi?id=109559
  [fdo#109633]: https://bugs.freedesktop.org/show_bug.cgi?id=109633
  [fdo#109673]: https://bugs.freedesktop.org/show_bug.cgi?id=109673
  [fdo#109677]: https://bugs.freedesktop.org/show_bug.cgi?id=109677
  [fdo#109766]: https://bugs.freedesktop.org/show_bug.cgi?id=109766
  [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
  [k.org#198133]: https://bugzilla.kernel.org/show_bug.cgi?id=198133


Participating hosts (7 -> 7)
------------------------------

  No changes in participating hosts


Build changes
-------------

    * Linux: CI_DRM_5728 -> Patchwork_12424

  CI_DRM_5728: 78b288a16a32e8828f93c5e2e9eb3c1b73bfdce7 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4877: d15ad69be07a987d5c2ba408201b287adae8ca59 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_12424: ccb2723ec15a18ab1dcbfc69269004e4ce87dd79 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12424/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH 1/5] drm/i915: Add broadcast RGB property for DP MST

[Ville Syrjälä]

On Fri, Mar 08, 2019 at 09:24:05PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Add the "Broadcast RGB" property to MST connectors, and implement
> the same logic for it as we have in the SST code.
> 
> Cc: Ivan Vlk <ari@adyline.sk>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108821

Tested-by: Ivan Vlk <ari@adyline.sk>

review needed...

> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_dp_mst.c | 29 +++++++++++++++++++++++++++--
>  1 file changed, 27 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c b/drivers/gpu/drm/i915/intel_dp_mst.c
> index fb67cd931117..2b791d67a43f 100644
> --- a/drivers/gpu/drm/i915/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/intel_dp_mst.c
> @@ -38,6 +38,8 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
>  	struct intel_digital_port *intel_dig_port = intel_mst->primary;
>  	struct intel_dp *intel_dp = &intel_dig_port->dp;
>  	struct drm_connector *connector = conn_state->connector;
> +	struct intel_digital_connector_state *intel_conn_state =
> +		to_intel_digital_connector_state(conn_state);
>  	void *port = to_intel_connector(connector)->port;
>  	struct drm_atomic_state *state = pipe_config->base.state;
>  	struct drm_crtc *crtc = pipe_config->base.crtc;
> @@ -77,6 +79,21 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
>  	if (drm_dp_mst_port_has_audio(&intel_dp->mst_mgr, port))
>  		pipe_config->has_audio = true;
>  
> +	if (intel_conn_state->broadcast_rgb == INTEL_BROADCAST_RGB_AUTO) {
> +		/*
> +		 * See:
> +		 * CEA-861-E - 5.1 Default Encoding Parameters
> +		 * VESA DisplayPort Ver.1.2a - 5.1.1.1 Video Colorimetry
> +		 */
> +		pipe_config->limited_color_range =
> +			pipe_config->pipe_bpp != 18 &&
> +			drm_default_rgb_quant_range(adjusted_mode) ==
> +			HDMI_QUANTIZATION_RANGE_LIMITED;
> +	} else {
> +		pipe_config->limited_color_range =
> +			intel_conn_state->broadcast_rgb == INTEL_BROADCAST_RGB_LIMITED;
> +	}
> +
>  	mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock, bpp);
>  	pipe_config->pbn = mst_pbn;
>  
> @@ -117,7 +134,11 @@ intel_dp_mst_atomic_check(struct drm_connector *connector,
>  	struct drm_crtc *new_crtc = new_conn_state->crtc;
>  	struct drm_crtc_state *crtc_state;
>  	struct drm_dp_mst_topology_mgr *mgr;
> -	int ret = 0;
> +	int ret;
> +
> +	ret = intel_digital_connector_atomic_check(connector, new_conn_state);
> +	if (ret)
> +		return ret;
>  
>  	if (!old_conn_state->crtc)
>  		return 0;
> @@ -354,11 +375,13 @@ intel_dp_mst_detect(struct drm_connector *connector, bool force)
>  static const struct drm_connector_funcs intel_dp_mst_connector_funcs = {
>  	.detect = intel_dp_mst_detect,
>  	.fill_modes = drm_helper_probe_single_connector_modes,
> +	.atomic_get_property = intel_digital_connector_atomic_get_property,
> +	.atomic_set_property = intel_digital_connector_atomic_set_property,
>  	.late_register = intel_connector_register,
>  	.early_unregister = intel_connector_unregister,
>  	.destroy = intel_connector_destroy,
>  	.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
> -	.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
> +	.atomic_duplicate_state = intel_digital_connector_duplicate_state,
>  };
>  
>  static int intel_dp_mst_get_modes(struct drm_connector *connector)
> @@ -487,6 +510,8 @@ static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topolo
>  	if (ret)
>  		goto err;
>  
> +	intel_attach_broadcast_rgb_property(connector);
> +
>  	return connector;
>  
>  err:
> -- 
> 2.19.2

-- 
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH 1/5] drm/i915: Add broadcast RGB property for DP MST

[Jani Nikula]

On Fri, 08 Mar 2019, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Add the "Broadcast RGB" property to MST connectors, and implement
> the same logic for it as we have in the SST code.

Should we mention the added *other* atomic checks here?

Reviewed-by: Jani Nikula <jani.nikula@intel.com>


>
> Cc: Ivan Vlk <ari@adyline.sk>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108821
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_dp_mst.c | 29 +++++++++++++++++++++++++++--
>  1 file changed, 27 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c b/drivers/gpu/drm/i915/intel_dp_mst.c
> index fb67cd931117..2b791d67a43f 100644
> --- a/drivers/gpu/drm/i915/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/intel_dp_mst.c
> @@ -38,6 +38,8 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
>  	struct intel_digital_port *intel_dig_port = intel_mst->primary;
>  	struct intel_dp *intel_dp = &intel_dig_port->dp;
>  	struct drm_connector *connector = conn_state->connector;
> +	struct intel_digital_connector_state *intel_conn_state =
> +		to_intel_digital_connector_state(conn_state);
>  	void *port = to_intel_connector(connector)->port;
>  	struct drm_atomic_state *state = pipe_config->base.state;
>  	struct drm_crtc *crtc = pipe_config->base.crtc;
> @@ -77,6 +79,21 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
>  	if (drm_dp_mst_port_has_audio(&intel_dp->mst_mgr, port))
>  		pipe_config->has_audio = true;
>  
> +	if (intel_conn_state->broadcast_rgb == INTEL_BROADCAST_RGB_AUTO) {
> +		/*
> +		 * See:
> +		 * CEA-861-E - 5.1 Default Encoding Parameters
> +		 * VESA DisplayPort Ver.1.2a - 5.1.1.1 Video Colorimetry
> +		 */
> +		pipe_config->limited_color_range =
> +			pipe_config->pipe_bpp != 18 &&
> +			drm_default_rgb_quant_range(adjusted_mode) ==
> +			HDMI_QUANTIZATION_RANGE_LIMITED;
> +	} else {
> +		pipe_config->limited_color_range =
> +			intel_conn_state->broadcast_rgb == INTEL_BROADCAST_RGB_LIMITED;
> +	}
> +
>  	mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock, bpp);
>  	pipe_config->pbn = mst_pbn;
>  
> @@ -117,7 +134,11 @@ intel_dp_mst_atomic_check(struct drm_connector *connector,
>  	struct drm_crtc *new_crtc = new_conn_state->crtc;
>  	struct drm_crtc_state *crtc_state;
>  	struct drm_dp_mst_topology_mgr *mgr;
> -	int ret = 0;
> +	int ret;
> +
> +	ret = intel_digital_connector_atomic_check(connector, new_conn_state);
> +	if (ret)
> +		return ret;
>  
>  	if (!old_conn_state->crtc)
>  		return 0;
> @@ -354,11 +375,13 @@ intel_dp_mst_detect(struct drm_connector *connector, bool force)
>  static const struct drm_connector_funcs intel_dp_mst_connector_funcs = {
>  	.detect = intel_dp_mst_detect,
>  	.fill_modes = drm_helper_probe_single_connector_modes,
> +	.atomic_get_property = intel_digital_connector_atomic_get_property,
> +	.atomic_set_property = intel_digital_connector_atomic_set_property,
>  	.late_register = intel_connector_register,
>  	.early_unregister = intel_connector_unregister,
>  	.destroy = intel_connector_destroy,
>  	.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
> -	.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
> +	.atomic_duplicate_state = intel_digital_connector_duplicate_state,
>  };
>  
>  static int intel_dp_mst_get_modes(struct drm_connector *connector)
> @@ -487,6 +510,8 @@ static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topolo
>  	if (ret)
>  		goto err;
>  
> +	intel_attach_broadcast_rgb_property(connector);
> +
>  	return connector;
>  
>  err:

-- 
Jani Nikula, Intel Open Source Graphics Center
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Re: [PATCH 2/5] drm/i915: Expose the force_audio property with DP MST

[Jani Nikula]

On Fri, 08 Mar 2019, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> We already expose the force_audio property with SST. Do the same
> with MST.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Jani Nikula <jani.nikula@intel.com>


> ---
>  drivers/gpu/drm/i915/intel_dp_mst.c | 12 +++++++++---
>  1 file changed, 9 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c b/drivers/gpu/drm/i915/intel_dp_mst.c
> index 2b791d67a43f..f9ce9e87d35b 100644
> --- a/drivers/gpu/drm/i915/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/intel_dp_mst.c
> @@ -64,6 +64,14 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
>  		DRM_DEBUG_KMS("Setting pipe bpp to %d\n",
>  			      bpp);
>  	}
> +
> +	if (intel_conn_state->force_audio == HDMI_AUDIO_AUTO)
> +		pipe_config->has_audio =
> +			drm_dp_mst_port_has_audio(&intel_dp->mst_mgr, port);
> +	else
> +		pipe_config->has_audio =
> +			intel_conn_state->force_audio == HDMI_AUDIO_ON;
> +
>  	/*
>  	 * for MST we always configure max link bw - the spec doesn't
>  	 * seem to suggest we should do otherwise.
> @@ -76,9 +84,6 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
>  
>  	pipe_config->port_clock = intel_dp_max_link_rate(intel_dp);
>  
> -	if (drm_dp_mst_port_has_audio(&intel_dp->mst_mgr, port))
> -		pipe_config->has_audio = true;
> -
>  	if (intel_conn_state->broadcast_rgb == INTEL_BROADCAST_RGB_AUTO) {
>  		/*
>  		 * See:
> @@ -510,6 +515,7 @@ static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topolo
>  	if (ret)
>  		goto err;
>  
> +	intel_attach_force_audio_property(connector);
>  	intel_attach_broadcast_rgb_property(connector);
>  
>  	return connector;

-- 
Jani Nikula, Intel Open Source Graphics Center
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Re: [PATCH 3/5] drm/i915: Remove the 8bpc shackles from DP MST

[Jani Nikula]

On Fri, 08 Mar 2019, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Allow DP MST to output any color depth. This means deep color as
> well as falling back to 6bpc if we would otherwise require too
> much bandwidth.
>
> TODO: We should probably extend bw_contstrained scheme to force
> all streams on the link to 6bpc if we can't fit the new stream(s)
> otherwise.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_dp.c     |   8 +-
>  drivers/gpu/drm/i915/intel_dp_mst.c | 120 +++++++++++++++++-----------
>  drivers/gpu/drm/i915/intel_drv.h    |   8 ++
>  3 files changed, 83 insertions(+), 53 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index f40b3342d82a..e1ab50980b83 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -1724,12 +1724,6 @@ void intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock,
>  	}
>  }
>  
> -struct link_config_limits {
> -	int min_clock, max_clock;
> -	int min_lane_count, max_lane_count;
> -	int min_bpp, max_bpp;
> -};
> -
>  static bool intel_dp_source_supports_fec(struct intel_dp *intel_dp,
>  					 const struct intel_crtc_state *pipe_config)
>  {
> @@ -1792,7 +1786,7 @@ static int intel_dp_compute_bpp(struct intel_dp *intel_dp,
>  }
>  
>  /* Adjust link config limits based on compliance test requests. */
> -static void
> +void
>  intel_dp_adjust_compliance_config(struct intel_dp *intel_dp,
>  				  struct intel_crtc_state *pipe_config,
>  				  struct link_config_limits *limits)
> diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c b/drivers/gpu/drm/i915/intel_dp_mst.c
> index f9ce9e87d35b..df8b396cbcdc 100644
> --- a/drivers/gpu/drm/i915/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/intel_dp_mst.c
> @@ -29,41 +29,81 @@
>  #include <drm/drm_edid.h>
>  #include <drm/drm_probe_helper.h>
>  
> +static int intel_dp_mst_compute_link_config(struct intel_encoder *encoder,
> +					    struct intel_crtc_state *crtc_state,
> +					    struct drm_connector_state *conn_state,
> +					    struct link_config_limits *limits)
> +{
> +	struct drm_atomic_state *state = crtc_state->base.state;
> +	struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
> +	struct intel_dp *intel_dp = &intel_mst->primary->dp;
> +	struct intel_connector *connector =
> +		to_intel_connector(conn_state->connector);
> +	const struct drm_display_mode *adjusted_mode =
> +		&crtc_state->base.adjusted_mode;
> +	void *port = connector->port;
> +	bool constant_n = drm_dp_has_quirk(&intel_dp->desc,
> +					   DP_DPCD_QUIRK_CONSTANT_N);
> +	int slots;
> +
> +	for (;;) {

I'm not particularly fond of having the loop conditions sprinkled in the
block. But looks correct.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>



> +		crtc_state->lane_count = limits->max_lane_count;
> +		crtc_state->port_clock = limits->max_clock;
> +		crtc_state->pipe_bpp = limits->max_bpp;
> +
> +		crtc_state->pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock,
> +						       crtc_state->pipe_bpp);
> +
> +		slots = drm_dp_atomic_find_vcpi_slots(state, &intel_dp->mst_mgr,
> +						      port, crtc_state->pbn);
> +		if (slots == -EDEADLK)
> +			return slots;
> +		if (slots >= 0)
> +			break;
> +
> +		if (limits->max_bpp > limits->min_bpp) {
> +			limits->max_bpp -= 2 * 3;
> +			continue;
> +		}
> +
> +		DRM_DEBUG_KMS("failed finding vcpi slots:%d\n", slots);
> +
> +		return slots;
> +	}
> +
> +	intel_link_compute_m_n(crtc_state->pipe_bpp,
> +			       crtc_state->lane_count,
> +			       adjusted_mode->crtc_clock,
> +			       crtc_state->port_clock,
> +			       &crtc_state->dp_m_n,
> +			       constant_n);
> +	crtc_state->dp_m_n.tu = slots;
> +
> +	return 0;
> +}
> +
>  static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
>  				       struct intel_crtc_state *pipe_config,
>  				       struct drm_connector_state *conn_state)
>  {
>  	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
>  	struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
> -	struct intel_digital_port *intel_dig_port = intel_mst->primary;
> -	struct intel_dp *intel_dp = &intel_dig_port->dp;
> -	struct drm_connector *connector = conn_state->connector;
> +	struct intel_dp *intel_dp = &intel_mst->primary->dp;
> +	struct intel_connector *connector =
> +		to_intel_connector(conn_state->connector);
>  	struct intel_digital_connector_state *intel_conn_state =
>  		to_intel_digital_connector_state(conn_state);
> -	void *port = to_intel_connector(connector)->port;
> -	struct drm_atomic_state *state = pipe_config->base.state;
> -	struct drm_crtc *crtc = pipe_config->base.crtc;
> -	struct drm_crtc_state *old_crtc_state =
> -		drm_atomic_get_old_crtc_state(state, crtc);
> -	int bpp;
> -	int lane_count, slots =
> -		to_intel_crtc_state(old_crtc_state)->dp_m_n.tu;
> -	const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
> -	int mst_pbn;
> -	bool constant_n = drm_dp_has_quirk(&intel_dp->desc,
> -					   DP_DPCD_QUIRK_CONSTANT_N);
> +	const struct drm_display_mode *adjusted_mode =
> +		&pipe_config->base.adjusted_mode;
> +	void *port = connector->port;
> +	struct link_config_limits limits;
> +	int ret;
>  
>  	if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
>  		return -EINVAL;
>  
>  	pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
>  	pipe_config->has_pch_encoder = false;
> -	bpp = 24;
> -	if (intel_dp->compliance.test_data.bpc) {
> -		bpp = intel_dp->compliance.test_data.bpc * 3;
> -		DRM_DEBUG_KMS("Setting pipe bpp to %d\n",
> -			      bpp);
> -	}
>  
>  	if (intel_conn_state->force_audio == HDMI_AUDIO_AUTO)
>  		pipe_config->has_audio =
> @@ -76,13 +116,21 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
>  	 * for MST we always configure max link bw - the spec doesn't
>  	 * seem to suggest we should do otherwise.
>  	 */
> -	lane_count = intel_dp_max_lane_count(intel_dp);
> +	limits.min_clock =
> +	limits.max_clock = intel_dp_max_link_rate(intel_dp);
> +
> +	limits.min_lane_count =
> +	limits.max_lane_count = intel_dp_max_lane_count(intel_dp);
>  
> -	pipe_config->lane_count = lane_count;
> +	limits.min_bpp = 6 * 3;
> +	limits.max_bpp = pipe_config->pipe_bpp;
>  
> -	pipe_config->pipe_bpp = bpp;
> +	intel_dp_adjust_compliance_config(intel_dp, pipe_config, &limits);
>  
> -	pipe_config->port_clock = intel_dp_max_link_rate(intel_dp);
> +	ret = intel_dp_mst_compute_link_config(encoder, pipe_config,
> +					       conn_state, &limits);
> +	if (ret)
> +		return ret;
>  
>  	if (intel_conn_state->broadcast_rgb == INTEL_BROADCAST_RGB_AUTO) {
>  		/*
> @@ -99,25 +147,6 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
>  			intel_conn_state->broadcast_rgb == INTEL_BROADCAST_RGB_LIMITED;
>  	}
>  
> -	mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock, bpp);
> -	pipe_config->pbn = mst_pbn;
> -
> -	slots = drm_dp_atomic_find_vcpi_slots(state, &intel_dp->mst_mgr, port,
> -					      mst_pbn);
> -	if (slots < 0) {
> -		DRM_DEBUG_KMS("failed finding vcpi slots:%d\n",
> -			      slots);
> -		return slots;
> -	}
> -
> -	intel_link_compute_m_n(bpp, lane_count,
> -			       adjusted_mode->crtc_clock,
> -			       pipe_config->port_clock,
> -			       &pipe_config->dp_m_n,
> -			       constant_n);
> -
> -	pipe_config->dp_m_n.tu = slots;
> -
>  	if (IS_GEN9_LP(dev_priv))
>  		pipe_config->lane_lat_optim_mask =
>  			bxt_ddi_phy_calc_lane_lat_optim_mask(pipe_config->lane_count);
> @@ -401,7 +430,6 @@ intel_dp_mst_mode_valid(struct drm_connector *connector,
>  	struct intel_connector *intel_connector = to_intel_connector(connector);
>  	struct intel_dp *intel_dp = intel_connector->mst_port;
>  	int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
> -	int bpp = 24; /* MST uses fixed bpp */
>  	int max_rate, mode_rate, max_lanes, max_link_clock;
>  
>  	if (drm_connector_is_unregistered(connector))
> @@ -414,7 +442,7 @@ intel_dp_mst_mode_valid(struct drm_connector *connector,
>  	max_lanes = intel_dp_max_lane_count(intel_dp);
>  
>  	max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes);
> -	mode_rate = intel_dp_link_required(mode->clock, bpp);
> +	mode_rate = intel_dp_link_required(mode->clock, 18);
>  
>  	/* TODO - validate mode against available PBN for link */
>  	if (mode->clock < 10000)
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index 40ebc94b2187..fe05ed7ff749 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -1904,6 +1904,14 @@ void intel_csr_ucode_suspend(struct drm_i915_private *);
>  void intel_csr_ucode_resume(struct drm_i915_private *);
>  
>  /* intel_dp.c */
> +struct link_config_limits {
> +	int min_clock, max_clock;
> +	int min_lane_count, max_lane_count;
> +	int min_bpp, max_bpp;
> +};
> +void intel_dp_adjust_compliance_config(struct intel_dp *intel_dp,
> +				       struct intel_crtc_state *pipe_config,
> +				       struct link_config_limits *limits);
>  bool intel_dp_port_enabled(struct drm_i915_private *dev_priv,
>  			   i915_reg_t dp_reg, enum port port,
>  			   enum pipe *pipe);

-- 
Jani Nikula, Intel Open Source Graphics Center
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Re: [PATCH 4/5] drm/i915: Add max_bpc property for DP MST

[Jani Nikula]

On Fri, 08 Mar 2019, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Allow the user to limit the output bpc with DP MST.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Jani Nikula <jani.nikula@intel.com>


> ---
>  drivers/gpu/drm/i915/intel_dp_mst.c | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c b/drivers/gpu/drm/i915/intel_dp_mst.c
> index df8b396cbcdc..23ca2ab88fd1 100644
> --- a/drivers/gpu/drm/i915/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/intel_dp_mst.c
> @@ -545,6 +545,7 @@ static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topolo
>  
>  	intel_attach_force_audio_property(connector);
>  	intel_attach_broadcast_rgb_property(connector);
> +	drm_connector_attach_max_bpc_property(connector, 6, 12);
>  
>  	return connector;

-- 
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Re: [PATCH 5/5] drm/i915: Update TRANS_MSA_MISC for fastsets

[Jani Nikula]

On Fri, 08 Mar 2019, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Update the DP MSA MISC bits for fastsets. This is needed
> when we change between limited and full range RGB output.
>
> On HSW+ changing limited_range does not currently result in a
> full modeset since we have don't have the readout code for it
> (for DP we could, and probably should, readout from TRANS_MSA_MISC
> itself, for HDMI we would have to rely on the infoframe). So
> the PIPE_CONF_CHECK() is only performed for pre-HSW platforms.
> That means any change in the value will result in a fastset
> instead. Fortunately there is no prohibition to changing
> TRANS_MSA_MISC dynamically, so it looks like we can legally do
> fastsets for this.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

> ---
>  drivers/gpu/drm/i915/intel_ddi.c | 2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> index 7e3b4e8fdf3a..3d9ad4526cf9 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -3556,6 +3556,8 @@ static void intel_ddi_update_pipe_dp(struct intel_encoder *encoder,
>  {
>  	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
>  
> +	intel_ddi_set_pipe_settings(crtc_state);
> +
>  	intel_psr_update(intel_dp, crtc_state);
>  	intel_edp_drrs_enable(intel_dp, crtc_state);

-- 
Jani Nikula, Intel Open Source Graphics Center
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Re: [PATCH 1/5] drm/i915: Add broadcast RGB property for DP MST

[Ville Syrjälä]

On Tue, Mar 26, 2019 at 12:41:36PM +0200, Jani Nikula wrote:
> On Fri, 08 Mar 2019, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Add the "Broadcast RGB" property to MST connectors, and implement
> > the same logic for it as we have in the SST code.
> 
> Should we mention the added *other* atomic checks here?

We don't have the corresponding properties attached to the connector so
all the rest should be nops.

> 
> Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> 
> 
> >
> > Cc: Ivan Vlk <ari@adyline.sk>
> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108821
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_dp_mst.c | 29 +++++++++++++++++++++++++++--
> >  1 file changed, 27 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c b/drivers/gpu/drm/i915/intel_dp_mst.c
> > index fb67cd931117..2b791d67a43f 100644
> > --- a/drivers/gpu/drm/i915/intel_dp_mst.c
> > +++ b/drivers/gpu/drm/i915/intel_dp_mst.c
> > @@ -38,6 +38,8 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
> >  	struct intel_digital_port *intel_dig_port = intel_mst->primary;
> >  	struct intel_dp *intel_dp = &intel_dig_port->dp;
> >  	struct drm_connector *connector = conn_state->connector;
> > +	struct intel_digital_connector_state *intel_conn_state =
> > +		to_intel_digital_connector_state(conn_state);
> >  	void *port = to_intel_connector(connector)->port;
> >  	struct drm_atomic_state *state = pipe_config->base.state;
> >  	struct drm_crtc *crtc = pipe_config->base.crtc;
> > @@ -77,6 +79,21 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
> >  	if (drm_dp_mst_port_has_audio(&intel_dp->mst_mgr, port))
> >  		pipe_config->has_audio = true;
> >  
> > +	if (intel_conn_state->broadcast_rgb == INTEL_BROADCAST_RGB_AUTO) {
> > +		/*
> > +		 * See:
> > +		 * CEA-861-E - 5.1 Default Encoding Parameters
> > +		 * VESA DisplayPort Ver.1.2a - 5.1.1.1 Video Colorimetry
> > +		 */
> > +		pipe_config->limited_color_range =
> > +			pipe_config->pipe_bpp != 18 &&
> > +			drm_default_rgb_quant_range(adjusted_mode) ==
> > +			HDMI_QUANTIZATION_RANGE_LIMITED;
> > +	} else {
> > +		pipe_config->limited_color_range =
> > +			intel_conn_state->broadcast_rgb == INTEL_BROADCAST_RGB_LIMITED;
> > +	}
> > +
> >  	mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock, bpp);
> >  	pipe_config->pbn = mst_pbn;
> >  
> > @@ -117,7 +134,11 @@ intel_dp_mst_atomic_check(struct drm_connector *connector,
> >  	struct drm_crtc *new_crtc = new_conn_state->crtc;
> >  	struct drm_crtc_state *crtc_state;
> >  	struct drm_dp_mst_topology_mgr *mgr;
> > -	int ret = 0;
> > +	int ret;
> > +
> > +	ret = intel_digital_connector_atomic_check(connector, new_conn_state);
> > +	if (ret)
> > +		return ret;
> >  
> >  	if (!old_conn_state->crtc)
> >  		return 0;
> > @@ -354,11 +375,13 @@ intel_dp_mst_detect(struct drm_connector *connector, bool force)
> >  static const struct drm_connector_funcs intel_dp_mst_connector_funcs = {
> >  	.detect = intel_dp_mst_detect,
> >  	.fill_modes = drm_helper_probe_single_connector_modes,
> > +	.atomic_get_property = intel_digital_connector_atomic_get_property,
> > +	.atomic_set_property = intel_digital_connector_atomic_set_property,
> >  	.late_register = intel_connector_register,
> >  	.early_unregister = intel_connector_unregister,
> >  	.destroy = intel_connector_destroy,
> >  	.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
> > -	.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
> > +	.atomic_duplicate_state = intel_digital_connector_duplicate_state,
> >  };
> >  
> >  static int intel_dp_mst_get_modes(struct drm_connector *connector)
> > @@ -487,6 +510,8 @@ static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topolo
> >  	if (ret)
> >  		goto err;
> >  
> > +	intel_attach_broadcast_rgb_property(connector);
> > +
> >  	return connector;
> >  
> >  err:
> 
> -- 
> Jani Nikula, Intel Open Source Graphics Center

-- 
Ville Syrjälä
Intel
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Re: [PATCH 3/5] drm/i915: Remove the 8bpc shackles from DP MST

[Ville Syrjälä]

On Tue, Mar 26, 2019 at 12:43:23PM +0200, Jani Nikula wrote:
> On Fri, 08 Mar 2019, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Allow DP MST to output any color depth. This means deep color as
> > well as falling back to 6bpc if we would otherwise require too
> > much bandwidth.
> >
> > TODO: We should probably extend bw_contstrained scheme to force
> > all streams on the link to 6bpc if we can't fit the new stream(s)
> > otherwise.
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_dp.c     |   8 +-
> >  drivers/gpu/drm/i915/intel_dp_mst.c | 120 +++++++++++++++++-----------
> >  drivers/gpu/drm/i915/intel_drv.h    |   8 ++
> >  3 files changed, 83 insertions(+), 53 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> > index f40b3342d82a..e1ab50980b83 100644
> > --- a/drivers/gpu/drm/i915/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/intel_dp.c
> > @@ -1724,12 +1724,6 @@ void intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock,
> >  	}
> >  }
> >  
> > -struct link_config_limits {
> > -	int min_clock, max_clock;
> > -	int min_lane_count, max_lane_count;
> > -	int min_bpp, max_bpp;
> > -};
> > -
> >  static bool intel_dp_source_supports_fec(struct intel_dp *intel_dp,
> >  					 const struct intel_crtc_state *pipe_config)
> >  {
> > @@ -1792,7 +1786,7 @@ static int intel_dp_compute_bpp(struct intel_dp *intel_dp,
> >  }
> >  
> >  /* Adjust link config limits based on compliance test requests. */
> > -static void
> > +void
> >  intel_dp_adjust_compliance_config(struct intel_dp *intel_dp,
> >  				  struct intel_crtc_state *pipe_config,
> >  				  struct link_config_limits *limits)
> > diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c b/drivers/gpu/drm/i915/intel_dp_mst.c
> > index f9ce9e87d35b..df8b396cbcdc 100644
> > --- a/drivers/gpu/drm/i915/intel_dp_mst.c
> > +++ b/drivers/gpu/drm/i915/intel_dp_mst.c
> > @@ -29,41 +29,81 @@
> >  #include <drm/drm_edid.h>
> >  #include <drm/drm_probe_helper.h>
> >  
> > +static int intel_dp_mst_compute_link_config(struct intel_encoder *encoder,
> > +					    struct intel_crtc_state *crtc_state,
> > +					    struct drm_connector_state *conn_state,
> > +					    struct link_config_limits *limits)
> > +{
> > +	struct drm_atomic_state *state = crtc_state->base.state;
> > +	struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
> > +	struct intel_dp *intel_dp = &intel_mst->primary->dp;
> > +	struct intel_connector *connector =
> > +		to_intel_connector(conn_state->connector);
> > +	const struct drm_display_mode *adjusted_mode =
> > +		&crtc_state->base.adjusted_mode;
> > +	void *port = connector->port;
> > +	bool constant_n = drm_dp_has_quirk(&intel_dp->desc,
> > +					   DP_DPCD_QUIRK_CONSTANT_N);
> > +	int slots;
> > +
> > +	for (;;) {
> 
> I'm not particularly fond of having the loop conditions sprinkled in the
> block. But looks correct.

Ah yes, we can make this a regular for loop. I was just going for
an infinite loop originally and didn't think further.

> 
> Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> 
> 
> 
> > +		crtc_state->lane_count = limits->max_lane_count;
> > +		crtc_state->port_clock = limits->max_clock;
> > +		crtc_state->pipe_bpp = limits->max_bpp;
> > +
> > +		crtc_state->pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock,
> > +						       crtc_state->pipe_bpp);
> > +
> > +		slots = drm_dp_atomic_find_vcpi_slots(state, &intel_dp->mst_mgr,
> > +						      port, crtc_state->pbn);
> > +		if (slots == -EDEADLK)
> > +			return slots;
> > +		if (slots >= 0)
> > +			break;
> > +
> > +		if (limits->max_bpp > limits->min_bpp) {
> > +			limits->max_bpp -= 2 * 3;
> > +			continue;
> > +		}
> > +
> > +		DRM_DEBUG_KMS("failed finding vcpi slots:%d\n", slots);
> > +
> > +		return slots;
> > +	}
> > +
> > +	intel_link_compute_m_n(crtc_state->pipe_bpp,
> > +			       crtc_state->lane_count,
> > +			       adjusted_mode->crtc_clock,
> > +			       crtc_state->port_clock,
> > +			       &crtc_state->dp_m_n,
> > +			       constant_n);
> > +	crtc_state->dp_m_n.tu = slots;
> > +
> > +	return 0;
> > +}
> > +
> >  static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
> >  				       struct intel_crtc_state *pipe_config,
> >  				       struct drm_connector_state *conn_state)
> >  {
> >  	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> >  	struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
> > -	struct intel_digital_port *intel_dig_port = intel_mst->primary;
> > -	struct intel_dp *intel_dp = &intel_dig_port->dp;
> > -	struct drm_connector *connector = conn_state->connector;
> > +	struct intel_dp *intel_dp = &intel_mst->primary->dp;
> > +	struct intel_connector *connector =
> > +		to_intel_connector(conn_state->connector);
> >  	struct intel_digital_connector_state *intel_conn_state =
> >  		to_intel_digital_connector_state(conn_state);
> > -	void *port = to_intel_connector(connector)->port;
> > -	struct drm_atomic_state *state = pipe_config->base.state;
> > -	struct drm_crtc *crtc = pipe_config->base.crtc;
> > -	struct drm_crtc_state *old_crtc_state =
> > -		drm_atomic_get_old_crtc_state(state, crtc);
> > -	int bpp;
> > -	int lane_count, slots =
> > -		to_intel_crtc_state(old_crtc_state)->dp_m_n.tu;
> > -	const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
> > -	int mst_pbn;
> > -	bool constant_n = drm_dp_has_quirk(&intel_dp->desc,
> > -					   DP_DPCD_QUIRK_CONSTANT_N);
> > +	const struct drm_display_mode *adjusted_mode =
> > +		&pipe_config->base.adjusted_mode;
> > +	void *port = connector->port;
> > +	struct link_config_limits limits;
> > +	int ret;
> >  
> >  	if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
> >  		return -EINVAL;
> >  
> >  	pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
> >  	pipe_config->has_pch_encoder = false;
> > -	bpp = 24;
> > -	if (intel_dp->compliance.test_data.bpc) {
> > -		bpp = intel_dp->compliance.test_data.bpc * 3;
> > -		DRM_DEBUG_KMS("Setting pipe bpp to %d\n",
> > -			      bpp);
> > -	}
> >  
> >  	if (intel_conn_state->force_audio == HDMI_AUDIO_AUTO)
> >  		pipe_config->has_audio =
> > @@ -76,13 +116,21 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
> >  	 * for MST we always configure max link bw - the spec doesn't
> >  	 * seem to suggest we should do otherwise.
> >  	 */
> > -	lane_count = intel_dp_max_lane_count(intel_dp);
> > +	limits.min_clock =
> > +	limits.max_clock = intel_dp_max_link_rate(intel_dp);
> > +
> > +	limits.min_lane_count =
> > +	limits.max_lane_count = intel_dp_max_lane_count(intel_dp);
> >  
> > -	pipe_config->lane_count = lane_count;
> > +	limits.min_bpp = 6 * 3;
> > +	limits.max_bpp = pipe_config->pipe_bpp;
> >  
> > -	pipe_config->pipe_bpp = bpp;
> > +	intel_dp_adjust_compliance_config(intel_dp, pipe_config, &limits);
> >  
> > -	pipe_config->port_clock = intel_dp_max_link_rate(intel_dp);
> > +	ret = intel_dp_mst_compute_link_config(encoder, pipe_config,
> > +					       conn_state, &limits);
> > +	if (ret)
> > +		return ret;
> >  
> >  	if (intel_conn_state->broadcast_rgb == INTEL_BROADCAST_RGB_AUTO) {
> >  		/*
> > @@ -99,25 +147,6 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
> >  			intel_conn_state->broadcast_rgb == INTEL_BROADCAST_RGB_LIMITED;
> >  	}
> >  
> > -	mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock, bpp);
> > -	pipe_config->pbn = mst_pbn;
> > -
> > -	slots = drm_dp_atomic_find_vcpi_slots(state, &intel_dp->mst_mgr, port,
> > -					      mst_pbn);
> > -	if (slots < 0) {
> > -		DRM_DEBUG_KMS("failed finding vcpi slots:%d\n",
> > -			      slots);
> > -		return slots;
> > -	}
> > -
> > -	intel_link_compute_m_n(bpp, lane_count,
> > -			       adjusted_mode->crtc_clock,
> > -			       pipe_config->port_clock,
> > -			       &pipe_config->dp_m_n,
> > -			       constant_n);
> > -
> > -	pipe_config->dp_m_n.tu = slots;
> > -
> >  	if (IS_GEN9_LP(dev_priv))
> >  		pipe_config->lane_lat_optim_mask =
> >  			bxt_ddi_phy_calc_lane_lat_optim_mask(pipe_config->lane_count);
> > @@ -401,7 +430,6 @@ intel_dp_mst_mode_valid(struct drm_connector *connector,
> >  	struct intel_connector *intel_connector = to_intel_connector(connector);
> >  	struct intel_dp *intel_dp = intel_connector->mst_port;
> >  	int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
> > -	int bpp = 24; /* MST uses fixed bpp */
> >  	int max_rate, mode_rate, max_lanes, max_link_clock;
> >  
> >  	if (drm_connector_is_unregistered(connector))
> > @@ -414,7 +442,7 @@ intel_dp_mst_mode_valid(struct drm_connector *connector,
> >  	max_lanes = intel_dp_max_lane_count(intel_dp);
> >  
> >  	max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes);
> > -	mode_rate = intel_dp_link_required(mode->clock, bpp);
> > +	mode_rate = intel_dp_link_required(mode->clock, 18);
> >  
> >  	/* TODO - validate mode against available PBN for link */
> >  	if (mode->clock < 10000)
> > diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> > index 40ebc94b2187..fe05ed7ff749 100644
> > --- a/drivers/gpu/drm/i915/intel_drv.h
> > +++ b/drivers/gpu/drm/i915/intel_drv.h
> > @@ -1904,6 +1904,14 @@ void intel_csr_ucode_suspend(struct drm_i915_private *);
> >  void intel_csr_ucode_resume(struct drm_i915_private *);
> >  
> >  /* intel_dp.c */
> > +struct link_config_limits {
> > +	int min_clock, max_clock;
> > +	int min_lane_count, max_lane_count;
> > +	int min_bpp, max_bpp;
> > +};
> > +void intel_dp_adjust_compliance_config(struct intel_dp *intel_dp,
> > +				       struct intel_crtc_state *pipe_config,
> > +				       struct link_config_limits *limits);
> >  bool intel_dp_port_enabled(struct drm_i915_private *dev_priv,
> >  			   i915_reg_t dp_reg, enum port port,
> >  			   enum pipe *pipe);
> 
> -- 
> Jani Nikula, Intel Open Source Graphics Center

-- 
Ville Syrjälä
Intel
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