[PATCH 1/3] drm/i915: Split Pineview device info into desktop and mobile

[PATCH 1/3] drm/i915: Split Pineview device info into desktop and mobile

[Tvrtko Ursulin]

From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

This allows the IS_PINEVIEW_<G|M> macros to be removed and avoid
duplication of device ids already defined in i915_pciids.h.

!IS_MOBILE check can be used in place of existing IS_PINEVIEW_G call
sites.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
---
 arch/x86/kernel/early-quirks.c  |  3 ++-
 drivers/gpu/drm/i915/i915_drv.h |  2 --
 drivers/gpu/drm/i915/i915_pci.c | 12 ++++++++++--
 drivers/gpu/drm/i915/intel_pm.c |  4 ++--
 include/drm/i915_pciids.h       |  6 ++++--
 5 files changed, 18 insertions(+), 9 deletions(-)

diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c
index 50d5848bf22e..f91d3ed2df62 100644
--- a/arch/x86/kernel/early-quirks.c
+++ b/arch/x86/kernel/early-quirks.c
@@ -525,7 +525,8 @@ static const struct pci_device_id intel_early_ids[] __initconst = {
 	INTEL_I945G_IDS(&gen3_early_ops),
 	INTEL_I945GM_IDS(&gen3_early_ops),
 	INTEL_VLV_IDS(&gen6_early_ops),
-	INTEL_PINEVIEW_IDS(&gen3_early_ops),
+	INTEL_PINEVIEW_G_IDS(&gen3_early_ops),
+	INTEL_PINEVIEW_M_IDS(&gen3_early_ops),
 	INTEL_I965G_IDS(&gen3_early_ops),
 	INTEL_G33_IDS(&gen3_early_ops),
 	INTEL_I965GM_IDS(&gen3_early_ops),
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index c65c2e6649df..80388984c9fc 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2296,8 +2296,6 @@ static inline unsigned int i915_sg_segment_size(void)
 #define IS_G45(dev_priv)	IS_PLATFORM(dev_priv, INTEL_G45)
 #define IS_GM45(dev_priv)	IS_PLATFORM(dev_priv, INTEL_GM45)
 #define IS_G4X(dev_priv)	(IS_G45(dev_priv) || IS_GM45(dev_priv))
-#define IS_PINEVIEW_G(dev_priv)	(INTEL_DEVID(dev_priv) == 0xa001)
-#define IS_PINEVIEW_M(dev_priv)	(INTEL_DEVID(dev_priv) == 0xa011)
 #define IS_PINEVIEW(dev_priv)	IS_PLATFORM(dev_priv, INTEL_PINEVIEW)
 #define IS_G33(dev_priv)	IS_PLATFORM(dev_priv, INTEL_G33)
 #define IS_IRONLAKE_M(dev_priv)	(INTEL_DEVID(dev_priv) == 0x0046)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index ef7410c492fd..4fa072a3280f 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -257,7 +257,14 @@ static const struct intel_device_info intel_g33_info = {
 	.display.has_overlay = 1,
 };
 
-static const struct intel_device_info intel_pineview_info = {
+static const struct intel_device_info intel_pineview_g_info = {
+	GEN3_FEATURES,
+	PLATFORM(INTEL_PINEVIEW),
+	.display.has_hotplug = 1,
+	.display.has_overlay = 1,
+};
+
+static const struct intel_device_info intel_pineview_m_info = {
 	GEN3_FEATURES,
 	PLATFORM(INTEL_PINEVIEW),
 	.is_mobile = 1,
@@ -753,7 +760,8 @@ static const struct pci_device_id pciidlist[] = {
 	INTEL_I965GM_IDS(&intel_i965gm_info),
 	INTEL_GM45_IDS(&intel_gm45_info),
 	INTEL_G45_IDS(&intel_g45_info),
-	INTEL_PINEVIEW_IDS(&intel_pineview_info),
+	INTEL_PINEVIEW_G_IDS(&intel_pineview_g_info),
+	INTEL_PINEVIEW_M_IDS(&intel_pineview_m_info),
 	INTEL_IRONLAKE_D_IDS(&intel_ironlake_d_info),
 	INTEL_IRONLAKE_M_IDS(&intel_ironlake_m_info),
 	INTEL_SNB_D_GT1_IDS(&intel_sandybridge_d_gt1_info),
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index d73b13ca57a0..24a34ccabc2a 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -850,7 +850,7 @@ static void pineview_update_wm(struct intel_crtc *unused_crtc)
 	u32 reg;
 	unsigned int wm;
 
-	latency = intel_get_cxsr_latency(IS_PINEVIEW_G(dev_priv),
+	latency = intel_get_cxsr_latency(!IS_MOBILE(dev_priv),
 					 dev_priv->is_ddr3,
 					 dev_priv->fsb_freq,
 					 dev_priv->mem_freq);
@@ -9561,7 +9561,7 @@ void intel_init_pm(struct drm_i915_private *dev_priv)
 		dev_priv->display.initial_watermarks = g4x_initial_watermarks;
 		dev_priv->display.optimize_watermarks = g4x_optimize_watermarks;
 	} else if (IS_PINEVIEW(dev_priv)) {
-		if (!intel_get_cxsr_latency(IS_PINEVIEW_G(dev_priv),
+		if (!intel_get_cxsr_latency(!IS_MOBILE(dev_priv),
 					    dev_priv->is_ddr3,
 					    dev_priv->fsb_freq,
 					    dev_priv->mem_freq)) {
diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
index d200000feeaa..a025ed9fb0be 100644
--- a/include/drm/i915_pciids.h
+++ b/include/drm/i915_pciids.h
@@ -108,8 +108,10 @@
 	INTEL_VGA_DEVICE(0x2e42, info), /* B43_G */ \
 	INTEL_VGA_DEVICE(0x2e92, info)	/* B43_G.1 */
 
-#define INTEL_PINEVIEW_IDS(info)			\
-	INTEL_VGA_DEVICE(0xa001, info),			\
+#define INTEL_PINEVIEW_G_IDS(info) \
+	INTEL_VGA_DEVICE(0xa001, info)
+
+#define INTEL_PINEVIEW_M_IDS(info) \
 	INTEL_VGA_DEVICE(0xa011, info)
 
 #define INTEL_IRONLAKE_D_IDS(info) \
-- 
2.19.1

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[PATCH 2/3] drm/i915: Remove redundant device id from IS_IRONLAKE_M macro

[Tvrtko Ursulin]

From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Check can use the already defined and separate device info for this
platform in conjunction with the IS_MOBILE check. So remove this instance
of device id from the header file.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/i915_drv.h | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 80388984c9fc..2f6bc9670bdf 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2283,6 +2283,8 @@ static inline unsigned int i915_sg_segment_size(void)
 
 #define IS_PLATFORM(dev_priv, p) (INTEL_INFO(dev_priv)->platform_mask & BIT(p))
 
+#define IS_MOBILE(dev_priv)	(INTEL_INFO(dev_priv)->is_mobile)
+
 #define IS_I830(dev_priv)	IS_PLATFORM(dev_priv, INTEL_I830)
 #define IS_I845G(dev_priv)	IS_PLATFORM(dev_priv, INTEL_I845G)
 #define IS_I85X(dev_priv)	IS_PLATFORM(dev_priv, INTEL_I85X)
@@ -2298,7 +2300,9 @@ static inline unsigned int i915_sg_segment_size(void)
 #define IS_G4X(dev_priv)	(IS_G45(dev_priv) || IS_GM45(dev_priv))
 #define IS_PINEVIEW(dev_priv)	IS_PLATFORM(dev_priv, INTEL_PINEVIEW)
 #define IS_G33(dev_priv)	IS_PLATFORM(dev_priv, INTEL_G33)
-#define IS_IRONLAKE_M(dev_priv)	(INTEL_DEVID(dev_priv) == 0x0046)
+#define IS_IRONLAKE(dev_priv)	IS_PLATFORM(dev_priv, INTEL_IRONLAKE)
+#define IS_IRONLAKE_M(dev_priv) \
+	(IS_PLATFORM(dev_priv, INTEL_IRONLAKE) && IS_MOBILE(dev_priv))
 #define IS_IVYBRIDGE(dev_priv)	IS_PLATFORM(dev_priv, INTEL_IVYBRIDGE)
 #define IS_IVB_GT1(dev_priv)	(IS_IVYBRIDGE(dev_priv) && \
 				 INTEL_INFO(dev_priv)->gt == 1)
@@ -2313,7 +2317,6 @@ static inline unsigned int i915_sg_segment_size(void)
 #define IS_COFFEELAKE(dev_priv)	IS_PLATFORM(dev_priv, INTEL_COFFEELAKE)
 #define IS_CANNONLAKE(dev_priv)	IS_PLATFORM(dev_priv, INTEL_CANNONLAKE)
 #define IS_ICELAKE(dev_priv)	IS_PLATFORM(dev_priv, INTEL_ICELAKE)
-#define IS_MOBILE(dev_priv)	(INTEL_INFO(dev_priv)->is_mobile)
 #define IS_HSW_EARLY_SDV(dev_priv) (IS_HASWELL(dev_priv) && \
 				    (INTEL_DEVID(dev_priv) & 0xFF00) == 0x0C00)
 #define IS_BDW_ULT(dev_priv)	(IS_BROADWELL(dev_priv) && \
-- 
2.19.1

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Re: [PATCH 2/3] drm/i915: Remove redundant device id from IS_IRONLAKE_M macro

[Chris Wilson]

Quoting Tvrtko Ursulin (2019-03-18 09:52:57)
> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

> Check can use the already defined and separate device info for this

That doesn't read very well:

IS_IRONLAKE_M can use the already defined intel_device_info.is_mobile
for this platform, so remove the instance of Ironlake's mobile device id
from the header file and replace it with an IS_MOBILE check.

> platform in conjunction with the IS_MOBILE check. So remove this instance
> of device id from the header file.
> 
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
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[PATCH v2 2/3] drm/i915: Remove redundant device id from IS_IRONLAKE_M macro

[Tvrtko Ursulin]

From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

IS_IRONLAKE_M can use the already defined intel_device_info.is_mobile for
this platform, so remove the instance of Ironlake's mobile device id from
the header file and replace it with an IS_MOBILE check.

v2:
 * Improved commit text. (Chris)

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/i915_drv.h | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index fe634d0f1feb..e178acd878ca 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2286,6 +2286,8 @@ static inline unsigned int i915_sg_segment_size(void)
 
 #define IS_PLATFORM(dev_priv, p) (INTEL_INFO(dev_priv)->platform_mask & BIT(p))
 
+#define IS_MOBILE(dev_priv)	(INTEL_INFO(dev_priv)->is_mobile)
+
 #define IS_I830(dev_priv)	IS_PLATFORM(dev_priv, INTEL_I830)
 #define IS_I845G(dev_priv)	IS_PLATFORM(dev_priv, INTEL_I845G)
 #define IS_I85X(dev_priv)	IS_PLATFORM(dev_priv, INTEL_I85X)
@@ -2301,7 +2303,9 @@ static inline unsigned int i915_sg_segment_size(void)
 #define IS_G4X(dev_priv)	(IS_G45(dev_priv) || IS_GM45(dev_priv))
 #define IS_PINEVIEW(dev_priv)	IS_PLATFORM(dev_priv, INTEL_PINEVIEW)
 #define IS_G33(dev_priv)	IS_PLATFORM(dev_priv, INTEL_G33)
-#define IS_IRONLAKE_M(dev_priv)	(INTEL_DEVID(dev_priv) == 0x0046)
+#define IS_IRONLAKE(dev_priv)	IS_PLATFORM(dev_priv, INTEL_IRONLAKE)
+#define IS_IRONLAKE_M(dev_priv) \
+	(IS_PLATFORM(dev_priv, INTEL_IRONLAKE) && IS_MOBILE(dev_priv))
 #define IS_IVYBRIDGE(dev_priv)	IS_PLATFORM(dev_priv, INTEL_IVYBRIDGE)
 #define IS_IVB_GT1(dev_priv)	(IS_IVYBRIDGE(dev_priv) && \
 				 INTEL_INFO(dev_priv)->gt == 1)
@@ -2316,7 +2320,6 @@ static inline unsigned int i915_sg_segment_size(void)
 #define IS_COFFEELAKE(dev_priv)	IS_PLATFORM(dev_priv, INTEL_COFFEELAKE)
 #define IS_CANNONLAKE(dev_priv)	IS_PLATFORM(dev_priv, INTEL_CANNONLAKE)
 #define IS_ICELAKE(dev_priv)	IS_PLATFORM(dev_priv, INTEL_ICELAKE)
-#define IS_MOBILE(dev_priv)	(INTEL_INFO(dev_priv)->is_mobile)
 #define IS_HSW_EARLY_SDV(dev_priv) (IS_HASWELL(dev_priv) && \
 				    (INTEL_DEVID(dev_priv) & 0xFF00) == 0x0C00)
 #define IS_BDW_ULT(dev_priv)	(IS_BROADWELL(dev_priv) && \
-- 
2.19.1

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[PATCH 3/3] drm/i915: Introduce concept of a sub-platform

[Tvrtko Ursulin]

From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Concept of a sub-platform already exist in our code (like ULX and ULT
platform variants and similar),implemented via the macros which check a
list of device ids to determine a match.

With this patch we consolidate device ids checking into a single function
called during early driver load.

A few low bits in the platform mask are reserved for sub-platform
identification and defined as a per-platform namespace.

At the same time it future proofs the platform_mask handling by preparing
the code for easy extending, and tidies the very verbose WARN strings
generated when IS_PLATFORM macros are embedded into a WARN type
statements.

v2: Fixed IS_SUBPLATFORM. Updated commit msg.
v3: Chris was right, there is an ordering problem.

v4:
 * Catch-up with new sub-platforms.
 * Rebase for RUNTIME_INFO.
 * Drop subplatform mask union tricks and convert platform_mask to an
   array for extensibility.

v5:
 * Fix subplatform check.
 * Protect against forgetting to expand subplatform bits.
 * Remove platform enum tallying.
 * Add subplatform to error state. (Chris)
 * Drop macros and just use static inlines.
 * Remove redundant IRONLAKE_M. (Ville)

v6:
 * Split out Ironlake change.
 * Optimize subplatform check.
 * Use __always_inline. (Lucas)
 * Add platform_mask comment. (Paulo)
 * Pass stored runtime info in error capture. (Chris)

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Jose Souza <jose.souza@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
---
The main question here is whether the subplatform concept is an
improvement with regards to cleaning up where we sprinkle device ids
both in the source and during runtime checks.

Size wise it is a small reduction and an improvement in WARN string
readability where IS_PLATFORM checks are used.

tursulin@tursulin-mobl2:~/build/drm-intel$ size i915.ko.*
   text    data     bss     dec     hex filename
1867088   43651    7392 1918131  1d44b3 i915.ko.0
1865851   43651    7392 1916894  1d3fde i915.ko.1

 * Expanding the platform_mask array does not increase the size.

tursulin@tursulin-mobl2:~/build/drm-intel$ scripts/bloat-o-meter i915.ko.0 i915.ko.1
add/remove: 3/2 grow/shrink: 79/122 up/down: 1271/-1643 (-372)
Function                                     old     new   delta
intel_device_info_subplatform_init             -     412    +412
intel_get_gpu_reset                            -      99     +99
intel_atomic_check                          4676    4744     +68
intel_crtc_max_vblank_count.isra               -      64     +64
intel_power_domains_suspend                  588     625     +37
intel_ddi_get_buf_trans_dp                   150     187     +37
intel_sdvo_get_config                        916     946     +30
intel_power_sequencer_reset                  235     263     +28
__err_print_to_sgl                          4075    4100     +25
i9xx_plane_check                             395     417     +22
i915_getparam_ioctl                          600     622     +22
gen5_gt_irq_postinstall                      284     306     +22
gt_init_workarounds                          893     913     +20
intel_crtc_verify_crc_source                 240     258     +18
ilk_load_csc_matrix                          372     389     +17
intel_hdmi_compute_config                   1873    1888     +15
intel_pps_get_registers                      383     397     +14
skl_write_plane_wm                           482     495     +13
ilk_wm_get_hw_state                         1065    1077     +12
intel_dp_init_connector                     3506    3517     +11
snb_gt_irq_handler                           278     288     +10
intel_tile_width_bytes                       277     287     +10
ilk_compute_pipe_wm                         1050    1060     +10
wm_latency_show                              223     232      +9
skl_write_cursor_wm                          332     341      +9
skl_plane_wm_equals                          245     254      +9
skl_pipe_wm_get_hw_state                     495     504      +9
ivybridge_parity_work                        815     824      +9
intel_sdvo_pre_enable                       2129    2138      +9
intel_print_wm_latency                       210     219      +9
intel_plane_atomic_calc_changes             1777    1786      +9
ilk_compute_intermediate_wm                  508     517      +9
i9xx_update_wm                              1142    1151      +9
i9xx_get_initial_plane_config                972     981      +9
i915_setup_sysfs                             441     450      +9
intel_rc6_residency_ns                       637     644      +7
intel_psr_init                               301     308      +7
intel_opregion_setup                        1568    1575      +7
intel_sdvo_dvi_init                          522     528      +6
intel_init_cdclk_hooks                       586     592      +6
intel_hpll_vco                               175     181      +6
intel_has_gpu_reset                           33      39      +6
get_new_crc_ctl_reg                          621     627      +6
skl_allocate_pipe_ddb                       2406    2411      +5
intel_overlay_put_image_ioctl               4833    4838      +5
i9xx_get_pipe_config                        1633    1638      +5
vlv_dsi_init                                1269    1273      +4
intel_enable_dp                              831     835      +4
i915_ggtt_init_hw                            306     310      +4
i915_gem_load_init_fences                    264     268      +4
intel_set_memory_cxsr                        102     105      +3
intel_psr_enable_locked                      912     915      +3
intel_plane_compute_aligned_offset           173     176      +3
intel_init_display_hooks                     668     671      +3
intel_engine_can_store_dword                  48      51      +3
intel_disable_gt_powersave                   897     900      +3
igt_partial_tiling                           928     931      +3
i915_gem_set_tiling_ioctl                    879     882      +3
i915_driver_load                            5593    5596      +3
fence_write                                  577     580      +3
wm_latency_write.isra                        335     337      +2
set_data                                     116     118      +2
set_clock                                    110     112      +2
intel_update_rawclk                          256     258      +2
intel_runtime_suspend                        550     552      +2
intel_plane_pin_fb                           178     180      +2
intel_init_audio_hooks                       119     121      +2
intel_infoframe_init                         323     325      +2
intel_enable_gt_powersave                   6202    6204      +2
intel_device_info_runtime_init              5000    5002      +2
intel_crt_detect                            2185    2187      +2
ilk_increase_wm_latency.constprop            110     112      +2
gen6_rps_idle                                193     195      +2
intel_enable_pipe                            697     698      +1
intel_dp_pre_emphasis_max                    130     131      +1
ilk_wm_max_level                              51      52      +1
icl_combo_phy_aux_power_well_enable          343     344      +1
i9xx_compute_dpll.isra.constprop             276     277      +1
i915_reset                                   934     935      +1
i915_drpc_info                              2145    2146      +1
assert_panel_unlocked                        556     557      +1
__intel_fbc_post_update                     2681    2682      +1
intel_lpe_audio_init                         110     109      -1
intel_irq_init                              1155    1154      -1
intel_init_clock_gating_hooks                426     425      -1
intel_dp_init_panel_power_sequencer_registers     765     764      -1
capture                                     6084    6083      -1
intel_crt_get_modes                          137     135      -2
intel_power_domains_init_hw                 1308    1305      -3
intel_dp_compute_config                     2959    2956      -3
intel_csr_ucode_init                         548     545      -3
i9xx_check_plane_surface                     416     413      -3
i915_gem_detect_bit_6_swizzle                518     515      -3
check_for_unclaimed_mmio                     224     221      -3
intel_valleyview_info                        112     108      -4
intel_uncore_init                           1646    1642      -4
intel_surf_alignment.isra                    154     150      -4
intel_sprite_plane_create                    591     587      -4
intel_skylake_gt4_info                       112     108      -4
intel_skylake_gt3_info                       112     108      -4
intel_skylake_gt2_info                       112     108      -4
intel_skylake_gt1_info                       112     108      -4
intel_setup_gmbus                            702     698      -4
intel_sandybridge_m_gt2_info                 112     108      -4
intel_sandybridge_m_gt1_info                 112     108      -4
intel_sandybridge_d_gt2_info                 112     108      -4
intel_sandybridge_d_gt1_info                 112     108      -4
intel_pineview_m_info                        112     108      -4
intel_pineview_g_info                        112     108      -4
intel_panel_init                             647     643      -4
intel_kabylake_gt3_info                      112     108      -4
intel_kabylake_gt2_info                      112     108      -4
intel_kabylake_gt1_info                      112     108      -4
intel_ivybridge_q_info                       112     108      -4
intel_ivybridge_m_gt2_info                   112     108      -4
intel_ivybridge_m_gt1_info                   112     108      -4
intel_ivybridge_d_gt2_info                   112     108      -4
intel_ivybridge_d_gt1_info                   112     108      -4
intel_ironlake_m_info                        112     108      -4
intel_ironlake_d_info                        112     108      -4
intel_icelake_11_info                        112     108      -4
intel_i965gm_info                            112     108      -4
intel_i965g_info                             112     108      -4
intel_i945gm_info                            112     108      -4
intel_i945g_info                             112     108      -4
intel_i915gm_info                            112     108      -4
intel_i915g_info                             112     108      -4
intel_i865g_info                             112     108      -4
intel_i85x_info                              112     108      -4
intel_i845g_info                             112     108      -4
intel_i830_info                              112     108      -4
intel_haswell_gt3_info                       112     108      -4
intel_haswell_gt2_info                       112     108      -4
intel_haswell_gt1_info                       112     108      -4
intel_gm45_info                              112     108      -4
intel_geminilake_info                        112     108      -4
intel_g45_info                               112     108      -4
intel_g33_info                               112     108      -4
intel_dsi_get_hw_state                       627     623      -4
intel_coffeelake_gt3_info                    112     108      -4
intel_coffeelake_gt2_info                    112     108      -4
intel_coffeelake_gt1_info                    112     108      -4
intel_cherryview_info                        112     108      -4
intel_cannonlake_info                        112     108      -4
intel_broxton_info                           112     108      -4
intel_broadwell_rsvd_info                    112     108      -4
intel_broadwell_gt3_info                     112     108      -4
intel_broadwell_gt2_info                     112     108      -4
intel_broadwell_gt1_info                     112     108      -4
intel_uncore_forcewake_for_reg               889     884      -5
intel_teardown_mchbar                        210     205      -5
intel_read_wm_latency                        720     715      -5
intel_engine_init_ctx_wa                    1262    1257      -5
intel_engine_init_whitelist                  391     385      -6
intel_dp_prepare                             664     658      -6
intel_dp_encoder_reset                       308     302      -6
i915_gem_init_stolen                        2386    2380      -6
i915_drm_suspend_late                        268     262      -6
hsw_crtc_state_ips_capable                   127     121      -6
intel_power_domains_init                     807     800      -7
intel_hpd_pin_default                        106      99      -7
i9xx_hpd_irq_handler                         245     237      -8
i915_save_state                              638     630      -8
i915_rps_boost_info                          843     835      -8
intel_display_print_error_state              821     812      -9
intel_color_check                           1105    1096      -9
i915_ips_status                              214     205      -9
i915_get_crtc_scanoutpos                     580     571      -9
hsw_get_cdclk                                147     138      -9
haswell_get_pipe_config                     3226    3217      -9
gen9_ctx_workarounds_init                    650     641      -9
intel_pipe_config_compare                   5710    5700     -10
intel_crtc_atomic_check                     1302    1292     -10
csr_load_work_fn                             974     964     -10
i915_pm_resume_early                         285     274     -11
ilk_wm_merge.isra                            517     504     -13
gmbus_xfer_read                              644     631     -13
intel_PLL_is_valid                           206     192     -14
edp_notify_handler                           221     207     -14
intel_ddi_get_buf_trans_hdmi                 153     138     -15
i915_sr_status                               334     319     -15
i9xx_setup_backlight                         253     237     -16
ilk_program_watermarks                      2096    2079     -17
intel_update_max_cdclk                       779     761     -18
rcs_engine_wa_init.isra                      770     751     -19
_intel_set_memory_cxsr                       752     733     -19
intel_runtime_resume                         574     554     -20
skl_compute_wm_levels                        994     973     -21
intel_init_pm                               1955    1934     -21
intel_dp_link_down.isra                      675     653     -22
skl_universal_plane_create                   900     876     -24
i9xx_set_pipeconf                            377     350     -27
intel_dp_get_config                          576     543     -33
intel_modeset_init                          6040    6005     -35
intel_crtc_compute_min_cdclk                 460     423     -37
intel_has_gpu_reset.part                      41       -     -41
intel_crtc_vblank_on                          84      43     -41
intel_ddi_get_buf_trans_edp                  392     349     -43
gen8_de_irq_handler                         2221    2178     -43
kbl_get_buf_trans_dp                         130      86     -44
intel_modeset_setup_hw_state                4466    4415     -51
intel_dsi_prepare                           3710    3651     -59
gen8_de_irq_postinstall                      904     826     -78
skl_get_buf_trans_dp                          92       -     -92
intel_gpu_reset                              508     389    -119
intel_pch_type                              1448    1272    -176
Total: Before=1277298, After=1276926, chg -0.03%
---
 drivers/gpu/drm/i915/i915_drv.c          |   8 +-
 drivers/gpu/drm/i915/i915_drv.h          | 124 ++++++++++++++++-------
 drivers/gpu/drm/i915/i915_gpu_error.c    |   3 +
 drivers/gpu/drm/i915/i915_pci.c          |   2 +-
 drivers/gpu/drm/i915/intel_device_info.c |  66 ++++++++++++
 drivers/gpu/drm/i915/intel_device_info.h |  25 ++++-
 6 files changed, 186 insertions(+), 42 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index a3b00ecc58c9..06b967937247 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -863,6 +863,8 @@ static int i915_driver_init_early(struct drm_i915_private *dev_priv)
 	if (i915_inject_load_failure())
 		return -ENODEV;
 
+	intel_device_info_subplatform_init(dev_priv);
+
 	spin_lock_init(&dev_priv->irq_lock);
 	spin_lock_init(&dev_priv->gpu_error.lock);
 	mutex_init(&dev_priv->backlight_lock);
@@ -1752,10 +1754,12 @@ static void i915_welcome_messages(struct drm_i915_private *dev_priv)
 	if (drm_debug & DRM_UT_DRIVER) {
 		struct drm_printer p = drm_debug_printer("i915 device info:");
 
-		drm_printf(&p, "pciid=0x%04x rev=0x%02x platform=%s gen=%i\n",
+		drm_printf(&p, "pciid=0x%04x rev=0x%02x platform=%s (subplatform=0x%x) gen=%i\n",
 			   INTEL_DEVID(dev_priv),
 			   INTEL_REVID(dev_priv),
 			   intel_platform_name(INTEL_INFO(dev_priv)->platform),
+			   intel_subplatform(RUNTIME_INFO(dev_priv),
+					     INTEL_INFO(dev_priv)->platform),
 			   INTEL_GEN(dev_priv));
 
 		intel_device_info_dump_flags(INTEL_INFO(dev_priv), &p);
@@ -1798,8 +1802,6 @@ i915_driver_create(struct pci_dev *pdev, const struct pci_device_id *ent)
 	memcpy(device_info, match_info, sizeof(*device_info));
 	RUNTIME_INFO(i915)->device_id = pdev->device;
 
-	BUILD_BUG_ON(INTEL_MAX_PLATFORMS >
-		     BITS_PER_TYPE(device_info->platform_mask));
 	BUG_ON(device_info->gen > BITS_PER_TYPE(device_info->gen_mask));
 
 	return i915;
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 2f6bc9670bdf..fd5d58abbfba 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2281,7 +2281,68 @@ static inline unsigned int i915_sg_segment_size(void)
 #define IS_REVID(p, since, until) \
 	(INTEL_REVID(p) >= (since) && INTEL_REVID(p) <= (until))
 
-#define IS_PLATFORM(dev_priv, p) (INTEL_INFO(dev_priv)->platform_mask & BIT(p))
+static __always_inline unsigned int
+__platform_mask_index(const struct intel_runtime_info *info,
+		      enum intel_platform p)
+{
+	const unsigned int pbits =
+		BITS_PER_TYPE(info->platform_mask[0]) - INTEL_SUBPLATFORM_BITS;
+
+	/* Expand the platform_mask array if this fails. */
+	BUILD_BUG_ON(INTEL_MAX_PLATFORMS >
+		     pbits * ARRAY_SIZE(info->platform_mask));
+
+	return p / pbits;
+}
+
+static __always_inline unsigned int
+__platform_mask_bit(const struct intel_runtime_info *info,
+		    enum intel_platform p)
+{
+	const unsigned int pbits =
+		BITS_PER_TYPE(info->platform_mask[0]) - INTEL_SUBPLATFORM_BITS;
+
+	return p % pbits + INTEL_SUBPLATFORM_BITS;
+}
+
+static inline u32
+intel_subplatform(const struct intel_runtime_info *info,
+		      enum intel_platform p)
+{
+	const unsigned int pi = __platform_mask_index(info, p);
+
+	return info->platform_mask[pi] & INTEL_SUBPLATFORM_BITS;
+}
+
+static __always_inline bool
+IS_PLATFORM(const struct drm_i915_private *i915, enum intel_platform p)
+{
+	const struct intel_runtime_info *info = RUNTIME_INFO(i915);
+	const unsigned int pi = __platform_mask_index(info, p);
+	const unsigned int pb = __platform_mask_bit(info, p);
+
+	BUILD_BUG_ON(!__builtin_constant_p(p));
+
+	return info->platform_mask[pi] & BIT(pb);
+}
+
+static __always_inline bool
+IS_SUBPLATFORM(const struct drm_i915_private *i915,
+	       enum intel_platform p, unsigned int s)
+{
+	const struct intel_runtime_info *info = RUNTIME_INFO(i915);
+	const unsigned int pi = __platform_mask_index(info, p);
+	const unsigned int pb = __platform_mask_bit(info, p);
+	const unsigned int msb = BITS_PER_TYPE(info->platform_mask[0]) - 1;
+	const u32 mask = info->platform_mask[pi];
+
+	BUILD_BUG_ON(!__builtin_constant_p(p));
+	BUILD_BUG_ON(!__builtin_constant_p(s));
+	BUILD_BUG_ON((s) >= INTEL_SUBPLATFORM_BITS);
+
+	/* Shift and test on the MSB position so sign flag can be used. */
+	return ((mask << (msb - pb)) & (mask << (msb - s))) & BIT(msb);
+}
 
 #define IS_MOBILE(dev_priv)	(INTEL_INFO(dev_priv)->is_mobile)
 
@@ -2301,7 +2362,7 @@ static inline unsigned int i915_sg_segment_size(void)
 #define IS_PINEVIEW(dev_priv)	IS_PLATFORM(dev_priv, INTEL_PINEVIEW)
 #define IS_G33(dev_priv)	IS_PLATFORM(dev_priv, INTEL_G33)
 #define IS_IRONLAKE(dev_priv)	IS_PLATFORM(dev_priv, INTEL_IRONLAKE)
-#define IS_IRONLAKE_M(dev_priv) \
+#define IS_IRONLAKE_M(dev_priv)	\
 	(IS_PLATFORM(dev_priv, INTEL_IRONLAKE) && IS_MOBILE(dev_priv))
 #define IS_IVYBRIDGE(dev_priv)	IS_PLATFORM(dev_priv, INTEL_IVYBRIDGE)
 #define IS_IVB_GT1(dev_priv)	(IS_IVYBRIDGE(dev_priv) && \
@@ -2319,42 +2380,31 @@ static inline unsigned int i915_sg_segment_size(void)
 #define IS_ICELAKE(dev_priv)	IS_PLATFORM(dev_priv, INTEL_ICELAKE)
 #define IS_HSW_EARLY_SDV(dev_priv) (IS_HASWELL(dev_priv) && \
 				    (INTEL_DEVID(dev_priv) & 0xFF00) == 0x0C00)
-#define IS_BDW_ULT(dev_priv)	(IS_BROADWELL(dev_priv) && \
-				 ((INTEL_DEVID(dev_priv) & 0xf) == 0x6 ||	\
-				 (INTEL_DEVID(dev_priv) & 0xf) == 0xb ||	\
-				 (INTEL_DEVID(dev_priv) & 0xf) == 0xe))
-/* ULX machines are also considered ULT. */
-#define IS_BDW_ULX(dev_priv)	(IS_BROADWELL(dev_priv) && \
-				 (INTEL_DEVID(dev_priv) & 0xf) == 0xe)
+#define IS_BDW_ULT(dev_priv) \
+	IS_SUBPLATFORM(dev_priv, INTEL_BROADWELL, INTEL_SUBPLATFORM_ULT)
+#define IS_BDW_ULX(dev_priv) \
+	IS_SUBPLATFORM(dev_priv, INTEL_BROADWELL, INTEL_SUBPLATFORM_ULX)
 #define IS_BDW_GT3(dev_priv)	(IS_BROADWELL(dev_priv) && \
 				 INTEL_INFO(dev_priv)->gt == 3)
-#define IS_HSW_ULT(dev_priv)	(IS_HASWELL(dev_priv) && \
-				 (INTEL_DEVID(dev_priv) & 0xFF00) == 0x0A00)
+#define IS_HSW_ULT(dev_priv) \
+	IS_SUBPLATFORM(dev_priv, INTEL_HASWELL, INTEL_SUBPLATFORM_ULT)
 #define IS_HSW_GT3(dev_priv)	(IS_HASWELL(dev_priv) && \
 				 INTEL_INFO(dev_priv)->gt == 3)
 #define IS_HSW_GT1(dev_priv)	(IS_HASWELL(dev_priv) && \
 				 INTEL_INFO(dev_priv)->gt == 1)
 /* ULX machines are also considered ULT. */
-#define IS_HSW_ULX(dev_priv)	(INTEL_DEVID(dev_priv) == 0x0A0E || \
-				 INTEL_DEVID(dev_priv) == 0x0A1E)
-#define IS_SKL_ULT(dev_priv)	(INTEL_DEVID(dev_priv) == 0x1906 || \
-				 INTEL_DEVID(dev_priv) == 0x1913 || \
-				 INTEL_DEVID(dev_priv) == 0x1916 || \
-				 INTEL_DEVID(dev_priv) == 0x1921 || \
-				 INTEL_DEVID(dev_priv) == 0x1926)
-#define IS_SKL_ULX(dev_priv)	(INTEL_DEVID(dev_priv) == 0x190E || \
-				 INTEL_DEVID(dev_priv) == 0x1915 || \
-				 INTEL_DEVID(dev_priv) == 0x191E)
-#define IS_KBL_ULT(dev_priv)	(INTEL_DEVID(dev_priv) == 0x5906 || \
-				 INTEL_DEVID(dev_priv) == 0x5913 || \
-				 INTEL_DEVID(dev_priv) == 0x5916 || \
-				 INTEL_DEVID(dev_priv) == 0x5921 || \
-				 INTEL_DEVID(dev_priv) == 0x5926)
-#define IS_KBL_ULX(dev_priv)	(INTEL_DEVID(dev_priv) == 0x590E || \
-				 INTEL_DEVID(dev_priv) == 0x5915 || \
-				 INTEL_DEVID(dev_priv) == 0x591E)
-#define IS_AML_ULX(dev_priv)	(INTEL_DEVID(dev_priv) == 0x591C || \
-				 INTEL_DEVID(dev_priv) == 0x87C0)
+#define IS_HSW_ULX(dev_priv) \
+	IS_SUBPLATFORM(dev_priv, INTEL_HASWELL, INTEL_SUBPLATFORM_ULX)
+#define IS_SKL_ULT(dev_priv) \
+	IS_SUBPLATFORM(dev_priv, INTEL_SKYLAKE, INTEL_SUBPLATFORM_ULT)
+#define IS_SKL_ULX(dev_priv) \
+	IS_SUBPLATFORM(dev_priv, INTEL_SKYLAKE, INTEL_SUBPLATFORM_ULX)
+#define IS_KBL_ULT(dev_priv) \
+	IS_SUBPLATFORM(dev_priv, INTEL_KABYLAKE, INTEL_SUBPLATFORM_ULT)
+#define IS_KBL_ULX(dev_priv) \
+	IS_SUBPLATFORM(dev_priv, INTEL_KABYLAKE, INTEL_SUBPLATFORM_ULX)
+#define IS_AML_ULX(dev_priv) \
+	IS_SUBPLATFORM(dev_priv, INTEL_KABYLAKE, INTEL_SUBPLATFORM_AML_ULX)
 #define IS_SKL_GT2(dev_priv)	(IS_SKYLAKE(dev_priv) && \
 				 INTEL_INFO(dev_priv)->gt == 2)
 #define IS_SKL_GT3(dev_priv)	(IS_SKYLAKE(dev_priv) && \
@@ -2365,16 +2415,16 @@ static inline unsigned int i915_sg_segment_size(void)
 				 INTEL_INFO(dev_priv)->gt == 2)
 #define IS_KBL_GT3(dev_priv)	(IS_KABYLAKE(dev_priv) && \
 				 INTEL_INFO(dev_priv)->gt == 3)
-#define IS_CFL_ULT(dev_priv)	(IS_COFFEELAKE(dev_priv) && \
-				 (INTEL_DEVID(dev_priv) & 0x00F0) == 0x00A0)
+#define IS_CFL_ULT(dev_priv) \
+	IS_SUBPLATFORM(dev_priv, INTEL_COFFEELAKE, INTEL_SUBPLATFORM_ULT)
 #define IS_CFL_GT2(dev_priv)	(IS_COFFEELAKE(dev_priv) && \
 				 INTEL_INFO(dev_priv)->gt == 2)
 #define IS_CFL_GT3(dev_priv)	(IS_COFFEELAKE(dev_priv) && \
 				 INTEL_INFO(dev_priv)->gt == 3)
-#define IS_CNL_WITH_PORT_F(dev_priv)   (IS_CANNONLAKE(dev_priv) && \
-					(INTEL_DEVID(dev_priv) & 0x0004) == 0x0004)
-#define IS_ICL_WITH_PORT_F(dev_priv)   (IS_ICELAKE(dev_priv) && \
-					INTEL_DEVID(dev_priv) != 0x8A51)
+#define IS_CNL_WITH_PORT_F(dev_priv) \
+	IS_SUBPLATFORM(dev_priv, INTEL_CANNONLAKE, INTEL_SUBPLATFORM_PORTF)
+#define IS_ICL_WITH_PORT_F(dev_priv) \
+	IS_SUBPLATFORM(dev_priv, INTEL_ICELAKE, INTEL_SUBPLATFORM_PORTF)
 
 #define IS_ALPHA_SUPPORT(intel_info) ((intel_info)->is_alpha_support)
 
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
index 26bac517e383..16a9cfc806df 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -677,6 +677,9 @@ static void __err_print_to_sgl(struct drm_i915_error_state_buf *m,
 	err_printf(m, "Reset count: %u\n", error->reset_count);
 	err_printf(m, "Suspend count: %u\n", error->suspend_count);
 	err_printf(m, "Platform: %s\n", intel_platform_name(error->device_info.platform));
+	err_printf(m, "Subplatform: 0x%x\n",
+		   intel_subplatform(&error->runtime_info,
+				     error->device_info.platform));
 	err_print_pciid(m, m->i915);
 
 	err_printf(m, "IOMMU enabled?: %d\n", error->iommu);
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 4fa072a3280f..216ab56abe38 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -32,7 +32,7 @@
 #include "i915_globals.h"
 #include "i915_selftest.h"
 
-#define PLATFORM(x) .platform = (x), .platform_mask = BIT(x)
+#define PLATFORM(x) .platform = (x)
 #define GEN(x) .gen = (x), .gen_mask = BIT((x) - 1)
 
 #define I845_PIPE_OFFSETS \
diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index eddf83807957..90127eb988f6 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -707,6 +707,72 @@ static u32 read_timestamp_frequency(struct drm_i915_private *dev_priv)
 	return 0;
 }
 
+void intel_device_info_subplatform_init(struct drm_i915_private *i915)
+{
+	const struct intel_device_info *info = INTEL_INFO(i915);
+	const struct intel_runtime_info *rinfo = RUNTIME_INFO(i915);
+	const unsigned int pi = __platform_mask_index(rinfo, info->platform);
+	const unsigned int pb = __platform_mask_bit(rinfo, info->platform);
+	u16 devid = INTEL_DEVID(i915);
+	u32 mask = 0;
+
+	RUNTIME_INFO(i915)->platform_mask[pi] = BIT(pb);
+
+	if (IS_HASWELL(i915)) {
+		if ((devid & 0xFF00) == 0x0A00)
+			mask |= BIT(INTEL_SUBPLATFORM_ULT);
+		/* ULX machines are also considered ULT. */
+		if (devid == 0x0A0E || devid == 0x0A1E)
+			mask |= BIT(INTEL_SUBPLATFORM_ULX);
+	} else if (IS_BROADWELL(i915)) {
+		if ((devid & 0xf) == 0x6 ||
+		    (devid & 0xf) == 0xb ||
+		    (devid & 0xf) == 0xe)
+			mask |= BIT(INTEL_SUBPLATFORM_ULT);
+		/* ULX machines are also considered ULT. */
+		if ((devid & 0xf) == 0xe)
+			mask |= BIT(INTEL_SUBPLATFORM_ULX);
+	} else if (IS_SKYLAKE(i915)) {
+		if (devid == 0x1906 ||
+		    devid == 0x1913 ||
+		    devid == 0x1916 ||
+		    devid == 0x1921 ||
+		    devid == 0x1926)
+			mask |= BIT(INTEL_SUBPLATFORM_ULT);
+		else if (devid == 0x190E ||
+			 devid == 0x1915 ||
+			 devid == 0x191E)
+			mask |= BIT(INTEL_SUBPLATFORM_ULX);
+	} else if (IS_KABYLAKE(i915)) {
+		if (devid == 0x5906 ||
+		    devid == 0x5913 ||
+		    devid == 0x5916 ||
+		    devid == 0x5921 ||
+		    devid == 0x5926)
+			mask |= BIT(INTEL_SUBPLATFORM_ULT);
+		else if (devid == 0x590E ||
+			 devid == 0x5915 ||
+			 devid == 0x591E)
+			mask |= BIT(INTEL_SUBPLATFORM_ULX);
+		else if (devid == 0x591C ||
+			 devid == 0x87C0)
+			mask |= BIT(INTEL_SUBPLATFORM_AML_ULX);
+	} else if (IS_COFFEELAKE(i915)) {
+		if ((devid & 0x00F0) == 0x00A0)
+			mask |= BIT(INTEL_SUBPLATFORM_ULT);
+	} else if (IS_CANNONLAKE(i915)) {
+		if ((devid & 0x0004) == 0x0004)
+			mask |= BIT(INTEL_SUBPLATFORM_PORTF);
+	} else if (IS_ICELAKE(i915)) {
+		if (devid != 0x8A51)
+			mask |= BIT(INTEL_SUBPLATFORM_PORTF);
+	}
+
+	GEM_BUG_ON(mask & ~INTEL_SUBPLATFORM_BITS);
+
+	RUNTIME_INFO(i915)->platform_mask[pi] |= mask;
+}
+
 /**
  * intel_device_info_runtime_init - initialize runtime info
  * @dev_priv: the i915 device
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index 6234570a9b17..5efcc10a8f99 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -76,6 +76,19 @@ enum intel_platform {
 	INTEL_MAX_PLATFORMS
 };
 
+/*
+ * Subplatform bits share the same namespace per parent platform. In other words
+ * it is fine for the same bit to be used on multiple parent platforms.
+ */
+
+#define INTEL_SUBPLATFORM_BITS (3)
+
+#define INTEL_SUBPLATFORM_ULT	  (0)
+#define INTEL_SUBPLATFORM_ULX	  (1)
+#define INTEL_SUBPLATFORM_AML_ULX (2)
+
+#define INTEL_SUBPLATFORM_PORTF (0)
+
 enum intel_ppgtt_type {
 	INTEL_PPGTT_NONE = I915_GEM_PPGTT_NONE,
 	INTEL_PPGTT_ALIASING = I915_GEM_PPGTT_ALIASING,
@@ -159,7 +172,6 @@ struct intel_device_info {
 	intel_engine_mask_t engine_mask; /* Engines supported by the HW */
 
 	enum intel_platform platform;
-	u32 platform_mask;
 
 	enum intel_ppgtt_type ppgtt_type;
 	unsigned int ppgtt_size; /* log2, e.g. 31/32/48 bits */
@@ -196,6 +208,16 @@ struct intel_device_info {
 };
 
 struct intel_runtime_info {
+	/*
+	 * Platform mask is used for optimizing or-ed IS_PLATFORM calls into
+	 * into single runtime conditionals, and also to provide groundwork
+	 * for future per platform, or per SKU build optimizations.
+	 *
+	 * Array can be extended when necessary if the corresponding
+	 * BUILD_BUG_ON is hit.
+	 */
+	u32 platform_mask[1];
+
 	u16 device_id;
 
 	u8 num_sprites[I915_MAX_PIPES];
@@ -270,6 +292,7 @@ static inline void sseu_set_eus(struct sseu_dev_info *sseu,
 
 const char *intel_platform_name(enum intel_platform platform);
 
+void intel_device_info_subplatform_init(struct drm_i915_private *dev_priv);
 void intel_device_info_runtime_init(struct drm_i915_private *dev_priv);
 void intel_device_info_dump_flags(const struct intel_device_info *info,
 				  struct drm_printer *p);
-- 
2.19.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH 3/3] drm/i915: Introduce concept of a sub-platform

[Tvrtko Ursulin]

On 18/03/2019 09:52, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> 
> Concept of a sub-platform already exist in our code (like ULX and ULT
> platform variants and similar),implemented via the macros which check a
> list of device ids to determine a match.
> 
> With this patch we consolidate device ids checking into a single function
> called during early driver load.
> 
> A few low bits in the platform mask are reserved for sub-platform
> identification and defined as a per-platform namespace.
> 
> At the same time it future proofs the platform_mask handling by preparing
> the code for easy extending, and tidies the very verbose WARN strings
> generated when IS_PLATFORM macros are embedded into a WARN type
> statements.
> 
> v2: Fixed IS_SUBPLATFORM. Updated commit msg.
> v3: Chris was right, there is an ordering problem.
> 
> v4:
>   * Catch-up with new sub-platforms.
>   * Rebase for RUNTIME_INFO.
>   * Drop subplatform mask union tricks and convert platform_mask to an
>     array for extensibility.
> 
> v5:
>   * Fix subplatform check.
>   * Protect against forgetting to expand subplatform bits.
>   * Remove platform enum tallying.
>   * Add subplatform to error state. (Chris)
>   * Drop macros and just use static inlines.
>   * Remove redundant IRONLAKE_M. (Ville)
> 
> v6:
>   * Split out Ironlake change.
>   * Optimize subplatform check.
>   * Use __always_inline. (Lucas)
>   * Add platform_mask comment. (Paulo)
>   * Pass stored runtime info in error capture. (Chris)
> 
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> Cc: Jose Souza <jose.souza@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> ---
> The main question here is whether the subplatform concept is an
> improvement with regards to cleaning up where we sprinkle device ids
> both in the source and during runtime checks.

Forgot to stress out that the subplatfrom idea is separate from the 
implementation details - shared u32 array of masks, separate platform 
and subplatform masks, shared u64 platform & subplatform mask.

Regards,

Tvrtko

> Size wise it is a small reduction and an improvement in WARN string
> readability where IS_PLATFORM checks are used.
> 
> tursulin@tursulin-mobl2:~/build/drm-intel$ size i915.ko.*
>     text    data     bss     dec     hex filename
> 1867088   43651    7392 1918131  1d44b3 i915.ko.0
> 1865851   43651    7392 1916894  1d3fde i915.ko.1
> 
>   * Expanding the platform_mask array does not increase the size.
> 
> tursulin@tursulin-mobl2:~/build/drm-intel$ scripts/bloat-o-meter i915.ko.0 i915.ko.1
> add/remove: 3/2 grow/shrink: 79/122 up/down: 1271/-1643 (-372)
> Function                                     old     new   delta
> intel_device_info_subplatform_init             -     412    +412
> intel_get_gpu_reset                            -      99     +99
> intel_atomic_check                          4676    4744     +68
> intel_crtc_max_vblank_count.isra               -      64     +64
> intel_power_domains_suspend                  588     625     +37
> intel_ddi_get_buf_trans_dp                   150     187     +37
> intel_sdvo_get_config                        916     946     +30
> intel_power_sequencer_reset                  235     263     +28
> __err_print_to_sgl                          4075    4100     +25
> i9xx_plane_check                             395     417     +22
> i915_getparam_ioctl                          600     622     +22
> gen5_gt_irq_postinstall                      284     306     +22
> gt_init_workarounds                          893     913     +20
> intel_crtc_verify_crc_source                 240     258     +18
> ilk_load_csc_matrix                          372     389     +17
> intel_hdmi_compute_config                   1873    1888     +15
> intel_pps_get_registers                      383     397     +14
> skl_write_plane_wm                           482     495     +13
> ilk_wm_get_hw_state                         1065    1077     +12
> intel_dp_init_connector                     3506    3517     +11
> snb_gt_irq_handler                           278     288     +10
> intel_tile_width_bytes                       277     287     +10
> ilk_compute_pipe_wm                         1050    1060     +10
> wm_latency_show                              223     232      +9
> skl_write_cursor_wm                          332     341      +9
> skl_plane_wm_equals                          245     254      +9
> skl_pipe_wm_get_hw_state                     495     504      +9
> ivybridge_parity_work                        815     824      +9
> intel_sdvo_pre_enable                       2129    2138      +9
> intel_print_wm_latency                       210     219      +9
> intel_plane_atomic_calc_changes             1777    1786      +9
> ilk_compute_intermediate_wm                  508     517      +9
> i9xx_update_wm                              1142    1151      +9
> i9xx_get_initial_plane_config                972     981      +9
> i915_setup_sysfs                             441     450      +9
> intel_rc6_residency_ns                       637     644      +7
> intel_psr_init                               301     308      +7
> intel_opregion_setup                        1568    1575      +7
> intel_sdvo_dvi_init                          522     528      +6
> intel_init_cdclk_hooks                       586     592      +6
> intel_hpll_vco                               175     181      +6
> intel_has_gpu_reset                           33      39      +6
> get_new_crc_ctl_reg                          621     627      +6
> skl_allocate_pipe_ddb                       2406    2411      +5
> intel_overlay_put_image_ioctl               4833    4838      +5
> i9xx_get_pipe_config                        1633    1638      +5
> vlv_dsi_init                                1269    1273      +4
> intel_enable_dp                              831     835      +4
> i915_ggtt_init_hw                            306     310      +4
> i915_gem_load_init_fences                    264     268      +4
> intel_set_memory_cxsr                        102     105      +3
> intel_psr_enable_locked                      912     915      +3
> intel_plane_compute_aligned_offset           173     176      +3
> intel_init_display_hooks                     668     671      +3
> intel_engine_can_store_dword                  48      51      +3
> intel_disable_gt_powersave                   897     900      +3
> igt_partial_tiling                           928     931      +3
> i915_gem_set_tiling_ioctl                    879     882      +3
> i915_driver_load                            5593    5596      +3
> fence_write                                  577     580      +3
> wm_latency_write.isra                        335     337      +2
> set_data                                     116     118      +2
> set_clock                                    110     112      +2
> intel_update_rawclk                          256     258      +2
> intel_runtime_suspend                        550     552      +2
> intel_plane_pin_fb                           178     180      +2
> intel_init_audio_hooks                       119     121      +2
> intel_infoframe_init                         323     325      +2
> intel_enable_gt_powersave                   6202    6204      +2
> intel_device_info_runtime_init              5000    5002      +2
> intel_crt_detect                            2185    2187      +2
> ilk_increase_wm_latency.constprop            110     112      +2
> gen6_rps_idle                                193     195      +2
> intel_enable_pipe                            697     698      +1
> intel_dp_pre_emphasis_max                    130     131      +1
> ilk_wm_max_level                              51      52      +1
> icl_combo_phy_aux_power_well_enable          343     344      +1
> i9xx_compute_dpll.isra.constprop             276     277      +1
> i915_reset                                   934     935      +1
> i915_drpc_info                              2145    2146      +1
> assert_panel_unlocked                        556     557      +1
> __intel_fbc_post_update                     2681    2682      +1
> intel_lpe_audio_init                         110     109      -1
> intel_irq_init                              1155    1154      -1
> intel_init_clock_gating_hooks                426     425      -1
> intel_dp_init_panel_power_sequencer_registers     765     764      -1
> capture                                     6084    6083      -1
> intel_crt_get_modes                          137     135      -2
> intel_power_domains_init_hw                 1308    1305      -3
> intel_dp_compute_config                     2959    2956      -3
> intel_csr_ucode_init                         548     545      -3
> i9xx_check_plane_surface                     416     413      -3
> i915_gem_detect_bit_6_swizzle                518     515      -3
> check_for_unclaimed_mmio                     224     221      -3
> intel_valleyview_info                        112     108      -4
> intel_uncore_init                           1646    1642      -4
> intel_surf_alignment.isra                    154     150      -4
> intel_sprite_plane_create                    591     587      -4
> intel_skylake_gt4_info                       112     108      -4
> intel_skylake_gt3_info                       112     108      -4
> intel_skylake_gt2_info                       112     108      -4
> intel_skylake_gt1_info                       112     108      -4
> intel_setup_gmbus                            702     698      -4
> intel_sandybridge_m_gt2_info                 112     108      -4
> intel_sandybridge_m_gt1_info                 112     108      -4
> intel_sandybridge_d_gt2_info                 112     108      -4
> intel_sandybridge_d_gt1_info                 112     108      -4
> intel_pineview_m_info                        112     108      -4
> intel_pineview_g_info                        112     108      -4
> intel_panel_init                             647     643      -4
> intel_kabylake_gt3_info                      112     108      -4
> intel_kabylake_gt2_info                      112     108      -4
> intel_kabylake_gt1_info                      112     108      -4
> intel_ivybridge_q_info                       112     108      -4
> intel_ivybridge_m_gt2_info                   112     108      -4
> intel_ivybridge_m_gt1_info                   112     108      -4
> intel_ivybridge_d_gt2_info                   112     108      -4
> intel_ivybridge_d_gt1_info                   112     108      -4
> intel_ironlake_m_info                        112     108      -4
> intel_ironlake_d_info                        112     108      -4
> intel_icelake_11_info                        112     108      -4
> intel_i965gm_info                            112     108      -4
> intel_i965g_info                             112     108      -4
> intel_i945gm_info                            112     108      -4
> intel_i945g_info                             112     108      -4
> intel_i915gm_info                            112     108      -4
> intel_i915g_info                             112     108      -4
> intel_i865g_info                             112     108      -4
> intel_i85x_info                              112     108      -4
> intel_i845g_info                             112     108      -4
> intel_i830_info                              112     108      -4
> intel_haswell_gt3_info                       112     108      -4
> intel_haswell_gt2_info                       112     108      -4
> intel_haswell_gt1_info                       112     108      -4
> intel_gm45_info                              112     108      -4
> intel_geminilake_info                        112     108      -4
> intel_g45_info                               112     108      -4
> intel_g33_info                               112     108      -4
> intel_dsi_get_hw_state                       627     623      -4
> intel_coffeelake_gt3_info                    112     108      -4
> intel_coffeelake_gt2_info                    112     108      -4
> intel_coffeelake_gt1_info                    112     108      -4
> intel_cherryview_info                        112     108      -4
> intel_cannonlake_info                        112     108      -4
> intel_broxton_info                           112     108      -4
> intel_broadwell_rsvd_info                    112     108      -4
> intel_broadwell_gt3_info                     112     108      -4
> intel_broadwell_gt2_info                     112     108      -4
> intel_broadwell_gt1_info                     112     108      -4
> intel_uncore_forcewake_for_reg               889     884      -5
> intel_teardown_mchbar                        210     205      -5
> intel_read_wm_latency                        720     715      -5
> intel_engine_init_ctx_wa                    1262    1257      -5
> intel_engine_init_whitelist                  391     385      -6
> intel_dp_prepare                             664     658      -6
> intel_dp_encoder_reset                       308     302      -6
> i915_gem_init_stolen                        2386    2380      -6
> i915_drm_suspend_late                        268     262      -6
> hsw_crtc_state_ips_capable                   127     121      -6
> intel_power_domains_init                     807     800      -7
> intel_hpd_pin_default                        106      99      -7
> i9xx_hpd_irq_handler                         245     237      -8
> i915_save_state                              638     630      -8
> i915_rps_boost_info                          843     835      -8
> intel_display_print_error_state              821     812      -9
> intel_color_check                           1105    1096      -9
> i915_ips_status                              214     205      -9
> i915_get_crtc_scanoutpos                     580     571      -9
> hsw_get_cdclk                                147     138      -9
> haswell_get_pipe_config                     3226    3217      -9
> gen9_ctx_workarounds_init                    650     641      -9
> intel_pipe_config_compare                   5710    5700     -10
> intel_crtc_atomic_check                     1302    1292     -10
> csr_load_work_fn                             974     964     -10
> i915_pm_resume_early                         285     274     -11
> ilk_wm_merge.isra                            517     504     -13
> gmbus_xfer_read                              644     631     -13
> intel_PLL_is_valid                           206     192     -14
> edp_notify_handler                           221     207     -14
> intel_ddi_get_buf_trans_hdmi                 153     138     -15
> i915_sr_status                               334     319     -15
> i9xx_setup_backlight                         253     237     -16
> ilk_program_watermarks                      2096    2079     -17
> intel_update_max_cdclk                       779     761     -18
> rcs_engine_wa_init.isra                      770     751     -19
> _intel_set_memory_cxsr                       752     733     -19
> intel_runtime_resume                         574     554     -20
> skl_compute_wm_levels                        994     973     -21
> intel_init_pm                               1955    1934     -21
> intel_dp_link_down.isra                      675     653     -22
> skl_universal_plane_create                   900     876     -24
> i9xx_set_pipeconf                            377     350     -27
> intel_dp_get_config                          576     543     -33
> intel_modeset_init                          6040    6005     -35
> intel_crtc_compute_min_cdclk                 460     423     -37
> intel_has_gpu_reset.part                      41       -     -41
> intel_crtc_vblank_on                          84      43     -41
> intel_ddi_get_buf_trans_edp                  392     349     -43
> gen8_de_irq_handler                         2221    2178     -43
> kbl_get_buf_trans_dp                         130      86     -44
> intel_modeset_setup_hw_state                4466    4415     -51
> intel_dsi_prepare                           3710    3651     -59
> gen8_de_irq_postinstall                      904     826     -78
> skl_get_buf_trans_dp                          92       -     -92
> intel_gpu_reset                              508     389    -119
> intel_pch_type                              1448    1272    -176
> Total: Before=1277298, After=1276926, chg -0.03%
> ---
>   drivers/gpu/drm/i915/i915_drv.c          |   8 +-
>   drivers/gpu/drm/i915/i915_drv.h          | 124 ++++++++++++++++-------
>   drivers/gpu/drm/i915/i915_gpu_error.c    |   3 +
>   drivers/gpu/drm/i915/i915_pci.c          |   2 +-
>   drivers/gpu/drm/i915/intel_device_info.c |  66 ++++++++++++
>   drivers/gpu/drm/i915/intel_device_info.h |  25 ++++-
>   6 files changed, 186 insertions(+), 42 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index a3b00ecc58c9..06b967937247 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -863,6 +863,8 @@ static int i915_driver_init_early(struct drm_i915_private *dev_priv)
>   	if (i915_inject_load_failure())
>   		return -ENODEV;
>   
> +	intel_device_info_subplatform_init(dev_priv);
> +
>   	spin_lock_init(&dev_priv->irq_lock);
>   	spin_lock_init(&dev_priv->gpu_error.lock);
>   	mutex_init(&dev_priv->backlight_lock);
> @@ -1752,10 +1754,12 @@ static void i915_welcome_messages(struct drm_i915_private *dev_priv)
>   	if (drm_debug & DRM_UT_DRIVER) {
>   		struct drm_printer p = drm_debug_printer("i915 device info:");
>   
> -		drm_printf(&p, "pciid=0x%04x rev=0x%02x platform=%s gen=%i\n",
> +		drm_printf(&p, "pciid=0x%04x rev=0x%02x platform=%s (subplatform=0x%x) gen=%i\n",
>   			   INTEL_DEVID(dev_priv),
>   			   INTEL_REVID(dev_priv),
>   			   intel_platform_name(INTEL_INFO(dev_priv)->platform),
> +			   intel_subplatform(RUNTIME_INFO(dev_priv),
> +					     INTEL_INFO(dev_priv)->platform),
>   			   INTEL_GEN(dev_priv));
>   
>   		intel_device_info_dump_flags(INTEL_INFO(dev_priv), &p);
> @@ -1798,8 +1802,6 @@ i915_driver_create(struct pci_dev *pdev, const struct pci_device_id *ent)
>   	memcpy(device_info, match_info, sizeof(*device_info));
>   	RUNTIME_INFO(i915)->device_id = pdev->device;
>   
> -	BUILD_BUG_ON(INTEL_MAX_PLATFORMS >
> -		     BITS_PER_TYPE(device_info->platform_mask));
>   	BUG_ON(device_info->gen > BITS_PER_TYPE(device_info->gen_mask));
>   
>   	return i915;
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 2f6bc9670bdf..fd5d58abbfba 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2281,7 +2281,68 @@ static inline unsigned int i915_sg_segment_size(void)
>   #define IS_REVID(p, since, until) \
>   	(INTEL_REVID(p) >= (since) && INTEL_REVID(p) <= (until))
>   
> -#define IS_PLATFORM(dev_priv, p) (INTEL_INFO(dev_priv)->platform_mask & BIT(p))
> +static __always_inline unsigned int
> +__platform_mask_index(const struct intel_runtime_info *info,
> +		      enum intel_platform p)
> +{
> +	const unsigned int pbits =
> +		BITS_PER_TYPE(info->platform_mask[0]) - INTEL_SUBPLATFORM_BITS;
> +
> +	/* Expand the platform_mask array if this fails. */
> +	BUILD_BUG_ON(INTEL_MAX_PLATFORMS >
> +		     pbits * ARRAY_SIZE(info->platform_mask));
> +
> +	return p / pbits;
> +}
> +
> +static __always_inline unsigned int
> +__platform_mask_bit(const struct intel_runtime_info *info,
> +		    enum intel_platform p)
> +{
> +	const unsigned int pbits =
> +		BITS_PER_TYPE(info->platform_mask[0]) - INTEL_SUBPLATFORM_BITS;
> +
> +	return p % pbits + INTEL_SUBPLATFORM_BITS;
> +}
> +
> +static inline u32
> +intel_subplatform(const struct intel_runtime_info *info,
> +		      enum intel_platform p)
> +{
> +	const unsigned int pi = __platform_mask_index(info, p);
> +
> +	return info->platform_mask[pi] & INTEL_SUBPLATFORM_BITS;
> +}
> +
> +static __always_inline bool
> +IS_PLATFORM(const struct drm_i915_private *i915, enum intel_platform p)
> +{
> +	const struct intel_runtime_info *info = RUNTIME_INFO(i915);
> +	const unsigned int pi = __platform_mask_index(info, p);
> +	const unsigned int pb = __platform_mask_bit(info, p);
> +
> +	BUILD_BUG_ON(!__builtin_constant_p(p));
> +
> +	return info->platform_mask[pi] & BIT(pb);
> +}
> +
> +static __always_inline bool
> +IS_SUBPLATFORM(const struct drm_i915_private *i915,
> +	       enum intel_platform p, unsigned int s)
> +{
> +	const struct intel_runtime_info *info = RUNTIME_INFO(i915);
> +	const unsigned int pi = __platform_mask_index(info, p);
> +	const unsigned int pb = __platform_mask_bit(info, p);
> +	const unsigned int msb = BITS_PER_TYPE(info->platform_mask[0]) - 1;
> +	const u32 mask = info->platform_mask[pi];
> +
> +	BUILD_BUG_ON(!__builtin_constant_p(p));
> +	BUILD_BUG_ON(!__builtin_constant_p(s));
> +	BUILD_BUG_ON((s) >= INTEL_SUBPLATFORM_BITS);
> +
> +	/* Shift and test on the MSB position so sign flag can be used. */
> +	return ((mask << (msb - pb)) & (mask << (msb - s))) & BIT(msb);
> +}
>   
>   #define IS_MOBILE(dev_priv)	(INTEL_INFO(dev_priv)->is_mobile)
>   
> @@ -2301,7 +2362,7 @@ static inline unsigned int i915_sg_segment_size(void)
>   #define IS_PINEVIEW(dev_priv)	IS_PLATFORM(dev_priv, INTEL_PINEVIEW)
>   #define IS_G33(dev_priv)	IS_PLATFORM(dev_priv, INTEL_G33)
>   #define IS_IRONLAKE(dev_priv)	IS_PLATFORM(dev_priv, INTEL_IRONLAKE)
> -#define IS_IRONLAKE_M(dev_priv) \
> +#define IS_IRONLAKE_M(dev_priv)	\
>   	(IS_PLATFORM(dev_priv, INTEL_IRONLAKE) && IS_MOBILE(dev_priv))
>   #define IS_IVYBRIDGE(dev_priv)	IS_PLATFORM(dev_priv, INTEL_IVYBRIDGE)
>   #define IS_IVB_GT1(dev_priv)	(IS_IVYBRIDGE(dev_priv) && \
> @@ -2319,42 +2380,31 @@ static inline unsigned int i915_sg_segment_size(void)
>   #define IS_ICELAKE(dev_priv)	IS_PLATFORM(dev_priv, INTEL_ICELAKE)
>   #define IS_HSW_EARLY_SDV(dev_priv) (IS_HASWELL(dev_priv) && \
>   				    (INTEL_DEVID(dev_priv) & 0xFF00) == 0x0C00)
> -#define IS_BDW_ULT(dev_priv)	(IS_BROADWELL(dev_priv) && \
> -				 ((INTEL_DEVID(dev_priv) & 0xf) == 0x6 ||	\
> -				 (INTEL_DEVID(dev_priv) & 0xf) == 0xb ||	\
> -				 (INTEL_DEVID(dev_priv) & 0xf) == 0xe))
> -/* ULX machines are also considered ULT. */
> -#define IS_BDW_ULX(dev_priv)	(IS_BROADWELL(dev_priv) && \
> -				 (INTEL_DEVID(dev_priv) & 0xf) == 0xe)
> +#define IS_BDW_ULT(dev_priv) \
> +	IS_SUBPLATFORM(dev_priv, INTEL_BROADWELL, INTEL_SUBPLATFORM_ULT)
> +#define IS_BDW_ULX(dev_priv) \
> +	IS_SUBPLATFORM(dev_priv, INTEL_BROADWELL, INTEL_SUBPLATFORM_ULX)
>   #define IS_BDW_GT3(dev_priv)	(IS_BROADWELL(dev_priv) && \
>   				 INTEL_INFO(dev_priv)->gt == 3)
> -#define IS_HSW_ULT(dev_priv)	(IS_HASWELL(dev_priv) && \
> -				 (INTEL_DEVID(dev_priv) & 0xFF00) == 0x0A00)
> +#define IS_HSW_ULT(dev_priv) \
> +	IS_SUBPLATFORM(dev_priv, INTEL_HASWELL, INTEL_SUBPLATFORM_ULT)
>   #define IS_HSW_GT3(dev_priv)	(IS_HASWELL(dev_priv) && \
>   				 INTEL_INFO(dev_priv)->gt == 3)
>   #define IS_HSW_GT1(dev_priv)	(IS_HASWELL(dev_priv) && \
>   				 INTEL_INFO(dev_priv)->gt == 1)
>   /* ULX machines are also considered ULT. */
> -#define IS_HSW_ULX(dev_priv)	(INTEL_DEVID(dev_priv) == 0x0A0E || \
> -				 INTEL_DEVID(dev_priv) == 0x0A1E)
> -#define IS_SKL_ULT(dev_priv)	(INTEL_DEVID(dev_priv) == 0x1906 || \
> -				 INTEL_DEVID(dev_priv) == 0x1913 || \
> -				 INTEL_DEVID(dev_priv) == 0x1916 || \
> -				 INTEL_DEVID(dev_priv) == 0x1921 || \
> -				 INTEL_DEVID(dev_priv) == 0x1926)
> -#define IS_SKL_ULX(dev_priv)	(INTEL_DEVID(dev_priv) == 0x190E || \
> -				 INTEL_DEVID(dev_priv) == 0x1915 || \
> -				 INTEL_DEVID(dev_priv) == 0x191E)
> -#define IS_KBL_ULT(dev_priv)	(INTEL_DEVID(dev_priv) == 0x5906 || \
> -				 INTEL_DEVID(dev_priv) == 0x5913 || \
> -				 INTEL_DEVID(dev_priv) == 0x5916 || \
> -				 INTEL_DEVID(dev_priv) == 0x5921 || \
> -				 INTEL_DEVID(dev_priv) == 0x5926)
> -#define IS_KBL_ULX(dev_priv)	(INTEL_DEVID(dev_priv) == 0x590E || \
> -				 INTEL_DEVID(dev_priv) == 0x5915 || \
> -				 INTEL_DEVID(dev_priv) == 0x591E)
> -#define IS_AML_ULX(dev_priv)	(INTEL_DEVID(dev_priv) == 0x591C || \
> -				 INTEL_DEVID(dev_priv) == 0x87C0)
> +#define IS_HSW_ULX(dev_priv) \
> +	IS_SUBPLATFORM(dev_priv, INTEL_HASWELL, INTEL_SUBPLATFORM_ULX)
> +#define IS_SKL_ULT(dev_priv) \
> +	IS_SUBPLATFORM(dev_priv, INTEL_SKYLAKE, INTEL_SUBPLATFORM_ULT)
> +#define IS_SKL_ULX(dev_priv) \
> +	IS_SUBPLATFORM(dev_priv, INTEL_SKYLAKE, INTEL_SUBPLATFORM_ULX)
> +#define IS_KBL_ULT(dev_priv) \
> +	IS_SUBPLATFORM(dev_priv, INTEL_KABYLAKE, INTEL_SUBPLATFORM_ULT)
> +#define IS_KBL_ULX(dev_priv) \
> +	IS_SUBPLATFORM(dev_priv, INTEL_KABYLAKE, INTEL_SUBPLATFORM_ULX)
> +#define IS_AML_ULX(dev_priv) \
> +	IS_SUBPLATFORM(dev_priv, INTEL_KABYLAKE, INTEL_SUBPLATFORM_AML_ULX)
>   #define IS_SKL_GT2(dev_priv)	(IS_SKYLAKE(dev_priv) && \
>   				 INTEL_INFO(dev_priv)->gt == 2)
>   #define IS_SKL_GT3(dev_priv)	(IS_SKYLAKE(dev_priv) && \
> @@ -2365,16 +2415,16 @@ static inline unsigned int i915_sg_segment_size(void)
>   				 INTEL_INFO(dev_priv)->gt == 2)
>   #define IS_KBL_GT3(dev_priv)	(IS_KABYLAKE(dev_priv) && \
>   				 INTEL_INFO(dev_priv)->gt == 3)
> -#define IS_CFL_ULT(dev_priv)	(IS_COFFEELAKE(dev_priv) && \
> -				 (INTEL_DEVID(dev_priv) & 0x00F0) == 0x00A0)
> +#define IS_CFL_ULT(dev_priv) \
> +	IS_SUBPLATFORM(dev_priv, INTEL_COFFEELAKE, INTEL_SUBPLATFORM_ULT)
>   #define IS_CFL_GT2(dev_priv)	(IS_COFFEELAKE(dev_priv) && \
>   				 INTEL_INFO(dev_priv)->gt == 2)
>   #define IS_CFL_GT3(dev_priv)	(IS_COFFEELAKE(dev_priv) && \
>   				 INTEL_INFO(dev_priv)->gt == 3)
> -#define IS_CNL_WITH_PORT_F(dev_priv)   (IS_CANNONLAKE(dev_priv) && \
> -					(INTEL_DEVID(dev_priv) & 0x0004) == 0x0004)
> -#define IS_ICL_WITH_PORT_F(dev_priv)   (IS_ICELAKE(dev_priv) && \
> -					INTEL_DEVID(dev_priv) != 0x8A51)
> +#define IS_CNL_WITH_PORT_F(dev_priv) \
> +	IS_SUBPLATFORM(dev_priv, INTEL_CANNONLAKE, INTEL_SUBPLATFORM_PORTF)
> +#define IS_ICL_WITH_PORT_F(dev_priv) \
> +	IS_SUBPLATFORM(dev_priv, INTEL_ICELAKE, INTEL_SUBPLATFORM_PORTF)
>   
>   #define IS_ALPHA_SUPPORT(intel_info) ((intel_info)->is_alpha_support)
>   
> diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
> index 26bac517e383..16a9cfc806df 100644
> --- a/drivers/gpu/drm/i915/i915_gpu_error.c
> +++ b/drivers/gpu/drm/i915/i915_gpu_error.c
> @@ -677,6 +677,9 @@ static void __err_print_to_sgl(struct drm_i915_error_state_buf *m,
>   	err_printf(m, "Reset count: %u\n", error->reset_count);
>   	err_printf(m, "Suspend count: %u\n", error->suspend_count);
>   	err_printf(m, "Platform: %s\n", intel_platform_name(error->device_info.platform));
> +	err_printf(m, "Subplatform: 0x%x\n",
> +		   intel_subplatform(&error->runtime_info,
> +				     error->device_info.platform));
>   	err_print_pciid(m, m->i915);
>   
>   	err_printf(m, "IOMMU enabled?: %d\n", error->iommu);
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index 4fa072a3280f..216ab56abe38 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -32,7 +32,7 @@
>   #include "i915_globals.h"
>   #include "i915_selftest.h"
>   
> -#define PLATFORM(x) .platform = (x), .platform_mask = BIT(x)
> +#define PLATFORM(x) .platform = (x)
>   #define GEN(x) .gen = (x), .gen_mask = BIT((x) - 1)
>   
>   #define I845_PIPE_OFFSETS \
> diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
> index eddf83807957..90127eb988f6 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.c
> +++ b/drivers/gpu/drm/i915/intel_device_info.c
> @@ -707,6 +707,72 @@ static u32 read_timestamp_frequency(struct drm_i915_private *dev_priv)
>   	return 0;
>   }
>   
> +void intel_device_info_subplatform_init(struct drm_i915_private *i915)
> +{
> +	const struct intel_device_info *info = INTEL_INFO(i915);
> +	const struct intel_runtime_info *rinfo = RUNTIME_INFO(i915);
> +	const unsigned int pi = __platform_mask_index(rinfo, info->platform);
> +	const unsigned int pb = __platform_mask_bit(rinfo, info->platform);
> +	u16 devid = INTEL_DEVID(i915);
> +	u32 mask = 0;
> +
> +	RUNTIME_INFO(i915)->platform_mask[pi] = BIT(pb);
> +
> +	if (IS_HASWELL(i915)) {
> +		if ((devid & 0xFF00) == 0x0A00)
> +			mask |= BIT(INTEL_SUBPLATFORM_ULT);
> +		/* ULX machines are also considered ULT. */
> +		if (devid == 0x0A0E || devid == 0x0A1E)
> +			mask |= BIT(INTEL_SUBPLATFORM_ULX);
> +	} else if (IS_BROADWELL(i915)) {
> +		if ((devid & 0xf) == 0x6 ||
> +		    (devid & 0xf) == 0xb ||
> +		    (devid & 0xf) == 0xe)
> +			mask |= BIT(INTEL_SUBPLATFORM_ULT);
> +		/* ULX machines are also considered ULT. */
> +		if ((devid & 0xf) == 0xe)
> +			mask |= BIT(INTEL_SUBPLATFORM_ULX);
> +	} else if (IS_SKYLAKE(i915)) {
> +		if (devid == 0x1906 ||
> +		    devid == 0x1913 ||
> +		    devid == 0x1916 ||
> +		    devid == 0x1921 ||
> +		    devid == 0x1926)
> +			mask |= BIT(INTEL_SUBPLATFORM_ULT);
> +		else if (devid == 0x190E ||
> +			 devid == 0x1915 ||
> +			 devid == 0x191E)
> +			mask |= BIT(INTEL_SUBPLATFORM_ULX);
> +	} else if (IS_KABYLAKE(i915)) {
> +		if (devid == 0x5906 ||
> +		    devid == 0x5913 ||
> +		    devid == 0x5916 ||
> +		    devid == 0x5921 ||
> +		    devid == 0x5926)
> +			mask |= BIT(INTEL_SUBPLATFORM_ULT);
> +		else if (devid == 0x590E ||
> +			 devid == 0x5915 ||
> +			 devid == 0x591E)
> +			mask |= BIT(INTEL_SUBPLATFORM_ULX);
> +		else if (devid == 0x591C ||
> +			 devid == 0x87C0)
> +			mask |= BIT(INTEL_SUBPLATFORM_AML_ULX);
> +	} else if (IS_COFFEELAKE(i915)) {
> +		if ((devid & 0x00F0) == 0x00A0)
> +			mask |= BIT(INTEL_SUBPLATFORM_ULT);
> +	} else if (IS_CANNONLAKE(i915)) {
> +		if ((devid & 0x0004) == 0x0004)
> +			mask |= BIT(INTEL_SUBPLATFORM_PORTF);
> +	} else if (IS_ICELAKE(i915)) {
> +		if (devid != 0x8A51)
> +			mask |= BIT(INTEL_SUBPLATFORM_PORTF);
> +	}
> +
> +	GEM_BUG_ON(mask & ~INTEL_SUBPLATFORM_BITS);
> +
> +	RUNTIME_INFO(i915)->platform_mask[pi] |= mask;
> +}
> +
>   /**
>    * intel_device_info_runtime_init - initialize runtime info
>    * @dev_priv: the i915 device
> diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
> index 6234570a9b17..5efcc10a8f99 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.h
> +++ b/drivers/gpu/drm/i915/intel_device_info.h
> @@ -76,6 +76,19 @@ enum intel_platform {
>   	INTEL_MAX_PLATFORMS
>   };
>   
> +/*
> + * Subplatform bits share the same namespace per parent platform. In other words
> + * it is fine for the same bit to be used on multiple parent platforms.
> + */
> +
> +#define INTEL_SUBPLATFORM_BITS (3)
> +
> +#define INTEL_SUBPLATFORM_ULT	  (0)
> +#define INTEL_SUBPLATFORM_ULX	  (1)
> +#define INTEL_SUBPLATFORM_AML_ULX (2)
> +
> +#define INTEL_SUBPLATFORM_PORTF (0)
> +
>   enum intel_ppgtt_type {
>   	INTEL_PPGTT_NONE = I915_GEM_PPGTT_NONE,
>   	INTEL_PPGTT_ALIASING = I915_GEM_PPGTT_ALIASING,
> @@ -159,7 +172,6 @@ struct intel_device_info {
>   	intel_engine_mask_t engine_mask; /* Engines supported by the HW */
>   
>   	enum intel_platform platform;
> -	u32 platform_mask;
>   
>   	enum intel_ppgtt_type ppgtt_type;
>   	unsigned int ppgtt_size; /* log2, e.g. 31/32/48 bits */
> @@ -196,6 +208,16 @@ struct intel_device_info {
>   };
>   
>   struct intel_runtime_info {
> +	/*
> +	 * Platform mask is used for optimizing or-ed IS_PLATFORM calls into
> +	 * into single runtime conditionals, and also to provide groundwork
> +	 * for future per platform, or per SKU build optimizations.
> +	 *
> +	 * Array can be extended when necessary if the corresponding
> +	 * BUILD_BUG_ON is hit.
> +	 */
> +	u32 platform_mask[1];
> +
>   	u16 device_id;
>   
>   	u8 num_sprites[I915_MAX_PIPES];
> @@ -270,6 +292,7 @@ static inline void sseu_set_eus(struct sseu_dev_info *sseu,
>   
>   const char *intel_platform_name(enum intel_platform platform);
>   
> +void intel_device_info_subplatform_init(struct drm_i915_private *dev_priv);
>   void intel_device_info_runtime_init(struct drm_i915_private *dev_priv);
>   void intel_device_info_dump_flags(const struct intel_device_info *info,
>   				  struct drm_printer *p);
> 
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Re: [PATCH 3/3] drm/i915: Introduce concept of a sub-platform

[Chris Wilson]

Quoting Tvrtko Ursulin (2019-03-18 09:52:58)
> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> 
> Concept of a sub-platform already exist in our code (like ULX and ULT
> platform variants and similar),implemented via the macros which check a
> list of device ids to determine a match.
> 
> With this patch we consolidate device ids checking into a single function
> called during early driver load.
> 
> A few low bits in the platform mask are reserved for sub-platform
> identification and defined as a per-platform namespace.
> 
> At the same time it future proofs the platform_mask handling by preparing
> the code for easy extending, and tidies the very verbose WARN strings
> generated when IS_PLATFORM macros are embedded into a WARN type
> statements.
> 
> v2: Fixed IS_SUBPLATFORM. Updated commit msg.
> v3: Chris was right, there is an ordering problem.
> 
> v4:
>  * Catch-up with new sub-platforms.
>  * Rebase for RUNTIME_INFO.
>  * Drop subplatform mask union tricks and convert platform_mask to an
>    array for extensibility.
> 
> v5:
>  * Fix subplatform check.
>  * Protect against forgetting to expand subplatform bits.
>  * Remove platform enum tallying.
>  * Add subplatform to error state. (Chris)
>  * Drop macros and just use static inlines.
>  * Remove redundant IRONLAKE_M. (Ville)
> 
> v6:
>  * Split out Ironlake change.
>  * Optimize subplatform check.
>  * Use __always_inline. (Lucas)
>  * Add platform_mask comment. (Paulo)
>  * Pass stored runtime info in error capture. (Chris)
> 
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> Cc: Jose Souza <jose.souza@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> ---
> The main question here is whether the subplatform concept is an
> improvement with regards to cleaning up where we sprinkle device ids
> both in the source and during runtime checks.

I am strongly in favour of avoiding device-id checks, and much prefer
that we generalise into feature tests; subplatform looks like an easy
step forward.

The doubt is over whether or not we want to open-code bitmap.h. The
clear advantage of doing so (for what are a couple of small routines) is
that we avoid spilling out-of-line as soon as we hit the next boundary
on platform types. Plus it also ties into our desire for single sku dce.

So I think for those 2 reasons, having the bit test opencoded is sane.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
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Re: [PATCH 1/3] drm/i915: Split Pineview device info into desktop and mobile

[Chris Wilson]

Quoting Tvrtko Ursulin (2019-03-18 09:52:56)
> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> 
> This allows the IS_PINEVIEW_<G|M> macros to be removed and avoid
> duplication of device ids already defined in i915_pciids.h.
> 
> !IS_MOBILE check can be used in place of existing IS_PINEVIEW_G call
> sites.
> 
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>

I'll let Ville decide or not, but the conversion looks correct for me.
All IS_PINEVIEW* accounted for.

I am suspicious of the IS_PINEVIEW in i9xx_setup_backlight, but it's
probably just that the desktop chipset can't reach that far.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
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Re: [PATCH 1/3] drm/i915: Split Pineview device info into desktop and mobile

[Ville Syrjälä]

On Mon, Mar 18, 2019 at 09:52:56AM +0000, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> 
> This allows the IS_PINEVIEW_<G|M> macros to be removed and avoid
> duplication of device ids already defined in i915_pciids.h.
> 
> !IS_MOBILE check can be used in place of existing IS_PINEVIEW_G call
> sites.
> 
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> ---
>  arch/x86/kernel/early-quirks.c  |  3 ++-
>  drivers/gpu/drm/i915/i915_drv.h |  2 --
>  drivers/gpu/drm/i915/i915_pci.c | 12 ++++++++++--
>  drivers/gpu/drm/i915/intel_pm.c |  4 ++--
>  include/drm/i915_pciids.h       |  6 ++++--
>  5 files changed, 18 insertions(+), 9 deletions(-)
> 
> diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c
> index 50d5848bf22e..f91d3ed2df62 100644
> --- a/arch/x86/kernel/early-quirks.c
> +++ b/arch/x86/kernel/early-quirks.c
> @@ -525,7 +525,8 @@ static const struct pci_device_id intel_early_ids[] __initconst = {
>  	INTEL_I945G_IDS(&gen3_early_ops),
>  	INTEL_I945GM_IDS(&gen3_early_ops),
>  	INTEL_VLV_IDS(&gen6_early_ops),
> -	INTEL_PINEVIEW_IDS(&gen3_early_ops),
> +	INTEL_PINEVIEW_G_IDS(&gen3_early_ops),
> +	INTEL_PINEVIEW_M_IDS(&gen3_early_ops),
>  	INTEL_I965G_IDS(&gen3_early_ops),
>  	INTEL_G33_IDS(&gen3_early_ops),
>  	INTEL_I965GM_IDS(&gen3_early_ops),
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index c65c2e6649df..80388984c9fc 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2296,8 +2296,6 @@ static inline unsigned int i915_sg_segment_size(void)
>  #define IS_G45(dev_priv)	IS_PLATFORM(dev_priv, INTEL_G45)
>  #define IS_GM45(dev_priv)	IS_PLATFORM(dev_priv, INTEL_GM45)
>  #define IS_G4X(dev_priv)	(IS_G45(dev_priv) || IS_GM45(dev_priv))
> -#define IS_PINEVIEW_G(dev_priv)	(INTEL_DEVID(dev_priv) == 0xa001)
> -#define IS_PINEVIEW_M(dev_priv)	(INTEL_DEVID(dev_priv) == 0xa011)
>  #define IS_PINEVIEW(dev_priv)	IS_PLATFORM(dev_priv, INTEL_PINEVIEW)
>  #define IS_G33(dev_priv)	IS_PLATFORM(dev_priv, INTEL_G33)
>  #define IS_IRONLAKE_M(dev_priv)	(INTEL_DEVID(dev_priv) == 0x0046)
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index ef7410c492fd..4fa072a3280f 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -257,7 +257,14 @@ static const struct intel_device_info intel_g33_info = {
>  	.display.has_overlay = 1,
>  };
>  
> -static const struct intel_device_info intel_pineview_info = {
> +static const struct intel_device_info intel_pineview_g_info = {
> +	GEN3_FEATURES,
> +	PLATFORM(INTEL_PINEVIEW),
> +	.display.has_hotplug = 1,
> +	.display.has_overlay = 1,
> +};

So far both PNVs were marked as "mobile". So the real concern is
whether all the current IS_MOBILE() checks correct for pnv_g.

A quick scan points at these potentially being broken by this change:
 i915_gem_detect_bit_6_swizzle()
 i915_enable_asle_pipestat()
 i9xx_enable_pll()/assert_panel_unlocked()
 i9xx_get_pfit_config()

Also intel_hpll_vco() would change behaviour, but I don't think
we actually use this one pnv. I just added the pnv case there
when trawling the old configdb for the details.

> +
> +static const struct intel_device_info intel_pineview_m_info = {
>  	GEN3_FEATURES,
>  	PLATFORM(INTEL_PINEVIEW),
>  	.is_mobile = 1,
> @@ -753,7 +760,8 @@ static const struct pci_device_id pciidlist[] = {
>  	INTEL_I965GM_IDS(&intel_i965gm_info),
>  	INTEL_GM45_IDS(&intel_gm45_info),
>  	INTEL_G45_IDS(&intel_g45_info),
> -	INTEL_PINEVIEW_IDS(&intel_pineview_info),
> +	INTEL_PINEVIEW_G_IDS(&intel_pineview_g_info),
> +	INTEL_PINEVIEW_M_IDS(&intel_pineview_m_info),
>  	INTEL_IRONLAKE_D_IDS(&intel_ironlake_d_info),
>  	INTEL_IRONLAKE_M_IDS(&intel_ironlake_m_info),
>  	INTEL_SNB_D_GT1_IDS(&intel_sandybridge_d_gt1_info),
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index d73b13ca57a0..24a34ccabc2a 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -850,7 +850,7 @@ static void pineview_update_wm(struct intel_crtc *unused_crtc)
>  	u32 reg;
>  	unsigned int wm;
>  
> -	latency = intel_get_cxsr_latency(IS_PINEVIEW_G(dev_priv),
> +	latency = intel_get_cxsr_latency(!IS_MOBILE(dev_priv),
>  					 dev_priv->is_ddr3,
>  					 dev_priv->fsb_freq,
>  					 dev_priv->mem_freq);
> @@ -9561,7 +9561,7 @@ void intel_init_pm(struct drm_i915_private *dev_priv)
>  		dev_priv->display.initial_watermarks = g4x_initial_watermarks;
>  		dev_priv->display.optimize_watermarks = g4x_optimize_watermarks;
>  	} else if (IS_PINEVIEW(dev_priv)) {
> -		if (!intel_get_cxsr_latency(IS_PINEVIEW_G(dev_priv),
> +		if (!intel_get_cxsr_latency(!IS_MOBILE(dev_priv),
>  					    dev_priv->is_ddr3,
>  					    dev_priv->fsb_freq,
>  					    dev_priv->mem_freq)) {
> diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
> index d200000feeaa..a025ed9fb0be 100644
> --- a/include/drm/i915_pciids.h
> +++ b/include/drm/i915_pciids.h
> @@ -108,8 +108,10 @@
>  	INTEL_VGA_DEVICE(0x2e42, info), /* B43_G */ \
>  	INTEL_VGA_DEVICE(0x2e92, info)	/* B43_G.1 */
>  
> -#define INTEL_PINEVIEW_IDS(info)			\
> -	INTEL_VGA_DEVICE(0xa001, info),			\
> +#define INTEL_PINEVIEW_G_IDS(info) \
> +	INTEL_VGA_DEVICE(0xa001, info)
> +
> +#define INTEL_PINEVIEW_M_IDS(info) \
>  	INTEL_VGA_DEVICE(0xa011, info)
>  
>  #define INTEL_IRONLAKE_D_IDS(info) \
> -- 
> 2.19.1

-- 
Ville Syrjälä
Intel
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Re: [PATCH 1/3] drm/i915: Split Pineview device info into desktop and mobile

[Tvrtko Ursulin]

On 18/03/2019 13:56, Ville Syrjälä wrote:
> On Mon, Mar 18, 2019 at 09:52:56AM +0000, Tvrtko Ursulin wrote:
>> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>>
>> This allows the IS_PINEVIEW_<G|M> macros to be removed and avoid
>> duplication of device ids already defined in i915_pciids.h.
>>
>> !IS_MOBILE check can be used in place of existing IS_PINEVIEW_G call
>> sites.
>>
>> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>> Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> Cc: Chris Wilson <chris@chris-wilson.co.uk>
>> ---
>>   arch/x86/kernel/early-quirks.c  |  3 ++-
>>   drivers/gpu/drm/i915/i915_drv.h |  2 --
>>   drivers/gpu/drm/i915/i915_pci.c | 12 ++++++++++--
>>   drivers/gpu/drm/i915/intel_pm.c |  4 ++--
>>   include/drm/i915_pciids.h       |  6 ++++--
>>   5 files changed, 18 insertions(+), 9 deletions(-)
>>
>> diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c
>> index 50d5848bf22e..f91d3ed2df62 100644
>> --- a/arch/x86/kernel/early-quirks.c
>> +++ b/arch/x86/kernel/early-quirks.c
>> @@ -525,7 +525,8 @@ static const struct pci_device_id intel_early_ids[] __initconst = {
>>   	INTEL_I945G_IDS(&gen3_early_ops),
>>   	INTEL_I945GM_IDS(&gen3_early_ops),
>>   	INTEL_VLV_IDS(&gen6_early_ops),
>> -	INTEL_PINEVIEW_IDS(&gen3_early_ops),
>> +	INTEL_PINEVIEW_G_IDS(&gen3_early_ops),
>> +	INTEL_PINEVIEW_M_IDS(&gen3_early_ops),
>>   	INTEL_I965G_IDS(&gen3_early_ops),
>>   	INTEL_G33_IDS(&gen3_early_ops),
>>   	INTEL_I965GM_IDS(&gen3_early_ops),
>> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
>> index c65c2e6649df..80388984c9fc 100644
>> --- a/drivers/gpu/drm/i915/i915_drv.h
>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>> @@ -2296,8 +2296,6 @@ static inline unsigned int i915_sg_segment_size(void)
>>   #define IS_G45(dev_priv)	IS_PLATFORM(dev_priv, INTEL_G45)
>>   #define IS_GM45(dev_priv)	IS_PLATFORM(dev_priv, INTEL_GM45)
>>   #define IS_G4X(dev_priv)	(IS_G45(dev_priv) || IS_GM45(dev_priv))
>> -#define IS_PINEVIEW_G(dev_priv)	(INTEL_DEVID(dev_priv) == 0xa001)
>> -#define IS_PINEVIEW_M(dev_priv)	(INTEL_DEVID(dev_priv) == 0xa011)
>>   #define IS_PINEVIEW(dev_priv)	IS_PLATFORM(dev_priv, INTEL_PINEVIEW)
>>   #define IS_G33(dev_priv)	IS_PLATFORM(dev_priv, INTEL_G33)
>>   #define IS_IRONLAKE_M(dev_priv)	(INTEL_DEVID(dev_priv) == 0x0046)
>> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
>> index ef7410c492fd..4fa072a3280f 100644
>> --- a/drivers/gpu/drm/i915/i915_pci.c
>> +++ b/drivers/gpu/drm/i915/i915_pci.c
>> @@ -257,7 +257,14 @@ static const struct intel_device_info intel_g33_info = {
>>   	.display.has_overlay = 1,
>>   };
>>   
>> -static const struct intel_device_info intel_pineview_info = {
>> +static const struct intel_device_info intel_pineview_g_info = {
>> +	GEN3_FEATURES,
>> +	PLATFORM(INTEL_PINEVIEW),
>> +	.display.has_hotplug = 1,
>> +	.display.has_overlay = 1,
>> +};
> 
> So far both PNVs were marked as "mobile". So the real concern is
> whether all the current IS_MOBILE() checks correct for pnv_g.
> 
> A quick scan points at these potentially being broken by this change:
>   i915_gem_detect_bit_6_swizzle()
>   i915_enable_asle_pipestat()
>   i9xx_enable_pll()/assert_panel_unlocked()
>   i9xx_get_pfit_config()
> 
> Also intel_hpll_vco() would change behaviour, but I don't think
> we actually use this one pnv. I just added the pnv case there
> when trawling the old configdb for the details.

Wow.. yep, when you said mess the first time around you really meant it. 
Or maybe not mess but just legacy, how it was and what made sense in the 
day.

I suggest to drop this patch and leave the PINEVIEW_G/M as subplatforms 
in the last patch, to be untangled later.

Regards,

Tvrtko

> 
>> +
>> +static const struct intel_device_info intel_pineview_m_info = {
>>   	GEN3_FEATURES,
>>   	PLATFORM(INTEL_PINEVIEW),
>>   	.is_mobile = 1,
>> @@ -753,7 +760,8 @@ static const struct pci_device_id pciidlist[] = {
>>   	INTEL_I965GM_IDS(&intel_i965gm_info),
>>   	INTEL_GM45_IDS(&intel_gm45_info),
>>   	INTEL_G45_IDS(&intel_g45_info),
>> -	INTEL_PINEVIEW_IDS(&intel_pineview_info),
>> +	INTEL_PINEVIEW_G_IDS(&intel_pineview_g_info),
>> +	INTEL_PINEVIEW_M_IDS(&intel_pineview_m_info),
>>   	INTEL_IRONLAKE_D_IDS(&intel_ironlake_d_info),
>>   	INTEL_IRONLAKE_M_IDS(&intel_ironlake_m_info),
>>   	INTEL_SNB_D_GT1_IDS(&intel_sandybridge_d_gt1_info),
>> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
>> index d73b13ca57a0..24a34ccabc2a 100644
>> --- a/drivers/gpu/drm/i915/intel_pm.c
>> +++ b/drivers/gpu/drm/i915/intel_pm.c
>> @@ -850,7 +850,7 @@ static void pineview_update_wm(struct intel_crtc *unused_crtc)
>>   	u32 reg;
>>   	unsigned int wm;
>>   
>> -	latency = intel_get_cxsr_latency(IS_PINEVIEW_G(dev_priv),
>> +	latency = intel_get_cxsr_latency(!IS_MOBILE(dev_priv),
>>   					 dev_priv->is_ddr3,
>>   					 dev_priv->fsb_freq,
>>   					 dev_priv->mem_freq);
>> @@ -9561,7 +9561,7 @@ void intel_init_pm(struct drm_i915_private *dev_priv)
>>   		dev_priv->display.initial_watermarks = g4x_initial_watermarks;
>>   		dev_priv->display.optimize_watermarks = g4x_optimize_watermarks;
>>   	} else if (IS_PINEVIEW(dev_priv)) {
>> -		if (!intel_get_cxsr_latency(IS_PINEVIEW_G(dev_priv),
>> +		if (!intel_get_cxsr_latency(!IS_MOBILE(dev_priv),
>>   					    dev_priv->is_ddr3,
>>   					    dev_priv->fsb_freq,
>>   					    dev_priv->mem_freq)) {
>> diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
>> index d200000feeaa..a025ed9fb0be 100644
>> --- a/include/drm/i915_pciids.h
>> +++ b/include/drm/i915_pciids.h
>> @@ -108,8 +108,10 @@
>>   	INTEL_VGA_DEVICE(0x2e42, info), /* B43_G */ \
>>   	INTEL_VGA_DEVICE(0x2e92, info)	/* B43_G.1 */
>>   
>> -#define INTEL_PINEVIEW_IDS(info)			\
>> -	INTEL_VGA_DEVICE(0xa001, info),			\
>> +#define INTEL_PINEVIEW_G_IDS(info) \
>> +	INTEL_VGA_DEVICE(0xa001, info)
>> +
>> +#define INTEL_PINEVIEW_M_IDS(info) \
>>   	INTEL_VGA_DEVICE(0xa011, info)
>>   
>>   #define INTEL_IRONLAKE_D_IDS(info) \
>> -- 
>> 2.19.1
> 
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✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915: Split Pineview device info into desktop and mobile

[Patchwork]

== Series Details ==

Series: series starting with [1/3] drm/i915: Split Pineview device info into desktop and mobile
URL   : https://patchwork.freedesktop.org/series/58123/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
7e0ef0a2b5cc drm/i915: Split Pineview device info into desktop and mobile
ff060ad36bb9 drm/i915: Remove redundant device id from IS_IRONLAKE_M macro
-:38: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'dev_priv' - possible side-effects?
#38: FILE: drivers/gpu/drm/i915/i915_drv.h:2304:
+#define IS_IRONLAKE_M(dev_priv) \
+	(IS_PLATFORM(dev_priv, INTEL_IRONLAKE) && IS_MOBILE(dev_priv))

total: 0 errors, 0 warnings, 1 checks, 25 lines checked
253422fab8df drm/i915: Introduce concept of a sub-platform
-:129: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#129: FILE: drivers/gpu/drm/i915/i915_drv.h:2310:
+intel_subplatform(const struct intel_runtime_info *info,
+		      enum intel_platform p)

-:173: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'dev_priv' - possible side-effects?
#173: FILE: drivers/gpu/drm/i915/i915_drv.h:2365:
+#define IS_IRONLAKE_M(dev_priv)	\
 	(IS_PLATFORM(dev_priv, INTEL_IRONLAKE) && IS_MOBILE(dev_priv))

total: 0 errors, 0 warnings, 2 checks, 326 lines checked

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✗ Fi.CI.SPARSE: warning for series starting with [1/3] drm/i915: Split Pineview device info into desktop and mobile

[Patchwork]

== Series Details ==

Series: series starting with [1/3] drm/i915: Split Pineview device info into desktop and mobile
URL   : https://patchwork.freedesktop.org/series/58123/
State : warning

== Summary ==

$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915: Split Pineview device info into desktop and mobile
-drivers/gpu/drm/i915/selftests/../i915_drv.h:3558:16: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/selftests/../i915_drv.h:3556:16: warning: expression using sizeof(void)

Commit: drm/i915: Remove redundant device id from IS_IRONLAKE_M macro
-drivers/gpu/drm/i915/selftests/../i915_drv.h:3556:16: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/selftests/../i915_drv.h:3559:16: warning: expression using sizeof(void)

Commit: drm/i915: Introduce concept of a sub-platform
-drivers/gpu/drm/i915/i915_gpu_error.c:902:23: warning: expression using sizeof(void)
-drivers/gpu/drm/i915/i915_gpu_error.c:902:23: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_gpu_error.c:902:23: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_gpu_error.c:902:23: warning: expression using sizeof(void)
-drivers/gpu/drm/i915/selftests/../i915_drv.h:3559:16: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/selftests/../i915_drv.h:3609:16: warning: expression using sizeof(void)

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✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Split Pineview device info into desktop and mobile

[Patchwork]

== Series Details ==

Series: series starting with [1/3] drm/i915: Split Pineview device info into desktop and mobile
URL   : https://patchwork.freedesktop.org/series/58123/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_5765 -> Patchwork_12495
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/58123/revisions/1/mbox/

Known issues
------------

  Here are the changes found in Patchwork_12495 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@amdgpu/amd_cs_nop@sync-fork-compute0:
    - fi-icl-u3:          NOTRUN -> SKIP [fdo#109315] +17

  * igt@gem_exec_basic@gtt-bsd1:
    - fi-icl-u3:          NOTRUN -> SKIP [fdo#109276] +7

  * igt@gem_exec_parse@basic-rejected:
    - fi-icl-u3:          NOTRUN -> SKIP [fdo#109289] +1

  * igt@gem_tiled_pread_basic:
    - fi-pnv-d510:        PASS -> SKIP [fdo#109271] +3

  * igt@i915_selftest@live_contexts:
    - fi-icl-u3:          NOTRUN -> DMESG-FAIL [fdo#108569]

  * igt@kms_busy@basic-flip-b:
    - fi-gdg-551:         PASS -> FAIL [fdo#103182]

  * igt@kms_busy@basic-flip-c:
    - fi-byt-j1900:       NOTRUN -> SKIP [fdo#109271] / [fdo#109278]

  * igt@kms_chamelium@hdmi-crc-fast:
    - fi-byt-j1900:       NOTRUN -> SKIP [fdo#109271] +52

  * igt@kms_chamelium@hdmi-edid-read:
    - fi-hsw-peppy:       NOTRUN -> SKIP [fdo#109271] +46
    - fi-icl-u3:          NOTRUN -> SKIP [fdo#109284] +8

  * igt@kms_force_connector_basic@prune-stale-modes:
    - fi-icl-u3:          NOTRUN -> SKIP [fdo#109285] +3

  * igt@kms_frontbuffer_tracking@basic:
    - fi-icl-u3:          NOTRUN -> FAIL [fdo#103167]
    - fi-hsw-peppy:       NOTRUN -> DMESG-FAIL [fdo#102614] / [fdo#107814]

  
#### Possible fixes ####

  * igt@i915_pm_rpm@module-reload:
    - fi-skl-6770hq:      FAIL [fdo#108511] -> PASS

  * igt@kms_frontbuffer_tracking@basic:
    - fi-byt-clapper:     FAIL [fdo#103167] -> PASS

  * igt@prime_vgem@basic-fence-flip:
    - fi-gdg-551:         DMESG-FAIL [fdo#103182] -> PASS

  
  [fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103182]: https://bugs.freedesktop.org/show_bug.cgi?id=103182
  [fdo#107814]: https://bugs.freedesktop.org/show_bug.cgi?id=107814
  [fdo#108511]: https://bugs.freedesktop.org/show_bug.cgi?id=108511
  [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
  [fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
  [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315


Participating hosts (45 -> 41)
------------------------------

  Additional (3): fi-byt-j1900 fi-hsw-peppy fi-icl-u3 
  Missing    (7): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-bdw-samus 


Build changes
-------------

    * Linux: CI_DRM_5765 -> Patchwork_12495

  CI_DRM_5765: b9d98b738e711c5f3d6b3f6d73ad388571cfc316 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4888: 71ad19eb8fe4f0eecae3bf063e107293b90b9abc @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_12495: 253422fab8df6fec225b8cf51a5fe8d19a46e86e @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

253422fab8df drm/i915: Introduce concept of a sub-platform
ff060ad36bb9 drm/i915: Remove redundant device id from IS_IRONLAKE_M macro
7e0ef0a2b5cc drm/i915: Split Pineview device info into desktop and mobile

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12495/
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✓ Fi.CI.IGT: success for series starting with [1/3] drm/i915: Split Pineview device info into desktop and mobile

[Patchwork]

== Series Details ==

Series: series starting with [1/3] drm/i915: Split Pineview device info into desktop and mobile
URL   : https://patchwork.freedesktop.org/series/58123/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_5765_full -> Patchwork_12495_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Known issues
------------

  Here are the changes found in Patchwork_12495_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_params@rsvd2-dirt:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109283]

  * igt@gem_exec_parse@chained-batch:
    - shard-apl:          NOTRUN -> SKIP [fdo#109271] +19

  * igt@gem_exec_parse@cmd-crossing-page:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109289]

  * igt@gem_fence_thrash@bo-copy:
    - shard-apl:          PASS -> INCOMPLETE [fdo#103927]

  * igt@gem_mmap_gtt@hang:
    - shard-iclb:         PASS -> FAIL [fdo#109677]

  * igt@gem_partial_pwrite_pread@writes-after-reads-uncached:
    - shard-iclb:         PASS -> TIMEOUT [fdo#109673]

  * igt@gem_pwrite@stolen-snoop:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109277]

  * igt@gem_softpin@evict-snoop-interruptible:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109312]

  * igt@gem_tiled_fence_blits@normal:
    - shard-iclb:         NOTRUN -> TIMEOUT [fdo#109673]

  * igt@i915_pm_rpm@modeset-lpsp-stress-no-wait:
    - shard-skl:          PASS -> INCOMPLETE [fdo#107807] +1

  * igt@kms_busy@extended-modeset-hang-newfb-render-a:
    - shard-skl:          PASS -> DMESG-WARN [fdo#107956]

  * igt@kms_busy@extended-modeset-hang-newfb-render-b:
    - shard-skl:          NOTRUN -> DMESG-WARN [fdo#107956] +1

  * igt@kms_busy@extended-modeset-hang-newfb-render-c:
    - shard-iclb:         PASS -> DMESG-WARN [fdo#107956]

  * igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-a:
    - shard-apl:          NOTRUN -> DMESG-WARN [fdo#107956]

  * igt@kms_busy@extended-modeset-hang-oldfb-render-f:
    - shard-skl:          NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +10

  * igt@kms_busy@extended-pageflip-hang-newfb-render-b:
    - shard-glk:          PASS -> DMESG-WARN [fdo#107956]

  * igt@kms_ccs@pipe-a-crc-sprite-planes-basic:
    - shard-apl:          PASS -> FAIL [fdo#107725] / [fdo#108145]

  * igt@kms_chamelium@vga-hpd:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109284] +5

  * igt@kms_color@pipe-a-degamma:
    - shard-apl:          PASS -> FAIL [fdo#104782] / [fdo#108145]

  * igt@kms_color@pipe-c-ctm-max:
    - shard-apl:          PASS -> FAIL [fdo#108147]

  * igt@kms_color@pipe-c-degamma:
    - shard-iclb:         NOTRUN -> FAIL [fdo#104782]

  * igt@kms_cursor_crc@cursor-128x42-onscreen:
    - shard-apl:          PASS -> FAIL [fdo#103232] +1

  * igt@kms_cursor_crc@cursor-512x512-rapid-movement:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109279]

  * igt@kms_draw_crc@draw-method-xrgb2101010-mmap-gtt-xtiled:
    - shard-skl:          PASS -> FAIL [fdo#103184]

  * igt@kms_flip@2x-busy-flip-interruptible:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109274] +3

  * igt@kms_flip@flip-vs-suspend:
    - shard-skl:          PASS -> INCOMPLETE [fdo#109507]

  * igt@kms_flip_tiling@flip-y-tiled:
    - shard-skl:          PASS -> FAIL [fdo#108303]

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render:
    - shard-apl:          PASS -> FAIL [fdo#103167]

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-move:
    - shard-iclb:         PASS -> FAIL [fdo#103167] +8

  * igt@kms_frontbuffer_tracking@fbc-2p-indfb-fliptrack:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109280] +13

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-move:
    - shard-glk:          PASS -> FAIL [fdo#103167] +5

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-blt:
    - shard-skl:          NOTRUN -> SKIP [fdo#109271] +113

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt:
    - shard-skl:          NOTRUN -> FAIL [fdo#103167]

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-onoff:
    - shard-iclb:         NOTRUN -> FAIL [fdo#103167]

  * igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-wc:
    - shard-iclb:         PASS -> FAIL [fdo#105682] / [fdo#109247]

  * igt@kms_frontbuffer_tracking@psr-rgb101010-draw-blt:
    - shard-iclb:         PASS -> FAIL [fdo#109247] +21

  * igt@kms_frontbuffer_tracking@psr-rgb565-draw-mmap-cpu:
    - shard-iclb:         NOTRUN -> FAIL [fdo#109247]

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-d:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109278] +4

  * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes:
    - shard-iclb:         PASS -> FAIL [fdo#103375]

  * igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb:
    - shard-skl:          NOTRUN -> FAIL [fdo#108145] +1

  * igt@kms_plane_alpha_blend@pipe-b-alpha-opaque-fb:
    - shard-apl:          PASS -> FAIL [fdo#108145]

  * igt@kms_plane_scaling@pipe-a-scaler-with-clipping-clamping:
    - shard-glk:          PASS -> SKIP [fdo#109271] / [fdo#109278]

  * igt@kms_psr2_su@frontbuffer:
    - shard-iclb:         PASS -> SKIP [fdo#109642]

  * igt@kms_psr@primary_blt:
    - shard-iclb:         PASS -> FAIL [fdo#107383] +3

  * igt@kms_psr@psr2_cursor_render:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109441]

  * igt@kms_psr@psr2_sprite_plane_move:
    - shard-iclb:         PASS -> SKIP [fdo#109441] +1

  * igt@kms_rotation_crc@multiplane-rotation-cropping-top:
    - shard-kbl:          PASS -> FAIL [fdo#109016]

  * igt@kms_setmode@basic:
    - shard-apl:          PASS -> FAIL [fdo#99912]

  * igt@kms_sysfs_edid_timing:
    - shard-skl:          NOTRUN -> FAIL [fdo#100047]

  * igt@kms_universal_plane@disable-primary-vs-flip-pipe-d:
    - shard-apl:          NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +1

  * igt@prime_nv_test@i915_nv_sharing:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109291] +1

  * igt@prime_vgem@fence-wait-bsd1:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109276] +6

  * igt@tools_test@tools_test:
    - shard-snb:          PASS -> SKIP [fdo#109271]

  * igt@v3d_get_param@get-bad-param:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109315]

  
#### Possible fixes ####

  * igt@gem_ppgtt@blt-vs-render-ctxn:
    - shard-iclb:         INCOMPLETE [fdo#107713] / [fdo#109766] / [fdo#109801] -> PASS

  * igt@gem_tiled_pread_pwrite:
    - shard-iclb:         TIMEOUT [fdo#109673] -> PASS +1

  * igt@i915_selftest@live_hangcheck:
    - shard-iclb:         INCOMPLETE [fdo#108569] -> PASS

  * igt@i915_selftest@live_workarounds:
    - shard-iclb:         DMESG-FAIL [fdo#108954] -> PASS

  * igt@kms_ccs@pipe-a-crc-sprite-planes-basic:
    - shard-glk:          FAIL [fdo#108145] -> PASS

  * igt@kms_cursor_crc@cursor-256x256-sliding:
    - shard-skl:          FAIL [fdo#103232] -> PASS

  * igt@kms_cursor_crc@cursor-64x21-random:
    - shard-apl:          FAIL [fdo#103232] -> PASS +2

  * igt@kms_cursor_legacy@cursor-vs-flip-legacy:
    - shard-iclb:         FAIL [fdo#103355] -> PASS +2

  * igt@kms_flip@blocking-absolute-wf_vblank-interruptible:
    - shard-apl:          INCOMPLETE [fdo#103927] -> PASS

  * igt@kms_flip@flip-vs-expired-vblank:
    - shard-skl:          FAIL [fdo#105363] -> PASS

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-cpu:
    - shard-glk:          FAIL [fdo#103167] -> PASS

  * igt@kms_frontbuffer_tracking@fbc-tilingchange:
    - shard-iclb:         FAIL [fdo#103167] -> PASS +8

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-cpu:
    - shard-iclb:         FAIL [fdo#109247] -> PASS +1

  * igt@kms_pipe_crc_basic@nonblocking-crc-pipe-c-frame-sequence:
    - shard-skl:          FAIL [fdo#103191] / [fdo#107362] -> PASS

  * {igt@kms_plane@pixel-format-pipe-b-planes}:
    - shard-apl:          FAIL [fdo#110033] -> PASS

  * {igt@kms_plane@pixel-format-pipe-c-planes-source-clamping}:
    - shard-glk:          SKIP [fdo#109271] -> PASS +1

  * {igt@kms_plane@plane-position-covered-pipe-a-planes}:
    - shard-iclb:         FAIL [fdo#110038] -> PASS

  * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
    - shard-skl:          FAIL [fdo#107815] -> PASS

  * {igt@kms_plane_multiple@atomic-pipe-a-tiling-y}:
    - shard-iclb:         FAIL [fdo#110037] -> PASS +1

  * {igt@kms_plane_multiple@atomic-pipe-c-tiling-none}:
    - shard-glk:          FAIL [fdo#110037] -> PASS

  * igt@kms_psr@cursor_mmap_cpu:
    - shard-iclb:         FAIL [fdo#107383] -> PASS

  * igt@kms_psr@psr2_basic:
    - shard-iclb:         SKIP [fdo#109441] -> PASS +1

  * igt@kms_rotation_crc@multiplane-rotation-cropping-bottom:
    - shard-kbl:          DMESG-FAIL [fdo#105763] -> PASS

  * igt@kms_setmode@basic:
    - shard-kbl:          FAIL [fdo#99912] -> PASS

  * igt@kms_vblank@pipe-c-ts-continuation-suspend:
    - shard-hsw:          FAIL [fdo#104894] -> PASS

  
#### Warnings ####

  * igt@kms_plane_scaling@pipe-a-scaler-with-pixel-format:
    - shard-glk:          SKIP [fdo#109271] / [fdo#109278] -> FAIL [fdo#110098]

  * igt@kms_plane_scaling@pipe-b-scaler-with-rotation:
    - shard-glk:          FAIL [fdo#110098] -> SKIP [fdo#109271] / [fdo#109278]

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#100047]: https://bugs.freedesktop.org/show_bug.cgi?id=100047
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103184]: https://bugs.freedesktop.org/show_bug.cgi?id=103184
  [fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
  [fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
  [fdo#103355]: https://bugs.freedesktop.org/show_bug.cgi?id=103355
  [fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
  [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
  [fdo#104782]: https://bugs.freedesktop.org/show_bug.cgi?id=104782
  [fdo#104894]: https://bugs.freedesktop.org/show_bug.cgi?id=104894
  [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
  [fdo#105682]: https://bugs.freedesktop.org/show_bug.cgi?id=105682
  [fdo#105763]: https://bugs.freedesktop.org/show_bug.cgi?id=105763
  [fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362
  [fdo#107383]: https://bugs.freedesktop.org/show_bug.cgi?id=107383
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
  [fdo#107725]: https://bugs.freedesktop.org/show_bug.cgi?id=107725
  [fdo#107807]: https://bugs.freedesktop.org/show_bug.cgi?id=107807
  [fdo#107815]: https://bugs.freedesktop.org/show_bug.cgi?id=107815
  [fdo#107956]: https://bugs.freedesktop.org/show_bug.cgi?id=107956
  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#108147]: https://bugs.freedesktop.org/show_bug.cgi?id=108147
  [fdo#108303]: https://bugs.freedesktop.org/show_bug.cgi?id=108303
  [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
  [fdo#108954]: https://bugs.freedesktop.org/show_bug.cgi?id=108954
  [fdo#109016]: https://bugs.freedesktop.org/show_bug.cgi?id=109016
  [fdo#109247]: https://bugs.freedesktop.org/show_bug.cgi?id=109247
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109277]: https://bugs.freedesktop.org/show_bug.cgi?id=109277
  [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
  [fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279
  [fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
  [fdo#109283]: https://bugs.freedesktop.org/show_bug.cgi?id=109283
  [fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
  [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
  [fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291
  [fdo#109312]: https://bugs.freedesktop.org/show_bug.cgi?id=109312
  [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109507]: https://bugs.freedesktop.org/show_bug.cgi?id=109507
  [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
  [fdo#109673]: https://bugs.freedesktop.org/show_bug.cgi?id=109673
  [fdo#109677]: https://bugs.freedesktop.org/show_bug.cgi?id=109677
  [fdo#109766]: https://bugs.freedesktop.org/show_bug.cgi?id=109766
  [fdo#109801]: https://bugs.freedesktop.org/show_bug.cgi?id=109801
  [fdo#110032]: https://bugs.freedesktop.org/show_bug.cgi?id=110032
  [fdo#110033]: https://bugs.freedesktop.org/show_bug.cgi?id=110033
  [fdo#110037]: https://bugs.freedesktop.org/show_bug.cgi?id=110037
  [fdo#110038]: https://bugs.freedesktop.org/show_bug.cgi?id=110038
  [fdo#110098]: https://bugs.freedesktop.org/show_bug.cgi?id=110098
  [fdo#110129]: https://bugs.freedesktop.org/show_bug.cgi?id=110129
  [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912


Participating hosts (10 -> 10)
------------------------------

  No changes in participating hosts


Build changes
-------------

    * Linux: CI_DRM_5765 -> Patchwork_12495

  CI_DRM_5765: b9d98b738e711c5f3d6b3f6d73ad388571cfc316 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4888: 71ad19eb8fe4f0eecae3bf063e107293b90b9abc @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_12495: 253422fab8df6fec225b8cf51a5fe8d19a46e86e @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12495/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915: Split Pineview device info into desktop and mobile (rev2)

[Patchwork]

== Series Details ==

Series: series starting with [1/3] drm/i915: Split Pineview device info into desktop and mobile (rev2)
URL   : https://patchwork.freedesktop.org/series/58123/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
777e1e26f8a9 drm/i915: Split Pineview device info into desktop and mobile
5e8af08a89e1 drm/i915: Remove redundant device id from IS_IRONLAKE_M macro
-:41: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'dev_priv' - possible side-effects?
#41: FILE: drivers/gpu/drm/i915/i915_drv.h:2307:
+#define IS_IRONLAKE_M(dev_priv) \
+	(IS_PLATFORM(dev_priv, INTEL_IRONLAKE) && IS_MOBILE(dev_priv))

total: 0 errors, 0 warnings, 1 checks, 25 lines checked
6532f6e252de drm/i915: Introduce concept of a sub-platform
-:129: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#129: FILE: drivers/gpu/drm/i915/i915_drv.h:2313:
+intel_subplatform(const struct intel_runtime_info *info,
+		      enum intel_platform p)

-:173: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'dev_priv' - possible side-effects?
#173: FILE: drivers/gpu/drm/i915/i915_drv.h:2368:
+#define IS_IRONLAKE_M(dev_priv)	\
 	(IS_PLATFORM(dev_priv, INTEL_IRONLAKE) && IS_MOBILE(dev_priv))

total: 0 errors, 0 warnings, 2 checks, 326 lines checked

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✗ Fi.CI.SPARSE: warning for series starting with [1/3] drm/i915: Split Pineview device info into desktop and mobile (rev2)

[Patchwork]

== Series Details ==

Series: series starting with [1/3] drm/i915: Split Pineview device info into desktop and mobile (rev2)
URL   : https://patchwork.freedesktop.org/series/58123/
State : warning

== Summary ==

$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915: Split Pineview device info into desktop and mobile
-drivers/gpu/drm/i915/selftests/../i915_drv.h:3562:16: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/selftests/../i915_drv.h:3560:16: warning: expression using sizeof(void)

Commit: drm/i915: Remove redundant device id from IS_IRONLAKE_M macro
-drivers/gpu/drm/i915/selftests/../i915_drv.h:3560:16: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/selftests/../i915_drv.h:3563:16: warning: expression using sizeof(void)

Commit: drm/i915: Introduce concept of a sub-platform
-drivers/gpu/drm/i915/i915_gpu_error.c:902:23: warning: expression using sizeof(void)
-drivers/gpu/drm/i915/i915_gpu_error.c:902:23: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_gpu_error.c:902:23: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_gpu_error.c:902:23: warning: expression using sizeof(void)
-drivers/gpu/drm/i915/selftests/../i915_drv.h:3563:16: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/selftests/../i915_drv.h:3613:16: warning: expression using sizeof(void)

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Split Pineview device info into desktop and mobile (rev2)

[Patchwork]

== Series Details ==

Series: series starting with [1/3] drm/i915: Split Pineview device info into desktop and mobile (rev2)
URL   : https://patchwork.freedesktop.org/series/58123/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_5787 -> Patchwork_12547
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/58123/revisions/2/mbox/

Known issues
------------

  Here are the changes found in Patchwork_12547 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_basic@readonly-bsd1:
    - fi-snb-2520m:       NOTRUN -> SKIP [fdo#109271] +57

  * igt@kms_busy@basic-flip-a:
    - fi-bsw-n3050:       NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +1

  * igt@kms_busy@basic-flip-c:
    - fi-snb-2520m:       NOTRUN -> SKIP [fdo#109271] / [fdo#109278]

  * igt@kms_chamelium@hdmi-crc-fast:
    - fi-bsw-n3050:       NOTRUN -> SKIP [fdo#109271] +62

  * igt@kms_pipe_crc_basic@read-crc-pipe-b-frame-sequence:
    - fi-byt-clapper:     PASS -> FAIL [fdo#103191] / [fdo#107362] +1

  * igt@kms_psr@primary_mmap_gtt:
    - fi-blb-e6850:       NOTRUN -> SKIP [fdo#109271] +27

  * igt@prime_vgem@basic-fence-flip:
    - fi-gdg-551:         PASS -> FAIL [fdo#103182] +1

  
#### Possible fixes ####

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
    - fi-blb-e6850:       INCOMPLETE [fdo#107718] -> PASS

  
  [fdo#103182]: https://bugs.freedesktop.org/show_bug.cgi?id=103182
  [fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
  [fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362
  [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278


Participating hosts (42 -> 37)
------------------------------

  Additional (2): fi-snb-2520m fi-bsw-n3050 
  Missing    (7): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-bdw-samus 


Build changes
-------------

    * Linux: CI_DRM_5787 -> Patchwork_12547

  CI_DRM_5787: 8a27af0b94f56d403bc7806a64a50013a2dd9396 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4896: 0f9c061247fb7aba21c9459f19f437927a28f32c @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_12547: 6532f6e252de4520d497dece767b6c05404de600 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

6532f6e252de drm/i915: Introduce concept of a sub-platform
5e8af08a89e1 drm/i915: Remove redundant device id from IS_IRONLAKE_M macro
777e1e26f8a9 drm/i915: Split Pineview device info into desktop and mobile

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12547/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✗ Fi.CI.IGT: failure for series starting with [1/3] drm/i915: Split Pineview device info into desktop and mobile (rev2)

[Patchwork]

== Series Details ==

Series: series starting with [1/3] drm/i915: Split Pineview device info into desktop and mobile (rev2)
URL   : https://patchwork.freedesktop.org/series/58123/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_5787_full -> Patchwork_12547_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_12547_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_12547_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_12547_full:

### IGT changes ###

#### Possible regressions ####

  * igt@i915_pm_rpm@i2c:
    - shard-iclb:         PASS -> DMESG-WARN

  
Known issues
------------

  Here are the changes found in Patchwork_12547_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_bad_reloc@negative-reloc-lut-bsd1:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109276] +5

  * igt@gem_mocs_settings@mocs-reset-dirty-render:
    - shard-iclb:         NOTRUN -> SKIP [fdo#110206]

  * igt@gem_stolen@stolen-pread:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109277]

  * igt@gem_wait@wait-bsd2:
    - shard-snb:          NOTRUN -> SKIP [fdo#109271] +34

  * igt@i915_pm_lpsp@edp-native:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109301]

  * igt@i915_pm_rpm@modeset-non-lpsp-stress-no-wait:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109308]

  * igt@kms_busy@extended-modeset-hang-newfb-render-b:
    - shard-kbl:          NOTRUN -> DMESG-WARN [fdo#107956]
    - shard-iclb:         NOTRUN -> DMESG-WARN [fdo#107956]

  * igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-b:
    - shard-kbl:          PASS -> DMESG-WARN [fdo#107956]
    - shard-skl:          NOTRUN -> DMESG-WARN [fdo#107956]

  * igt@kms_busy@extended-modeset-hang-oldfb-render-d:
    - shard-skl:          NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +7

  * igt@kms_busy@extended-pageflip-hang-oldfb-render-e:
    - shard-kbl:          NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +2
    - shard-iclb:         NOTRUN -> SKIP [fdo#109278] +2

  * igt@kms_chamelium@vga-frame-dump:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109284]

  * igt@kms_cursor_crc@cursor-64x64-suspend:
    - shard-skl:          NOTRUN -> INCOMPLETE [fdo#104108]

  * igt@kms_cursor_legacy@cursor-vs-flip-legacy:
    - shard-iclb:         PASS -> FAIL [fdo#103355]

  * igt@kms_cursor_legacy@cursorb-vs-flipb-legacy:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109274] +1

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-skl:          PASS -> INCOMPLETE [fdo#109507]

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-pwrite:
    - shard-iclb:         NOTRUN -> FAIL [fdo#103167]

  * igt@kms_frontbuffer_tracking@fbc-rgb565-draw-mmap-wc:
    - shard-iclb:         PASS -> FAIL [fdo#103167]

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-pwrite:
    - shard-iclb:         PASS -> FAIL [fdo#109247] +31

  * igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-pwrite:
    - shard-iclb:         PASS -> FAIL [fdo#105682] / [fdo#109247]

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-draw-pwrite:
    - shard-kbl:          NOTRUN -> SKIP [fdo#109271] +43

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-mmap-wc:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109280] +6

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
    - shard-kbl:          PASS -> INCOMPLETE [fdo#103665]

  * igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb:
    - shard-kbl:          NOTRUN -> FAIL [fdo#108145]

  * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-max:
    - shard-skl:          NOTRUN -> FAIL [fdo#108145] +1

  * igt@kms_plane_alpha_blend@pipe-c-alpha-basic:
    - shard-skl:          NOTRUN -> FAIL [fdo#107815] / [fdo#108145]

  * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-mid:
    - shard-snb:          NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +3

  * igt@kms_psr@psr2_dpms:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109441]

  * igt@kms_psr@psr2_primary_page_flip:
    - shard-iclb:         PASS -> SKIP [fdo#109441] +3

  * igt@kms_psr@sprite_blt:
    - shard-iclb:         PASS -> FAIL [fdo#107383] / [fdo#110215] +5

  * igt@kms_universal_plane@disable-primary-vs-flip-pipe-d:
    - shard-apl:          NOTRUN -> SKIP [fdo#109271] / [fdo#109278]

  * igt@kms_vrr@flip-basic:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109502]

  * igt@kms_vrr@flip-suspend:
    - shard-skl:          NOTRUN -> SKIP [fdo#109271] +134

  * igt@perf_pmu@rc6-runtime-pm-long:
    - shard-skl:          PASS -> FAIL [fdo#105010]

  * igt@prime_nv_test@i915_import_pread_pwrite:
    - shard-apl:          NOTRUN -> SKIP [fdo#109271]

  * igt@prime_vgem@fence-read-hang:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109295]

  
#### Possible fixes ####

  * igt@gem_ppgtt@blt-vs-render-ctx0:
    - shard-iclb:         INCOMPLETE [fdo#109766] / [fdo#109801] -> PASS

  * igt@gem_tiled_swapping@non-threaded:
    - shard-iclb:         FAIL [fdo#108686] -> PASS

  * igt@kms_busy@extended-modeset-hang-newfb-render-a:
    - shard-hsw:          DMESG-WARN [fdo#107956] -> PASS

  * igt@kms_busy@extended-pageflip-hang-newfb-render-a:
    - shard-apl:          DMESG-WARN [fdo#107956] -> PASS

  * igt@kms_cursor_crc@cursor-128x128-suspend:
    - shard-skl:          INCOMPLETE [fdo#104108] -> PASS

  * igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions-varying-size:
    - shard-iclb:         FAIL [fdo#103355] -> PASS

  * igt@kms_frontbuffer_tracking@fbc-tilingchange:
    - shard-iclb:         FAIL [fdo#103167] -> PASS +3

  * igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-wc:
    - shard-iclb:         FAIL [fdo#105682] / [fdo#109247] -> PASS +1

  * igt@kms_frontbuffer_tracking@psr-rgb101010-draw-blt:
    - shard-iclb:         FAIL [fdo#109247] -> PASS +20

  * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
    - shard-skl:          FAIL [fdo#108145] -> PASS

  * igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
    - shard-skl:          FAIL [fdo#107815] / [fdo#108145] -> PASS

  * igt@kms_psr2_su@frontbuffer:
    - shard-iclb:         SKIP [fdo#109642] -> PASS

  * igt@kms_psr@primary_render:
    - shard-iclb:         FAIL [fdo#107383] / [fdo#110215] -> PASS +2

  * igt@kms_psr@psr2_cursor_plane_onoff:
    - shard-iclb:         SKIP [fdo#109441] -> PASS +2

  * igt@kms_rotation_crc@multiplane-rotation:
    - shard-kbl:          INCOMPLETE [fdo#103665] -> PASS

  * igt@kms_rotation_crc@multiplane-rotation-cropping-bottom:
    - shard-kbl:          DMESG-FAIL [fdo#105763] -> PASS

  * igt@kms_setmode@basic:
    - shard-hsw:          FAIL [fdo#99912] -> PASS

  * igt@kms_vblank@pipe-a-ts-continuation-modeset-rpm:
    - shard-apl:          FAIL [fdo#104894] -> PASS

  * igt@kms_vblank@pipe-c-ts-continuation-suspend:
    - shard-skl:          INCOMPLETE [fdo#104108] / [fdo#107773] -> PASS
    - shard-iclb:         FAIL [fdo#104894] -> PASS

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103355]: https://bugs.freedesktop.org/show_bug.cgi?id=103355
  [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
  [fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
  [fdo#104894]: https://bugs.freedesktop.org/show_bug.cgi?id=104894
  [fdo#105010]: https://bugs.freedesktop.org/show_bug.cgi?id=105010
  [fdo#105682]: https://bugs.freedesktop.org/show_bug.cgi?id=105682
  [fdo#105763]: https://bugs.freedesktop.org/show_bug.cgi?id=105763
  [fdo#107383]: https://bugs.freedesktop.org/show_bug.cgi?id=107383
  [fdo#107773]: https://bugs.freedesktop.org/show_bug.cgi?id=107773
  [fdo#107815]: https://bugs.freedesktop.org/show_bug.cgi?id=107815
  [fdo#107956]: https://bugs.freedesktop.org/show_bug.cgi?id=107956
  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#108686]: https://bugs.freedesktop.org/show_bug.cgi?id=108686
  [fdo#109247]: https://bugs.freedesktop.org/show_bug.cgi?id=109247
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109277]: https://bugs.freedesktop.org/show_bug.cgi?id=109277
  [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
  [fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
  [fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
  [fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
  [fdo#109301]: https://bugs.freedesktop.org/show_bug.cgi?id=109301
  [fdo#109308]: https://bugs.freedesktop.org/show_bug.cgi?id=109308
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109502]: https://bugs.freedesktop.org/show_bug.cgi?id=109502
  [fdo#109507]: https://bugs.freedesktop.org/show_bug.cgi?id=109507
  [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
  [fdo#109766]: https://bugs.freedesktop.org/show_bug.cgi?id=109766
  [fdo#109801]: https://bugs.freedesktop.org/show_bug.cgi?id=109801
  [fdo#110206]: https://bugs.freedesktop.org/show_bug.cgi?id=110206
  [fdo#110215]: https://bugs.freedesktop.org/show_bug.cgi?id=110215
  [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912


Participating hosts (10 -> 10)
------------------------------

  No changes in participating hosts


Build changes
-------------

    * Linux: CI_DRM_5787 -> Patchwork_12547

  CI_DRM_5787: 8a27af0b94f56d403bc7806a64a50013a2dd9396 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4896: 0f9c061247fb7aba21c9459f19f437927a28f32c @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_12547: 6532f6e252de4520d497dece767b6c05404de600 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12547/
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