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From: Imre Deak <imre.deak@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [CI 2/4] drm/i915: Save the old CDCLK atomic state
Date: Wed, 20 Mar 2019 15:54:37 +0200	[thread overview]
Message-ID: <20190320135439.12201-2-imre.deak@intel.com> (raw)
In-Reply-To: <20190320135439.12201-1-imre.deak@intel.com>

The old state will be needed by an upcoming patch to determine if the
commit increases or decreases CDCLK, so move the old state to the atomic
state (while keeping the new one in dev_priv). cdclk.logical and
cdclk.actual in the atomic state isn't used atm anywhere after the
atomic check phase, so this should be safe.

v2:
- Use swap() instead of opencoding it. (Ville)

Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_cdclk.c   | 20 ++++++++++++++++++++
 drivers/gpu/drm/i915/intel_display.c |  4 ++--
 drivers/gpu/drm/i915/intel_drv.h     |  1 +
 3 files changed, 23 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_cdclk.c b/drivers/gpu/drm/i915/intel_cdclk.c
index 7dcca84f31d1..5c25626f8cf0 100644
--- a/drivers/gpu/drm/i915/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/intel_cdclk.c
@@ -2100,6 +2100,26 @@ bool intel_cdclk_changed(const struct intel_cdclk_state *a,
 		a->voltage_level != b->voltage_level;
 }
 
+/**
+ * intel_cdclk_swap_state - make atomic CDCLK configuration effective
+ * @state: atomic state
+ *
+ * This is the CDCLK version of drm_atomic_helper_swap_state() since the
+ * helper does not handle driver-specific global state.
+ *
+ * Similarly to the atomic helpers this function does a complete swap,
+ * i.e. it also puts the old state into @state. This is used by the commit
+ * code to determine how CDCLK has changed (for instance did it increase or
+ * decrease).
+ */
+void intel_cdclk_swap_state(struct intel_atomic_state *state)
+{
+	struct drm_i915_private *dev_priv = to_i915(state->base.dev);
+
+	swap(state->cdclk.logical, dev_priv->cdclk.logical);
+	swap(state->cdclk.actual, dev_priv->cdclk.actual);
+}
+
 void intel_dump_cdclk_state(const struct intel_cdclk_state *cdclk_state,
 			    const char *context)
 {
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index b4199cd53349..9c4ad124302c 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -13663,10 +13663,10 @@ static int intel_atomic_commit(struct drm_device *dev,
 		       intel_state->min_voltage_level,
 		       sizeof(intel_state->min_voltage_level));
 		dev_priv->active_crtcs = intel_state->active_crtcs;
-		dev_priv->cdclk.logical = intel_state->cdclk.logical;
-		dev_priv->cdclk.actual = intel_state->cdclk.actual;
 		dev_priv->cdclk.force_min_cdclk =
 			intel_state->cdclk.force_min_cdclk;
+
+		intel_cdclk_swap_state(intel_state);
 	}
 
 	drm_atomic_state_get(state);
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 0b84e557c267..85dd6a9d1e42 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1698,6 +1698,7 @@ bool intel_cdclk_needs_modeset(const struct intel_cdclk_state *a,
 			       const struct intel_cdclk_state *b);
 bool intel_cdclk_changed(const struct intel_cdclk_state *a,
 			 const struct intel_cdclk_state *b);
+void intel_cdclk_swap_state(struct intel_atomic_state *state);
 void intel_set_cdclk(struct drm_i915_private *dev_priv,
 		     const struct intel_cdclk_state *cdclk_state);
 void intel_dump_cdclk_state(const struct intel_cdclk_state *cdclk_state,
-- 
2.13.2

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  reply	other threads:[~2019-03-20 13:54 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-20 13:54 [CI 1/4] drm/i915: Force 2*96 MHz cdclk on glk/cnl when audio power is enabled Imre Deak
2019-03-20 13:54 ` Imre Deak [this message]
2019-03-20 13:54 ` [CI 3/4] drm/i915: Remove redundant store of logical CDCLK state Imre Deak
2019-03-20 13:54 ` [CI 4/4] drm/i915: Skip modeset for cdclk changes if possible Imre Deak
2019-03-21 21:53   ` Clinton Taylor
2019-03-22 20:23     ` Imre Deak
2019-03-26 11:49       ` Imre Deak
2019-03-27 10:13   ` [PATCH v9 " Imre Deak
2019-04-02 20:13     ` Clinton Taylor
2019-03-20 16:58 ` ✗ Fi.CI.SPARSE: warning for series starting with [CI,1/4] drm/i915: Force 2*96 MHz cdclk on glk/cnl when audio power is enabled Patchwork
2019-03-20 17:23 ` ✓ Fi.CI.BAT: success " Patchwork
2019-03-21  0:32 ` ✗ Fi.CI.IGT: failure " Patchwork
2019-03-21 15:56   ` Imre Deak
2019-04-03 16:07     ` Imre Deak
2019-03-21 21:20 ` [CI 1/4] " Clinton Taylor
2019-03-22  9:38   ` Jani Nikula
2019-03-27 14:08 ` ✗ Fi.CI.SPARSE: warning for series starting with [CI,1/4] drm/i915: Force 2*96 MHz cdclk on glk/cnl when audio power is enabled (rev2) Patchwork
2019-03-27 14:35 ` ✓ Fi.CI.BAT: success " Patchwork
2019-03-28  3:53 ` ✗ Fi.CI.IGT: failure " Patchwork
2019-03-28 13:27   ` Imre Deak

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