From: Imre Deak <imre.deak@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [CI 3/4] drm/i915: Remove redundant store of logical CDCLK state
Date: Wed, 20 Mar 2019 15:54:38 +0200 [thread overview]
Message-ID: <20190320135439.12201-3-imre.deak@intel.com> (raw)
In-Reply-To: <20190320135439.12201-1-imre.deak@intel.com>
We copied the original state into the atomic state already earlier in
the function, so no need to do it a second time.
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 9c4ad124302c..f7b44773e1e7 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -13031,8 +13031,6 @@ static int intel_modeset_checks(struct drm_atomic_state *state)
DRM_DEBUG_KMS("New voltage level calculated to be logical %u, actual %u\n",
intel_state->cdclk.logical.voltage_level,
intel_state->cdclk.actual.voltage_level);
- } else {
- to_intel_atomic_state(state)->cdclk.logical = dev_priv->cdclk.logical;
}
intel_modeset_clear_plls(state);
--
2.13.2
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next prev parent reply other threads:[~2019-03-20 13:54 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-20 13:54 [CI 1/4] drm/i915: Force 2*96 MHz cdclk on glk/cnl when audio power is enabled Imre Deak
2019-03-20 13:54 ` [CI 2/4] drm/i915: Save the old CDCLK atomic state Imre Deak
2019-03-20 13:54 ` Imre Deak [this message]
2019-03-20 13:54 ` [CI 4/4] drm/i915: Skip modeset for cdclk changes if possible Imre Deak
2019-03-21 21:53 ` Clinton Taylor
2019-03-22 20:23 ` Imre Deak
2019-03-26 11:49 ` Imre Deak
2019-03-27 10:13 ` [PATCH v9 " Imre Deak
2019-04-02 20:13 ` Clinton Taylor
2019-03-20 16:58 ` ✗ Fi.CI.SPARSE: warning for series starting with [CI,1/4] drm/i915: Force 2*96 MHz cdclk on glk/cnl when audio power is enabled Patchwork
2019-03-20 17:23 ` ✓ Fi.CI.BAT: success " Patchwork
2019-03-21 0:32 ` ✗ Fi.CI.IGT: failure " Patchwork
2019-03-21 15:56 ` Imre Deak
2019-04-03 16:07 ` Imre Deak
2019-03-21 21:20 ` [CI 1/4] " Clinton Taylor
2019-03-22 9:38 ` Jani Nikula
2019-03-27 14:08 ` ✗ Fi.CI.SPARSE: warning for series starting with [CI,1/4] drm/i915: Force 2*96 MHz cdclk on glk/cnl when audio power is enabled (rev2) Patchwork
2019-03-27 14:35 ` ✓ Fi.CI.BAT: success " Patchwork
2019-03-28 3:53 ` ✗ Fi.CI.IGT: failure " Patchwork
2019-03-28 13:27 ` Imre Deak
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