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From: laurentiu.tudor at nxp.com <laurentiu.tudor@nxp.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 1/2] armv8: fsl-layerscape: add missing sec jr base address defines
Date: Wed, 20 Mar 2019 16:31:26 +0200	[thread overview]
Message-ID: <20190320143130.32726-1-laurentiu.tudor@nxp.com> (raw)

From: Laurentiu Tudor <laurentiu.tudor@nxp.com>

Add defines for all the SEC job rings base addresses.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
---
 arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
index 9fab88ab2f..fc14fb6fe0 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
@@ -89,10 +89,18 @@
 /* SEC */
 #define CONFIG_SYS_FSL_SEC_OFFSET		0x07000000ull
 #define CONFIG_SYS_FSL_JR0_OFFSET		0x07010000ull
+#define FSL_SEC_JR0_OFFSET			CONFIG_SYS_FSL_JR0_OFFSET
+#define FSL_SEC_JR1_OFFSET			0x07020000ull
+#define FSL_SEC_JR2_OFFSET			0x07030000ull
+#define FSL_SEC_JR3_OFFSET			0x07040000ull
 #define CONFIG_SYS_FSL_SEC_ADDR \
 	(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_SEC_OFFSET)
 #define CONFIG_SYS_FSL_JR0_ADDR \
 	(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_JR0_OFFSET)
+#define FSL_SEC_JR0_BASE_ADDR (CONFIG_SYS_IMMR + FSL_SEC_JR0_OFFSET)
+#define FSL_SEC_JR1_BASE_ADDR (CONFIG_SYS_IMMR + FSL_SEC_JR1_OFFSET)
+#define FSL_SEC_JR2_BASE_ADDR (CONFIG_SYS_IMMR + FSL_SEC_JR2_OFFSET)
+#define FSL_SEC_JR3_BASE_ADDR (CONFIG_SYS_IMMR + FSL_SEC_JR3_OFFSET)
 
 #ifdef CONFIG_TFABOOT
 #ifdef CONFIG_NXP_LSCH3_2
-- 
2.17.1

             reply	other threads:[~2019-03-20 14:31 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-20 14:31 laurentiu.tudor at nxp.com [this message]
2019-03-20 14:31 ` [U-Boot] [PATCH 2/2] armv8: ls1088a: add icid setup for platform devices laurentiu.tudor at nxp.com
2019-03-21 10:36   ` Horia Geanta
2019-03-21 12:42     ` Laurentiu Tudor
2019-03-21 15:10       ` Horia Geanta
2019-03-21 15:37         ` Laurentiu Tudor
2019-03-21 12:47     ` Laurentiu Tudor
2019-03-21 13:03     ` Laurentiu Tudor
2019-03-20 14:31 ` [U-Boot] [PATCH v2 1/3] fsl_sec: fix register layout on Layerscape architectures laurentiu.tudor at nxp.com
2019-03-20 15:04   ` Laurentiu Tudor
2019-03-20 14:31 ` [U-Boot] [PATCH v2 2/3] armv8: fsl-layerscape: fix SEC QI ICID setup laurentiu.tudor at nxp.com
2019-03-20 14:31 ` [U-Boot] [PATCH v2 3/3] armv8: fsl-layerscape: avoid DT fixup warning laurentiu.tudor at nxp.com
2019-03-21 10:39 ` [U-Boot] [PATCH 1/2] armv8: fsl-layerscape: add missing sec jr base address defines Horia Geanta

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