* [PATCH 1/9] drm/i915: Accept alloc_size == blocks
2019-03-12 20:58 [PATCH 0/9] skl+ cursor DDB allocation fixes Ville Syrjala
@ 2019-03-12 20:58 ` Ville Syrjala
2019-03-12 20:58 ` [PATCH 2/9] drm/i915: Don't pass plane state to skl_compute_plane_wm() Ville Syrjala
` (13 subsequent siblings)
14 siblings, 0 replies; 25+ messages in thread
From: Ville Syrjala @ 2019-03-12 20:58 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
If the minimum required ddb space for all the planes equals the
total ddb space available we are allowed to use the relevant
watermark level.
Cc: Neel Desai <neel.desai@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_pm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index d73b13ca57a0..07351ceb567b 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4378,7 +4378,7 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
blocks += wm->uv_wm[level].min_ddb_alloc;
}
- if (blocks < alloc_size) {
+ if (blocks <= alloc_size) {
alloc_size -= blocks;
break;
}
--
2.19.2
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Intel-gfx@lists.freedesktop.org
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^ permalink raw reply related [flat|nested] 25+ messages in thread* [PATCH 2/9] drm/i915: Don't pass plane state to skl_compute_plane_wm()
2019-03-12 20:58 [PATCH 0/9] skl+ cursor DDB allocation fixes Ville Syrjala
2019-03-12 20:58 ` [PATCH 1/9] drm/i915: Accept alloc_size == blocks Ville Syrjala
@ 2019-03-12 20:58 ` Ville Syrjala
2019-03-12 20:58 ` [PATCH 3/9] drm/i915: Extract skl_compute_wm_params() Ville Syrjala
` (12 subsequent siblings)
14 siblings, 0 replies; 25+ messages in thread
From: Ville Syrjala @ 2019-03-12 20:58 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
skl_compute_plane_wm() doesn't actually need the plane state. While
it would make logically sense to pass it, we shall need to reuse
skl_compute_plane_wm() to compute the minimum ddb allocation for
the cursor before the cursor may be enabled. Thus we can't rely
on the plane state. The alternative would be to duplicate a lot of
the wm calculations for the cursor ddb allocation case, which doens't
appeal to me.
Cc: Neel Desai <neel.desai@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_pm.c | 14 +++++---------
1 file changed, 5 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 07351ceb567b..971f8ab127be 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4695,14 +4695,12 @@ static bool skl_wm_has_lines(struct drm_i915_private *dev_priv, int level)
}
static void skl_compute_plane_wm(const struct intel_crtc_state *cstate,
- const struct intel_plane_state *intel_pstate,
int level,
const struct skl_wm_params *wp,
const struct skl_wm_level *result_prev,
struct skl_wm_level *result /* out */)
{
- struct drm_i915_private *dev_priv =
- to_i915(intel_pstate->base.plane->dev);
+ struct drm_i915_private *dev_priv = to_i915(cstate->base.crtc->dev);
u32 latency = dev_priv->wm.skl_latency[level];
uint_fixed_16_16_t method1, method2;
uint_fixed_16_16_t selected_result;
@@ -4821,19 +4819,17 @@ static void skl_compute_plane_wm(const struct intel_crtc_state *cstate,
static void
skl_compute_wm_levels(const struct intel_crtc_state *cstate,
- const struct intel_plane_state *intel_pstate,
const struct skl_wm_params *wm_params,
struct skl_wm_level *levels)
{
- struct drm_i915_private *dev_priv =
- to_i915(intel_pstate->base.plane->dev);
+ struct drm_i915_private *dev_priv = to_i915(cstate->base.crtc->dev);
int level, max_level = ilk_wm_max_level(dev_priv);
struct skl_wm_level *result_prev = &levels[0];
for (level = 0; level <= max_level; level++) {
struct skl_wm_level *result = &levels[level];
- skl_compute_plane_wm(cstate, intel_pstate, level, wm_params,
+ skl_compute_plane_wm(cstate, level, wm_params,
result_prev, result);
result_prev = result;
@@ -4930,7 +4926,7 @@ static int skl_build_plane_wm_single(struct intel_crtc_state *crtc_state,
if (ret)
return ret;
- skl_compute_wm_levels(crtc_state, plane_state, &wm_params, wm->wm);
+ skl_compute_wm_levels(crtc_state, &wm_params, wm->wm);
skl_compute_transition_wm(crtc_state, &wm_params, wm);
return 0;
@@ -4952,7 +4948,7 @@ static int skl_build_plane_wm_uv(struct intel_crtc_state *crtc_state,
if (ret)
return ret;
- skl_compute_wm_levels(crtc_state, plane_state, &wm_params, wm->uv_wm);
+ skl_compute_wm_levels(crtc_state, &wm_params, wm->uv_wm);
return 0;
}
--
2.19.2
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 25+ messages in thread* [PATCH 3/9] drm/i915: Extract skl_compute_wm_params()
2019-03-12 20:58 [PATCH 0/9] skl+ cursor DDB allocation fixes Ville Syrjala
2019-03-12 20:58 ` [PATCH 1/9] drm/i915: Accept alloc_size == blocks Ville Syrjala
2019-03-12 20:58 ` [PATCH 2/9] drm/i915: Don't pass plane state to skl_compute_plane_wm() Ville Syrjala
@ 2019-03-12 20:58 ` Ville Syrjala
2019-03-12 20:58 ` [PATCH 4/9] drm/i915: Allocate enough DDB for the cursor Ville Syrjala
` (11 subsequent siblings)
14 siblings, 0 replies; 25+ messages in thread
From: Ville Syrjala @ 2019-03-12 20:58 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Extract the meat of skl_compute_plane_wm_params() into a lower
level helper that doesn't depend on the plane state. We'll
reuse this for the cursor ddb allocation calculations.
Cc: Neel Desai <neel.desai@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_pm.c | 84 ++++++++++++++++++++-------------
1 file changed, 50 insertions(+), 34 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 971f8ab127be..9e7b4412f7a8 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4584,57 +4584,45 @@ skl_adjusted_plane_pixel_rate(const struct intel_crtc_state *cstate,
}
static int
-skl_compute_plane_wm_params(const struct intel_crtc_state *cstate,
- const struct intel_plane_state *intel_pstate,
- struct skl_wm_params *wp, int color_plane)
+skl_compute_wm_params(const struct intel_crtc_state *crtc_state,
+ int width, const struct drm_format_info *format,
+ u64 modifier, unsigned int rotation,
+ u32 plane_pixel_rate, struct skl_wm_params *wp,
+ int color_plane)
{
- struct intel_plane *plane = to_intel_plane(intel_pstate->base.plane);
- struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
- const struct drm_plane_state *pstate = &intel_pstate->base;
- const struct drm_framebuffer *fb = pstate->fb;
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
+ struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
u32 interm_pbpl;
/* only planar format has two planes */
- if (color_plane == 1 && !is_planar_yuv_format(fb->format->format)) {
+ if (color_plane == 1 && !is_planar_yuv_format(format->format)) {
DRM_DEBUG_KMS("Non planar format have single plane\n");
return -EINVAL;
}
- wp->y_tiled = fb->modifier == I915_FORMAT_MOD_Y_TILED ||
- fb->modifier == I915_FORMAT_MOD_Yf_TILED ||
- fb->modifier == I915_FORMAT_MOD_Y_TILED_CCS ||
- fb->modifier == I915_FORMAT_MOD_Yf_TILED_CCS;
- wp->x_tiled = fb->modifier == I915_FORMAT_MOD_X_TILED;
- wp->rc_surface = fb->modifier == I915_FORMAT_MOD_Y_TILED_CCS ||
- fb->modifier == I915_FORMAT_MOD_Yf_TILED_CCS;
- wp->is_planar = is_planar_yuv_format(fb->format->format);
-
- if (plane->id == PLANE_CURSOR) {
- wp->width = intel_pstate->base.crtc_w;
- } else {
- /*
- * Src coordinates are already rotated by 270 degrees for
- * the 90/270 degree plane rotation cases (to match the
- * GTT mapping), hence no need to account for rotation here.
- */
- wp->width = drm_rect_width(&intel_pstate->base.src) >> 16;
- }
+ wp->y_tiled = modifier == I915_FORMAT_MOD_Y_TILED ||
+ modifier == I915_FORMAT_MOD_Yf_TILED ||
+ modifier == I915_FORMAT_MOD_Y_TILED_CCS ||
+ modifier == I915_FORMAT_MOD_Yf_TILED_CCS;
+ wp->x_tiled = modifier == I915_FORMAT_MOD_X_TILED;
+ wp->rc_surface = modifier == I915_FORMAT_MOD_Y_TILED_CCS ||
+ modifier == I915_FORMAT_MOD_Yf_TILED_CCS;
+ wp->is_planar = is_planar_yuv_format(format->format);
+ wp->width = width;
if (color_plane == 1 && wp->is_planar)
wp->width /= 2;
- wp->cpp = fb->format->cpp[color_plane];
- wp->plane_pixel_rate = skl_adjusted_plane_pixel_rate(cstate,
- intel_pstate);
+ wp->cpp = format->cpp[color_plane];
+ wp->plane_pixel_rate = plane_pixel_rate;
if (INTEL_GEN(dev_priv) >= 11 &&
- fb->modifier == I915_FORMAT_MOD_Yf_TILED && wp->cpp == 1)
+ modifier == I915_FORMAT_MOD_Yf_TILED && wp->cpp == 1)
wp->dbuf_block_size = 256;
else
wp->dbuf_block_size = 512;
- if (drm_rotation_90_or_270(pstate->rotation)) {
-
+ if (drm_rotation_90_or_270(rotation)) {
switch (wp->cpp) {
case 1:
wp->y_min_scanlines = 16;
@@ -4679,12 +4667,40 @@ skl_compute_plane_wm_params(const struct intel_crtc_state *cstate,
wp->y_tile_minimum = mul_u32_fixed16(wp->y_min_scanlines,
wp->plane_blocks_per_line);
+
wp->linetime_us = fixed16_to_u32_round_up(
- intel_get_linetime_us(cstate));
+ intel_get_linetime_us(crtc_state));
return 0;
}
+static int
+skl_compute_plane_wm_params(const struct intel_crtc_state *crtc_state,
+ const struct intel_plane_state *plane_state,
+ struct skl_wm_params *wp, int color_plane)
+{
+ struct intel_plane *plane = to_intel_plane(plane_state->base.plane);
+ const struct drm_framebuffer *fb = plane_state->base.fb;
+ int width;
+
+ if (plane->id == PLANE_CURSOR) {
+ width = plane_state->base.crtc_w;
+ } else {
+ /*
+ * Src coordinates are already rotated by 270 degrees for
+ * the 90/270 degree plane rotation cases (to match the
+ * GTT mapping), hence no need to account for rotation here.
+ */
+ width = drm_rect_width(&plane_state->base.src) >> 16;
+ }
+
+ return skl_compute_wm_params(crtc_state, width,
+ fb->format, fb->modifier,
+ plane_state->base.rotation,
+ skl_adjusted_plane_pixel_rate(crtc_state, plane_state),
+ wp, color_plane);
+}
+
static bool skl_wm_has_lines(struct drm_i915_private *dev_priv, int level)
{
if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
--
2.19.2
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 25+ messages in thread* [PATCH 4/9] drm/i915: Allocate enough DDB for the cursor
2019-03-12 20:58 [PATCH 0/9] skl+ cursor DDB allocation fixes Ville Syrjala
` (2 preceding siblings ...)
2019-03-12 20:58 ` [PATCH 3/9] drm/i915: Extract skl_compute_wm_params() Ville Syrjala
@ 2019-03-12 20:58 ` Ville Syrjala
2019-03-19 10:51 ` Ville Syrjälä
2019-03-19 16:03 ` [PATCH v2 " Ville Syrjala
2019-03-12 20:58 ` [PATCH 5/9] drm/i915: Make sure cursor has enough ddb for the selected wm level Ville Syrjala
` (10 subsequent siblings)
14 siblings, 2 replies; 25+ messages in thread
From: Ville Syrjala @ 2019-03-12 20:58 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Currently we just assume that 32 or 8 blocks of ddb is sufficient
for the cursor. The 32 might be, but the 8 is certainly not. The
minimum we need is at least what level 0 watermarks need, but that
is a bit restrictive, so instead let's calculate what level 7
would need for a 256x256 cursor. We'll use that to determine the
fixed ddb allocation for the cursor. This way the cursor will never
be responsible for missing out on deeper power saving states.
Cc: Neel Desai <neel.desai@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_pm.c | 33 ++++++++++++++++++++++++++++-----
1 file changed, 28 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 9e7b4412f7a8..ae9a0ce4dcb9 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3924,12 +3924,35 @@ skl_ddb_get_pipe_allocation_limits(struct drm_i915_private *dev_priv,
alloc->end = ddb_size * (width_before_pipe + pipe_width) / total_width;
}
-static unsigned int skl_cursor_allocation(int num_active)
+static int skl_compute_wm_params(const struct intel_crtc_state *crtc_state,
+ int width, const struct drm_format_info *format,
+ u64 modifier, unsigned int rotation,
+ u32 plane_pixel_rate, struct skl_wm_params *wp,
+ int color_plane);
+static void skl_compute_plane_wm(const struct intel_crtc_state *cstate,
+ int level,
+ const struct skl_wm_params *wp,
+ const struct skl_wm_level *result_prev,
+ struct skl_wm_level *result /* out */);
+
+static unsigned int
+skl_cursor_allocation(const struct intel_crtc_state *crtc_state,
+ int num_active)
{
- if (num_active == 1)
- return 32;
+ struct skl_wm_level wm = {};
+ struct skl_wm_params wp;
+ int ret;
+
+ ret = skl_compute_wm_params(crtc_state, 256,
+ drm_format_info(DRM_FORMAT_ARGB8888),
+ DRM_FORMAT_MOD_LINEAR,
+ DRM_MODE_ROTATE_0,
+ crtc_state->pixel_rate, &wp, 0);
+ WARN_ON(ret);
+
+ skl_compute_plane_wm(crtc_state, 7, &wp, &wm, &wm);
- return 8;
+ return max_t(int, num_active == 1 ? 32 : 8, wm.min_ddb_alloc);
}
static void skl_ddb_entry_init_from_hw(struct drm_i915_private *dev_priv,
@@ -4354,7 +4377,7 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
return 0;
/* Allocate fixed number of blocks for cursor. */
- total[PLANE_CURSOR] = skl_cursor_allocation(num_active);
+ total[PLANE_CURSOR] = skl_cursor_allocation(cstate, num_active);
alloc_size -= total[PLANE_CURSOR];
cstate->wm.skl.plane_ddb_y[PLANE_CURSOR].start =
alloc->end - total[PLANE_CURSOR];
--
2.19.2
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^ permalink raw reply related [flat|nested] 25+ messages in thread* Re: [PATCH 4/9] drm/i915: Allocate enough DDB for the cursor
2019-03-12 20:58 ` [PATCH 4/9] drm/i915: Allocate enough DDB for the cursor Ville Syrjala
@ 2019-03-19 10:51 ` Ville Syrjälä
2019-03-19 16:03 ` [PATCH v2 " Ville Syrjala
1 sibling, 0 replies; 25+ messages in thread
From: Ville Syrjälä @ 2019-03-19 10:51 UTC (permalink / raw)
To: intel-gfx
On Tue, Mar 12, 2019 at 10:58:39PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Currently we just assume that 32 or 8 blocks of ddb is sufficient
> for the cursor. The 32 might be, but the 8 is certainly not. The
> minimum we need is at least what level 0 watermarks need, but that
> is a bit restrictive, so instead let's calculate what level 7
> would need for a 256x256 cursor. We'll use that to determine the
> fixed ddb allocation for the cursor. This way the cursor will never
> be responsible for missing out on deeper power saving states.
>
> Cc: Neel Desai <neel.desai@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/intel_pm.c | 33 ++++++++++++++++++++++++++++-----
> 1 file changed, 28 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 9e7b4412f7a8..ae9a0ce4dcb9 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3924,12 +3924,35 @@ skl_ddb_get_pipe_allocation_limits(struct drm_i915_private *dev_priv,
> alloc->end = ddb_size * (width_before_pipe + pipe_width) / total_width;
> }
>
> -static unsigned int skl_cursor_allocation(int num_active)
> +static int skl_compute_wm_params(const struct intel_crtc_state *crtc_state,
> + int width, const struct drm_format_info *format,
> + u64 modifier, unsigned int rotation,
> + u32 plane_pixel_rate, struct skl_wm_params *wp,
> + int color_plane);
> +static void skl_compute_plane_wm(const struct intel_crtc_state *cstate,
> + int level,
> + const struct skl_wm_params *wp,
> + const struct skl_wm_level *result_prev,
> + struct skl_wm_level *result /* out */);
> +
> +static unsigned int
> +skl_cursor_allocation(const struct intel_crtc_state *crtc_state,
> + int num_active)
> {
> - if (num_active == 1)
> - return 32;
> + struct skl_wm_level wm = {};
> + struct skl_wm_params wp;
> + int ret;
> +
> + ret = skl_compute_wm_params(crtc_state, 256,
> + drm_format_info(DRM_FORMAT_ARGB8888),
> + DRM_FORMAT_MOD_LINEAR,
> + DRM_MODE_ROTATE_0,
> + crtc_state->pixel_rate, &wp, 0);
> + WARN_ON(ret);
> +
> + skl_compute_plane_wm(crtc_state, 7, &wp, &wm, &wm);
Hmm. This borked if latency[7]==0. I guess I actually need to loop
here...
>
> - return 8;
> + return max_t(int, num_active == 1 ? 32 : 8, wm.min_ddb_alloc);
> }
>
> static void skl_ddb_entry_init_from_hw(struct drm_i915_private *dev_priv,
> @@ -4354,7 +4377,7 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
> return 0;
>
> /* Allocate fixed number of blocks for cursor. */
> - total[PLANE_CURSOR] = skl_cursor_allocation(num_active);
> + total[PLANE_CURSOR] = skl_cursor_allocation(cstate, num_active);
> alloc_size -= total[PLANE_CURSOR];
> cstate->wm.skl.plane_ddb_y[PLANE_CURSOR].start =
> alloc->end - total[PLANE_CURSOR];
> --
> 2.19.2
--
Ville Syrjälä
Intel
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^ permalink raw reply [flat|nested] 25+ messages in thread* [PATCH v2 4/9] drm/i915: Allocate enough DDB for the cursor
2019-03-12 20:58 ` [PATCH 4/9] drm/i915: Allocate enough DDB for the cursor Ville Syrjala
2019-03-19 10:51 ` Ville Syrjälä
@ 2019-03-19 16:03 ` Ville Syrjala
1 sibling, 0 replies; 25+ messages in thread
From: Ville Syrjala @ 2019-03-19 16:03 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Currently we just assume that 32 or 8 blocks of ddb is sufficient
for the cursor. The 32 might be, but the 8 is certainly not. The
minimum we need is at least what level 0 watermarks need, but that
is a bit restrictive, so instead let's calculate what level 7
would need for a 256x256 cursor. We'll use that to determine the
fixed ddb allocation for the cursor. This way the cursor will never
be responsible for missing out on deeper power saving states.
v2: Loop to make sure this works even if some wm levels are
totally disabled (latency==0)
Cc: Neel Desai <neel.desai@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com> #v1
---
drivers/gpu/drm/i915/intel_pm.c | 41 +++++++++++++++++++++++++++++----
1 file changed, 36 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 9e7b4412f7a8..b35a55a59680 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3924,12 +3924,43 @@ skl_ddb_get_pipe_allocation_limits(struct drm_i915_private *dev_priv,
alloc->end = ddb_size * (width_before_pipe + pipe_width) / total_width;
}
-static unsigned int skl_cursor_allocation(int num_active)
+static int skl_compute_wm_params(const struct intel_crtc_state *crtc_state,
+ int width, const struct drm_format_info *format,
+ u64 modifier, unsigned int rotation,
+ u32 plane_pixel_rate, struct skl_wm_params *wp,
+ int color_plane);
+static void skl_compute_plane_wm(const struct intel_crtc_state *cstate,
+ int level,
+ const struct skl_wm_params *wp,
+ const struct skl_wm_level *result_prev,
+ struct skl_wm_level *result /* out */);
+
+static unsigned int
+skl_cursor_allocation(const struct intel_crtc_state *crtc_state,
+ int num_active)
{
- if (num_active == 1)
- return 32;
+ struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);
+ int level, max_level = ilk_wm_max_level(dev_priv);
+ struct skl_wm_level wm = {};
+ int ret, min_ddb_alloc = 0;
+ struct skl_wm_params wp;
+
+ ret = skl_compute_wm_params(crtc_state, 256,
+ drm_format_info(DRM_FORMAT_ARGB8888),
+ DRM_FORMAT_MOD_LINEAR,
+ DRM_MODE_ROTATE_0,
+ crtc_state->pixel_rate, &wp, 0);
+ WARN_ON(ret);
+
+ for (level = 0; level <= max_level; level++) {
+ skl_compute_plane_wm(crtc_state, 7, &wp, &wm, &wm);
+ if (wm.min_ddb_alloc == U16_MAX)
+ break;
+
+ min_ddb_alloc = wm.min_ddb_alloc;
+ }
- return 8;
+ return max(num_active == 1 ? 32 : 8, min_ddb_alloc);
}
static void skl_ddb_entry_init_from_hw(struct drm_i915_private *dev_priv,
@@ -4354,7 +4385,7 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
return 0;
/* Allocate fixed number of blocks for cursor. */
- total[PLANE_CURSOR] = skl_cursor_allocation(num_active);
+ total[PLANE_CURSOR] = skl_cursor_allocation(cstate, num_active);
alloc_size -= total[PLANE_CURSOR];
cstate->wm.skl.plane_ddb_y[PLANE_CURSOR].start =
alloc->end - total[PLANE_CURSOR];
--
2.19.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH 5/9] drm/i915: Make sure cursor has enough ddb for the selected wm level
2019-03-12 20:58 [PATCH 0/9] skl+ cursor DDB allocation fixes Ville Syrjala
` (3 preceding siblings ...)
2019-03-12 20:58 ` [PATCH 4/9] drm/i915: Allocate enough DDB for the cursor Ville Syrjala
@ 2019-03-12 20:58 ` Ville Syrjala
2019-03-12 20:58 ` [PATCH 6/9] drm/i915: Keep plane watermarks enabled more aggressively Ville Syrjala
` (9 subsequent siblings)
14 siblings, 0 replies; 25+ messages in thread
From: Ville Syrjala @ 2019-03-12 20:58 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
We use a fixed ddb allocation for the cursor. Now the calculation
actually makes sure we have enough ddb space, but let's double check
anyway.
Cc: Neel Desai <neel.desai@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_pm.c | 11 +++++++++--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index ae9a0ce4dcb9..c866663b31bc 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4393,10 +4393,17 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
for (level = ilk_wm_max_level(dev_priv); level >= 0; level--) {
blocks = 0;
for_each_plane_id_on_crtc(intel_crtc, plane_id) {
- if (plane_id == PLANE_CURSOR)
+ wm = &cstate->wm.skl.optimal.planes[plane_id];
+
+ if (plane_id == PLANE_CURSOR) {
+ if (WARN_ON(wm->wm[level].min_ddb_alloc >
+ total[PLANE_CURSOR])) {
+ blocks = U32_MAX;
+ break;
+ }
continue;
+ }
- wm = &cstate->wm.skl.optimal.planes[plane_id];
blocks += wm->wm[level].min_ddb_alloc;
blocks += wm->uv_wm[level].min_ddb_alloc;
}
--
2.19.2
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 25+ messages in thread* [PATCH 6/9] drm/i915: Keep plane watermarks enabled more aggressively
2019-03-12 20:58 [PATCH 0/9] skl+ cursor DDB allocation fixes Ville Syrjala
` (4 preceding siblings ...)
2019-03-12 20:58 ` [PATCH 5/9] drm/i915: Make sure cursor has enough ddb for the selected wm level Ville Syrjala
@ 2019-03-12 20:58 ` Ville Syrjala
2019-03-19 0:09 ` Matt Roper
2019-03-12 20:58 ` [PATCH 7/9] drm/i915: Move some variables to tighter scope Ville Syrjala
` (8 subsequent siblings)
14 siblings, 1 reply; 25+ messages in thread
From: Ville Syrjala @ 2019-03-12 20:58 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Currently we disable all the watermarks above the selected max
level for every plane. That would mean that the cursor's watermarks
may also get modified when another plane causes the selected
max watermark level to change. That is not so great as we would
like to keep the cursor as indepenedent as possible to avoid
having to throttle it in resposne to other plane activity.
To avoid that let's keep the watermarks enabled even for levels
above the max selected watermark level, iff the plane has enough
ddb for that particular level. This way the cursor's enabled
watermarks only depend on the cursor itself. This is safe because
the hardware will never choose to use a watermark level unless
all enabled planes have also enabled that level.
Cc: Neel Desai <neel.desai@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_pm.c | 17 ++++++++++++++++-
1 file changed, 16 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index c866663b31bc..8afbc56ad89a 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4500,7 +4500,22 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
for (level++; level <= ilk_wm_max_level(dev_priv); level++) {
for_each_plane_id_on_crtc(intel_crtc, plane_id) {
wm = &cstate->wm.skl.optimal.planes[plane_id];
- memset(&wm->wm[level], 0, sizeof(wm->wm[level]));
+
+ /*
+ * We only disable the watermarks for each plane if
+ * they exceed the ddb allocation of said plane. This
+ * is done so that we don't end up touching cursor
+ * watermarks needlessly when some other plane reduces
+ * our max possible watermark level.
+ *
+ * Bspec has this to say about the PLANE_WM enable bit:
+ * "All the watermarks at this level for all enabled
+ * planes must be enabled before the level will be used."
+ * So this is actually safe to do.
+ */
+ if (wm->wm[level].min_ddb_alloc > total[plane_id] ||
+ wm->uv_wm[level].min_ddb_alloc > uv_total[plane_id])
+ memset(&wm->wm[level], 0, sizeof(wm->wm[level]));
/*
* Wa_1408961008:icl
--
2.19.2
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 25+ messages in thread* Re: [PATCH 6/9] drm/i915: Keep plane watermarks enabled more aggressively
2019-03-12 20:58 ` [PATCH 6/9] drm/i915: Keep plane watermarks enabled more aggressively Ville Syrjala
@ 2019-03-19 0:09 ` Matt Roper
0 siblings, 0 replies; 25+ messages in thread
From: Matt Roper @ 2019-03-19 0:09 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
On Tue, Mar 12, 2019 at 10:58:41PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Currently we disable all the watermarks above the selected max
> level for every plane. That would mean that the cursor's watermarks
> may also get modified when another plane causes the selected
> max watermark level to change. That is not so great as we would
> like to keep the cursor as indepenedent as possible to avoid
> having to throttle it in resposne to other plane activity.
>
> To avoid that let's keep the watermarks enabled even for levels
> above the max selected watermark level, iff the plane has enough
> ddb for that particular level. This way the cursor's enabled
> watermarks only depend on the cursor itself. This is safe because
> the hardware will never choose to use a watermark level unless
> all enabled planes have also enabled that level.
>
> Cc: Neel Desai <neel.desai@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Iirc, we also had different levels enabled for different planes with the
old algorithm that calculated DDB first and watermarks second. So
agreed; this should be very safe.
Patches 1-6 are
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Matt
> ---
> drivers/gpu/drm/i915/intel_pm.c | 17 ++++++++++++++++-
> 1 file changed, 16 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index c866663b31bc..8afbc56ad89a 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4500,7 +4500,22 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
> for (level++; level <= ilk_wm_max_level(dev_priv); level++) {
> for_each_plane_id_on_crtc(intel_crtc, plane_id) {
> wm = &cstate->wm.skl.optimal.planes[plane_id];
> - memset(&wm->wm[level], 0, sizeof(wm->wm[level]));
> +
> + /*
> + * We only disable the watermarks for each plane if
> + * they exceed the ddb allocation of said plane. This
> + * is done so that we don't end up touching cursor
> + * watermarks needlessly when some other plane reduces
> + * our max possible watermark level.
> + *
> + * Bspec has this to say about the PLANE_WM enable bit:
> + * "All the watermarks at this level for all enabled
> + * planes must be enabled before the level will be used."
> + * So this is actually safe to do.
> + */
> + if (wm->wm[level].min_ddb_alloc > total[plane_id] ||
> + wm->uv_wm[level].min_ddb_alloc > uv_total[plane_id])
> + memset(&wm->wm[level], 0, sizeof(wm->wm[level]));
>
> /*
> * Wa_1408961008:icl
> --
> 2.19.2
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Matt Roper
Graphics Software Engineer
IoTG Platform Enabling & Development
Intel Corporation
(916) 356-2795
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH 7/9] drm/i915: Move some variables to tighter scope
2019-03-12 20:58 [PATCH 0/9] skl+ cursor DDB allocation fixes Ville Syrjala
` (5 preceding siblings ...)
2019-03-12 20:58 ` [PATCH 6/9] drm/i915: Keep plane watermarks enabled more aggressively Ville Syrjala
@ 2019-03-12 20:58 ` Ville Syrjala
2019-03-19 0:10 ` Matt Roper
2019-03-12 20:58 ` [PATCH 8/9] drm/i915: Don't pass pipe_wm around so much Ville Syrjala
` (7 subsequent siblings)
14 siblings, 1 reply; 25+ messages in thread
From: Ville Syrjala @ 2019-03-12 20:58 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Clean up skl_allocate_pipe_ddb() a bit by moving the 'wm' variable
to tighter scope. We'll also consitify it where appropriate.
Cc: Neel Desai <neel.desai@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_pm.c | 23 +++++++++++++----------
1 file changed, 13 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 8afbc56ad89a..b958a1a00014 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4336,7 +4336,6 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
struct drm_i915_private *dev_priv = to_i915(crtc->dev);
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
struct skl_ddb_entry *alloc = &cstate->wm.skl.ddb;
- struct skl_plane_wm *wm;
u16 alloc_size, start = 0;
u16 total[I915_MAX_PLANES] = {};
u16 uv_total[I915_MAX_PLANES] = {};
@@ -4393,7 +4392,8 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
for (level = ilk_wm_max_level(dev_priv); level >= 0; level--) {
blocks = 0;
for_each_plane_id_on_crtc(intel_crtc, plane_id) {
- wm = &cstate->wm.skl.optimal.planes[plane_id];
+ const struct skl_plane_wm *wm =
+ &cstate->wm.skl.optimal.planes[plane_id];
if (plane_id == PLANE_CURSOR) {
if (WARN_ON(wm->wm[level].min_ddb_alloc >
@@ -4427,6 +4427,8 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
* proportional to its relative data rate.
*/
for_each_plane_id_on_crtc(intel_crtc, plane_id) {
+ const struct skl_plane_wm *wm =
+ &cstate->wm.skl.optimal.planes[plane_id];
u64 rate;
u16 extra;
@@ -4440,8 +4442,6 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
if (total_data_rate == 0)
break;
- wm = &cstate->wm.skl.optimal.planes[plane_id];
-
rate = plane_data_rate[plane_id];
extra = min_t(u16, alloc_size,
DIV64_U64_ROUND_UP(alloc_size * rate,
@@ -4466,14 +4466,14 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
/* Set the actual DDB start/end points for each plane */
start = alloc->start;
for_each_plane_id_on_crtc(intel_crtc, plane_id) {
- struct skl_ddb_entry *plane_alloc, *uv_plane_alloc;
+ struct skl_ddb_entry *plane_alloc =
+ &cstate->wm.skl.plane_ddb_y[plane_id];
+ struct skl_ddb_entry *uv_plane_alloc =
+ &cstate->wm.skl.plane_ddb_uv[plane_id];
if (plane_id == PLANE_CURSOR)
continue;
- plane_alloc = &cstate->wm.skl.plane_ddb_y[plane_id];
- uv_plane_alloc = &cstate->wm.skl.plane_ddb_uv[plane_id];
-
/* Gen11+ uses a separate plane for UV watermarks */
WARN_ON(INTEL_GEN(dev_priv) >= 11 && uv_total[plane_id]);
@@ -4499,7 +4499,8 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
*/
for (level++; level <= ilk_wm_max_level(dev_priv); level++) {
for_each_plane_id_on_crtc(intel_crtc, plane_id) {
- wm = &cstate->wm.skl.optimal.planes[plane_id];
+ struct skl_plane_wm *wm =
+ &cstate->wm.skl.optimal.planes[plane_id];
/*
* We only disable the watermarks for each plane if
@@ -4535,7 +4536,9 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
* don't have enough DDB blocks for it.
*/
for_each_plane_id_on_crtc(intel_crtc, plane_id) {
- wm = &cstate->wm.skl.optimal.planes[plane_id];
+ struct skl_plane_wm *wm =
+ &cstate->wm.skl.optimal.planes[plane_id];
+
if (wm->trans_wm.plane_res_b >= total[plane_id])
memset(&wm->trans_wm, 0, sizeof(wm->trans_wm));
}
--
2.19.2
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 25+ messages in thread* Re: [PATCH 7/9] drm/i915: Move some variables to tighter scope
2019-03-12 20:58 ` [PATCH 7/9] drm/i915: Move some variables to tighter scope Ville Syrjala
@ 2019-03-19 0:10 ` Matt Roper
2019-03-20 15:27 ` Ville Syrjälä
0 siblings, 1 reply; 25+ messages in thread
From: Matt Roper @ 2019-03-19 0:10 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
On Tue, Mar 12, 2019 at 10:58:42PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Clean up skl_allocate_pipe_ddb() a bit by moving the 'wm' variable
> to tighter scope. We'll also consitify it where appropriate.
>
> Cc: Neel Desai <neel.desai@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/intel_pm.c | 23 +++++++++++++----------
> 1 file changed, 13 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 8afbc56ad89a..b958a1a00014 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4336,7 +4336,6 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
> struct drm_i915_private *dev_priv = to_i915(crtc->dev);
> struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> struct skl_ddb_entry *alloc = &cstate->wm.skl.ddb;
> - struct skl_plane_wm *wm;
> u16 alloc_size, start = 0;
> u16 total[I915_MAX_PLANES] = {};
> u16 uv_total[I915_MAX_PLANES] = {};
> @@ -4393,7 +4392,8 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
> for (level = ilk_wm_max_level(dev_priv); level >= 0; level--) {
> blocks = 0;
> for_each_plane_id_on_crtc(intel_crtc, plane_id) {
> - wm = &cstate->wm.skl.optimal.planes[plane_id];
> + const struct skl_plane_wm *wm =
> + &cstate->wm.skl.optimal.planes[plane_id];
>
> if (plane_id == PLANE_CURSOR) {
> if (WARN_ON(wm->wm[level].min_ddb_alloc >
> @@ -4427,6 +4427,8 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
> * proportional to its relative data rate.
> */
> for_each_plane_id_on_crtc(intel_crtc, plane_id) {
> + const struct skl_plane_wm *wm =
> + &cstate->wm.skl.optimal.planes[plane_id];
> u64 rate;
> u16 extra;
>
> @@ -4440,8 +4442,6 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
> if (total_data_rate == 0)
> break;
>
> - wm = &cstate->wm.skl.optimal.planes[plane_id];
> -
> rate = plane_data_rate[plane_id];
> extra = min_t(u16, alloc_size,
> DIV64_U64_ROUND_UP(alloc_size * rate,
> @@ -4466,14 +4466,14 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
> /* Set the actual DDB start/end points for each plane */
> start = alloc->start;
> for_each_plane_id_on_crtc(intel_crtc, plane_id) {
> - struct skl_ddb_entry *plane_alloc, *uv_plane_alloc;
> + struct skl_ddb_entry *plane_alloc =
> + &cstate->wm.skl.plane_ddb_y[plane_id];
> + struct skl_ddb_entry *uv_plane_alloc =
> + &cstate->wm.skl.plane_ddb_uv[plane_id];
>
> if (plane_id == PLANE_CURSOR)
> continue;
>
> - plane_alloc = &cstate->wm.skl.plane_ddb_y[plane_id];
> - uv_plane_alloc = &cstate->wm.skl.plane_ddb_uv[plane_id];
> -
> /* Gen11+ uses a separate plane for UV watermarks */
> WARN_ON(INTEL_GEN(dev_priv) >= 11 && uv_total[plane_id]);
>
This hunk is fine, but isn't what's described in the commit message.
Maybe throw an extra sentence in there referencing this change?
Aside from that,
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
> @@ -4499,7 +4499,8 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
> */
> for (level++; level <= ilk_wm_max_level(dev_priv); level++) {
> for_each_plane_id_on_crtc(intel_crtc, plane_id) {
> - wm = &cstate->wm.skl.optimal.planes[plane_id];
> + struct skl_plane_wm *wm =
> + &cstate->wm.skl.optimal.planes[plane_id];
>
> /*
> * We only disable the watermarks for each plane if
> @@ -4535,7 +4536,9 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
> * don't have enough DDB blocks for it.
> */
> for_each_plane_id_on_crtc(intel_crtc, plane_id) {
> - wm = &cstate->wm.skl.optimal.planes[plane_id];
> + struct skl_plane_wm *wm =
> + &cstate->wm.skl.optimal.planes[plane_id];
> +
> if (wm->trans_wm.plane_res_b >= total[plane_id])
> memset(&wm->trans_wm, 0, sizeof(wm->trans_wm));
> }
> --
> 2.19.2
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Matt Roper
Graphics Software Engineer
IoTG Platform Enabling & Development
Intel Corporation
(916) 356-2795
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread* Re: [PATCH 7/9] drm/i915: Move some variables to tighter scope
2019-03-19 0:10 ` Matt Roper
@ 2019-03-20 15:27 ` Ville Syrjälä
0 siblings, 0 replies; 25+ messages in thread
From: Ville Syrjälä @ 2019-03-20 15:27 UTC (permalink / raw)
To: Matt Roper; +Cc: intel-gfx
On Mon, Mar 18, 2019 at 05:10:49PM -0700, Matt Roper wrote:
> On Tue, Mar 12, 2019 at 10:58:42PM +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Clean up skl_allocate_pipe_ddb() a bit by moving the 'wm' variable
> > to tighter scope. We'll also consitify it where appropriate.
> >
> > Cc: Neel Desai <neel.desai@intel.com>
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> > drivers/gpu/drm/i915/intel_pm.c | 23 +++++++++++++----------
> > 1 file changed, 13 insertions(+), 10 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > index 8afbc56ad89a..b958a1a00014 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -4336,7 +4336,6 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
> > struct drm_i915_private *dev_priv = to_i915(crtc->dev);
> > struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> > struct skl_ddb_entry *alloc = &cstate->wm.skl.ddb;
> > - struct skl_plane_wm *wm;
> > u16 alloc_size, start = 0;
> > u16 total[I915_MAX_PLANES] = {};
> > u16 uv_total[I915_MAX_PLANES] = {};
> > @@ -4393,7 +4392,8 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
> > for (level = ilk_wm_max_level(dev_priv); level >= 0; level--) {
> > blocks = 0;
> > for_each_plane_id_on_crtc(intel_crtc, plane_id) {
> > - wm = &cstate->wm.skl.optimal.planes[plane_id];
> > + const struct skl_plane_wm *wm =
> > + &cstate->wm.skl.optimal.planes[plane_id];
> >
> > if (plane_id == PLANE_CURSOR) {
> > if (WARN_ON(wm->wm[level].min_ddb_alloc >
> > @@ -4427,6 +4427,8 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
> > * proportional to its relative data rate.
> > */
> > for_each_plane_id_on_crtc(intel_crtc, plane_id) {
> > + const struct skl_plane_wm *wm =
> > + &cstate->wm.skl.optimal.planes[plane_id];
> > u64 rate;
> > u16 extra;
> >
> > @@ -4440,8 +4442,6 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
> > if (total_data_rate == 0)
> > break;
> >
> > - wm = &cstate->wm.skl.optimal.planes[plane_id];
> > -
> > rate = plane_data_rate[plane_id];
> > extra = min_t(u16, alloc_size,
> > DIV64_U64_ROUND_UP(alloc_size * rate,
> > @@ -4466,14 +4466,14 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
> > /* Set the actual DDB start/end points for each plane */
> > start = alloc->start;
> > for_each_plane_id_on_crtc(intel_crtc, plane_id) {
> > - struct skl_ddb_entry *plane_alloc, *uv_plane_alloc;
> > + struct skl_ddb_entry *plane_alloc =
> > + &cstate->wm.skl.plane_ddb_y[plane_id];
> > + struct skl_ddb_entry *uv_plane_alloc =
> > + &cstate->wm.skl.plane_ddb_uv[plane_id];
> >
> > if (plane_id == PLANE_CURSOR)
> > continue;
> >
> > - plane_alloc = &cstate->wm.skl.plane_ddb_y[plane_id];
> > - uv_plane_alloc = &cstate->wm.skl.plane_ddb_uv[plane_id];
> > -
> > /* Gen11+ uses a separate plane for UV watermarks */
> > WARN_ON(INTEL_GEN(dev_priv) >= 11 && uv_total[plane_id]);
> >
>
> This hunk is fine, but isn't what's described in the commit message.
> Maybe throw an extra sentence in there referencing this change?
Amended the commit message a bit, and fixed up the update vs. build
typo in the commit message of the other patch.
Series pushed to dinq. Thanks for the review.
>
> Aside from that,
>
> Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
>
> > @@ -4499,7 +4499,8 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
> > */
> > for (level++; level <= ilk_wm_max_level(dev_priv); level++) {
> > for_each_plane_id_on_crtc(intel_crtc, plane_id) {
> > - wm = &cstate->wm.skl.optimal.planes[plane_id];
> > + struct skl_plane_wm *wm =
> > + &cstate->wm.skl.optimal.planes[plane_id];
> >
> > /*
> > * We only disable the watermarks for each plane if
> > @@ -4535,7 +4536,9 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
> > * don't have enough DDB blocks for it.
> > */
> > for_each_plane_id_on_crtc(intel_crtc, plane_id) {
> > - wm = &cstate->wm.skl.optimal.planes[plane_id];
> > + struct skl_plane_wm *wm =
> > + &cstate->wm.skl.optimal.planes[plane_id];
> > +
> > if (wm->trans_wm.plane_res_b >= total[plane_id])
> > memset(&wm->trans_wm, 0, sizeof(wm->trans_wm));
> > }
> > --
> > 2.19.2
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
> --
> Matt Roper
> Graphics Software Engineer
> IoTG Platform Enabling & Development
> Intel Corporation
> (916) 356-2795
--
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH 8/9] drm/i915: Don't pass pipe_wm around so much
2019-03-12 20:58 [PATCH 0/9] skl+ cursor DDB allocation fixes Ville Syrjala
` (6 preceding siblings ...)
2019-03-12 20:58 ` [PATCH 7/9] drm/i915: Move some variables to tighter scope Ville Syrjala
@ 2019-03-12 20:58 ` Ville Syrjala
2019-03-19 0:10 ` Matt Roper
2019-03-12 20:58 ` [PATCH 9/9] drm/i915: Inline skl_build_pipe_wm() into its only caller Ville Syrjala
` (6 subsequent siblings)
14 siblings, 1 reply; 25+ messages in thread
From: Ville Syrjala @ 2019-03-12 20:58 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
{skl,icl}_build_plane_wm() don't need to be passed the pipe_wm, so
don't. And skl_build_pipe_wm() can easily dig it out itself.
Cc: Neel Desai <neel.desai@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_pm.c | 18 +++++++-----------
1 file changed, 7 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index b958a1a00014..80e964f7de58 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -5017,8 +5017,7 @@ static int skl_build_plane_wm_uv(struct intel_crtc_state *crtc_state,
return 0;
}
-static int skl_build_plane_wm(struct skl_pipe_wm *pipe_wm,
- struct intel_crtc_state *crtc_state,
+static int skl_build_plane_wm(struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state)
{
struct intel_plane *plane = to_intel_plane(plane_state->base.plane);
@@ -5044,8 +5043,7 @@ static int skl_build_plane_wm(struct skl_pipe_wm *pipe_wm,
return 0;
}
-static int icl_build_plane_wm(struct skl_pipe_wm *pipe_wm,
- struct intel_crtc_state *crtc_state,
+static int icl_build_plane_wm(struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state)
{
enum plane_id plane_id = to_intel_plane(plane_state->base.plane)->id;
@@ -5082,10 +5080,10 @@ static int icl_build_plane_wm(struct skl_pipe_wm *pipe_wm,
return 0;
}
-static int skl_build_pipe_wm(struct intel_crtc_state *cstate,
- struct skl_pipe_wm *pipe_wm)
+static int skl_build_pipe_wm(struct intel_crtc_state *cstate)
{
struct drm_i915_private *dev_priv = to_i915(cstate->base.crtc->dev);
+ struct skl_pipe_wm *pipe_wm = &cstate->wm.skl.optimal;
struct drm_crtc_state *crtc_state = &cstate->base;
struct drm_plane *plane;
const struct drm_plane_state *pstate;
@@ -5102,11 +5100,9 @@ static int skl_build_pipe_wm(struct intel_crtc_state *cstate,
to_intel_plane_state(pstate);
if (INTEL_GEN(dev_priv) >= 11)
- ret = icl_build_plane_wm(pipe_wm,
- cstate, intel_pstate);
+ ret = icl_build_plane_wm(cstate, intel_pstate);
else
- ret = skl_build_plane_wm(pipe_wm,
- cstate, intel_pstate);
+ ret = skl_build_plane_wm(cstate, intel_pstate);
if (ret)
return ret;
}
@@ -5269,7 +5265,7 @@ static int skl_update_pipe_wm(struct intel_crtc_state *cstate,
struct intel_crtc *crtc = to_intel_crtc(cstate->base.crtc);
int ret;
- ret = skl_build_pipe_wm(cstate, pipe_wm);
+ ret = skl_build_pipe_wm(cstate);
if (ret)
return ret;
--
2.19.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 25+ messages in thread* Re: [PATCH 8/9] drm/i915: Don't pass pipe_wm around so much
2019-03-12 20:58 ` [PATCH 8/9] drm/i915: Don't pass pipe_wm around so much Ville Syrjala
@ 2019-03-19 0:10 ` Matt Roper
0 siblings, 0 replies; 25+ messages in thread
From: Matt Roper @ 2019-03-19 0:10 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
On Tue, Mar 12, 2019 at 10:58:43PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> {skl,icl}_build_plane_wm() don't need to be passed the pipe_wm, so
> don't. And skl_build_pipe_wm() can easily dig it out itself.
>
> Cc: Neel Desai <neel.desai@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
> ---
> drivers/gpu/drm/i915/intel_pm.c | 18 +++++++-----------
> 1 file changed, 7 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index b958a1a00014..80e964f7de58 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -5017,8 +5017,7 @@ static int skl_build_plane_wm_uv(struct intel_crtc_state *crtc_state,
> return 0;
> }
>
> -static int skl_build_plane_wm(struct skl_pipe_wm *pipe_wm,
> - struct intel_crtc_state *crtc_state,
> +static int skl_build_plane_wm(struct intel_crtc_state *crtc_state,
> const struct intel_plane_state *plane_state)
> {
> struct intel_plane *plane = to_intel_plane(plane_state->base.plane);
> @@ -5044,8 +5043,7 @@ static int skl_build_plane_wm(struct skl_pipe_wm *pipe_wm,
> return 0;
> }
>
> -static int icl_build_plane_wm(struct skl_pipe_wm *pipe_wm,
> - struct intel_crtc_state *crtc_state,
> +static int icl_build_plane_wm(struct intel_crtc_state *crtc_state,
> const struct intel_plane_state *plane_state)
> {
> enum plane_id plane_id = to_intel_plane(plane_state->base.plane)->id;
> @@ -5082,10 +5080,10 @@ static int icl_build_plane_wm(struct skl_pipe_wm *pipe_wm,
> return 0;
> }
>
> -static int skl_build_pipe_wm(struct intel_crtc_state *cstate,
> - struct skl_pipe_wm *pipe_wm)
> +static int skl_build_pipe_wm(struct intel_crtc_state *cstate)
> {
> struct drm_i915_private *dev_priv = to_i915(cstate->base.crtc->dev);
> + struct skl_pipe_wm *pipe_wm = &cstate->wm.skl.optimal;
> struct drm_crtc_state *crtc_state = &cstate->base;
> struct drm_plane *plane;
> const struct drm_plane_state *pstate;
> @@ -5102,11 +5100,9 @@ static int skl_build_pipe_wm(struct intel_crtc_state *cstate,
> to_intel_plane_state(pstate);
>
> if (INTEL_GEN(dev_priv) >= 11)
> - ret = icl_build_plane_wm(pipe_wm,
> - cstate, intel_pstate);
> + ret = icl_build_plane_wm(cstate, intel_pstate);
> else
> - ret = skl_build_plane_wm(pipe_wm,
> - cstate, intel_pstate);
> + ret = skl_build_plane_wm(cstate, intel_pstate);
> if (ret)
> return ret;
> }
> @@ -5269,7 +5265,7 @@ static int skl_update_pipe_wm(struct intel_crtc_state *cstate,
> struct intel_crtc *crtc = to_intel_crtc(cstate->base.crtc);
> int ret;
>
> - ret = skl_build_pipe_wm(cstate, pipe_wm);
> + ret = skl_build_pipe_wm(cstate);
> if (ret)
> return ret;
>
> --
> 2.19.2
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Matt Roper
Graphics Software Engineer
IoTG Platform Enabling & Development
Intel Corporation
(916) 356-2795
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH 9/9] drm/i915: Inline skl_build_pipe_wm() into its only caller
2019-03-12 20:58 [PATCH 0/9] skl+ cursor DDB allocation fixes Ville Syrjala
` (7 preceding siblings ...)
2019-03-12 20:58 ` [PATCH 8/9] drm/i915: Don't pass pipe_wm around so much Ville Syrjala
@ 2019-03-12 20:58 ` Ville Syrjala
2019-03-19 0:11 ` Matt Roper
2019-03-13 15:34 ` ✗ Fi.CI.SPARSE: warning for skl+ cursor DDB allocation fixes Patchwork
` (5 subsequent siblings)
14 siblings, 1 reply; 25+ messages in thread
From: Ville Syrjala @ 2019-03-12 20:58 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
skl_build_pipe_wm() is quite pointless now. Just inline it into
skl_compute_wm().
Cc: Neel Desai <neel.desai@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_pm.c | 32 ++++++--------------------------
1 file changed, 6 insertions(+), 26 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 80e964f7de58..ac0ca150a0d5 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -5257,23 +5257,6 @@ bool skl_ddb_allocation_overlaps(const struct skl_ddb_entry *ddb,
return false;
}
-static int skl_update_pipe_wm(struct intel_crtc_state *cstate,
- const struct skl_pipe_wm *old_pipe_wm,
- struct skl_pipe_wm *pipe_wm, /* out */
- bool *changed /* out */)
-{
- struct intel_crtc *crtc = to_intel_crtc(cstate->base.crtc);
- int ret;
-
- ret = skl_build_pipe_wm(cstate);
- if (ret)
- return ret;
-
- *changed = !skl_pipe_wm_equals(crtc, old_pipe_wm, pipe_wm);
-
- return 0;
-}
-
static u32
pipes_modified(struct intel_atomic_state *state)
{
@@ -5612,10 +5595,9 @@ static int
skl_compute_wm(struct intel_atomic_state *state)
{
struct intel_crtc *crtc;
- struct intel_crtc_state *cstate;
+ struct intel_crtc_state *new_crtc_state;
struct intel_crtc_state *old_crtc_state;
struct skl_ddb_values *results = &state->wm_results;
- struct skl_pipe_wm *pipe_wm;
bool changed = false;
int ret, i;
@@ -5633,12 +5615,8 @@ skl_compute_wm(struct intel_atomic_state *state)
* pipe allocations had to change.
*/
for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
- cstate, i) {
- const struct skl_pipe_wm *old_pipe_wm =
- &old_crtc_state->wm.skl.optimal;
-
- pipe_wm = &cstate->wm.skl.optimal;
- ret = skl_update_pipe_wm(cstate, old_pipe_wm, pipe_wm, &changed);
+ new_crtc_state, i) {
+ ret = skl_build_pipe_wm(new_crtc_state);
if (ret)
return ret;
@@ -5646,7 +5624,9 @@ skl_compute_wm(struct intel_atomic_state *state)
if (ret)
return ret;
- if (changed)
+ if (!skl_pipe_wm_equals(crtc,
+ &old_crtc_state->wm.skl.optimal,
+ &new_crtc_state->wm.skl.optimal))
results->dirty_pipes |= drm_crtc_mask(&crtc->base);
}
--
2.19.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 25+ messages in thread* Re: [PATCH 9/9] drm/i915: Inline skl_build_pipe_wm() into its only caller
2019-03-12 20:58 ` [PATCH 9/9] drm/i915: Inline skl_build_pipe_wm() into its only caller Ville Syrjala
@ 2019-03-19 0:11 ` Matt Roper
2019-03-19 10:49 ` Ville Syrjälä
0 siblings, 1 reply; 25+ messages in thread
From: Matt Roper @ 2019-03-19 0:11 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
On Tue, Mar 12, 2019 at 10:58:44PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> skl_build_pipe_wm() is quite pointless now. Just inline it into
I think you actually mean skl_update_pipe_wm(), right?
The code change looks good, so with an updated commit message,
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
> skl_compute_wm().
>
> Cc: Neel Desai <neel.desai@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/intel_pm.c | 32 ++++++--------------------------
> 1 file changed, 6 insertions(+), 26 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 80e964f7de58..ac0ca150a0d5 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -5257,23 +5257,6 @@ bool skl_ddb_allocation_overlaps(const struct skl_ddb_entry *ddb,
> return false;
> }
>
> -static int skl_update_pipe_wm(struct intel_crtc_state *cstate,
> - const struct skl_pipe_wm *old_pipe_wm,
> - struct skl_pipe_wm *pipe_wm, /* out */
> - bool *changed /* out */)
> -{
> - struct intel_crtc *crtc = to_intel_crtc(cstate->base.crtc);
> - int ret;
> -
> - ret = skl_build_pipe_wm(cstate);
> - if (ret)
> - return ret;
> -
> - *changed = !skl_pipe_wm_equals(crtc, old_pipe_wm, pipe_wm);
> -
> - return 0;
> -}
> -
> static u32
> pipes_modified(struct intel_atomic_state *state)
> {
> @@ -5612,10 +5595,9 @@ static int
> skl_compute_wm(struct intel_atomic_state *state)
> {
> struct intel_crtc *crtc;
> - struct intel_crtc_state *cstate;
> + struct intel_crtc_state *new_crtc_state;
> struct intel_crtc_state *old_crtc_state;
> struct skl_ddb_values *results = &state->wm_results;
> - struct skl_pipe_wm *pipe_wm;
> bool changed = false;
> int ret, i;
>
> @@ -5633,12 +5615,8 @@ skl_compute_wm(struct intel_atomic_state *state)
> * pipe allocations had to change.
> */
> for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
> - cstate, i) {
> - const struct skl_pipe_wm *old_pipe_wm =
> - &old_crtc_state->wm.skl.optimal;
> -
> - pipe_wm = &cstate->wm.skl.optimal;
> - ret = skl_update_pipe_wm(cstate, old_pipe_wm, pipe_wm, &changed);
> + new_crtc_state, i) {
> + ret = skl_build_pipe_wm(new_crtc_state);
> if (ret)
> return ret;
>
> @@ -5646,7 +5624,9 @@ skl_compute_wm(struct intel_atomic_state *state)
> if (ret)
> return ret;
>
> - if (changed)
> + if (!skl_pipe_wm_equals(crtc,
> + &old_crtc_state->wm.skl.optimal,
> + &new_crtc_state->wm.skl.optimal))
> results->dirty_pipes |= drm_crtc_mask(&crtc->base);
> }
>
> --
> 2.19.2
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Matt Roper
Graphics Software Engineer
IoTG Platform Enabling & Development
Intel Corporation
(916) 356-2795
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread* Re: [PATCH 9/9] drm/i915: Inline skl_build_pipe_wm() into its only caller
2019-03-19 0:11 ` Matt Roper
@ 2019-03-19 10:49 ` Ville Syrjälä
0 siblings, 0 replies; 25+ messages in thread
From: Ville Syrjälä @ 2019-03-19 10:49 UTC (permalink / raw)
To: Matt Roper; +Cc: intel-gfx
On Mon, Mar 18, 2019 at 05:11:30PM -0700, Matt Roper wrote:
> On Tue, Mar 12, 2019 at 10:58:44PM +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > skl_build_pipe_wm() is quite pointless now. Just inline it into
>
> I think you actually mean skl_update_pipe_wm(), right?
Indeed.
>
> The code change looks good, so with an updated commit message,
>
> Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Thanks.
>
> > skl_compute_wm().
> >
> > Cc: Neel Desai <neel.desai@intel.com>
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> > drivers/gpu/drm/i915/intel_pm.c | 32 ++++++--------------------------
> > 1 file changed, 6 insertions(+), 26 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > index 80e964f7de58..ac0ca150a0d5 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -5257,23 +5257,6 @@ bool skl_ddb_allocation_overlaps(const struct skl_ddb_entry *ddb,
> > return false;
> > }
> >
> > -static int skl_update_pipe_wm(struct intel_crtc_state *cstate,
> > - const struct skl_pipe_wm *old_pipe_wm,
> > - struct skl_pipe_wm *pipe_wm, /* out */
> > - bool *changed /* out */)
> > -{
> > - struct intel_crtc *crtc = to_intel_crtc(cstate->base.crtc);
> > - int ret;
> > -
> > - ret = skl_build_pipe_wm(cstate);
> > - if (ret)
> > - return ret;
> > -
> > - *changed = !skl_pipe_wm_equals(crtc, old_pipe_wm, pipe_wm);
> > -
> > - return 0;
> > -}
> > -
> > static u32
> > pipes_modified(struct intel_atomic_state *state)
> > {
> > @@ -5612,10 +5595,9 @@ static int
> > skl_compute_wm(struct intel_atomic_state *state)
> > {
> > struct intel_crtc *crtc;
> > - struct intel_crtc_state *cstate;
> > + struct intel_crtc_state *new_crtc_state;
> > struct intel_crtc_state *old_crtc_state;
> > struct skl_ddb_values *results = &state->wm_results;
> > - struct skl_pipe_wm *pipe_wm;
> > bool changed = false;
> > int ret, i;
> >
> > @@ -5633,12 +5615,8 @@ skl_compute_wm(struct intel_atomic_state *state)
> > * pipe allocations had to change.
> > */
> > for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
> > - cstate, i) {
> > - const struct skl_pipe_wm *old_pipe_wm =
> > - &old_crtc_state->wm.skl.optimal;
> > -
> > - pipe_wm = &cstate->wm.skl.optimal;
> > - ret = skl_update_pipe_wm(cstate, old_pipe_wm, pipe_wm, &changed);
> > + new_crtc_state, i) {
> > + ret = skl_build_pipe_wm(new_crtc_state);
> > if (ret)
> > return ret;
> >
> > @@ -5646,7 +5624,9 @@ skl_compute_wm(struct intel_atomic_state *state)
> > if (ret)
> > return ret;
> >
> > - if (changed)
> > + if (!skl_pipe_wm_equals(crtc,
> > + &old_crtc_state->wm.skl.optimal,
> > + &new_crtc_state->wm.skl.optimal))
> > results->dirty_pipes |= drm_crtc_mask(&crtc->base);
> > }
> >
> > --
> > 2.19.2
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
> --
> Matt Roper
> Graphics Software Engineer
> IoTG Platform Enabling & Development
> Intel Corporation
> (916) 356-2795
--
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread
* ✗ Fi.CI.SPARSE: warning for skl+ cursor DDB allocation fixes
2019-03-12 20:58 [PATCH 0/9] skl+ cursor DDB allocation fixes Ville Syrjala
` (8 preceding siblings ...)
2019-03-12 20:58 ` [PATCH 9/9] drm/i915: Inline skl_build_pipe_wm() into its only caller Ville Syrjala
@ 2019-03-13 15:34 ` Patchwork
2019-03-13 16:15 ` ✓ Fi.CI.BAT: success " Patchwork
` (4 subsequent siblings)
14 siblings, 0 replies; 25+ messages in thread
From: Patchwork @ 2019-03-13 15:34 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
== Series Details ==
Series: skl+ cursor DDB allocation fixes
URL : https://patchwork.freedesktop.org/series/57901/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915: Accept alloc_size == blocks
Okay!
Commit: drm/i915: Don't pass plane state to skl_compute_plane_wm()
Okay!
Commit: drm/i915: Extract skl_compute_wm_params()
Okay!
Commit: drm/i915: Allocate enough DDB for the cursor
+drivers/gpu/drm/i915/intel_pm.c:3955:16: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/intel_pm.c:3955:16: warning: expression using sizeof(void)
-drivers/gpu/drm/i915/intel_pm.c:4450:25: warning: expression using sizeof(void)
-drivers/gpu/drm/i915/intel_pm.c:4450:25: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/intel_pm.c:4450:25: warning: too many warnings
-drivers/gpu/drm/i915/intel_pm.c:4935:30: warning: too many warnings
Commit: drm/i915: Make sure cursor has enough ddb for the selected wm level
Okay!
Commit: drm/i915: Keep plane watermarks enabled more aggressively
Okay!
Commit: drm/i915: Move some variables to tighter scope
-O:drivers/gpu/drm/i915/intel_pm.c:4446:25: warning: expression using sizeof(void)
-O:drivers/gpu/drm/i915/intel_pm.c:4446:25: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/intel_pm.c:4446:25: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/intel_pm.c:4446:25: warning: expression using sizeof(void)
Commit: drm/i915: Don't pass pipe_wm around so much
Okay!
Commit: drm/i915: Inline skl_build_pipe_wm() into its only caller
Okay!
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread* ✓ Fi.CI.BAT: success for skl+ cursor DDB allocation fixes
2019-03-12 20:58 [PATCH 0/9] skl+ cursor DDB allocation fixes Ville Syrjala
` (9 preceding siblings ...)
2019-03-13 15:34 ` ✗ Fi.CI.SPARSE: warning for skl+ cursor DDB allocation fixes Patchwork
@ 2019-03-13 16:15 ` Patchwork
2019-03-13 20:41 ` ✗ Fi.CI.IGT: failure " Patchwork
` (3 subsequent siblings)
14 siblings, 0 replies; 25+ messages in thread
From: Patchwork @ 2019-03-13 16:15 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
== Series Details ==
Series: skl+ cursor DDB allocation fixes
URL : https://patchwork.freedesktop.org/series/57901/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5737 -> Patchwork_12445
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://patchwork.freedesktop.org/api/1.0/series/57901/revisions/1/mbox/
Known issues
------------
Here are the changes found in Patchwork_12445 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@amdgpu/amd_cs_nop@fork-gfx0:
- fi-icl-u2: NOTRUN -> SKIP [fdo#109315] +17
* igt@gem_ctx_create@basic-files:
- fi-gdg-551: NOTRUN -> SKIP [fdo#109271] +106
* igt@gem_exec_basic@gtt-bsd2:
- fi-byt-clapper: NOTRUN -> SKIP [fdo#109271] +57
* igt@gem_exec_basic@readonly-bsd1:
- fi-snb-2520m: NOTRUN -> SKIP [fdo#109271] +57
- fi-icl-u2: NOTRUN -> SKIP [fdo#109276] +7
* igt@gem_exec_parse@basic-allowed:
- fi-icl-u2: NOTRUN -> SKIP [fdo#109289] +1
* igt@gem_exec_suspend@basic-s4-devices:
- fi-blb-e6850: NOTRUN -> INCOMPLETE [fdo#107718]
* igt@i915_selftest@live_contexts:
- fi-icl-u2: NOTRUN -> DMESG-FAIL [fdo#108569]
* igt@i915_selftest@live_execlists:
- fi-apl-guc: PASS -> INCOMPLETE [fdo#103927] / [fdo#109720]
* igt@kms_addfb_basic@addfb25-y-tiled-small:
- fi-byt-n2820: NOTRUN -> SKIP [fdo#109271] +56
* igt@kms_busy@basic-flip-c:
- fi-byt-clapper: NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
- fi-gdg-551: NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
- fi-snb-2520m: NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
- fi-byt-n2820: NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
* igt@kms_chamelium@dp-edid-read:
- fi-icl-u2: NOTRUN -> SKIP [fdo#109316] +2
* igt@kms_chamelium@hdmi-edid-read:
- fi-hsw-peppy: NOTRUN -> SKIP [fdo#109271] +46
* igt@kms_chamelium@vga-hpd-fast:
- fi-icl-u2: NOTRUN -> SKIP [fdo#109309] +1
* igt@kms_force_connector_basic@prune-stale-modes:
- fi-icl-u2: NOTRUN -> SKIP [fdo#109285] +3
* igt@kms_frontbuffer_tracking@basic:
- fi-icl-u3: PASS -> FAIL [fdo#103167]
- fi-hsw-peppy: NOTRUN -> DMESG-FAIL [fdo#102614] / [fdo#107814]
- fi-icl-u2: NOTRUN -> FAIL [fdo#103167]
* igt@runner@aborted:
- fi-apl-guc: NOTRUN -> FAIL [fdo#108622] / [fdo#109720]
#### Possible fixes ####
* igt@gem_exec_suspend@basic-s3:
- fi-blb-e6850: INCOMPLETE [fdo#107718] -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
[fdo#107814]: https://bugs.freedesktop.org/show_bug.cgi?id=107814
[fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
[fdo#108622]: https://bugs.freedesktop.org/show_bug.cgi?id=108622
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109294]: https://bugs.freedesktop.org/show_bug.cgi?id=109294
[fdo#109309]: https://bugs.freedesktop.org/show_bug.cgi?id=109309
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#109316]: https://bugs.freedesktop.org/show_bug.cgi?id=109316
[fdo#109638]: https://bugs.freedesktop.org/show_bug.cgi?id=109638
[fdo#109720]: https://bugs.freedesktop.org/show_bug.cgi?id=109720
[fdo#110028]: https://bugs.freedesktop.org/show_bug.cgi?id=110028
Participating hosts (41 -> 43)
------------------------------
Additional (7): fi-hsw-peppy fi-icl-u2 fi-snb-2520m fi-gdg-551 fi-icl-y fi-byt-n2820 fi-byt-clapper
Missing (5): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-ctg-p8600 fi-bdw-samus
Build changes
-------------
* Linux: CI_DRM_5737 -> Patchwork_12445
CI_DRM_5737: d5bb7d77aa77996702426496078a597f30bead58 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4883: b25e06d6ddf2e42044cd9c93b613cbc7339a8c33 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12445: c8c28fb7a798e26b588ca10925f7f8abd9c9f401 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
c8c28fb7a798 drm/i915: Inline skl_build_pipe_wm() into its only caller
67f2a40230bd drm/i915: Don't pass pipe_wm around so much
174438fe44fa drm/i915: Move some variables to tighter scope
6816699ec0b6 drm/i915: Keep plane watermarks enabled more aggressively
341f591d6c12 drm/i915: Make sure cursor has enough ddb for the selected wm level
e858274016bb drm/i915: Allocate enough DDB for the cursor
f1fb77cbf308 drm/i915: Extract skl_compute_wm_params()
e765ffdefc4c drm/i915: Don't pass plane state to skl_compute_plane_wm()
3a6b412d56a0 drm/i915: Accept alloc_size == blocks
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12445/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread* ✗ Fi.CI.IGT: failure for skl+ cursor DDB allocation fixes
2019-03-12 20:58 [PATCH 0/9] skl+ cursor DDB allocation fixes Ville Syrjala
` (10 preceding siblings ...)
2019-03-13 16:15 ` ✓ Fi.CI.BAT: success " Patchwork
@ 2019-03-13 20:41 ` Patchwork
2019-03-14 17:11 ` Ville Syrjälä
2019-03-19 16:41 ` ✗ Fi.CI.SPARSE: warning for skl+ cursor DDB allocation fixes (rev2) Patchwork
` (2 subsequent siblings)
14 siblings, 1 reply; 25+ messages in thread
From: Patchwork @ 2019-03-13 20:41 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
== Series Details ==
Series: skl+ cursor DDB allocation fixes
URL : https://patchwork.freedesktop.org/series/57901/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5737_full -> Patchwork_12445_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_12445_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_12445_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_12445_full:
### IGT changes ###
#### Possible regressions ####
* igt@gem_exec_nop@basic-series:
- shard-iclb: PASS -> FAIL
#### Warnings ####
* igt@gem_softpin@noreloc-s3:
- shard-hsw: PASS -> ( 2 PASS ) +50
Known issues
------------
Here are the changes found in Patchwork_12445_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_param@invalid-param-get:
- shard-skl: NOTRUN -> FAIL [fdo#109559]
* igt@gem_exec_params@no-vebox:
- shard-iclb: NOTRUN -> SKIP [fdo#109283]
* igt@gem_exec_schedule@preempt-bsd1:
- shard-iclb: NOTRUN -> SKIP [fdo#109276] +17
* igt@gem_exec_schedule@preempt-other-chain-blt:
- shard-snb: NOTRUN -> SKIP [fdo#109271] +74
* igt@gem_mmap_gtt@forked-big-copy-odd:
- shard-iclb: PASS -> INCOMPLETE [fdo#109100]
* igt@gem_mocs_settings@mocs-reset-bsd1:
- shard-iclb: NOTRUN -> SKIP [fdo#109276] / [fdo#109287]
* igt@gem_mocs_settings@mocs-settings-vebox:
- shard-iclb: NOTRUN -> SKIP [fdo#109287] +4
* igt@gem_ppgtt@blt-vs-render-ctx0:
- shard-iclb: NOTRUN -> INCOMPLETE [fdo#109100] / [fdo#109766] / [fdo#109801]
* igt@gem_pwrite@huge-cpu-random:
- shard-iclb: NOTRUN -> SKIP [fdo#109290] +2
* igt@gem_softpin@evict-snoop-interruptible:
- shard-iclb: NOTRUN -> SKIP [fdo#109312]
* igt@gem_stolen@stolen-no-mmap:
- shard-iclb: NOTRUN -> SKIP [fdo#109277] +5
* igt@i915_pm_rpm@dpms-lpsp:
- shard-kbl: NOTRUN -> SKIP [fdo#109271] +22
* igt@i915_pm_rpm@modeset-non-lpsp:
- shard-iclb: NOTRUN -> SKIP [fdo#109308] +1
* igt@i915_pm_rpm@system-suspend:
- shard-skl: PASS -> INCOMPLETE [fdo#104108] / [fdo#107807] +1
* igt@i915_pm_rps@min-max-config-loaded:
- shard-iclb: NOTRUN -> FAIL [fdo#108059]
* igt@i915_pm_sseu@full-enable:
- shard-iclb: NOTRUN -> SKIP [fdo#109288]
* igt@i915_query@query-topology-known-pci-ids:
- shard-iclb: NOTRUN -> SKIP [fdo#109303]
* igt@i915_selftest@live_workarounds:
- shard-iclb: PASS -> DMESG-FAIL [fdo#108954]
* igt@kms_atomic_transition@5x-modeset-transitions-nonblocking:
- shard-kbl: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +1
* igt@kms_atomic_transition@plane-all-modeset-transition-fencing:
- shard-apl: PASS -> INCOMPLETE [fdo#103927] +1
* igt@kms_available_modes_crc@available_mode_test_crc:
- shard-skl: NOTRUN -> FAIL [fdo#106641]
* igt@kms_busy@extended-modeset-hang-newfb-render-a:
- shard-iclb: NOTRUN -> DMESG-WARN [fdo#107956] +1
* igt@kms_ccs@pipe-a-crc-sprite-planes-basic:
- shard-glk: PASS -> FAIL [fdo#108145]
* igt@kms_chamelium@hdmi-cmp-nv21:
- shard-iclb: NOTRUN -> SKIP [fdo#109284] +9
* igt@kms_color@pipe-a-degamma:
- shard-iclb: NOTRUN -> FAIL [fdo#104782] +1
* igt@kms_color@pipe-c-ctm-max:
- shard-iclb: NOTRUN -> FAIL [fdo#108147]
* igt@kms_content_protection@legacy:
- shard-iclb: NOTRUN -> SKIP [fdo#109300]
* igt@kms_cursor_crc@cursor-128x42-onscreen:
- shard-apl: PASS -> FAIL [fdo#103232] +2
* igt@kms_cursor_crc@cursor-128x42-random:
- shard-skl: NOTRUN -> FAIL [fdo#103232]
* igt@kms_cursor_crc@cursor-256x256-suspend:
- shard-apl: PASS -> FAIL [fdo#103191] / [fdo#103232]
* igt@kms_cursor_crc@cursor-512x512-random:
- shard-iclb: NOTRUN -> SKIP [fdo#109279] +1
* igt@kms_cursor_crc@cursor-size-change:
- shard-glk: PASS -> FAIL [fdo#103232]
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size:
- shard-iclb: NOTRUN -> SKIP [fdo#109274] +17
* igt@kms_fbcon_fbt@psr:
- shard-iclb: NOTRUN -> FAIL [fdo#103833]
* igt@kms_flip@flip-vs-expired-vblank:
- shard-glk: PASS -> FAIL [fdo#102887] / [fdo#105363]
* igt@kms_flip_tiling@flip-to-x-tiled:
- shard-iclb: NOTRUN -> FAIL [fdo#108134]
* igt@kms_force_connector_basic@force-edid:
- shard-iclb: NOTRUN -> SKIP [fdo#109285]
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render:
- shard-apl: PASS -> FAIL [fdo#103167] +1
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-fullscreen:
- shard-kbl: NOTRUN -> FAIL [fdo#103167]
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move:
- shard-iclb: PASS -> FAIL [fdo#103167] +15
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-wc:
- shard-skl: NOTRUN -> SKIP [fdo#109271] +37
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-onoff:
- shard-glk: PASS -> FAIL [fdo#103167] +6
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-pwrite:
- shard-iclb: NOTRUN -> FAIL [fdo#109247] +4
* igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-pwrite:
- shard-iclb: NOTRUN -> FAIL [fdo#105682] / [fdo#109247]
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-gtt:
- shard-iclb: NOTRUN -> FAIL [fdo#103167] +1
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-draw-mmap-gtt:
- shard-iclb: NOTRUN -> SKIP [fdo#109280] +45
* igt@kms_frontbuffer_tracking@psr-slowdraw:
- shard-iclb: PASS -> FAIL [fdo#109247] +11
* igt@kms_hdmi_inject@inject-audio:
- shard-iclb: NOTRUN -> FAIL [fdo#102370]
* igt@kms_invalid_dotclock:
- shard-iclb: NOTRUN -> SKIP [fdo#109310]
* igt@kms_pipe_b_c_ivb@pipe-b-double-modeset-then-modeset-pipe-c:
- shard-iclb: NOTRUN -> SKIP [fdo#109289] +4
* igt@kms_pipe_crc_basic@hang-read-crc-pipe-f:
- shard-skl: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +2
* igt@kms_plane_alpha_blend@pipe-a-alpha-7efc:
- shard-kbl: NOTRUN -> FAIL [fdo#108145] / [fdo#108590]
* igt@kms_plane_alpha_blend@pipe-b-alpha-basic:
- shard-skl: NOTRUN -> FAIL [fdo#107815] / [fdo#108145] +1
* igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min:
- shard-skl: PASS -> FAIL [fdo#108145]
* igt@kms_plane_scaling@pipe-b-scaler-with-rotation:
- shard-iclb: NOTRUN -> FAIL [fdo#109052]
* igt@kms_psr2_su@frontbuffer:
- shard-iclb: NOTRUN -> SKIP [fdo#109642]
* igt@kms_psr@basic:
- shard-apl: NOTRUN -> SKIP [fdo#109271] +4
* igt@kms_psr@cursor_blt:
- shard-iclb: PASS -> FAIL [fdo#107383] +1
* igt@kms_psr@psr2_basic:
- shard-iclb: NOTRUN -> SKIP [fdo#109441] +3
* igt@kms_psr@psr2_sprite_plane_move:
- shard-iclb: PASS -> SKIP [fdo#109441] +3
* igt@kms_psr@sprite_plane_onoff:
- shard-iclb: NOTRUN -> FAIL [fdo#107383]
* igt@kms_rotation_crc@multiplane-rotation:
- shard-kbl: PASS -> FAIL [fdo#109016]
* igt@kms_universal_plane@cursor-fb-leak-pipe-d:
- shard-snb: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +6
* igt@kms_universal_plane@cursor-fb-leak-pipe-e:
- shard-iclb: NOTRUN -> SKIP [fdo#109278] +12
* igt@kms_universal_plane@universal-plane-pipe-b-functional:
- shard-apl: PASS -> FAIL [fdo#103166]
* igt@kms_vrr@flip-dpms:
- shard-iclb: NOTRUN -> SKIP [fdo#109502]
* igt@perf@short-reads:
- shard-skl: PASS -> FAIL [fdo#103183]
* igt@prime_nv_api@nv_i915_import_twice_check_flink_name:
- shard-iclb: NOTRUN -> SKIP [fdo#109291] +7
* igt@prime_vgem@basic-fence-flip:
- shard-iclb: NOTRUN -> SKIP [fdo#109294]
* igt@v3d_get_param@get-bad-flags:
- shard-iclb: NOTRUN -> SKIP [fdo#109315] +1
#### Possible fixes ####
* igt@gem_ctx_isolation@vecs0-reset:
- shard-iclb: TIMEOUT [fdo#109673] / [fdo#109960] -> PASS
* igt@gem_eio@in-flight-suspend:
- shard-iclb: FAIL [fdo#103375] -> PASS
* igt@gem_exec_schedule@pi-ringfull-bsd:
- shard-iclb: DMESG-FAIL [fdo#109960] -> PASS
* igt@gem_tiled_blits@interruptible:
- shard-iclb: TIMEOUT [fdo#109673] -> PASS
* igt@gem_wait@busy-vebox:
- shard-iclb: FAIL [fdo#109960] -> PASS +2
* igt@i915_pm_rpm@pm-tiling:
- shard-skl: INCOMPLETE [fdo#107807] -> PASS
* igt@i915_selftest@mock_fence:
- shard-skl: DMESG-FAIL [fdo#110039] -> PASS
* igt@kms_ccs@pipe-a-crc-sprite-planes-basic:
- shard-iclb: FAIL [fdo#107725] -> PASS
* igt@kms_ccs@pipe-b-crc-sprite-planes-basic:
- shard-glk: FAIL [fdo#108145] -> PASS
* igt@kms_chv_cursor_fail@pipe-c-64x64-left-edge:
- shard-skl: FAIL [fdo#104671] -> PASS
* igt@kms_cursor_crc@cursor-64x21-onscreen:
- shard-apl: FAIL [fdo#103232] -> PASS
* igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic:
- shard-hsw: FAIL [fdo#105767] -> PASS
* igt@kms_cursor_legacy@cursor-vs-flip-varying-size:
- shard-iclb: FAIL [fdo#103355] -> PASS +2
* igt@kms_fbcon_fbt@fbc:
- shard-iclb: DMESG-WARN [fdo#109593] -> PASS
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-apl: DMESG-WARN [fdo#103558] / [fdo#105602] -> PASS +2
- shard-glk: FAIL [fdo#102887] / [fdo#105363] -> PASS
* igt@kms_flip@flip-vs-fences-interruptible:
- shard-iclb: INCOMPLETE [fdo#107713] / [fdo#109960] -> PASS
* igt@kms_flip@flip-vs-suspend:
- shard-skl: INCOMPLETE [fdo#109507] -> PASS
* igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-blt:
- shard-iclb: FAIL [fdo#103167] -> PASS +3
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt:
- shard-glk: FAIL [fdo#103167] -> PASS +1
* igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-mmap-gtt:
- shard-iclb: FAIL [fdo#109247] -> PASS +7
* igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-blt:
- shard-iclb: FAIL [fdo#105682] / [fdo#109247] -> PASS
* {igt@kms_plane@plane-position-covered-pipe-a-planes}:
- shard-glk: FAIL [fdo#110038] -> PASS
* {igt@kms_plane@plane-position-covered-pipe-b-planes}:
- shard-apl: FAIL [fdo#110038] -> PASS
* igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
- shard-skl: FAIL [fdo#107815] -> PASS
* {igt@kms_plane_multiple@atomic-pipe-a-tiling-y}:
- shard-glk: FAIL [fdo#110037] -> PASS
* igt@kms_psr@primary_page_flip:
- shard-iclb: FAIL [fdo#107383] -> PASS
* igt@kms_setmode@basic:
- shard-kbl: FAIL [fdo#99912] -> PASS
* igt@kms_universal_plane@universal-plane-pipe-a-functional:
- shard-apl: FAIL [fdo#103166] -> PASS
* igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend:
- shard-kbl: INCOMPLETE [fdo#103665] -> PASS
- shard-apl: FAIL [fdo#104894] -> PASS
* igt@perf@rc6-disable:
- shard-kbl: FAIL [fdo#103179] -> PASS
#### Warnings ####
* igt@kms_plane_lowres@pipe-b-tiling-yf:
- shard-hsw: SKIP [fdo#109271] -> ( 2 SKIP ) [fdo#109271] +25
* igt@kms_plane_scaling@pipe-b-plane-scaling:
- shard-hsw: SKIP [fdo#109271] / [fdo#109278] -> ( 2 SKIP ) [fdo#109271] / [fdo#109278] +3
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#102370]: https://bugs.freedesktop.org/show_bug.cgi?id=102370
[fdo#102887]: https://bugs.freedesktop.org/show_bug.cgi?id=102887
[fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103179]: https://bugs.freedesktop.org/show_bug.cgi?id=103179
[fdo#103183]: https://bugs.freedesktop.org/show_bug.cgi?id=103183
[fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
[fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
[fdo#103355]: https://bugs.freedesktop.org/show_bug.cgi?id=103355
[fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
[fdo#103558]: https://bugs.freedesktop.org/show_bug.cgi?id=103558
[fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
[fdo#103833]: https://bugs.freedesktop.org/show_bug.cgi?id=103833
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
[fdo#104671]: https://bugs.freedesktop.org/show_bug.cgi?id=104671
[fdo#104782]: https://bugs.freedesktop.org/show_bug.cgi?id=104782
[fdo#104894]: https://bugs.freedesktop.org/show_bug.cgi?id=104894
[fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
[fdo#105602]: https://bugs.freedesktop.org/show_bug.cgi?id=105602
[fdo#105682]: https://bugs.freedesktop.org/show_bug.cgi?id=105682
[fdo#105767]: https://bugs.freedesktop.org/show_bug.cgi?id=105767
[fdo#106641]: https://bugs.freedesktop.org/show_bug.cgi?id=106641
[fdo#107383]: https://bugs.freedesktop.org/show_bug.cgi?id=107383
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#107725]: https://bugs.freedesktop.org/show_bug.cgi?id=107725
[fdo#107807]: https://bugs.freedesktop.org/show_bug.cgi?id=107807
[fdo#107815]: https://bugs.freedesktop.org/show_bug.cgi?id=107815
[fdo#107956]: https://bugs.freedesktop.org/show_bug.cgi?id=107956
[fdo#108059]: https://bugs.freedesktop.org/show_bug.cgi?id=108059
[fdo#108134]: https://bugs.freedesktop.org/show_bug.cgi?id=108134
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#108147]: https://bugs.freedesktop.org/show_bug.cgi?id=108147
[fdo#108590]: https://bugs.freedesktop.org/show_bug.cgi?id=108590
[fdo#108954]: https://bugs.freedesktop.org/show_bug.cgi?id=108954
[fdo#109016]: https://bugs.freedesktop.org/show_bug.cgi?id=109016
[fdo#109052]: https://bugs.freedesktop.org/show_bug.cgi?id=109052
[fdo#109100]: https://bugs.freedesktop.org/show_bug.cgi?id=109100
[fdo#109247]: https://bugs.freedesktop.org/show_bug.cgi?id=109247
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
[fdo#109277]: https://bugs.freedesktop.org/show_bug.cgi?id=109277
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109283]: https://bugs.freedesktop.org/show_bug.cgi?id=109283
[fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109287]: https://bugs.freedesktop.org/show_bug.cgi?id=109287
[fdo#109288]: https://bugs.freedesktop.org/show_bug.cgi?id=109288
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109290]: https://bugs.freedesktop.org/show_bug.cgi?id=109290
[fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291
[fdo#109294]: https://bugs.freedesktop.org/show_bug.cgi?id=109294
[fdo#109300]: https://bugs.freedesktop.org/show_bug.cgi?id=109300
[fdo#109303]: https://bugs.freedesktop.org/show_bug.cgi?id=109303
[fdo#109308]: https://bugs.freedesktop.org/show_bug.cgi?id=109308
[fdo#109310]: https://bugs.freedesktop.org/show_bug.cgi?id=109310
[fdo#109312]: https://bugs.freedesktop.org/show_bug.cgi?id=109312
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109502]: https://bugs.freedesktop.org/show_bug.cgi?id=109502
[fdo#109507]: https://bugs.freedesktop.org/show_bug.cgi?id=109507
[fdo#109559]: https://bugs.freedesktop.org/show_bug.cgi?id=109559
[fdo#109593]: https://bugs.freedesktop.org/show_bug.cgi?id=109593
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#109673]: https://bugs.freedesktop.org/show_bug.cgi?id=109673
[fdo#109766]: https://bugs.freedesktop.org/show_bug.cgi?id=109766
[fdo#109801]: https://bugs.freedesktop.org/show_bug.cgi?id=109801
[fdo#109960]: https://bugs.freedesktop.org/show_bug.cgi?id=109960
[fdo#110032]: https://bugs.freedesktop.org/show_bug.cgi?id=110032
[fdo#110037]: https://bugs.freedesktop.org/show_bug.cgi?id=110037
[fdo#110038]: https://bugs.freedesktop.org/show_bug.cgi?id=110038
[fdo#110039]: https://bugs.freedesktop.org/show_bug.cgi?id=110039
[fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Build changes
-------------
* Linux: CI_DRM_5737 -> Patchwork_12445
CI_DRM_5737: d5bb7d77aa77996702426496078a597f30bead58 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4883: b25e06d6ddf2e42044cd9c93b613cbc7339a8c33 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12445: c8c28fb7a798e26b588ca10925f7f8abd9c9f401 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12445/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread* Re: ✗ Fi.CI.IGT: failure for skl+ cursor DDB allocation fixes
2019-03-13 20:41 ` ✗ Fi.CI.IGT: failure " Patchwork
@ 2019-03-14 17:11 ` Ville Syrjälä
0 siblings, 0 replies; 25+ messages in thread
From: Ville Syrjälä @ 2019-03-14 17:11 UTC (permalink / raw)
To: intel-gfx
On Wed, Mar 13, 2019 at 08:41:32PM -0000, Patchwork wrote:
> == Series Details ==
>
> Series: skl+ cursor DDB allocation fixes
> URL : https://patchwork.freedesktop.org/series/57901/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_5737_full -> Patchwork_12445_full
> ====================================================
>
> Summary
> -------
>
> **FAILURE**
>
> Serious unknown changes coming with Patchwork_12445_full absolutely need to be
> verified manually.
>
> If you think the reported changes have nothing to do with the changes
> introduced in Patchwork_12445_full, please notify your bug team to allow them
> to document this new failure mode, which will reduce false positives in CI.
>
>
>
> Possible new issues
> -------------------
>
> Here are the unknown changes that may have been introduced in Patchwork_12445_full:
>
> ### IGT changes ###
>
> #### Possible regressions ####
>
> * igt@gem_exec_nop@basic-series:
> - shard-iclb: PASS -> FAIL
(gem_exec_nop:2686) CRITICAL: Test assertion failure function series, file ../tests/i915/gem_exec_nop.c:455:
(gem_exec_nop:2686) CRITICAL: Failed assertion: time < 2*sum
(gem_exec_nop:2686) CRITICAL: Average time (649.227us) exceeds expectation for parallel execution (min 28.320us, max 28.976us; limit set at 229.324us)
Subtest basic-series failed.
Unrelated.
--
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread
* ✗ Fi.CI.SPARSE: warning for skl+ cursor DDB allocation fixes (rev2)
2019-03-12 20:58 [PATCH 0/9] skl+ cursor DDB allocation fixes Ville Syrjala
` (11 preceding siblings ...)
2019-03-13 20:41 ` ✗ Fi.CI.IGT: failure " Patchwork
@ 2019-03-19 16:41 ` Patchwork
2019-03-19 17:14 ` ✓ Fi.CI.BAT: success " Patchwork
2019-03-20 2:41 ` ✓ Fi.CI.IGT: " Patchwork
14 siblings, 0 replies; 25+ messages in thread
From: Patchwork @ 2019-03-19 16:41 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
== Series Details ==
Series: skl+ cursor DDB allocation fixes (rev2)
URL : https://patchwork.freedesktop.org/series/57901/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915: Accept alloc_size == blocks
Okay!
Commit: drm/i915: Don't pass plane state to skl_compute_plane_wm()
Okay!
Commit: drm/i915: Extract skl_compute_wm_params()
Okay!
Commit: drm/i915: Allocate enough DDB for the cursor
+drivers/gpu/drm/i915/intel_pm.c:3963:16: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/intel_pm.c:3963:16: warning: expression using sizeof(void)
-drivers/gpu/drm/i915/intel_pm.c:4458:25: warning: expression using sizeof(void)
-drivers/gpu/drm/i915/intel_pm.c:4458:25: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/intel_pm.c:4458:25: warning: too many warnings
-drivers/gpu/drm/i915/intel_pm.c:4943:30: warning: too many warnings
Commit: drm/i915: Make sure cursor has enough ddb for the selected wm level
Okay!
Commit: drm/i915: Keep plane watermarks enabled more aggressively
Okay!
Commit: drm/i915: Move some variables to tighter scope
-O:drivers/gpu/drm/i915/intel_pm.c:4454:25: warning: expression using sizeof(void)
-O:drivers/gpu/drm/i915/intel_pm.c:4454:25: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/intel_pm.c:4454:25: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/intel_pm.c:4454:25: warning: expression using sizeof(void)
Commit: drm/i915: Don't pass pipe_wm around so much
Okay!
Commit: drm/i915: Inline skl_build_pipe_wm() into its only caller
Okay!
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread* ✓ Fi.CI.BAT: success for skl+ cursor DDB allocation fixes (rev2)
2019-03-12 20:58 [PATCH 0/9] skl+ cursor DDB allocation fixes Ville Syrjala
` (12 preceding siblings ...)
2019-03-19 16:41 ` ✗ Fi.CI.SPARSE: warning for skl+ cursor DDB allocation fixes (rev2) Patchwork
@ 2019-03-19 17:14 ` Patchwork
2019-03-20 2:41 ` ✓ Fi.CI.IGT: " Patchwork
14 siblings, 0 replies; 25+ messages in thread
From: Patchwork @ 2019-03-19 17:14 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
== Series Details ==
Series: skl+ cursor DDB allocation fixes (rev2)
URL : https://patchwork.freedesktop.org/series/57901/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5773 -> Patchwork_12516
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://patchwork.freedesktop.org/api/1.0/series/57901/revisions/2/mbox/
Known issues
------------
Here are the changes found in Patchwork_12516 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@amdgpu/amd_cs_nop@sync-gfx0:
- fi-cfl-guc: NOTRUN -> SKIP [fdo#109271] +49
* igt@gem_exec_basic@readonly-bsd2:
- fi-pnv-d510: NOTRUN -> SKIP [fdo#109271] +76
* igt@kms_busy@basic-flip-a:
- fi-bsw-n3050: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +1
* igt@kms_busy@basic-flip-c:
- fi-pnv-d510: NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
* igt@kms_chamelium@hdmi-crc-fast:
- fi-bsw-n3050: NOTRUN -> SKIP [fdo#109271] +62
* igt@kms_force_connector_basic@force-load-detect:
- fi-bxt-j4205: NOTRUN -> SKIP [fdo#109271] +47
* igt@kms_pipe_crc_basic@hang-read-crc-pipe-a:
- fi-byt-clapper: PASS -> FAIL [fdo#103191] / [fdo#107362]
* igt@kms_pipe_crc_basic@read-crc-pipe-a:
- fi-byt-clapper: PASS -> FAIL [fdo#107362]
#### Possible fixes ####
* igt@kms_frontbuffer_tracking@basic:
- fi-byt-clapper: FAIL [fdo#103167] -> PASS
#### Warnings ####
* igt@prime_vgem@basic-fence-flip:
- fi-gdg-551: FAIL [fdo#103182] -> DMESG-FAIL [fdo#103182]
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103182]: https://bugs.freedesktop.org/show_bug.cgi?id=103182
[fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
[fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
Participating hosts (43 -> 42)
------------------------------
Additional (4): fi-cfl-guc fi-bxt-j4205 fi-bsw-n3050 fi-pnv-d510
Missing (5): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-ctg-p8600 fi-bdw-samus
Build changes
-------------
* Linux: CI_DRM_5773 -> Patchwork_12516
CI_DRM_5773: b1f30d7018c1d5f9e9abfb5dc6b8d84c3148dd57 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4889: e3faf0fd49b7e3a763bf89e11fb4fdce81839da2 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12516: e704d6cdaff91f82923893e8ce1aa186cc974f8e @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
e704d6cdaff9 drm/i915: Inline skl_build_pipe_wm() into its only caller
f040ded2da57 drm/i915: Don't pass pipe_wm around so much
ae66bf2b0c8c drm/i915: Move some variables to tighter scope
5498ad75c5d7 drm/i915: Keep plane watermarks enabled more aggressively
3a71e23333c7 drm/i915: Make sure cursor has enough ddb for the selected wm level
68ca07c0fbd1 drm/i915: Allocate enough DDB for the cursor
5b0474e86cbc drm/i915: Extract skl_compute_wm_params()
1c8eefc75e3a drm/i915: Don't pass plane state to skl_compute_plane_wm()
e4fddf098cdf drm/i915: Accept alloc_size == blocks
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12516/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread* ✓ Fi.CI.IGT: success for skl+ cursor DDB allocation fixes (rev2)
2019-03-12 20:58 [PATCH 0/9] skl+ cursor DDB allocation fixes Ville Syrjala
` (13 preceding siblings ...)
2019-03-19 17:14 ` ✓ Fi.CI.BAT: success " Patchwork
@ 2019-03-20 2:41 ` Patchwork
14 siblings, 0 replies; 25+ messages in thread
From: Patchwork @ 2019-03-20 2:41 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
== Series Details ==
Series: skl+ cursor DDB allocation fixes (rev2)
URL : https://patchwork.freedesktop.org/series/57901/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5773_full -> Patchwork_12516_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Known issues
------------
Here are the changes found in Patchwork_12516_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_bad_reloc@negative-reloc-bsd2:
- shard-iclb: NOTRUN -> SKIP [fdo#109276]
* igt@gem_pwrite@stolen-normal:
- shard-skl: NOTRUN -> SKIP [fdo#109271] +104
* igt@i915_pm_rpm@basic-rte:
- shard-skl: PASS -> INCOMPLETE [fdo#107807]
* igt@kms_busy@extended-modeset-hang-newfb-render-c:
- shard-skl: NOTRUN -> DMESG-WARN [fdo#107956] +1
* igt@kms_chv_cursor_fail@pipe-c-256x256-bottom-edge:
- shard-snb: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +11
* igt@kms_cursor_crc@cursor-64x21-random:
- shard-apl: PASS -> FAIL [fdo#103232] +3
* igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy:
- shard-hsw: PASS -> FAIL [fdo#105767]
* igt@kms_fbcon_fbt@psr-suspend:
- shard-skl: NOTRUN -> FAIL [fdo#103833]
* igt@kms_flip@plain-flip-fb-recreate-interruptible:
- shard-skl: PASS -> FAIL [fdo#100368]
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-pwrite:
- shard-apl: PASS -> FAIL [fdo#103167]
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-pwrite:
- shard-iclb: NOTRUN -> SKIP [fdo#109280]
* igt@kms_frontbuffer_tracking@fbc-stridechange:
- shard-iclb: PASS -> FAIL [fdo#105682] / [fdo#108040]
* igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-blt:
- shard-iclb: PASS -> FAIL [fdo#109247] +15
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-mmap-wc:
- shard-skl: NOTRUN -> FAIL [fdo#103167]
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-pwrite:
- shard-iclb: PASS -> FAIL [fdo#103167] +4
* igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-pwrite:
- shard-iclb: PASS -> FAIL [fdo#105682] / [fdo#109247] +2
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-f:
- shard-skl: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +8
* igt@kms_plane_alpha_blend@pipe-c-alpha-transparant-fb:
- shard-skl: NOTRUN -> FAIL [fdo#108145] +3
* igt@kms_psr@psr2_sprite_plane_move:
- shard-iclb: PASS -> SKIP [fdo#109441] +2
* igt@kms_psr@sprite_mmap_cpu:
- shard-iclb: PASS -> FAIL [fdo#107383]
* igt@kms_rotation_crc@multiplane-rotation-cropping-bottom:
- shard-kbl: PASS -> DMESG-FAIL [fdo#105763]
* igt@kms_rotation_crc@multiplane-rotation-cropping-top:
- shard-kbl: PASS -> FAIL [fdo#109016]
* igt@kms_sysfs_edid_timing:
- shard-skl: NOTRUN -> FAIL [fdo#100047]
* igt@kms_vblank@pipe-c-ts-continuation-dpms-suspend:
- shard-apl: PASS -> FAIL [fdo#104894] +1
* igt@kms_vrr@flip-basic:
- shard-iclb: NOTRUN -> SKIP [fdo#109502]
* igt@prime_nv_test@i915_import_gtt_mmap:
- shard-snb: NOTRUN -> SKIP [fdo#109271] +70
#### Possible fixes ####
* igt@gem_softpin@noreloc-s3:
- shard-skl: INCOMPLETE [fdo#104108] / [fdo#107773] -> PASS
* igt@kms_atomic_transition@1x-modeset-transitions-nonblocking-fencing:
- shard-apl: FAIL [fdo#109660] -> PASS
* igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-b:
- shard-iclb: DMESG-WARN [fdo#107956] -> PASS
* igt@kms_ccs@pipe-a-crc-sprite-planes-basic:
- shard-glk: FAIL [fdo#108145] -> PASS
* igt@kms_cursor_crc@cursor-128x128-random:
- shard-apl: FAIL [fdo#103232] -> PASS +4
* igt@kms_cursor_crc@cursor-128x128-suspend:
- shard-apl: FAIL [fdo#103191] / [fdo#103232] -> PASS +1
* igt@kms_cursor_crc@cursor-64x21-offscreen:
- shard-skl: FAIL [fdo#103232] -> PASS
* igt@kms_cursor_crc@cursor-alpha-opaque:
- shard-apl: FAIL [fdo#109350] -> PASS
* igt@kms_cursor_crc@cursor-size-change:
- shard-glk: FAIL [fdo#103232] -> PASS
* igt@kms_cursor_legacy@cursor-vs-flip-toggle:
- shard-hsw: FAIL [fdo#103355] -> PASS
* igt@kms_draw_crc@draw-method-xrgb8888-mmap-cpu-untiled:
- shard-skl: FAIL [fdo#108472] -> PASS
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-skl: FAIL [fdo#105363] -> PASS
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-skl: INCOMPLETE [fdo#109507] -> PASS
* igt@kms_flip_tiling@flip-yf-tiled:
- shard-skl: FAIL [fdo#108145] -> PASS +1
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-onoff:
- shard-apl: FAIL [fdo#103167] -> PASS
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-cpu:
- shard-glk: FAIL [fdo#103167] -> PASS
* igt@kms_frontbuffer_tracking@fbc-2p-rte:
- shard-glk: FAIL [fdo#103167] / [fdo#105682] -> PASS
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-blt:
- shard-iclb: FAIL [fdo#109247] -> PASS +8
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-mmap-gtt:
- shard-skl: FAIL [fdo#105682] -> PASS +2
* igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-indfb-draw-mmap-gtt:
- shard-skl: FAIL [fdo#103167] -> PASS +3
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-blt:
- shard-iclb: FAIL [fdo#103167] -> PASS +9
* {igt@kms_plane@pixel-format-pipe-c-planes}:
- shard-iclb: FAIL -> PASS
* {igt@kms_plane@pixel-format-pipe-c-planes-source-clamping}:
- shard-iclb: DMESG-WARN [fdo#106885] -> PASS
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes:
- shard-skl: INCOMPLETE [fdo#104108] -> PASS
* {igt@kms_plane@plane-position-covered-pipe-a-planes}:
- shard-iclb: FAIL [fdo#110038] -> PASS
* {igt@kms_plane@plane-position-covered-pipe-c-planes}:
- shard-apl: FAIL [fdo#110038] -> PASS
* igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
- shard-skl: FAIL [fdo#107815] -> PASS
* {igt@kms_plane_multiple@atomic-pipe-a-tiling-none}:
- shard-apl: FAIL [fdo#110037] -> PASS
* {igt@kms_plane_multiple@atomic-pipe-a-tiling-y}:
- shard-iclb: FAIL [fdo#110037] -> PASS +3
* {igt@kms_plane_multiple@atomic-pipe-c-tiling-x}:
- shard-glk: FAIL [fdo#110037] -> PASS
* igt@kms_psr@cursor_render:
- shard-iclb: FAIL [fdo#107383] -> PASS +1
* igt@kms_psr@psr2_cursor_plane_onoff:
- shard-iclb: SKIP [fdo#109441] -> PASS +3
* igt@kms_setmode@basic:
- shard-apl: FAIL [fdo#99912] -> PASS
- shard-hsw: FAIL [fdo#99912] -> PASS
* igt@kms_vblank@pipe-a-ts-continuation-suspend:
- shard-iclb: FAIL [fdo#104894] -> PASS
#### Warnings ####
* igt@i915_pm_rpm@modeset-non-lpsp-stress:
- shard-skl: INCOMPLETE [fdo#107807] -> SKIP [fdo#109271]
* igt@kms_plane_scaling@pipe-b-scaler-with-rotation:
- shard-glk: FAIL [fdo#110098] -> SKIP [fdo#109271] / [fdo#109278]
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#100047]: https://bugs.freedesktop.org/show_bug.cgi?id=100047
[fdo#100368]: https://bugs.freedesktop.org/show_bug.cgi?id=100368
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
[fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
[fdo#103355]: https://bugs.freedesktop.org/show_bug.cgi?id=103355
[fdo#103833]: https://bugs.freedesktop.org/show_bug.cgi?id=103833
[fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
[fdo#104894]: https://bugs.freedesktop.org/show_bug.cgi?id=104894
[fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
[fdo#105682]: https://bugs.freedesktop.org/show_bug.cgi?id=105682
[fdo#105763]: https://bugs.freedesktop.org/show_bug.cgi?id=105763
[fdo#105767]: https://bugs.freedesktop.org/show_bug.cgi?id=105767
[fdo#106885]: https://bugs.freedesktop.org/show_bug.cgi?id=106885
[fdo#107383]: https://bugs.freedesktop.org/show_bug.cgi?id=107383
[fdo#107773]: https://bugs.freedesktop.org/show_bug.cgi?id=107773
[fdo#107807]: https://bugs.freedesktop.org/show_bug.cgi?id=107807
[fdo#107815]: https://bugs.freedesktop.org/show_bug.cgi?id=107815
[fdo#107956]: https://bugs.freedesktop.org/show_bug.cgi?id=107956
[fdo#108040]: https://bugs.freedesktop.org/show_bug.cgi?id=108040
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#108472]: https://bugs.freedesktop.org/show_bug.cgi?id=108472
[fdo#109016]: https://bugs.freedesktop.org/show_bug.cgi?id=109016
[fdo#109247]: https://bugs.freedesktop.org/show_bug.cgi?id=109247
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109350]: https://bugs.freedesktop.org/show_bug.cgi?id=109350
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109502]: https://bugs.freedesktop.org/show_bug.cgi?id=109502
[fdo#109507]: https://bugs.freedesktop.org/show_bug.cgi?id=109507
[fdo#109660]: https://bugs.freedesktop.org/show_bug.cgi?id=109660
[fdo#110037]: https://bugs.freedesktop.org/show_bug.cgi?id=110037
[fdo#110038]: https://bugs.freedesktop.org/show_bug.cgi?id=110038
[fdo#110098]: https://bugs.freedesktop.org/show_bug.cgi?id=110098
[fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Build changes
-------------
* Linux: CI_DRM_5773 -> Patchwork_12516
CI_DRM_5773: b1f30d7018c1d5f9e9abfb5dc6b8d84c3148dd57 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4889: e3faf0fd49b7e3a763bf89e11fb4fdce81839da2 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12516: e704d6cdaff91f82923893e8ce1aa186cc974f8e @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12516/
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Intel-gfx@lists.freedesktop.org
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