* [PATCH 1/2] arm64: tegra: Add pinmux for PWM-based DFLL support on Shield platform
@ 2019-03-22 7:11 ` Joseph Lo
0 siblings, 0 replies; 8+ messages in thread
From: Joseph Lo @ 2019-03-22 7:11 UTC (permalink / raw)
To: Thierry Reding, Jonathan Hunter; +Cc: linux-tegra, linux-arm-kernel, Joseph Lo
Add pinmux for PWM-based DFLL support on Shield platform.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
---
arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi
index 88a4b9333d84..c668f16c8574 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi
@@ -1318,6 +1318,20 @@
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
};
+
+ dvfs_pwm_active_state: dvfs_pwm_active {
+ dvfs_pwm_pbb1 {
+ nvidia,pins = "dvfs_pwm_pbb1";
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ };
+ };
+
+ dvfs_pwm_inactive_state: dvfs_pwm_inactive {
+ dvfs_pwm_pbb1 {
+ nvidia,pins = "dvfs_pwm_pbb1";
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ };
+ };
};
serial@70006000 {
--
2.21.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 1/2] arm64: tegra: Add pinmux for PWM-based DFLL support on Shield platform
@ 2019-03-22 7:11 ` Joseph Lo
0 siblings, 0 replies; 8+ messages in thread
From: Joseph Lo @ 2019-03-22 7:11 UTC (permalink / raw)
To: Thierry Reding, Jonathan Hunter; +Cc: linux-tegra, linux-arm-kernel, Joseph Lo
Add pinmux for PWM-based DFLL support on Shield platform.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
---
arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi
index 88a4b9333d84..c668f16c8574 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi
@@ -1318,6 +1318,20 @@
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
};
+
+ dvfs_pwm_active_state: dvfs_pwm_active {
+ dvfs_pwm_pbb1 {
+ nvidia,pins = "dvfs_pwm_pbb1";
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ };
+ };
+
+ dvfs_pwm_inactive_state: dvfs_pwm_inactive {
+ dvfs_pwm_pbb1 {
+ nvidia,pins = "dvfs_pwm_pbb1";
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ };
+ };
};
serial@70006000 {
--
2.21.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 2/2] arm64: tegra: Enable DFLL clock on Shield platform
2019-03-22 7:11 ` Joseph Lo
@ 2019-03-22 7:11 ` Joseph Lo
-1 siblings, 0 replies; 8+ messages in thread
From: Joseph Lo @ 2019-03-22 7:11 UTC (permalink / raw)
To: Thierry Reding, Jonathan Hunter; +Cc: linux-tegra, linux-arm-kernel, Joseph Lo
Enable DFLL clock on Shield platform.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
---
.../arm64/boot/dts/nvidia/tegra210-p2894.dtsi | 21 +++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi
index c668f16c8574..5385816a83a9 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi
@@ -1600,6 +1600,27 @@
status = "okay";
};
+ clock@70110000 {
+ status = "okay";
+
+ nvidia,cf = <6>;
+ nvidia,ci = <0>;
+ nvidia,cg = <2>;
+ nvidia,droop-ctrl = <0x00000f00>;
+ nvidia,force-mode = <1>;
+ nvidia,sample-rate = <25000>;
+
+ nvidia,pwm-min-microvolts = <708000>;
+ nvidia,pwm-period-nanoseconds = <2500>; /* 2.5us */
+ nvidia,pwm-to-pmic;
+ nvidia,pwm-tristate-microvolts = <1000000>;
+ nvidia,pwm-voltage-step-microvolts = <19200>;
+
+ pinctrl-names = "dvfs_pwm_enable", "dvfs_pwm_disable";
+ pinctrl-0 = <&dvfs_pwm_active_state>;
+ pinctrl-1 = <&dvfs_pwm_inactive_state>;
+ };
+
clocks {
compatible = "simple-bus";
#address-cells = <1>;
--
2.21.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 2/2] arm64: tegra: Enable DFLL clock on Shield platform
@ 2019-03-22 7:11 ` Joseph Lo
0 siblings, 0 replies; 8+ messages in thread
From: Joseph Lo @ 2019-03-22 7:11 UTC (permalink / raw)
To: Thierry Reding, Jonathan Hunter; +Cc: linux-tegra, linux-arm-kernel, Joseph Lo
Enable DFLL clock on Shield platform.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
---
.../arm64/boot/dts/nvidia/tegra210-p2894.dtsi | 21 +++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi
index c668f16c8574..5385816a83a9 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi
@@ -1600,6 +1600,27 @@
status = "okay";
};
+ clock@70110000 {
+ status = "okay";
+
+ nvidia,cf = <6>;
+ nvidia,ci = <0>;
+ nvidia,cg = <2>;
+ nvidia,droop-ctrl = <0x00000f00>;
+ nvidia,force-mode = <1>;
+ nvidia,sample-rate = <25000>;
+
+ nvidia,pwm-min-microvolts = <708000>;
+ nvidia,pwm-period-nanoseconds = <2500>; /* 2.5us */
+ nvidia,pwm-to-pmic;
+ nvidia,pwm-tristate-microvolts = <1000000>;
+ nvidia,pwm-voltage-step-microvolts = <19200>;
+
+ pinctrl-names = "dvfs_pwm_enable", "dvfs_pwm_disable";
+ pinctrl-0 = <&dvfs_pwm_active_state>;
+ pinctrl-1 = <&dvfs_pwm_inactive_state>;
+ };
+
clocks {
compatible = "simple-bus";
#address-cells = <1>;
--
2.21.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH 1/2] arm64: tegra: Add pinmux for PWM-based DFLL support on Shield platform
2019-03-22 7:11 ` Joseph Lo
(?)
(?)
@ 2019-03-22 9:52 ` Thierry Reding
2019-04-02 3:06 ` Joseph Lo
-1 siblings, 1 reply; 8+ messages in thread
From: Thierry Reding @ 2019-03-22 9:52 UTC (permalink / raw)
To: Joseph Lo; +Cc: linux-tegra, Stephen Warren, linux-arm-kernel, Jonathan Hunter
[-- Attachment #1.1: Type: text/plain, Size: 1538 bytes --]
On Fri, Mar 22, 2019 at 03:11:10PM +0800, Joseph Lo wrote:
> Add pinmux for PWM-based DFLL support on Shield platform.
>
> Signed-off-by: Joseph Lo <josephl@nvidia.com>
> ---
> arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
There's been some discussion recently about moving away from programming
pinmux in the kernel because it isn't always safe to do that. The idea
is that early boot firmware (typically cboot) will already have set up
the pinmux, so there's no need to do it again in the kernel.
These look like you're going to change this pin to/from tristate at
runtime, so perhaps that's the kind of thing that we're okay with?
Adding Stephen for visibility.
Thierry
> diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi
> index 88a4b9333d84..c668f16c8574 100644
> --- a/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi
> +++ b/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi
> @@ -1318,6 +1318,20 @@
> nvidia,open-drain = <TEGRA_PIN_DISABLE>;
> };
> };
> +
> + dvfs_pwm_active_state: dvfs_pwm_active {
> + dvfs_pwm_pbb1 {
> + nvidia,pins = "dvfs_pwm_pbb1";
> + nvidia,tristate = <TEGRA_PIN_DISABLE>;
> + };
> + };
> +
> + dvfs_pwm_inactive_state: dvfs_pwm_inactive {
> + dvfs_pwm_pbb1 {
> + nvidia,pins = "dvfs_pwm_pbb1";
> + nvidia,tristate = <TEGRA_PIN_ENABLE>;
> + };
> + };
> };
>
> serial@70006000 {
> --
> 2.21.0
>
[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
[-- Attachment #2: Type: text/plain, Size: 176 bytes --]
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/2] arm64: tegra: Add pinmux for PWM-based DFLL support on Shield platform
2019-03-22 9:52 ` [PATCH 1/2] arm64: tegra: Add pinmux for PWM-based DFLL support " Thierry Reding
@ 2019-04-02 3:06 ` Joseph Lo
0 siblings, 0 replies; 8+ messages in thread
From: Joseph Lo @ 2019-04-02 3:06 UTC (permalink / raw)
To: Thierry Reding
Cc: linux-tegra, Stephen Warren, linux-arm-kernel, Jonathan Hunter
On 3/22/19 5:52 PM, Thierry Reding wrote:
> On Fri, Mar 22, 2019 at 03:11:10PM +0800, Joseph Lo wrote:
>> Add pinmux for PWM-based DFLL support on Shield platform.
>>
>> Signed-off-by: Joseph Lo <josephl@nvidia.com>
>> ---
>> arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi | 14 ++++++++++++++
>> 1 file changed, 14 insertions(+)
>
> There's been some discussion recently about moving away from programming
> pinmux in the kernel because it isn't always safe to do that. The idea
> is that early boot firmware (typically cboot) will already have set up
> the pinmux, so there's no need to do it again in the kernel.
>
> These look like you're going to change this pin to/from tristate at
> runtime, so perhaps that's the kind of thing that we're okay with?
>
> Adding Stephen for visibility.
Gentle ping.
Thanks,
Joseph
>
> Thierry
>
>> diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi
>> index 88a4b9333d84..c668f16c8574 100644
>> --- a/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi
>> +++ b/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi
>> @@ -1318,6 +1318,20 @@
>> nvidia,open-drain = <TEGRA_PIN_DISABLE>;
>> };
>> };
>> +
>> + dvfs_pwm_active_state: dvfs_pwm_active {
>> + dvfs_pwm_pbb1 {
>> + nvidia,pins = "dvfs_pwm_pbb1";
>> + nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> + };
>> + };
>> +
>> + dvfs_pwm_inactive_state: dvfs_pwm_inactive {
>> + dvfs_pwm_pbb1 {
>> + nvidia,pins = "dvfs_pwm_pbb1";
>> + nvidia,tristate = <TEGRA_PIN_ENABLE>;
>> + };
>> + };
>> };
>>
>> serial@70006000 {
>> --
>> 2.21.0
>>
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/2] arm64: tegra: Add pinmux for PWM-based DFLL support on Shield platform
@ 2019-04-02 3:06 ` Joseph Lo
0 siblings, 0 replies; 8+ messages in thread
From: Joseph Lo @ 2019-04-02 3:06 UTC (permalink / raw)
To: Thierry Reding
Cc: linux-tegra, Stephen Warren, linux-arm-kernel, Jonathan Hunter
On 3/22/19 5:52 PM, Thierry Reding wrote:
> On Fri, Mar 22, 2019 at 03:11:10PM +0800, Joseph Lo wrote:
>> Add pinmux for PWM-based DFLL support on Shield platform.
>>
>> Signed-off-by: Joseph Lo <josephl@nvidia.com>
>> ---
>> arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi | 14 ++++++++++++++
>> 1 file changed, 14 insertions(+)
>
> There's been some discussion recently about moving away from programming
> pinmux in the kernel because it isn't always safe to do that. The idea
> is that early boot firmware (typically cboot) will already have set up
> the pinmux, so there's no need to do it again in the kernel.
>
> These look like you're going to change this pin to/from tristate at
> runtime, so perhaps that's the kind of thing that we're okay with?
>
> Adding Stephen for visibility.
Gentle ping.
Thanks,
Joseph
>
> Thierry
>
>> diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi
>> index 88a4b9333d84..c668f16c8574 100644
>> --- a/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi
>> +++ b/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi
>> @@ -1318,6 +1318,20 @@
>> nvidia,open-drain = <TEGRA_PIN_DISABLE>;
>> };
>> };
>> +
>> + dvfs_pwm_active_state: dvfs_pwm_active {
>> + dvfs_pwm_pbb1 {
>> + nvidia,pins = "dvfs_pwm_pbb1";
>> + nvidia,tristate = <TEGRA_PIN_DISABLE>;
>> + };
>> + };
>> +
>> + dvfs_pwm_inactive_state: dvfs_pwm_inactive {
>> + dvfs_pwm_pbb1 {
>> + nvidia,pins = "dvfs_pwm_pbb1";
>> + nvidia,tristate = <TEGRA_PIN_ENABLE>;
>> + };
>> + };
>> };
>>
>> serial@70006000 {
>> --
>> 2.21.0
>>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/2] arm64: tegra: Add pinmux for PWM-based DFLL support on Shield platform
2019-04-02 3:06 ` Joseph Lo
(?)
@ 2019-04-15 1:27 ` Joseph Lo
-1 siblings, 0 replies; 8+ messages in thread
From: Joseph Lo @ 2019-04-15 1:27 UTC (permalink / raw)
To: Thierry Reding
Cc: linux-tegra, Jonathan Hunter, linux-arm-kernel, Stephen Warren
On 4/2/19 11:06 AM, Joseph Lo wrote:
> On 3/22/19 5:52 PM, Thierry Reding wrote:
>> On Fri, Mar 22, 2019 at 03:11:10PM +0800, Joseph Lo wrote:
>>> Add pinmux for PWM-based DFLL support on Shield platform.
>>>
>>> Signed-off-by: Joseph Lo <josephl@nvidia.com>
>>> ---
>>> arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi | 14 ++++++++++++++
>>> 1 file changed, 14 insertions(+)
>>
>> There's been some discussion recently about moving away from programming
>> pinmux in the kernel because it isn't always safe to do that. The idea
>> is that early boot firmware (typically cboot) will already have set up
>> the pinmux, so there's no need to do it again in the kernel.
>>
>> These look like you're going to change this pin to/from tristate at
>> runtime, so perhaps that's the kind of thing that we're okay with?
>>
>> Adding Stephen for visibility.
>
> Gentle ping.
>
If there is no further objection, could we apply this series?
Thanks,
Joseph
>>
>>> diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi
>>> b/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi
>>> index 88a4b9333d84..c668f16c8574 100644
>>> --- a/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi
>>> +++ b/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi
>>> @@ -1318,6 +1318,20 @@
>>> nvidia,open-drain = <TEGRA_PIN_DISABLE>;
>>> };
>>> };
>>> +
>>> + dvfs_pwm_active_state: dvfs_pwm_active {
>>> + dvfs_pwm_pbb1 {
>>> + nvidia,pins = "dvfs_pwm_pbb1";
>>> + nvidia,tristate = <TEGRA_PIN_DISABLE>;
>>> + };
>>> + };
>>> +
>>> + dvfs_pwm_inactive_state: dvfs_pwm_inactive {
>>> + dvfs_pwm_pbb1 {
>>> + nvidia,pins = "dvfs_pwm_pbb1";
>>> + nvidia,tristate = <TEGRA_PIN_ENABLE>;
>>> + };
>>> + };
>>> };
>>> serial@70006000 {
>>> --
>>> 2.21.0
>>>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2019-04-15 1:27 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-03-22 7:11 [PATCH 1/2] arm64: tegra: Add pinmux for PWM-based DFLL support on Shield platform Joseph Lo
2019-03-22 7:11 ` Joseph Lo
2019-03-22 7:11 ` [PATCH 2/2] arm64: tegra: Enable DFLL clock " Joseph Lo
2019-03-22 7:11 ` Joseph Lo
2019-03-22 9:52 ` [PATCH 1/2] arm64: tegra: Add pinmux for PWM-based DFLL support " Thierry Reding
2019-04-02 3:06 ` Joseph Lo
2019-04-02 3:06 ` Joseph Lo
2019-04-15 1:27 ` Joseph Lo
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