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* [PATCH v2 1/6] drm/i915: Add broadcast RGB property for DP MST
@ 2019-03-26 14:25 Ville Syrjala
  2019-03-26 14:25 ` [PATCH v2 2/6] drm/i915: Expose the force_audio property with " Ville Syrjala
                   ` (8 more replies)
  0 siblings, 9 replies; 17+ messages in thread
From: Ville Syrjala @ 2019-03-26 14:25 UTC (permalink / raw)
  To: intel-gfx; +Cc: Ivan Vlk

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Add the "Broadcast RGB" property to MST connectors, and implement
the same logic for it as we have in the SST code.

v2: Extract and reuse intel_dp_limited_color_range()

Cc: Ivan Vlk <ari@adyline.sk>
Tested-by: Ivan Vlk <ari@adyline.sk>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108821
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com> #v1
---
 drivers/gpu/drm/i915/intel_dp.c     | 39 ++++++++++++++++++-----------
 drivers/gpu/drm/i915/intel_dp_mst.c | 17 +++++++++++--
 drivers/gpu/drm/i915/intel_drv.h    |  2 ++
 3 files changed, 42 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 326de12c3f44..3a60d6f9a287 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -2107,6 +2107,29 @@ intel_dp_compute_link_config(struct intel_encoder *encoder,
 	return 0;
 }
 
+bool intel_dp_limited_color_range(const struct intel_crtc_state *crtc_state,
+				  const struct drm_connector_state *conn_state)
+{
+	const struct intel_digital_connector_state *intel_conn_state =
+		to_intel_digital_connector_state(conn_state);
+	const struct drm_display_mode *adjusted_mode =
+		&crtc_state->base.adjusted_mode;
+
+	if (intel_conn_state->broadcast_rgb == INTEL_BROADCAST_RGB_AUTO) {
+		/*
+		 * See:
+		 * CEA-861-E - 5.1 Default Encoding Parameters
+		 * VESA DisplayPort Ver.1.2a - 5.1.1.1 Video Colorimetry
+		 */
+		return crtc_state->pipe_bpp != 18 &&
+			drm_default_rgb_quant_range(adjusted_mode) ==
+			HDMI_QUANTIZATION_RANGE_LIMITED;
+	} else {
+		return intel_conn_state->broadcast_rgb ==
+			INTEL_BROADCAST_RGB_LIMITED;
+	}
+}
+
 int
 intel_dp_compute_config(struct intel_encoder *encoder,
 			struct intel_crtc_state *pipe_config,
@@ -2175,20 +2198,8 @@ intel_dp_compute_config(struct intel_encoder *encoder,
 	if (ret < 0)
 		return ret;
 
-	if (intel_conn_state->broadcast_rgb == INTEL_BROADCAST_RGB_AUTO) {
-		/*
-		 * See:
-		 * CEA-861-E - 5.1 Default Encoding Parameters
-		 * VESA DisplayPort Ver.1.2a - 5.1.1.1 Video Colorimetry
-		 */
-		pipe_config->limited_color_range =
-			pipe_config->pipe_bpp != 18 &&
-			drm_default_rgb_quant_range(adjusted_mode) ==
-			HDMI_QUANTIZATION_RANGE_LIMITED;
-	} else {
-		pipe_config->limited_color_range =
-			intel_conn_state->broadcast_rgb == INTEL_BROADCAST_RGB_LIMITED;
-	}
+	pipe_config->limited_color_range =
+		intel_dp_limited_color_range(pipe_config, conn_state);
 
 	if (!pipe_config->dsc_params.compression_enable)
 		intel_link_compute_m_n(pipe_config->pipe_bpp,
diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c b/drivers/gpu/drm/i915/intel_dp_mst.c
index fb67cd931117..dc31e0ac886a 100644
--- a/drivers/gpu/drm/i915/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/intel_dp_mst.c
@@ -38,6 +38,8 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
 	struct intel_digital_port *intel_dig_port = intel_mst->primary;
 	struct intel_dp *intel_dp = &intel_dig_port->dp;
 	struct drm_connector *connector = conn_state->connector;
+	struct intel_digital_connector_state *intel_conn_state =
+		to_intel_digital_connector_state(conn_state);
 	void *port = to_intel_connector(connector)->port;
 	struct drm_atomic_state *state = pipe_config->base.state;
 	struct drm_crtc *crtc = pipe_config->base.crtc;
@@ -77,6 +79,9 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
 	if (drm_dp_mst_port_has_audio(&intel_dp->mst_mgr, port))
 		pipe_config->has_audio = true;
 
+	pipe_config->limited_color_range =
+		intel_dp_limited_color_range(pipe_config, conn_state);
+
 	mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock, bpp);
 	pipe_config->pbn = mst_pbn;
 
@@ -117,7 +122,11 @@ intel_dp_mst_atomic_check(struct drm_connector *connector,
 	struct drm_crtc *new_crtc = new_conn_state->crtc;
 	struct drm_crtc_state *crtc_state;
 	struct drm_dp_mst_topology_mgr *mgr;
-	int ret = 0;
+	int ret;
+
+	ret = intel_digital_connector_atomic_check(connector, new_conn_state);
+	if (ret)
+		return ret;
 
 	if (!old_conn_state->crtc)
 		return 0;
@@ -354,11 +363,13 @@ intel_dp_mst_detect(struct drm_connector *connector, bool force)
 static const struct drm_connector_funcs intel_dp_mst_connector_funcs = {
 	.detect = intel_dp_mst_detect,
 	.fill_modes = drm_helper_probe_single_connector_modes,
+	.atomic_get_property = intel_digital_connector_atomic_get_property,
+	.atomic_set_property = intel_digital_connector_atomic_set_property,
 	.late_register = intel_connector_register,
 	.early_unregister = intel_connector_unregister,
 	.destroy = intel_connector_destroy,
 	.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
-	.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
+	.atomic_duplicate_state = intel_digital_connector_duplicate_state,
 };
 
 static int intel_dp_mst_get_modes(struct drm_connector *connector)
@@ -487,6 +498,8 @@ static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topolo
 	if (ret)
 		goto err;
 
+	intel_attach_broadcast_rgb_property(connector);
+
 	return connector;
 
 err:
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 862dc73bfbef..ae62f6a6be22 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1909,6 +1909,8 @@ void intel_csr_ucode_suspend(struct drm_i915_private *);
 void intel_csr_ucode_resume(struct drm_i915_private *);
 
 /* intel_dp.c */
+bool intel_dp_limited_color_range(const struct intel_crtc_state *crtc_state,
+				  const struct drm_connector_state *conn_state);
 bool intel_dp_port_enabled(struct drm_i915_private *dev_priv,
 			   i915_reg_t dp_reg, enum port port,
 			   enum pipe *pipe);
-- 
2.19.2

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 17+ messages in thread

* [PATCH v2 2/6] drm/i915: Expose the force_audio property with DP MST
  2019-03-26 14:25 [PATCH v2 1/6] drm/i915: Add broadcast RGB property for DP MST Ville Syrjala
@ 2019-03-26 14:25 ` Ville Syrjala
  2019-03-26 14:25 ` [PATCH v2 3/6] drm/i915: Remove the 8bpc shackles from " Ville Syrjala
                   ` (7 subsequent siblings)
  8 siblings, 0 replies; 17+ messages in thread
From: Ville Syrjala @ 2019-03-26 14:25 UTC (permalink / raw)
  To: intel-gfx

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

We already expose the force_audio property with SST. Do the same
with MST.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/intel_dp_mst.c | 12 +++++++++---
 1 file changed, 9 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c b/drivers/gpu/drm/i915/intel_dp_mst.c
index dc31e0ac886a..334176e814a1 100644
--- a/drivers/gpu/drm/i915/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/intel_dp_mst.c
@@ -64,6 +64,14 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
 		DRM_DEBUG_KMS("Setting pipe bpp to %d\n",
 			      bpp);
 	}
+
+	if (intel_conn_state->force_audio == HDMI_AUDIO_AUTO)
+		pipe_config->has_audio =
+			drm_dp_mst_port_has_audio(&intel_dp->mst_mgr, port);
+	else
+		pipe_config->has_audio =
+			intel_conn_state->force_audio == HDMI_AUDIO_ON;
+
 	/*
 	 * for MST we always configure max link bw - the spec doesn't
 	 * seem to suggest we should do otherwise.
@@ -76,9 +84,6 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
 
 	pipe_config->port_clock = intel_dp_max_link_rate(intel_dp);
 
-	if (drm_dp_mst_port_has_audio(&intel_dp->mst_mgr, port))
-		pipe_config->has_audio = true;
-
 	pipe_config->limited_color_range =
 		intel_dp_limited_color_range(pipe_config, conn_state);
 
@@ -498,6 +503,7 @@ static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topolo
 	if (ret)
 		goto err;
 
+	intel_attach_force_audio_property(connector);
 	intel_attach_broadcast_rgb_property(connector);
 
 	return connector;
-- 
2.19.2

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 17+ messages in thread

* [PATCH v2 3/6] drm/i915: Remove the 8bpc shackles from DP MST
  2019-03-26 14:25 [PATCH v2 1/6] drm/i915: Add broadcast RGB property for DP MST Ville Syrjala
  2019-03-26 14:25 ` [PATCH v2 2/6] drm/i915: Expose the force_audio property with " Ville Syrjala
@ 2019-03-26 14:25 ` Ville Syrjala
  2019-03-26 14:25 ` [PATCH v2 4/6] drm/i915: Add max_bpc property for " Ville Syrjala
                   ` (6 subsequent siblings)
  8 siblings, 0 replies; 17+ messages in thread
From: Ville Syrjala @ 2019-03-26 14:25 UTC (permalink / raw)
  To: intel-gfx

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Allow DP MST to output any color depth. This means deep color as
well as falling back to 6bpc if we would otherwise require too
much bandwidth.

TODO: We should probably extend bw_contstrained scheme to force
all streams on the link to 6bpc if we can't fit the new stream(s)
otherwise.

v2: Use a proper for-loop (Jani)

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com> #v1
---
 drivers/gpu/drm/i915/intel_dp.c     |   8 +-
 drivers/gpu/drm/i915/intel_dp_mst.c | 117 +++++++++++++++++-----------
 drivers/gpu/drm/i915/intel_drv.h    |   8 ++
 3 files changed, 80 insertions(+), 53 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 3a60d6f9a287..2aee526ed632 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1723,12 +1723,6 @@ void intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock,
 	}
 }
 
-struct link_config_limits {
-	int min_clock, max_clock;
-	int min_lane_count, max_lane_count;
-	int min_bpp, max_bpp;
-};
-
 static bool intel_dp_source_supports_fec(struct intel_dp *intel_dp,
 					 const struct intel_crtc_state *pipe_config)
 {
@@ -1791,7 +1785,7 @@ static int intel_dp_compute_bpp(struct intel_dp *intel_dp,
 }
 
 /* Adjust link config limits based on compliance test requests. */
-static void
+void
 intel_dp_adjust_compliance_config(struct intel_dp *intel_dp,
 				  struct intel_crtc_state *pipe_config,
 				  struct link_config_limits *limits)
diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c b/drivers/gpu/drm/i915/intel_dp_mst.c
index 334176e814a1..484846e94427 100644
--- a/drivers/gpu/drm/i915/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/intel_dp_mst.c
@@ -29,41 +29,78 @@
 #include <drm/drm_edid.h>
 #include <drm/drm_probe_helper.h>
 
+static int intel_dp_mst_compute_link_config(struct intel_encoder *encoder,
+					    struct intel_crtc_state *crtc_state,
+					    struct drm_connector_state *conn_state,
+					    struct link_config_limits *limits)
+{
+	struct drm_atomic_state *state = crtc_state->base.state;
+	struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
+	struct intel_dp *intel_dp = &intel_mst->primary->dp;
+	struct intel_connector *connector =
+		to_intel_connector(conn_state->connector);
+	const struct drm_display_mode *adjusted_mode =
+		&crtc_state->base.adjusted_mode;
+	void *port = connector->port;
+	bool constant_n = drm_dp_has_quirk(&intel_dp->desc,
+					   DP_DPCD_QUIRK_CONSTANT_N);
+	int bpp, slots = -EINVAL;
+
+	crtc_state->lane_count = limits->max_lane_count;
+	crtc_state->port_clock = limits->max_clock;
+
+	for (bpp = limits->max_bpp; bpp >= limits->min_bpp; bpp -= 2 * 3) {
+		crtc_state->pipe_bpp = bpp;
+
+		crtc_state->pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock,
+						       crtc_state->pipe_bpp);
+
+		slots = drm_dp_atomic_find_vcpi_slots(state, &intel_dp->mst_mgr,
+						      port, crtc_state->pbn);
+		if (slots == -EDEADLK)
+			return slots;
+		if (slots >= 0)
+			break;
+	}
+
+	if (slots < 0) {
+		DRM_DEBUG_KMS("failed finding vcpi slots:%d\n", slots);
+		return slots;
+	}
+
+	intel_link_compute_m_n(crtc_state->pipe_bpp,
+			       crtc_state->lane_count,
+			       adjusted_mode->crtc_clock,
+			       crtc_state->port_clock,
+			       &crtc_state->dp_m_n,
+			       constant_n);
+	crtc_state->dp_m_n.tu = slots;
+
+	return 0;
+}
+
 static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
 				       struct intel_crtc_state *pipe_config,
 				       struct drm_connector_state *conn_state)
 {
 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 	struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
-	struct intel_digital_port *intel_dig_port = intel_mst->primary;
-	struct intel_dp *intel_dp = &intel_dig_port->dp;
-	struct drm_connector *connector = conn_state->connector;
+	struct intel_dp *intel_dp = &intel_mst->primary->dp;
+	struct intel_connector *connector =
+		to_intel_connector(conn_state->connector);
 	struct intel_digital_connector_state *intel_conn_state =
 		to_intel_digital_connector_state(conn_state);
-	void *port = to_intel_connector(connector)->port;
-	struct drm_atomic_state *state = pipe_config->base.state;
-	struct drm_crtc *crtc = pipe_config->base.crtc;
-	struct drm_crtc_state *old_crtc_state =
-		drm_atomic_get_old_crtc_state(state, crtc);
-	int bpp;
-	int lane_count, slots =
-		to_intel_crtc_state(old_crtc_state)->dp_m_n.tu;
-	const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
-	int mst_pbn;
-	bool constant_n = drm_dp_has_quirk(&intel_dp->desc,
-					   DP_DPCD_QUIRK_CONSTANT_N);
+	const struct drm_display_mode *adjusted_mode =
+		&pipe_config->base.adjusted_mode;
+	void *port = connector->port;
+	struct link_config_limits limits;
+	int ret;
 
 	if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
 		return -EINVAL;
 
 	pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
 	pipe_config->has_pch_encoder = false;
-	bpp = 24;
-	if (intel_dp->compliance.test_data.bpc) {
-		bpp = intel_dp->compliance.test_data.bpc * 3;
-		DRM_DEBUG_KMS("Setting pipe bpp to %d\n",
-			      bpp);
-	}
 
 	if (intel_conn_state->force_audio == HDMI_AUDIO_AUTO)
 		pipe_config->has_audio =
@@ -76,36 +113,25 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
 	 * for MST we always configure max link bw - the spec doesn't
 	 * seem to suggest we should do otherwise.
 	 */
-	lane_count = intel_dp_max_lane_count(intel_dp);
+	limits.min_clock =
+	limits.max_clock = intel_dp_max_link_rate(intel_dp);
 
-	pipe_config->lane_count = lane_count;
+	limits.min_lane_count =
+	limits.max_lane_count = intel_dp_max_lane_count(intel_dp);
 
-	pipe_config->pipe_bpp = bpp;
+	limits.min_bpp = 6 * 3;
+	limits.max_bpp = pipe_config->pipe_bpp;
 
-	pipe_config->port_clock = intel_dp_max_link_rate(intel_dp);
+	intel_dp_adjust_compliance_config(intel_dp, pipe_config, &limits);
+
+	ret = intel_dp_mst_compute_link_config(encoder, pipe_config,
+					       conn_state, &limits);
+	if (ret)
+		return ret;
 
 	pipe_config->limited_color_range =
 		intel_dp_limited_color_range(pipe_config, conn_state);
 
-	mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock, bpp);
-	pipe_config->pbn = mst_pbn;
-
-	slots = drm_dp_atomic_find_vcpi_slots(state, &intel_dp->mst_mgr, port,
-					      mst_pbn);
-	if (slots < 0) {
-		DRM_DEBUG_KMS("failed finding vcpi slots:%d\n",
-			      slots);
-		return slots;
-	}
-
-	intel_link_compute_m_n(bpp, lane_count,
-			       adjusted_mode->crtc_clock,
-			       pipe_config->port_clock,
-			       &pipe_config->dp_m_n,
-			       constant_n);
-
-	pipe_config->dp_m_n.tu = slots;
-
 	if (IS_GEN9_LP(dev_priv))
 		pipe_config->lane_lat_optim_mask =
 			bxt_ddi_phy_calc_lane_lat_optim_mask(pipe_config->lane_count);
@@ -389,7 +415,6 @@ intel_dp_mst_mode_valid(struct drm_connector *connector,
 	struct intel_connector *intel_connector = to_intel_connector(connector);
 	struct intel_dp *intel_dp = intel_connector->mst_port;
 	int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
-	int bpp = 24; /* MST uses fixed bpp */
 	int max_rate, mode_rate, max_lanes, max_link_clock;
 
 	if (drm_connector_is_unregistered(connector))
@@ -402,7 +427,7 @@ intel_dp_mst_mode_valid(struct drm_connector *connector,
 	max_lanes = intel_dp_max_lane_count(intel_dp);
 
 	max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes);
-	mode_rate = intel_dp_link_required(mode->clock, bpp);
+	mode_rate = intel_dp_link_required(mode->clock, 18);
 
 	/* TODO - validate mode against available PBN for link */
 	if (mode->clock < 10000)
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index ae62f6a6be22..e79954c6271c 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1909,6 +1909,14 @@ void intel_csr_ucode_suspend(struct drm_i915_private *);
 void intel_csr_ucode_resume(struct drm_i915_private *);
 
 /* intel_dp.c */
+struct link_config_limits {
+	int min_clock, max_clock;
+	int min_lane_count, max_lane_count;
+	int min_bpp, max_bpp;
+};
+void intel_dp_adjust_compliance_config(struct intel_dp *intel_dp,
+				       struct intel_crtc_state *pipe_config,
+				       struct link_config_limits *limits);
 bool intel_dp_limited_color_range(const struct intel_crtc_state *crtc_state,
 				  const struct drm_connector_state *conn_state);
 bool intel_dp_port_enabled(struct drm_i915_private *dev_priv,
-- 
2.19.2

_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 17+ messages in thread

* [PATCH v2 4/6] drm/i915: Add max_bpc property for DP MST
  2019-03-26 14:25 [PATCH v2 1/6] drm/i915: Add broadcast RGB property for DP MST Ville Syrjala
  2019-03-26 14:25 ` [PATCH v2 2/6] drm/i915: Expose the force_audio property with " Ville Syrjala
  2019-03-26 14:25 ` [PATCH v2 3/6] drm/i915: Remove the 8bpc shackles from " Ville Syrjala
@ 2019-03-26 14:25 ` Ville Syrjala
  2019-03-26 14:25 ` [PATCH v2 5/6] drm/i915: Update TRANS_MSA_MISC for fastsets Ville Syrjala
                   ` (5 subsequent siblings)
  8 siblings, 0 replies; 17+ messages in thread
From: Ville Syrjala @ 2019-03-26 14:25 UTC (permalink / raw)
  To: intel-gfx

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Allow the user to limit the output bpc with DP MST.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/intel_dp_mst.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c b/drivers/gpu/drm/i915/intel_dp_mst.c
index 484846e94427..6d2af7cf48e6 100644
--- a/drivers/gpu/drm/i915/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/intel_dp_mst.c
@@ -530,6 +530,7 @@ static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topolo
 
 	intel_attach_force_audio_property(connector);
 	intel_attach_broadcast_rgb_property(connector);
+	drm_connector_attach_max_bpc_property(connector, 6, 12);
 
 	return connector;
 
-- 
2.19.2

_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 17+ messages in thread

* [PATCH v2 5/6] drm/i915: Update TRANS_MSA_MISC for fastsets
  2019-03-26 14:25 [PATCH v2 1/6] drm/i915: Add broadcast RGB property for DP MST Ville Syrjala
                   ` (2 preceding siblings ...)
  2019-03-26 14:25 ` [PATCH v2 4/6] drm/i915: Add max_bpc property for " Ville Syrjala
@ 2019-03-26 14:25 ` Ville Syrjala
  2019-03-26 14:25 ` [PATCH v2 6/6] drm/i915: Set DP min_bpp to 8*3 for non-RGB output formats Ville Syrjala
                   ` (4 subsequent siblings)
  8 siblings, 0 replies; 17+ messages in thread
From: Ville Syrjala @ 2019-03-26 14:25 UTC (permalink / raw)
  To: intel-gfx

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Update the DP MSA MISC bits for fastsets. This is needed
when we change between limited and full range RGB output.

On HSW+ changing limited_range does not currently result in a
full modeset since we have don't have the readout code for it
(for DP we could, and probably should, readout from TRANS_MSA_MISC
itself, for HDMI we would have to rely on the infoframe). So
the PIPE_CONF_CHECK() is only performed for pre-HSW platforms.
That means any change in the value will result in a fastset
instead. Fortunately there is no prohibition to changing
TRANS_MSA_MISC dynamically, so it looks like we can legally do
fastsets for this.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/intel_ddi.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 933df3a57a8a..d4b90f05f42f 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -3552,6 +3552,8 @@ static void intel_ddi_update_pipe_dp(struct intel_encoder *encoder,
 {
 	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
 
+	intel_ddi_set_pipe_settings(crtc_state);
+
 	intel_psr_update(intel_dp, crtc_state);
 	intel_edp_drrs_enable(intel_dp, crtc_state);
 
-- 
2.19.2

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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 17+ messages in thread

* [PATCH v2 6/6] drm/i915: Set DP min_bpp to 8*3 for non-RGB output formats
  2019-03-26 14:25 [PATCH v2 1/6] drm/i915: Add broadcast RGB property for DP MST Ville Syrjala
                   ` (3 preceding siblings ...)
  2019-03-26 14:25 ` [PATCH v2 5/6] drm/i915: Update TRANS_MSA_MISC for fastsets Ville Syrjala
@ 2019-03-26 14:25 ` Ville Syrjala
  2019-03-27 14:58   ` Ville Syrjälä
  2019-04-09 20:28   ` Dhinakaran Pandiyan
  2019-03-26 18:20 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [v2,1/6] drm/i915: Add broadcast RGB property for DP MST Patchwork
                   ` (3 subsequent siblings)
  8 siblings, 2 replies; 17+ messages in thread
From: Ville Syrjala @ 2019-03-26 14:25 UTC (permalink / raw)
  To: intel-gfx

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

6bpc is only legal for RGB and RAW pixel encodings. For the rest
the minimum is 8bpc. Set our lower limit accordingly.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_dp.c     | 10 +++++++++-
 drivers/gpu/drm/i915/intel_dp_mst.c |  2 +-
 drivers/gpu/drm/i915/intel_drv.h    |  1 +
 3 files changed, 11 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 2aee526ed632..149fdfbcb343 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -2002,6 +2002,14 @@ static int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
 	return 0;
 }
 
+int intel_dp_min_bpp(const struct intel_crtc_state *crtc_state)
+{
+	if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_RGB)
+		return 6 * 3;
+	else
+		return 8 * 3;
+}
+
 static int
 intel_dp_compute_link_config(struct intel_encoder *encoder,
 			     struct intel_crtc_state *pipe_config,
@@ -2025,7 +2033,7 @@ intel_dp_compute_link_config(struct intel_encoder *encoder,
 	limits.min_lane_count = 1;
 	limits.max_lane_count = intel_dp_max_lane_count(intel_dp);
 
-	limits.min_bpp = 6 * 3;
+	limits.min_bpp = intel_dp_min_bpp(pipe_config);
 	limits.max_bpp = intel_dp_compute_bpp(intel_dp, pipe_config);
 
 	if (intel_dp_is_edp(intel_dp) && intel_dp->edp_dpcd[0] < DP_EDP_14) {
diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c b/drivers/gpu/drm/i915/intel_dp_mst.c
index 6d2af7cf48e6..79c229184873 100644
--- a/drivers/gpu/drm/i915/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/intel_dp_mst.c
@@ -119,7 +119,7 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
 	limits.min_lane_count =
 	limits.max_lane_count = intel_dp_max_lane_count(intel_dp);
 
-	limits.min_bpp = 6 * 3;
+	limits.min_bpp = intel_dp_min_bpp(pipe_config);
 	limits.max_bpp = pipe_config->pipe_bpp;
 
 	intel_dp_adjust_compliance_config(intel_dp, pipe_config, &limits);
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index e79954c6271c..13f1b0367287 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1919,6 +1919,7 @@ void intel_dp_adjust_compliance_config(struct intel_dp *intel_dp,
 				       struct link_config_limits *limits);
 bool intel_dp_limited_color_range(const struct intel_crtc_state *crtc_state,
 				  const struct drm_connector_state *conn_state);
+int intel_dp_min_bpp(const struct intel_crtc_state *crtc_state);
 bool intel_dp_port_enabled(struct drm_i915_private *dev_priv,
 			   i915_reg_t dp_reg, enum port port,
 			   enum pipe *pipe);
-- 
2.19.2

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https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 17+ messages in thread

* ✗ Fi.CI.CHECKPATCH: warning for series starting with [v2,1/6] drm/i915: Add broadcast RGB property for DP MST
  2019-03-26 14:25 [PATCH v2 1/6] drm/i915: Add broadcast RGB property for DP MST Ville Syrjala
                   ` (4 preceding siblings ...)
  2019-03-26 14:25 ` [PATCH v2 6/6] drm/i915: Set DP min_bpp to 8*3 for non-RGB output formats Ville Syrjala
@ 2019-03-26 18:20 ` Patchwork
  2019-03-26 18:22 ` ✗ Fi.CI.SPARSE: " Patchwork
                   ` (2 subsequent siblings)
  8 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2019-03-26 18:20 UTC (permalink / raw)
  To: Ville Syrjala; +Cc: intel-gfx

== Series Details ==

Series: series starting with [v2,1/6] drm/i915: Add broadcast RGB property for DP MST
URL   : https://patchwork.freedesktop.org/series/58585/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
18c4bad008ca drm/i915: Add broadcast RGB property for DP MST
34e5685e988f drm/i915: Expose the force_audio property with DP MST
37b12d1eba04 drm/i915: Remove the 8bpc shackles from DP MST
-:231: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations
#231: FILE: drivers/gpu/drm/i915/intel_drv.h:1917:
+};
+void intel_dp_adjust_compliance_config(struct intel_dp *intel_dp,

total: 0 errors, 0 warnings, 1 checks, 196 lines checked
079d8c3dda72 drm/i915: Add max_bpc property for DP MST
7c30861f2132 drm/i915: Update TRANS_MSA_MISC for fastsets
e7d746c0f1ca drm/i915: Set DP min_bpp to 8*3 for non-RGB output formats

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 17+ messages in thread

* ✗ Fi.CI.SPARSE: warning for series starting with [v2,1/6] drm/i915: Add broadcast RGB property for DP MST
  2019-03-26 14:25 [PATCH v2 1/6] drm/i915: Add broadcast RGB property for DP MST Ville Syrjala
                   ` (5 preceding siblings ...)
  2019-03-26 18:20 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [v2,1/6] drm/i915: Add broadcast RGB property for DP MST Patchwork
@ 2019-03-26 18:22 ` Patchwork
  2019-03-26 18:58 ` ✓ Fi.CI.BAT: success " Patchwork
  2019-03-27  2:57 ` ✓ Fi.CI.IGT: " Patchwork
  8 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2019-03-26 18:22 UTC (permalink / raw)
  To: Ville Syrjala; +Cc: intel-gfx

== Series Details ==

Series: series starting with [v2,1/6] drm/i915: Add broadcast RGB property for DP MST
URL   : https://patchwork.freedesktop.org/series/58585/
State : warning

== Summary ==

$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915: Add broadcast RGB property for DP MST
+                                        ^~~~~~~~~~~~~~~~
-drivers/gpu/drm/i915/gvt/gtt.c:757:9:    expected void [noderef] <asn:4>**slot
-drivers/gpu/drm/i915/gvt/gtt.c:757:9:    expected void **slot
-drivers/gpu/drm/i915/gvt/gtt.c:757:9:    expected void **slot
-drivers/gpu/drm/i915/gvt/gtt.c:757:9:    expected void **slot
-drivers/gpu/drm/i915/gvt/gtt.c:757:9:    got void [noderef] <asn:4>**
-drivers/gpu/drm/i915/gvt/gtt.c:757:9:    got void [noderef] <asn:4>**
-drivers/gpu/drm/i915/gvt/gtt.c:757:9:    got void [noderef] <asn:4>**
-drivers/gpu/drm/i915/gvt/gtt.c:757:9:    got void **slot
-drivers/gpu/drm/i915/gvt/gtt.c:757:9: warning: incorrect type in argument 1 (different address spaces)
-drivers/gpu/drm/i915/gvt/gtt.c:757:9: warning: incorrect type in assignment (different address spaces)
-drivers/gpu/drm/i915/gvt/gtt.c:757:9: warning: incorrect type in assignment (different address spaces)
-drivers/gpu/drm/i915/gvt/gtt.c:757:9: warning: incorrect type in assignment (different address spaces)
-drivers/gpu/drm/i915/gvt/gtt.c:758:45:    expected void [noderef] <asn:4>**slot
-drivers/gpu/drm/i915/gvt/gtt.c:758:45:    got void **slot
-drivers/gpu/drm/i915/gvt/gtt.c:758:45: warning: incorrect type in argument 1 (different address spaces)
-drivers/gpu/drm/i915/gvt/mmio.c:282:23: warning: memcpy with byte count of 279040
-drivers/gpu/drm/i915/gvt/mmio.c:283:23: warning: memcpy with byte count of 279040
-drivers/gpu/drm/i915/gvt/vgpu.c:196:48: warning: expression using sizeof(void)
-drivers/gpu/drm/i915/gvt/vgpu.c:196:48: warning: expression using sizeof(void)
-drivers/gpu/drm/i915/gvt/vgpu.c:196:48: warning: expression using sizeof(void)
-drivers/gpu/drm/i915/gvt/vgpu.c:196:48: warning: expression using sizeof(void)
-drivers/gpu/drm/i915/gvt/vgpu.c:196:48: warning: expression using sizeof(void)
-drivers/gpu/drm/i915/gvt/vgpu.c:196:48: warning: expression using sizeof(void)
-drivers/gpu/drm/i915/gvt/vgpu.c:196:48: warning: expression using sizeof(void)
-drivers/gpu/drm/i915/gvt/vgpu.c:196:48: warning: expression using sizeof(void)
-drivers/gpu/drm/i915/gvt/vgpu.c:196:48: warning: expression using sizeof(void)
-drivers/gpu/drm/i915/gvt/vgpu.c:196:48: warning: expression using sizeof(void)
-drivers/gpu/drm/i915/gvt/vgpu.c:196:48: warning: expression using sizeof(void)
-drivers/gpu/drm/i915/gvt/vgpu.c:196:48: warning: expression using sizeof(void)
-drivers/gpu/drm/i915/gvt/vgpu.c:196:48: warning: expression using sizeof(void)
-drivers/gpu/drm/i915/gvt/vgpu.c:196:48: warning: expression using sizeof(void)
+cc1: all warnings being treated as errors
+drivers/gpu/drm/i915/intel_dp_mst.c:41:40: error: unused variable ‘intel_conn_state’ [-Werror=unused-variable]
+drivers/gpu/drm/i915/intel_dp_mst.c: In function ‘intel_dp_mst_compute_config’:
-./include/linux/overflow.h:251:13: error: incorrect type in conditional
-./include/linux/overflow.h:251:13: error: incorrect type in conditional
-./include/linux/overflow.h:251:13: error: undefined identifier '__builtin_mul_overflow'
-./include/linux/overflow.h:251:13: error: undefined identifier '__builtin_mul_overflow'
-./include/linux/overflow.h:251:13:    got void
-./include/linux/overflow.h:251:13:    got void
-./include/linux/overflow.h:251:13: warning: call with no type!
-./include/linux/overflow.h:251:13: warning: call with no type!
-./include/linux/slab.h:664:13: error: undefined identifier '__builtin_mul_overflow'
-./include/linux/slab.h:664:13: error: undefined identifier '__builtin_mul_overflow'
-./include/linux/slab.h:664:13: warning: call with no type!
-./include/linux/slab.h:664:13: warning: call with no type!
-./include/uapi/linux/perf_event.h:147:56: warning: cast truncates bits from constant value (8000000000000000 becomes 0)
-./include/uapi/linux/perf_event.h:147:56: warning: cast truncates bits from constant value (8000000000000000 becomes 0)
-./include/uapi/linux/perf_event.h:147:56: warning: cast truncates bits from constant value (8000000000000000 becomes 0)
-./include/uapi/linux/perf_event.h:147:56: warning: cast truncates bits from constant value (8000000000000000 becomes 0)
-./include/uapi/linux/perf_event.h:147:56: warning: cast truncates bits from constant value (8000000000000000 becomes 0)
-./include/uapi/linux/perf_event.h:147:56: warning: cast truncates bits from constant value (8000000000000000 becomes 0)
-./include/uapi/linux/perf_event.h:147:56: warning: cast truncates bits from constant value (8000000000000000 becomes 0)
-./include/uapi/linux/perf_event.h:147:56: warning: cast truncates bits from constant value (8000000000000000 becomes 0)
-./include/uapi/linux/perf_event.h:147:56: warning: cast truncates bits from constant value (8000000000000000 becomes 0)
-./include/uapi/linux/perf_event.h:147:56: warning: cast truncates bits from constant value (8000000000000000 becomes 0)
-./include/uapi/linux/perf_event.h:147:56: warning: cast truncates bits from constant value (8000000000000000 becomes 0)
-./include/uapi/linux/perf_event.h:147:56: warning: cast truncates bits from constant value (8000000000000000 becomes 0)
-./include/uapi/linux/perf_event.h:147:56: warning: cast truncates bits from constant value (8000000000000000 becomes 0)
-./include/uapi/linux/perf_event.h:147:56: warning: cast truncates bits from constant value (8000000000000000 becomes 0)
-./include/uapi/linux/perf_event.h:147:56: warning: cast truncates bits from constant value (8000000000000000 becomes 0)
-./include/uapi/linux/perf_event.h:147:56: warning: cast truncates bits from constant value (8000000000000000 becomes 0)
-./include/uapi/linux/perf_event.h:147:56: warning: cast truncates bits from constant value (8000000000000000 becomes 0)
-./include/uapi/linux/perf_event.h:147:56: warning: cast truncates bits from constant value (8000000000000000 becomes 0)
-./include/uapi/linux/perf_event.h:147:56: warning: cast truncates bits from constant value (8000000000000000 becomes 0)
-./include/uapi/linux/perf_event.h:147:56: warning: cast truncates bits from constant value (8000000000000000 becomes 0)
-./include/uapi/linux/perf_event.h:147:56: warning: cast truncates bits from constant value (8000000000000000 becomes 0)
+make[1]: *** [drivers/gpu/drm/] Error 2
+make[2]: *** [drivers/gpu/drm/i915] Error 2
+make[3]: *** [drivers/gpu/drm/i915/intel_dp_mst.o] Error 1
+make[3]: *** Waiting for unfinished jobs....
+make: *** [sub-make] Error 2
+  struct intel_digital_connector_state *intel_conn_state =

Commit: drm/i915: Expose the force_audio property with DP MST
-                                        ^~~~~~~~~~~~~~~~
-cc1: all warnings being treated as errors
-drivers/gpu/drm/i915/gvt/gtt.c:757:9:    expected void [noderef] <asn:4>**slot
-drivers/gpu/drm/i915/gvt/gtt.c:757:9:    expected void **slot
-drivers/gpu/drm/i915/gvt/gtt.c:757:9:    expected void **slot
-drivers/gpu/drm/i915/gvt/gtt.c:757:9:    expected void **slot
-drivers/gpu/drm/i915/gvt/gtt.c:757:9:    got void [noderef] <asn:4>**
-drivers/gpu/drm/i915/gvt/gtt.c:757:9:    got void [noderef] <asn:4>**
-drivers/gpu/drm/i915/gvt/gtt.c:757:9:    got void [noderef] <asn:4>**
-drivers/gpu/drm/i915/gvt/gtt.c:757:9:    got void **slot
-drivers/gpu/drm/i915/gvt/gtt.c:757:9: warning: incorrect type in argument 1 (different address spaces)
-drivers/gpu/drm/i915/gvt/gtt.c:757:9: warning: incorrect type in assignment (different address spaces)
-drivers/gpu/drm/i915/gvt/gtt.c:757:9: warning: incorrect type in assignment (different address spaces)
-drivers/gpu/drm/i915/gvt/gtt.c:757:9: warning: incorrect type in assignment (different address spaces)
-drivers/gpu/drm/i915/gvt/gtt.c:758:45:    expected void [noderef] <asn:4>**slot
-drivers/gpu/drm/i915/gvt/gtt.c:758:45:    got void **slot
-drivers/gpu/drm/i915/gvt/gtt.c:758:45: warning: incorrect type in argument 1 (different address spaces)
-drivers/gpu/drm/i915/gvt/mmio.c:282:23: warning: memcpy with byte count of 279040
-drivers/gpu/drm/i915/gvt/mmio.c:283:23: warning: memcpy with byte count of 279040
-drivers/gpu/drm/i915/gvt/vgpu.c:196:48: warning: expression using sizeof(void)
-drivers/gpu/drm/i915/gvt/vgpu.c:196:48: warning: expression using sizeof(void)
-drivers/gpu/drm/i915/gvt/vgpu.c:196:48: warning: expression using sizeof(void)
-drivers/gpu/drm/i915/gvt/vgpu.c:196:48: warning: expression using sizeof(void)
-drivers/gpu/drm/i915/gvt/vgpu.c:196:48: warning: expression using sizeof(void)
-drivers/gpu/drm/i915/gvt/vgpu.c:196:48: warning: expression using sizeof(void)
-drivers/gpu/drm/i915/gvt/vgpu.c:196:48: warning: expression using sizeof(void)
-drivers/gpu/drm/i915/gvt/vgpu.c:196:48: warning: expression using sizeof(void)
-drivers/gpu/drm/i915/gvt/vgpu.c:196:48: warning: expression using sizeof(void)
-drivers/gpu/drm/i915/gvt/vgpu.c:196:48: warning: expression using sizeof(void)
-drivers/gpu/drm/i915/gvt/vgpu.c:196:48: warning: expression using sizeof(void)
-drivers/gpu/drm/i915/gvt/vgpu.c:196:48: warning: expression using sizeof(void)
-drivers/gpu/drm/i915/gvt/vgpu.c:196:48: warning: expression using sizeof(void)
-drivers/gpu/drm/i915/gvt/vgpu.c:196:48: warning: expression using sizeof(void)
-drivers/gpu/drm/i915/intel_dp_mst.c:41:40: error: unused variable ‘intel_conn_state’ [-Werror=unused-variable]
-drivers/gpu/drm/i915/intel_dp_mst.c: In function ‘intel_dp_mst_compute_config’:
-./include/linux/overflow.h:251:13: error: incorrect type in conditional
-./include/linux/overflow.h:251:13: error: incorrect type in conditional
-./include/linux/overflow.h:251:13: error: undefined identifier '__builtin_mul_overflow'
-./include/linux/overflow.h:251:13: error: undefined identifier '__builtin_mul_overflow'
-./include/linux/overflow.h:251:13:    got void
-./include/linux/overflow.h:251:13:    got void
-./include/linux/overflow.h:251:13: warning: call with no type!
-./include/linux/overflow.h:251:13: warning: call with no type!
-./include/linux/slab.h:664:13: error: undefined identifier '__builtin_mul_overflow'
-./include/linux/slab.h:664:13: error: undefined identifier '__builtin_mul_overflow'
-./include/linux/slab.h:664:13: warning: call with no type!
-./include/linux/slab.h:664:13: warning: call with no type!
-./include/uapi/linux/perf_event.h:147:56: warning: cast truncates bits from constant value (8000000000000000 becomes 0)
-./include/uapi/linux/perf_event.h:147:56: warning: cast truncates bits from constant value (8000000000000000 becomes 0)
-./include/uapi/linux/perf_event.h:147:56: warning: cast truncates bits from constant value (8000000000000000 becomes 0)
-./include/uapi/linux/perf_event.h:147:56: warning: cast truncates bits from constant value (8000000000000000 becomes 0)
-./include/uapi/linux/perf_event.h:147:56: warning: cast truncates bits from constant value (8000000000000000 becomes 0)
-./include/uapi/linux/perf_event.h:147:56: warning: cast truncates bits from constant value (8000000000000000 becomes 0)
-./include/uapi/linux/perf_event.h:147:56: warning: cast truncates bits from constant value (8000000000000000 becomes 0)
-./include/uapi/linux/perf_event.h:147:56: warning: cast truncates bits from constant value (8000000000000000 becomes 0)
-./include/uapi/linux/perf_event.h:147:56: warning: cast truncates bits from constant value (8000000000000000 becomes 0)
-./include/uapi/linux/perf_event.h:147:56: warning: cast truncates bits from constant value (8000000000000000 becomes 0)
-./include/uapi/linux/perf_event.h:147:56: warning: cast truncates bits from constant value (8000000000000000 becomes 0)
-./include/uapi/linux/perf_event.h:147:56: warning: cast truncates bits from constant value (8000000000000000 becomes 0)
-./include/uapi/linux/perf_event.h:147:56: warning: cast truncates bits from constant value (8000000000000000 becomes 0)
-./include/uapi/linux/perf_event.h:147:56: warning: cast truncates bits from constant value (8000000000000000 becomes 0)
-./include/uapi/linux/perf_event.h:147:56: warning: cast truncates bits from constant value (8000000000000000 becomes 0)
-./include/uapi/linux/perf_event.h:147:56: warning: cast truncates bits from constant value (8000000000000000 becomes 0)
-./include/uapi/linux/perf_event.h:147:56: warning: cast truncates bits from constant value (8000000000000000 becomes 0)
-./include/uapi/linux/perf_event.h:147:56: warning: cast truncates bits from constant value (8000000000000000 becomes 0)
-./include/uapi/linux/perf_event.h:147:56: warning: cast truncates bits from constant value (8000000000000000 becomes 0)
-./include/uapi/linux/perf_event.h:147:56: warning: cast truncates bits from constant value (8000000000000000 becomes 0)
-./include/uapi/linux/perf_event.h:147:56: warning: cast truncates bits from constant value (8000000000000000 becomes 0)
-make[1]: *** [drivers/gpu/drm/] Error 2
-make[2]: *** [drivers/gpu/drm/i915] Error 2
-make[3]: *** [drivers/gpu/drm/i915/intel_dp_mst.o] Error 1
-make[3]: *** Waiting for unfinished jobs....
-make: *** [sub-make] Error 2
-  struct intel_digital_connector_state *intel_conn_state =

Commit: drm/i915: Remove the 8bpc shackles from DP MST
Okay!

Commit: drm/i915: Add max_bpc property for DP MST
Okay!

Commit: drm/i915: Update TRANS_MSA_MISC for fastsets
Okay!

Commit: drm/i915: Set DP min_bpp to 8*3 for non-RGB output formats
Okay!

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 17+ messages in thread

* ✓ Fi.CI.BAT: success for series starting with [v2,1/6] drm/i915: Add broadcast RGB property for DP MST
  2019-03-26 14:25 [PATCH v2 1/6] drm/i915: Add broadcast RGB property for DP MST Ville Syrjala
                   ` (6 preceding siblings ...)
  2019-03-26 18:22 ` ✗ Fi.CI.SPARSE: " Patchwork
@ 2019-03-26 18:58 ` Patchwork
  2019-03-27  2:57 ` ✓ Fi.CI.IGT: " Patchwork
  8 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2019-03-26 18:58 UTC (permalink / raw)
  To: Ville Syrjala; +Cc: intel-gfx

== Series Details ==

Series: series starting with [v2,1/6] drm/i915: Add broadcast RGB property for DP MST
URL   : https://patchwork.freedesktop.org/series/58585/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_5818 -> Patchwork_12601
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/58585/revisions/1/mbox/

Known issues
------------

  Here are the changes found in Patchwork_12601 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_suspend@basic-s4-devices:
    - fi-kbl-7500u:       PASS -> DMESG-WARN [fdo#105128] / [fdo#107139]

  * igt@i915_selftest@live_execlists:
    - fi-apl-guc:         PASS -> INCOMPLETE [fdo#103927] / [fdo#109720]

  * igt@i915_selftest@live_uncore:
    - fi-skl-gvtdvm:      PASS -> DMESG-FAIL [fdo#110210]

  * igt@kms_busy@basic-flip-b:
    - fi-gdg-551:         PASS -> FAIL [fdo#103182]

  * igt@kms_frontbuffer_tracking@basic:
    - fi-byt-clapper:     PASS -> FAIL [fdo#103167]

  * igt@runner@aborted:
    - fi-apl-guc:         NOTRUN -> FAIL [fdo#108622] / [fdo#109720]

  
#### Possible fixes ####

  * igt@i915_pm_rpm@basic-pci-d3-state:
    - fi-hsw-4770:        SKIP [fdo#109271] -> PASS +2

  * igt@kms_frontbuffer_tracking@basic:
    - fi-icl-u3:          FAIL [fdo#103167] -> PASS

  * igt@kms_pipe_crc_basic@read-crc-pipe-a-frame-sequence:
    - fi-byt-clapper:     FAIL [fdo#103191] / [fdo#107362] -> PASS

  
#### Warnings ####

  * igt@i915_selftest@live_contexts:
    - fi-icl-u3:          INCOMPLETE [fdo#108569] -> DMESG-FAIL [fdo#108569]

  
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103182]: https://bugs.freedesktop.org/show_bug.cgi?id=103182
  [fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
  [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
  [fdo#105128]: https://bugs.freedesktop.org/show_bug.cgi?id=105128
  [fdo#107139]: https://bugs.freedesktop.org/show_bug.cgi?id=107139
  [fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362
  [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
  [fdo#108622]: https://bugs.freedesktop.org/show_bug.cgi?id=108622
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109720]: https://bugs.freedesktop.org/show_bug.cgi?id=109720
  [fdo#110210]: https://bugs.freedesktop.org/show_bug.cgi?id=110210


Participating hosts (45 -> 39)
------------------------------

  Missing    (6): fi-kbl-soraka fi-hsw-4770r fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan 


Build changes
-------------

    * Linux: CI_DRM_5818 -> Patchwork_12601

  CI_DRM_5818: de0e80842f3d103996e99cfe27f999690c2ee06e @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4905: a350b9f9f606296b1599c3617c8530a8985709e2 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_12601: e7d746c0f1cade7dec453b2d0d5dc30dcc80fd1b @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

e7d746c0f1ca drm/i915: Set DP min_bpp to 8*3 for non-RGB output formats
7c30861f2132 drm/i915: Update TRANS_MSA_MISC for fastsets
079d8c3dda72 drm/i915: Add max_bpc property for DP MST
37b12d1eba04 drm/i915: Remove the 8bpc shackles from DP MST
34e5685e988f drm/i915: Expose the force_audio property with DP MST
18c4bad008ca drm/i915: Add broadcast RGB property for DP MST

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12601/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 17+ messages in thread

* ✓ Fi.CI.IGT: success for series starting with [v2,1/6] drm/i915: Add broadcast RGB property for DP MST
  2019-03-26 14:25 [PATCH v2 1/6] drm/i915: Add broadcast RGB property for DP MST Ville Syrjala
                   ` (7 preceding siblings ...)
  2019-03-26 18:58 ` ✓ Fi.CI.BAT: success " Patchwork
@ 2019-03-27  2:57 ` Patchwork
  8 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2019-03-27  2:57 UTC (permalink / raw)
  To: Ville Syrjala; +Cc: intel-gfx

== Series Details ==

Series: series starting with [v2,1/6] drm/i915: Add broadcast RGB property for DP MST
URL   : https://patchwork.freedesktop.org/series/58585/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_5818_full -> Patchwork_12601_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Known issues
------------

  Here are the changes found in Patchwork_12601_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_parallel@bsd2-fds:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109276] +10

  * igt@gem_mmap_gtt@hang:
    - shard-iclb:         PASS -> FAIL [fdo#109677]

  * igt@gem_mocs_settings@mocs-rc6-dirty-render:
    - shard-iclb:         NOTRUN -> SKIP [fdo#110206]

  * igt@gem_ppgtt@blt-vs-render-ctxn:
    - shard-iclb:         PASS -> INCOMPLETE [fdo#109801]

  * igt@gem_pread@pagefault-pread:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109277]

  * igt@i915_pm_rpm@fences-dpms:
    - shard-skl:          PASS -> INCOMPLETE [fdo#107807]

  * igt@i915_pm_rpm@gem-execbuf-stress-extra-wait:
    - shard-skl:          PASS -> INCOMPLETE [fdo#107803] / [fdo#107807]

  * igt@i915_pm_rpm@gem-execbuf-stress-pc8:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109506]

  * igt@i915_pm_rpm@modeset-lpsp-stress-no-wait:
    - shard-kbl:          NOTRUN -> SKIP [fdo#109271] +14

  * igt@i915_pm_rpm@modeset-non-lpsp-stress:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109308]

  * igt@i915_pm_rps@min-max-config-loaded:
    - shard-iclb:         NOTRUN -> FAIL [fdo#108059]

  * igt@kms_busy@extended-modeset-hang-newfb-render-a:
    - shard-skl:          NOTRUN -> DMESG-WARN [fdo#110222] +4

  * igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-f:
    - shard-kbl:          NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +2

  * igt@kms_busy@extended-pageflip-hang-newfb-render-c:
    - shard-snb:          NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +13

  * igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-a:
    - shard-iclb:         PASS -> DMESG-WARN [fdo#110222]

  * igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-d:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109278] +6

  * igt@kms_chamelium@vga-edid-read:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109284] +4

  * igt@kms_cursor_legacy@2x-cursor-vs-flip-legacy:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109274] +4

  * igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions-varying-size:
    - shard-iclb:         NOTRUN -> FAIL [fdo#103355]

  * igt@kms_cursor_legacy@cursora-vs-flipa-atomic-transitions:
    - shard-snb:          PASS -> SKIP [fdo#109271]

  * igt@kms_fbcon_fbt@fbc:
    - shard-iclb:         NOTRUN -> DMESG-WARN [fdo#109593]

  * igt@kms_fbcon_fbt@psr:
    - shard-iclb:         NOTRUN -> FAIL [fdo#103833]

  * igt@kms_fbcon_fbt@psr-suspend:
    - shard-skl:          NOTRUN -> FAIL [fdo#103833]

  * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-render:
    - shard-iclb:         NOTRUN -> FAIL [fdo#103167]

  * igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw:
    - shard-skl:          PASS -> FAIL [fdo#105682] +1

  * igt@kms_frontbuffer_tracking@fbc-1p-rte:
    - shard-iclb:         PASS -> FAIL [fdo#103167] / [fdo#105682]

  * igt@kms_frontbuffer_tracking@fbc-rgb565-draw-pwrite:
    - shard-iclb:         PASS -> FAIL [fdo#103167] +6

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-pwrite:
    - shard-iclb:         PASS -> FAIL [fdo#109247] +12

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-mmap-wc:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109280] +26

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-indfb-plflip-blt:
    - shard-snb:          NOTRUN -> SKIP [fdo#109271] +106

  * igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-pwrite:
    - shard-iclb:         PASS -> FAIL [fdo#105682] / [fdo#109247]

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-wc:
    - shard-iclb:         NOTRUN -> FAIL [fdo#109247] +1

  * igt@kms_panel_fitting@legacy:
    - shard-skl:          NOTRUN -> FAIL [fdo#105456]

  * igt@kms_pipe_b_c_ivb@from-pipe-c-to-b-with-3-lanes:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109289] +2

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-f:
    - shard-skl:          NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +18

  * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-max:
    - shard-skl:          NOTRUN -> FAIL [fdo#108145] +2

  * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
    - shard-skl:          PASS -> FAIL [fdo#108145]

  * igt@kms_plane_alpha_blend@pipe-c-alpha-7efc:
    - shard-kbl:          NOTRUN -> FAIL [fdo#108145] / [fdo#108590]

  * igt@kms_plane_scaling@pipe-c-scaler-with-clipping-clamping:
    - shard-iclb:         NOTRUN -> INCOMPLETE [fdo#110041]

  * igt@kms_plane_scaling@pipe-c-scaler-with-pixel-format:
    - shard-glk:          PASS -> SKIP [fdo#109271] / [fdo#109278]

  * igt@kms_psr@psr2_basic:
    - shard-iclb:         PASS -> SKIP [fdo#109441] +1

  * igt@kms_psr@sprite_mmap_gtt:
    - shard-iclb:         PASS -> FAIL [fdo#107383] / [fdo#110215] +1

  * igt@kms_setmode@basic:
    - shard-apl:          PASS -> FAIL [fdo#99912]
    - shard-snb:          NOTRUN -> FAIL [fdo#99912]

  * igt@kms_vblank@pipe-b-ts-continuation-suspend:
    - shard-iclb:         PASS -> FAIL [fdo#104894]

  * igt@perf_pmu@busy-accuracy-50-vcs1:
    - shard-skl:          NOTRUN -> SKIP [fdo#109271] +198

  * igt@prime_nv_api@nv_self_import_to_different_fd:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109291] +2

  * igt@runner@aborted:
    - shard-iclb:         NOTRUN -> FAIL [fdo#109593]

  
#### Possible fixes ####

  * igt@gem_ctx_isolation@vecs0-s3:
    - shard-skl:          INCOMPLETE [fdo#104108] / [fdo#107773] -> PASS

  * {igt@gem_exec_big@single}:
    - shard-apl:          INCOMPLETE [fdo#103927] -> PASS

  * igt@gem_tiled_swapping@non-threaded:
    - shard-iclb:         DMESG-WARN [fdo#108686] -> PASS

  * igt@i915_pm_rpm@modeset-lpsp:
    - shard-skl:          INCOMPLETE [fdo#107807] -> PASS +1

  * igt@i915_selftest@live_workarounds:
    - shard-iclb:         DMESG-FAIL [fdo#108954] -> PASS

  * igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-c:
    - shard-iclb:         DMESG-WARN [fdo#110222] -> PASS

  * igt@kms_cursor_crc@cursor-64x64-suspend:
    - shard-skl:          INCOMPLETE [fdo#104108] -> PASS

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-skl:          FAIL [fdo#105363] -> PASS

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-skl:          INCOMPLETE [fdo#109507] -> PASS

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-blt:
    - shard-iclb:         FAIL [fdo#109247] -> PASS +20

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-pwrite:
    - shard-iclb:         FAIL [fdo#103167] -> PASS +6

  * {igt@kms_plane@pixel-format-pipe-b-planes-source-clamping}:
    - shard-glk:          SKIP [fdo#109271] -> PASS +1

  * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-max:
    - shard-apl:          FAIL [fdo#108145] -> PASS

  * igt@kms_plane_scaling@pipe-a-scaler-with-pixel-format:
    - shard-glk:          SKIP [fdo#109271] / [fdo#109278] -> PASS

  * igt@kms_psr2_su@page_flip:
    - shard-iclb:         SKIP [fdo#109642] -> PASS

  * igt@kms_psr@psr2_no_drrs:
    - shard-iclb:         SKIP [fdo#109441] -> PASS +2

  * igt@kms_rotation_crc@multiplane-rotation:
    - shard-kbl:          INCOMPLETE [fdo#103665] -> PASS

  * igt@kms_rotation_crc@multiplane-rotation-cropping-bottom:
    - shard-kbl:          DMESG-FAIL [fdo#105763] -> PASS

  * igt@kms_rotation_crc@multiplane-rotation-cropping-top:
    - shard-kbl:          FAIL [fdo#109016] -> PASS

  * igt@kms_vblank@pipe-c-ts-continuation-suspend:
    - shard-iclb:         FAIL [fdo#104894] -> PASS

  
#### Warnings ####

  * igt@i915_pm_backlight@fade_with_suspend:
    - shard-iclb:         FAIL [fdo#107847] -> DMESG-FAIL [fdo#107847]

  * igt@i915_pm_rpm@gem-execbuf-stress-pc8:
    - shard-skl:          SKIP [fdo#109271] -> INCOMPLETE [fdo#107807]

  * igt@i915_pm_rpm@modeset-non-lpsp-stress-no-wait:
    - shard-skl:          INCOMPLETE [fdo#107807] -> SKIP [fdo#109271]

  * igt@i915_selftest@live_contexts:
    - shard-iclb:         INCOMPLETE [fdo#108569] -> DMESG-FAIL [fdo#108569]

  * igt@kms_setmode@basic:
    - shard-iclb:         FAIL [fdo#99912] -> INCOMPLETE [fdo#110246]

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103355]: https://bugs.freedesktop.org/show_bug.cgi?id=103355
  [fdo#103359]: https://bugs.freedesktop.org/show_bug.cgi?id=103359
  [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
  [fdo#103833]: https://bugs.freedesktop.org/show_bug.cgi?id=103833
  [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
  [fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
  [fdo#104894]: https://bugs.freedesktop.org/show_bug.cgi?id=104894
  [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
  [fdo#105456]: https://bugs.freedesktop.org/show_bug.cgi?id=105456
  [fdo#105682]: https://bugs.freedesktop.org/show_bug.cgi?id=105682
  [fdo#105763]: https://bugs.freedesktop.org/show_bug.cgi?id=105763
  [fdo#107383]: https://bugs.freedesktop.org/show_bug.cgi?id=107383
  [fdo#107773]: https://bugs.freedesktop.org/show_bug.cgi?id=107773
  [fdo#107803]: https://bugs.freedesktop.org/show_bug.cgi?id=107803
  [fdo#107807]: https://bugs.freedesktop.org/show_bug.cgi?id=107807
  [fdo#107847]: https://bugs.freedesktop.org/show_bug.cgi?id=107847
  [fdo#108059]: https://bugs.freedesktop.org/show_bug.cgi?id=108059
  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
  [fdo#108590]: https://bugs.freedesktop.org/show_bug.cgi?id=108590
  [fdo#108686]: https://bugs.freedesktop.org/show_bug.cgi?id=108686
  [fdo#108954]: https://bugs.freedesktop.org/show_bug.cgi?id=108954
  [fdo#109016]: https://bugs.freedesktop.org/show_bug.cgi?id=109016
  [fdo#109247]: https://bugs.freedesktop.org/show_bug.cgi?id=109247
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109277]: https://bugs.freedesktop.org/show_bug.cgi?id=109277
  [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
  [fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
  [fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
  [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
  [fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291
  [fdo#109308]: https://bugs.freedesktop.org/show_bug.cgi?id=109308
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506
  [fdo#109507]: https://bugs.freedesktop.org/show_bug.cgi?id=109507
  [fdo#109593]: https://bugs.freedesktop.org/show_bug.cgi?id=109593
  [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
  [fdo#109677]: https://bugs.freedesktop.org/show_bug.cgi?id=109677
  [fdo#109801]: https://bugs.freedesktop.org/show_bug.cgi?id=109801
  [fdo#110041]: https://bugs.freedesktop.org/show_bug.cgi?id=110041
  [fdo#110206]: https://bugs.freedesktop.org/show_bug.cgi?id=110206
  [fdo#110215]: https://bugs.freedesktop.org/show_bug.cgi?id=110215
  [fdo#110222]: https://bugs.freedesktop.org/show_bug.cgi?id=110222
  [fdo#110246]: https://bugs.freedesktop.org/show_bug.cgi?id=110246
  [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
  [k.org#198133]: https://bugzilla.kernel.org/show_bug.cgi?id=198133


Participating hosts (10 -> 9)
------------------------------

  Missing    (1): shard-hsw 


Build changes
-------------

    * Linux: CI_DRM_5818 -> Patchwork_12601

  CI_DRM_5818: de0e80842f3d103996e99cfe27f999690c2ee06e @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4905: a350b9f9f606296b1599c3617c8530a8985709e2 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_12601: e7d746c0f1cade7dec453b2d0d5dc30dcc80fd1b @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12601/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 17+ messages in thread

* Re: [PATCH v2 6/6] drm/i915: Set DP min_bpp to 8*3 for non-RGB output formats
  2019-03-26 14:25 ` [PATCH v2 6/6] drm/i915: Set DP min_bpp to 8*3 for non-RGB output formats Ville Syrjala
@ 2019-03-27 14:58   ` Ville Syrjälä
  2019-04-09 20:28   ` Dhinakaran Pandiyan
  1 sibling, 0 replies; 17+ messages in thread
From: Ville Syrjälä @ 2019-03-27 14:58 UTC (permalink / raw)
  To: intel-gfx

On Tue, Mar 26, 2019 at 04:25:56PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> 6bpc is only legal for RGB and RAW pixel encodings. For the rest
> the minimum is 8bpc. Set our lower limit accordingly.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Pushed everything except this one. Thanks for the review.

I actually meant to send this as a followup but it was on the same
branch and so got included in the repost accidentally.

> ---
>  drivers/gpu/drm/i915/intel_dp.c     | 10 +++++++++-
>  drivers/gpu/drm/i915/intel_dp_mst.c |  2 +-
>  drivers/gpu/drm/i915/intel_drv.h    |  1 +
>  3 files changed, 11 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 2aee526ed632..149fdfbcb343 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -2002,6 +2002,14 @@ static int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
>  	return 0;
>  }
>  
> +int intel_dp_min_bpp(const struct intel_crtc_state *crtc_state)
> +{
> +	if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_RGB)
> +		return 6 * 3;
> +	else
> +		return 8 * 3;
> +}
> +
>  static int
>  intel_dp_compute_link_config(struct intel_encoder *encoder,
>  			     struct intel_crtc_state *pipe_config,
> @@ -2025,7 +2033,7 @@ intel_dp_compute_link_config(struct intel_encoder *encoder,
>  	limits.min_lane_count = 1;
>  	limits.max_lane_count = intel_dp_max_lane_count(intel_dp);
>  
> -	limits.min_bpp = 6 * 3;
> +	limits.min_bpp = intel_dp_min_bpp(pipe_config);
>  	limits.max_bpp = intel_dp_compute_bpp(intel_dp, pipe_config);
>  
>  	if (intel_dp_is_edp(intel_dp) && intel_dp->edp_dpcd[0] < DP_EDP_14) {
> diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c b/drivers/gpu/drm/i915/intel_dp_mst.c
> index 6d2af7cf48e6..79c229184873 100644
> --- a/drivers/gpu/drm/i915/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/intel_dp_mst.c
> @@ -119,7 +119,7 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
>  	limits.min_lane_count =
>  	limits.max_lane_count = intel_dp_max_lane_count(intel_dp);
>  
> -	limits.min_bpp = 6 * 3;
> +	limits.min_bpp = intel_dp_min_bpp(pipe_config);
>  	limits.max_bpp = pipe_config->pipe_bpp;
>  
>  	intel_dp_adjust_compliance_config(intel_dp, pipe_config, &limits);
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index e79954c6271c..13f1b0367287 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -1919,6 +1919,7 @@ void intel_dp_adjust_compliance_config(struct intel_dp *intel_dp,
>  				       struct link_config_limits *limits);
>  bool intel_dp_limited_color_range(const struct intel_crtc_state *crtc_state,
>  				  const struct drm_connector_state *conn_state);
> +int intel_dp_min_bpp(const struct intel_crtc_state *crtc_state);
>  bool intel_dp_port_enabled(struct drm_i915_private *dev_priv,
>  			   i915_reg_t dp_reg, enum port port,
>  			   enum pipe *pipe);
> -- 
> 2.19.2

-- 
Ville Syrjälä
Intel
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 17+ messages in thread

* Re: [PATCH v2 6/6] drm/i915: Set DP min_bpp to 8*3 for non-RGB output formats
  2019-03-26 14:25 ` [PATCH v2 6/6] drm/i915: Set DP min_bpp to 8*3 for non-RGB output formats Ville Syrjala
  2019-03-27 14:58   ` Ville Syrjälä
@ 2019-04-09 20:28   ` Dhinakaran Pandiyan
  2019-04-09 20:38     ` Ville Syrjälä
  1 sibling, 1 reply; 17+ messages in thread
From: Dhinakaran Pandiyan @ 2019-04-09 20:28 UTC (permalink / raw)
  To: Ville Syrjala, intel-gfx

On Tue, 2019-03-26 at 16:25 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> 6bpc is only legal for RGB and RAW pixel encodings. For the rest
> the minimum is 8bpc. Set our lower limit accordingly.

Patch doesn't apply anymore, got a conflict in intel_drv.h. 


> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_dp.c     | 10 +++++++++-
>  drivers/gpu/drm/i915/intel_dp_mst.c |  2 +-
>  drivers/gpu/drm/i915/intel_drv.h    |  1 +
>  3 files changed, 11 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 2aee526ed632..149fdfbcb343 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -2002,6 +2002,14 @@ static int intel_dp_dsc_compute_config(struct intel_dp
> *intel_dp,
>  	return 0;
>  }
>  
> +int intel_dp_min_bpp(const struct intel_crtc_state *crtc_state)
> +{
> +	if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_RGB)
> +		return 6 * 3;
> +	else
> +		return 8 * 3;
Code matches spec, however I think there is a possibility of min_bpp becoming
greater than max_bpp. The max_bpc property allows user space to set a value of 6
and limits.min_bpp can become 24 because of the code above. Add a check for that
in compute_link_config()? Probably would mess up the compute_config() loop too.


> +}
> +
>  static int
>  intel_dp_compute_link_config(struct intel_encoder *encoder,
>  			     struct intel_crtc_state *pipe_config,
> @@ -2025,7 +2033,7 @@ intel_dp_compute_link_config(struct intel_encoder
> *encoder,
>  	limits.min_lane_count = 1;
>  	limits.max_lane_count = intel_dp_max_lane_count(intel_dp);
>  
> -	limits.min_bpp = 6 * 3;
> +	limits.min_bpp = intel_dp_min_bpp(pipe_config);
>  	limits.max_bpp = intel_dp_compute_bpp(intel_dp, pipe_config);
>  
>  	if (intel_dp_is_edp(intel_dp) && intel_dp->edp_dpcd[0] < DP_EDP_14) {
> diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c
> b/drivers/gpu/drm/i915/intel_dp_mst.c
> index 6d2af7cf48e6..79c229184873 100644
> --- a/drivers/gpu/drm/i915/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/intel_dp_mst.c
> @@ -119,7 +119,7 @@ static int intel_dp_mst_compute_config(struct
> intel_encoder *encoder,
>  	limits.min_lane_count =
>  	limits.max_lane_count = intel_dp_max_lane_count(intel_dp);
>  
> -	limits.min_bpp = 6 * 3;
> +	limits.min_bpp = intel_dp_min_bpp(pipe_config);
>  	limits.max_bpp = pipe_config->pipe_bpp;
>  
>  	intel_dp_adjust_compliance_config(intel_dp, pipe_config, &limits);
> diff --git a/drivers/gpu/drm/i915/intel_drv.h
> b/drivers/gpu/drm/i915/intel_drv.h
> index e79954c6271c..13f1b0367287 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -1919,6 +1919,7 @@ void intel_dp_adjust_compliance_config(struct intel_dp
> *intel_dp,
>  				       struct link_config_limits *limits);
>  bool intel_dp_limited_color_range(const struct intel_crtc_state *crtc_state,
>  				  const struct drm_connector_state *conn_state);
> +int intel_dp_min_bpp(const struct intel_crtc_state *crtc_state);
>  bool intel_dp_port_enabled(struct drm_i915_private *dev_priv,
>  			   i915_reg_t dp_reg, enum port port,
>  			   enum pipe *pipe);

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Intel-gfx@lists.freedesktop.org
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^ permalink raw reply	[flat|nested] 17+ messages in thread

* Re: [PATCH v2 6/6] drm/i915: Set DP min_bpp to 8*3 for non-RGB output formats
  2019-04-09 20:28   ` Dhinakaran Pandiyan
@ 2019-04-09 20:38     ` Ville Syrjälä
  2019-04-09 21:04       ` Dhinakaran Pandiyan
  0 siblings, 1 reply; 17+ messages in thread
From: Ville Syrjälä @ 2019-04-09 20:38 UTC (permalink / raw)
  To: Dhinakaran Pandiyan; +Cc: intel-gfx

On Tue, Apr 09, 2019 at 01:28:18PM -0700, Dhinakaran Pandiyan wrote:
> On Tue, 2019-03-26 at 16:25 +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > 
> > 6bpc is only legal for RGB and RAW pixel encodings. For the rest
> > the minimum is 8bpc. Set our lower limit accordingly.
> 
> Patch doesn't apply anymore, got a conflict in intel_drv.h. 
> 
> 
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_dp.c     | 10 +++++++++-
> >  drivers/gpu/drm/i915/intel_dp_mst.c |  2 +-
> >  drivers/gpu/drm/i915/intel_drv.h    |  1 +
> >  3 files changed, 11 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> > index 2aee526ed632..149fdfbcb343 100644
> > --- a/drivers/gpu/drm/i915/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/intel_dp.c
> > @@ -2002,6 +2002,14 @@ static int intel_dp_dsc_compute_config(struct intel_dp
> > *intel_dp,
> >  	return 0;
> >  }
> >  
> > +int intel_dp_min_bpp(const struct intel_crtc_state *crtc_state)
> > +{
> > +	if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_RGB)
> > +		return 6 * 3;
> > +	else
> > +		return 8 * 3;
> Code matches spec, however I think there is a possibility of min_bpp becoming
> greater than max_bpp. The max_bpc property allows user space to set a value of 6
> and limits.min_bpp can become 24 because of the code above. Add a check for that
> in compute_link_config()? Probably would mess up the compute_config() loop too.

The code looks correct. Ie. should just end up with -EINVAL.

> 
> 
> > +}
> > +
> >  static int
> >  intel_dp_compute_link_config(struct intel_encoder *encoder,
> >  			     struct intel_crtc_state *pipe_config,
> > @@ -2025,7 +2033,7 @@ intel_dp_compute_link_config(struct intel_encoder
> > *encoder,
> >  	limits.min_lane_count = 1;
> >  	limits.max_lane_count = intel_dp_max_lane_count(intel_dp);
> >  
> > -	limits.min_bpp = 6 * 3;
> > +	limits.min_bpp = intel_dp_min_bpp(pipe_config);
> >  	limits.max_bpp = intel_dp_compute_bpp(intel_dp, pipe_config);
> >  
> >  	if (intel_dp_is_edp(intel_dp) && intel_dp->edp_dpcd[0] < DP_EDP_14) {
> > diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c
> > b/drivers/gpu/drm/i915/intel_dp_mst.c
> > index 6d2af7cf48e6..79c229184873 100644
> > --- a/drivers/gpu/drm/i915/intel_dp_mst.c
> > +++ b/drivers/gpu/drm/i915/intel_dp_mst.c
> > @@ -119,7 +119,7 @@ static int intel_dp_mst_compute_config(struct
> > intel_encoder *encoder,
> >  	limits.min_lane_count =
> >  	limits.max_lane_count = intel_dp_max_lane_count(intel_dp);
> >  
> > -	limits.min_bpp = 6 * 3;
> > +	limits.min_bpp = intel_dp_min_bpp(pipe_config);
> >  	limits.max_bpp = pipe_config->pipe_bpp;
> >  
> >  	intel_dp_adjust_compliance_config(intel_dp, pipe_config, &limits);
> > diff --git a/drivers/gpu/drm/i915/intel_drv.h
> > b/drivers/gpu/drm/i915/intel_drv.h
> > index e79954c6271c..13f1b0367287 100644
> > --- a/drivers/gpu/drm/i915/intel_drv.h
> > +++ b/drivers/gpu/drm/i915/intel_drv.h
> > @@ -1919,6 +1919,7 @@ void intel_dp_adjust_compliance_config(struct intel_dp
> > *intel_dp,
> >  				       struct link_config_limits *limits);
> >  bool intel_dp_limited_color_range(const struct intel_crtc_state *crtc_state,
> >  				  const struct drm_connector_state *conn_state);
> > +int intel_dp_min_bpp(const struct intel_crtc_state *crtc_state);
> >  bool intel_dp_port_enabled(struct drm_i915_private *dev_priv,
> >  			   i915_reg_t dp_reg, enum port port,
> >  			   enum pipe *pipe);

-- 
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 17+ messages in thread

* Re: [PATCH v2 6/6] drm/i915: Set DP min_bpp to 8*3 for non-RGB output formats
  2019-04-09 20:38     ` Ville Syrjälä
@ 2019-04-09 21:04       ` Dhinakaran Pandiyan
  2019-04-11 18:27         ` Ville Syrjälä
  0 siblings, 1 reply; 17+ messages in thread
From: Dhinakaran Pandiyan @ 2019-04-09 21:04 UTC (permalink / raw)
  To: Ville Syrjälä; +Cc: intel-gfx

On Tue, 2019-04-09 at 23:38 +0300, Ville Syrjälä wrote:
> On Tue, Apr 09, 2019 at 01:28:18PM -0700, Dhinakaran Pandiyan wrote:
> > On Tue, 2019-03-26 at 16:25 +0200, Ville Syrjala wrote:
> > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > 
> > > 6bpc is only legal for RGB and RAW pixel encodings. For the rest
> > > the minimum is 8bpc. Set our lower limit accordingly.
> > 
> > Patch doesn't apply anymore, got a conflict in intel_drv.h. 
> > 
> > 
> > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/intel_dp.c     | 10 +++++++++-
> > >  drivers/gpu/drm/i915/intel_dp_mst.c |  2 +-
> > >  drivers/gpu/drm/i915/intel_drv.h    |  1 +
> > >  3 files changed, 11 insertions(+), 2 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/intel_dp.c
> > > b/drivers/gpu/drm/i915/intel_dp.c
> > > index 2aee526ed632..149fdfbcb343 100644
> > > --- a/drivers/gpu/drm/i915/intel_dp.c
> > > +++ b/drivers/gpu/drm/i915/intel_dp.c
> > > @@ -2002,6 +2002,14 @@ static int intel_dp_dsc_compute_config(struct
> > > intel_dp
> > > *intel_dp,
> > >  	return 0;
> > >  }
> > >  
> > > +int intel_dp_min_bpp(const struct intel_crtc_state *crtc_state)
> > > +{
> > > +	if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_RGB)
> > > +		return 6 * 3;
> > > +	else
> > > +		return 8 * 3;
> > 
> > Code matches spec, however I think there is a possibility of min_bpp
> > becoming
> > greater than max_bpp. The max_bpc property allows user space to set a value
> > of 6
> > and limits.min_bpp can become 24 because of the code above. Add a check for
> > that
> > in compute_link_config()? Probably would mess up the compute_config() loop
> > too.
> 
> The code looks correct. Ie. should just end up with -EINVAL.
Yup, it does now as I read it carefully again :)
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>

However, I don't like the fact we are hiding the detail that min_bpp can be >
max_bpp. If someone decides add a link config optimization starting from
min_bpp, it's easy to miss this detail. 

-DK

> 
> > 
> > 
> > > +}
> > > +
> > >  static int
> > >  intel_dp_compute_link_config(struct intel_encoder *encoder,
> > >  			     struct intel_crtc_state *pipe_config,
> > > @@ -2025,7 +2033,7 @@ intel_dp_compute_link_config(struct intel_encoder
> > > *encoder,
> > >  	limits.min_lane_count = 1;
> > >  	limits.max_lane_count = intel_dp_max_lane_count(intel_dp);
> > >  
> > > -	limits.min_bpp = 6 * 3;
> > > +	limits.min_bpp = intel_dp_min_bpp(pipe_config);
> > >  	limits.max_bpp = intel_dp_compute_bpp(intel_dp, pipe_config);
> > >  
> > >  	if (intel_dp_is_edp(intel_dp) && intel_dp->edp_dpcd[0] < DP_EDP_14) {
> > > diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c
> > > b/drivers/gpu/drm/i915/intel_dp_mst.c
> > > index 6d2af7cf48e6..79c229184873 100644
> > > --- a/drivers/gpu/drm/i915/intel_dp_mst.c
> > > +++ b/drivers/gpu/drm/i915/intel_dp_mst.c
> > > @@ -119,7 +119,7 @@ static int intel_dp_mst_compute_config(struct
> > > intel_encoder *encoder,
> > >  	limits.min_lane_count =
> > >  	limits.max_lane_count = intel_dp_max_lane_count(intel_dp);
> > >  
> > > -	limits.min_bpp = 6 * 3;
> > > +	limits.min_bpp = intel_dp_min_bpp(pipe_config);
> > >  	limits.max_bpp = pipe_config->pipe_bpp;
> > >  
> > >  	intel_dp_adjust_compliance_config(intel_dp, pipe_config, &limits);
> > > diff --git a/drivers/gpu/drm/i915/intel_drv.h
> > > b/drivers/gpu/drm/i915/intel_drv.h
> > > index e79954c6271c..13f1b0367287 100644
> > > --- a/drivers/gpu/drm/i915/intel_drv.h
> > > +++ b/drivers/gpu/drm/i915/intel_drv.h
> > > @@ -1919,6 +1919,7 @@ void intel_dp_adjust_compliance_config(struct
> > > intel_dp
> > > *intel_dp,
> > >  				       struct link_config_limits *limits);
> > >  bool intel_dp_limited_color_range(const struct intel_crtc_state
> > > *crtc_state,
> > >  				  const struct drm_connector_state *conn_state);
> > > +int intel_dp_min_bpp(const struct intel_crtc_state *crtc_state);
> > >  bool intel_dp_port_enabled(struct drm_i915_private *dev_priv,
> > >  			   i915_reg_t dp_reg, enum port port,
> > >  			   enum pipe *pipe);
> 
> 

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^ permalink raw reply	[flat|nested] 17+ messages in thread

* Re: [PATCH v2 6/6] drm/i915: Set DP min_bpp to 8*3 for non-RGB output formats
  2019-04-09 21:04       ` Dhinakaran Pandiyan
@ 2019-04-11 18:27         ` Ville Syrjälä
  2019-04-11 20:33           ` Sripada, Radhakrishna
  0 siblings, 1 reply; 17+ messages in thread
From: Ville Syrjälä @ 2019-04-11 18:27 UTC (permalink / raw)
  To: Dhinakaran Pandiyan; +Cc: intel-gfx

On Tue, Apr 09, 2019 at 02:04:01PM -0700, Dhinakaran Pandiyan wrote:
> On Tue, 2019-04-09 at 23:38 +0300, Ville Syrjälä wrote:
> > On Tue, Apr 09, 2019 at 01:28:18PM -0700, Dhinakaran Pandiyan wrote:
> > > On Tue, 2019-03-26 at 16:25 +0200, Ville Syrjala wrote:
> > > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > > 
> > > > 6bpc is only legal for RGB and RAW pixel encodings. For the rest
> > > > the minimum is 8bpc. Set our lower limit accordingly.
> > > 
> > > Patch doesn't apply anymore, got a conflict in intel_drv.h. 
> > > 
> > > 
> > > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > > ---
> > > >  drivers/gpu/drm/i915/intel_dp.c     | 10 +++++++++-
> > > >  drivers/gpu/drm/i915/intel_dp_mst.c |  2 +-
> > > >  drivers/gpu/drm/i915/intel_drv.h    |  1 +
> > > >  3 files changed, 11 insertions(+), 2 deletions(-)
> > > > 
> > > > diff --git a/drivers/gpu/drm/i915/intel_dp.c
> > > > b/drivers/gpu/drm/i915/intel_dp.c
> > > > index 2aee526ed632..149fdfbcb343 100644
> > > > --- a/drivers/gpu/drm/i915/intel_dp.c
> > > > +++ b/drivers/gpu/drm/i915/intel_dp.c
> > > > @@ -2002,6 +2002,14 @@ static int intel_dp_dsc_compute_config(struct
> > > > intel_dp
> > > > *intel_dp,
> > > >  	return 0;
> > > >  }
> > > >  
> > > > +int intel_dp_min_bpp(const struct intel_crtc_state *crtc_state)
> > > > +{
> > > > +	if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_RGB)
> > > > +		return 6 * 3;
> > > > +	else
> > > > +		return 8 * 3;
> > > 
> > > Code matches spec, however I think there is a possibility of min_bpp
> > > becoming
> > > greater than max_bpp. The max_bpc property allows user space to set a value
> > > of 6
> > > and limits.min_bpp can become 24 because of the code above. Add a check for
> > > that
> > > in compute_link_config()? Probably would mess up the compute_config() loop
> > > too.
> > 
> > The code looks correct. Ie. should just end up with -EINVAL.
> Yup, it does now as I read it carefully again :)
> Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>

Ta. Pushed.

> 
> However, I don't like the fact we are hiding the detail that min_bpp can be >
> max_bpp. If someone decides add a link config optimization starting from
> min_bpp, it's easy to miss this detail. 

I guess I wouldn't object to an explicit check for this. As a bonus
we could add a more descriptive debug message for this case.

> 
> -DK
> 
> > 
> > > 
> > > 
> > > > +}
> > > > +
> > > >  static int
> > > >  intel_dp_compute_link_config(struct intel_encoder *encoder,
> > > >  			     struct intel_crtc_state *pipe_config,
> > > > @@ -2025,7 +2033,7 @@ intel_dp_compute_link_config(struct intel_encoder
> > > > *encoder,
> > > >  	limits.min_lane_count = 1;
> > > >  	limits.max_lane_count = intel_dp_max_lane_count(intel_dp);
> > > >  
> > > > -	limits.min_bpp = 6 * 3;
> > > > +	limits.min_bpp = intel_dp_min_bpp(pipe_config);
> > > >  	limits.max_bpp = intel_dp_compute_bpp(intel_dp, pipe_config);
> > > >  
> > > >  	if (intel_dp_is_edp(intel_dp) && intel_dp->edp_dpcd[0] < DP_EDP_14) {
> > > > diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c
> > > > b/drivers/gpu/drm/i915/intel_dp_mst.c
> > > > index 6d2af7cf48e6..79c229184873 100644
> > > > --- a/drivers/gpu/drm/i915/intel_dp_mst.c
> > > > +++ b/drivers/gpu/drm/i915/intel_dp_mst.c
> > > > @@ -119,7 +119,7 @@ static int intel_dp_mst_compute_config(struct
> > > > intel_encoder *encoder,
> > > >  	limits.min_lane_count =
> > > >  	limits.max_lane_count = intel_dp_max_lane_count(intel_dp);
> > > >  
> > > > -	limits.min_bpp = 6 * 3;
> > > > +	limits.min_bpp = intel_dp_min_bpp(pipe_config);
> > > >  	limits.max_bpp = pipe_config->pipe_bpp;
> > > >  
> > > >  	intel_dp_adjust_compliance_config(intel_dp, pipe_config, &limits);
> > > > diff --git a/drivers/gpu/drm/i915/intel_drv.h
> > > > b/drivers/gpu/drm/i915/intel_drv.h
> > > > index e79954c6271c..13f1b0367287 100644
> > > > --- a/drivers/gpu/drm/i915/intel_drv.h
> > > > +++ b/drivers/gpu/drm/i915/intel_drv.h
> > > > @@ -1919,6 +1919,7 @@ void intel_dp_adjust_compliance_config(struct
> > > > intel_dp
> > > > *intel_dp,
> > > >  				       struct link_config_limits *limits);
> > > >  bool intel_dp_limited_color_range(const struct intel_crtc_state
> > > > *crtc_state,
> > > >  				  const struct drm_connector_state *conn_state);
> > > > +int intel_dp_min_bpp(const struct intel_crtc_state *crtc_state);
> > > >  bool intel_dp_port_enabled(struct drm_i915_private *dev_priv,
> > > >  			   i915_reg_t dp_reg, enum port port,
> > > >  			   enum pipe *pipe);
> > 
> > 

-- 
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 17+ messages in thread

* Re: [PATCH v2 6/6] drm/i915: Set DP min_bpp to 8*3 for non-RGB output formats
  2019-04-11 18:27         ` Ville Syrjälä
@ 2019-04-11 20:33           ` Sripada, Radhakrishna
  2019-04-30 17:07             ` Ville Syrjälä
  0 siblings, 1 reply; 17+ messages in thread
From: Sripada, Radhakrishna @ 2019-04-11 20:33 UTC (permalink / raw)
  To: ville.syrjala, Pandiyan, Dhinakaran; +Cc: intel-gfx

On Thu, 2019-04-11 at 21:27 +0300, Ville Syrjälä wrote:
> On Tue, Apr 09, 2019 at 02:04:01PM -0700, Dhinakaran Pandiyan wrote:
> > On Tue, 2019-04-09 at 23:38 +0300, Ville Syrjälä wrote:
> > > On Tue, Apr 09, 2019 at 01:28:18PM -0700, Dhinakaran Pandiyan
> > > wrote:
> > > > On Tue, 2019-03-26 at 16:25 +0200, Ville Syrjala wrote:
> > > > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > > > 
> > > > > 6bpc is only legal for RGB and RAW pixel encodings. For the
> > > > > rest
> > > > > the minimum is 8bpc. Set our lower limit accordingly.
> > > > 
> > > > Patch doesn't apply anymore, got a conflict in intel_drv.h. 
> > > > 
> > > > 
> > > > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > > > ---
> > > > >  drivers/gpu/drm/i915/intel_dp.c     | 10 +++++++++-
> > > > >  drivers/gpu/drm/i915/intel_dp_mst.c |  2 +-
> > > > >  drivers/gpu/drm/i915/intel_drv.h    |  1 +
> > > > >  3 files changed, 11 insertions(+), 2 deletions(-)
> > > > > 
> > > > > diff --git a/drivers/gpu/drm/i915/intel_dp.c
> > > > > b/drivers/gpu/drm/i915/intel_dp.c
> > > > > index 2aee526ed632..149fdfbcb343 100644
> > > > > --- a/drivers/gpu/drm/i915/intel_dp.c
> > > > > +++ b/drivers/gpu/drm/i915/intel_dp.c
> > > > > @@ -2002,6 +2002,14 @@ static int
> > > > > intel_dp_dsc_compute_config(struct
> > > > > intel_dp
> > > > > *intel_dp,
> > > > >  	return 0;
> > > > >  }
> > > > >  
> > > > > +int intel_dp_min_bpp(const struct intel_crtc_state
> > > > > *crtc_state)
> > > > > +{
> > > > > +	if (crtc_state->output_format ==
> > > > > INTEL_OUTPUT_FORMAT_RGB)
> > > > > +		return 6 * 3;
> > > > > +	else
> > > > > +		return 8 * 3;
> > > > 
> > > > Code matches spec, however I think there is a possibility of
> > > > min_bpp
> > > > becoming
> > > > greater than max_bpp. The max_bpc property allows user space to
> > > > set a value
> > > > of 6
> > > > and limits.min_bpp can become 24 because of the code above. Add
> > > > a check for
> > > > that
> > > > in compute_link_config()? Probably would mess up the
> > > > compute_config() loop
> > > > too.
> > > 
> > > The code looks correct. Ie. should just end up with -EINVAL.
> > 
> > Yup, it does now as I read it carefully again :)
> > Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> 
> Ta. Pushed.
Late on jumping the train but dont we have to limit the range exposed
while attaching the "max bpc" as well in this case?

- Radhakrishna(RK) Sripada
> 
> > 
> > However, I don't like the fact we are hiding the detail that
> > min_bpp can be >
> > max_bpp. If someone decides add a link config optimization starting
> > from
> > min_bpp, it's easy to miss this detail. 
> 
> I guess I wouldn't object to an explicit check for this. As a bonus
> we could add a more descriptive debug message for this case.
> 
> > 
> > -DK
> > 
> > > 
> > > > 
> > > > 
> > > > > +}
> > > > > +
> > > > >  static int
> > > > >  intel_dp_compute_link_config(struct intel_encoder *encoder,
> > > > >  			     struct intel_crtc_state
> > > > > *pipe_config,
> > > > > @@ -2025,7 +2033,7 @@ intel_dp_compute_link_config(struct
> > > > > intel_encoder
> > > > > *encoder,
> > > > >  	limits.min_lane_count = 1;
> > > > >  	limits.max_lane_count =
> > > > > intel_dp_max_lane_count(intel_dp);
> > > > >  
> > > > > -	limits.min_bpp = 6 * 3;
> > > > > +	limits.min_bpp = intel_dp_min_bpp(pipe_config);
> > > > >  	limits.max_bpp = intel_dp_compute_bpp(intel_dp,
> > > > > pipe_config);
> > > > >  
> > > > >  	if (intel_dp_is_edp(intel_dp) && intel_dp->edp_dpcd[0]
> > > > > < DP_EDP_14) {
> > > > > diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c
> > > > > b/drivers/gpu/drm/i915/intel_dp_mst.c
> > > > > index 6d2af7cf48e6..79c229184873 100644
> > > > > --- a/drivers/gpu/drm/i915/intel_dp_mst.c
> > > > > +++ b/drivers/gpu/drm/i915/intel_dp_mst.c
> > > > > @@ -119,7 +119,7 @@ static int
> > > > > intel_dp_mst_compute_config(struct
> > > > > intel_encoder *encoder,
> > > > >  	limits.min_lane_count =
> > > > >  	limits.max_lane_count =
> > > > > intel_dp_max_lane_count(intel_dp);
> > > > >  
> > > > > -	limits.min_bpp = 6 * 3;
> > > > > +	limits.min_bpp = intel_dp_min_bpp(pipe_config);
> > > > >  	limits.max_bpp = pipe_config->pipe_bpp;
> > > > >  
> > > > >  	intel_dp_adjust_compliance_config(intel_dp,
> > > > > pipe_config, &limits);
> > > > > diff --git a/drivers/gpu/drm/i915/intel_drv.h
> > > > > b/drivers/gpu/drm/i915/intel_drv.h
> > > > > index e79954c6271c..13f1b0367287 100644
> > > > > --- a/drivers/gpu/drm/i915/intel_drv.h
> > > > > +++ b/drivers/gpu/drm/i915/intel_drv.h
> > > > > @@ -1919,6 +1919,7 @@ void
> > > > > intel_dp_adjust_compliance_config(struct
> > > > > intel_dp
> > > > > *intel_dp,
> > > > >  				       struct
> > > > > link_config_limits *limits);
> > > > >  bool intel_dp_limited_color_range(const struct
> > > > > intel_crtc_state
> > > > > *crtc_state,
> > > > >  				  const struct
> > > > > drm_connector_state *conn_state);
> > > > > +int intel_dp_min_bpp(const struct intel_crtc_state
> > > > > *crtc_state);
> > > > >  bool intel_dp_port_enabled(struct drm_i915_private
> > > > > *dev_priv,
> > > > >  			   i915_reg_t dp_reg, enum port port,
> > > > >  			   enum pipe *pipe);
> > > 
> > > 
> 
> 
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 17+ messages in thread

* Re: [PATCH v2 6/6] drm/i915: Set DP min_bpp to 8*3 for non-RGB output formats
  2019-04-11 20:33           ` Sripada, Radhakrishna
@ 2019-04-30 17:07             ` Ville Syrjälä
  0 siblings, 0 replies; 17+ messages in thread
From: Ville Syrjälä @ 2019-04-30 17:07 UTC (permalink / raw)
  To: Sripada, Radhakrishna; +Cc: intel-gfx, Pandiyan, Dhinakaran

On Thu, Apr 11, 2019 at 08:33:08PM +0000, Sripada, Radhakrishna wrote:
> On Thu, 2019-04-11 at 21:27 +0300, Ville Syrjälä wrote:
> > On Tue, Apr 09, 2019 at 02:04:01PM -0700, Dhinakaran Pandiyan wrote:
> > > On Tue, 2019-04-09 at 23:38 +0300, Ville Syrjälä wrote:
> > > > On Tue, Apr 09, 2019 at 01:28:18PM -0700, Dhinakaran Pandiyan
> > > > wrote:
> > > > > On Tue, 2019-03-26 at 16:25 +0200, Ville Syrjala wrote:
> > > > > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > > > > 
> > > > > > 6bpc is only legal for RGB and RAW pixel encodings. For the
> > > > > > rest
> > > > > > the minimum is 8bpc. Set our lower limit accordingly.
> > > > > 
> > > > > Patch doesn't apply anymore, got a conflict in intel_drv.h. 
> > > > > 
> > > > > 
> > > > > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > > > > ---
> > > > > >  drivers/gpu/drm/i915/intel_dp.c     | 10 +++++++++-
> > > > > >  drivers/gpu/drm/i915/intel_dp_mst.c |  2 +-
> > > > > >  drivers/gpu/drm/i915/intel_drv.h    |  1 +
> > > > > >  3 files changed, 11 insertions(+), 2 deletions(-)
> > > > > > 
> > > > > > diff --git a/drivers/gpu/drm/i915/intel_dp.c
> > > > > > b/drivers/gpu/drm/i915/intel_dp.c
> > > > > > index 2aee526ed632..149fdfbcb343 100644
> > > > > > --- a/drivers/gpu/drm/i915/intel_dp.c
> > > > > > +++ b/drivers/gpu/drm/i915/intel_dp.c
> > > > > > @@ -2002,6 +2002,14 @@ static int
> > > > > > intel_dp_dsc_compute_config(struct
> > > > > > intel_dp
> > > > > > *intel_dp,
> > > > > >  	return 0;
> > > > > >  }
> > > > > >  
> > > > > > +int intel_dp_min_bpp(const struct intel_crtc_state
> > > > > > *crtc_state)
> > > > > > +{
> > > > > > +	if (crtc_state->output_format ==
> > > > > > INTEL_OUTPUT_FORMAT_RGB)
> > > > > > +		return 6 * 3;
> > > > > > +	else
> > > > > > +		return 8 * 3;
> > > > > 
> > > > > Code matches spec, however I think there is a possibility of
> > > > > min_bpp
> > > > > becoming
> > > > > greater than max_bpp. The max_bpc property allows user space to
> > > > > set a value
> > > > > of 6
> > > > > and limits.min_bpp can become 24 because of the code above. Add
> > > > > a check for
> > > > > that
> > > > > in compute_link_config()? Probably would mess up the
> > > > > compute_config() loop
> > > > > too.
> > > > 
> > > > The code looks correct. Ie. should just end up with -EINVAL.
> > > 
> > > Yup, it does now as I read it carefully again :)
> > > Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> > 
> > Ta. Pushed.
> Late on jumping the train but dont we have to limit the range exposed
> while attaching the "max bpc" as well in this case?

Late answering too. No we can't limit the range because we don't know
ahead of time whether RGB or YCbCr is going to be used. Well, we could
reject 6bpc entirely but that seems a bit silly too. The atomic check
will simply fail if you try a combo that doesn't work.

-- 
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 17+ messages in thread

end of thread, other threads:[~2019-04-30 17:07 UTC | newest]

Thread overview: 17+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-03-26 14:25 [PATCH v2 1/6] drm/i915: Add broadcast RGB property for DP MST Ville Syrjala
2019-03-26 14:25 ` [PATCH v2 2/6] drm/i915: Expose the force_audio property with " Ville Syrjala
2019-03-26 14:25 ` [PATCH v2 3/6] drm/i915: Remove the 8bpc shackles from " Ville Syrjala
2019-03-26 14:25 ` [PATCH v2 4/6] drm/i915: Add max_bpc property for " Ville Syrjala
2019-03-26 14:25 ` [PATCH v2 5/6] drm/i915: Update TRANS_MSA_MISC for fastsets Ville Syrjala
2019-03-26 14:25 ` [PATCH v2 6/6] drm/i915: Set DP min_bpp to 8*3 for non-RGB output formats Ville Syrjala
2019-03-27 14:58   ` Ville Syrjälä
2019-04-09 20:28   ` Dhinakaran Pandiyan
2019-04-09 20:38     ` Ville Syrjälä
2019-04-09 21:04       ` Dhinakaran Pandiyan
2019-04-11 18:27         ` Ville Syrjälä
2019-04-11 20:33           ` Sripada, Radhakrishna
2019-04-30 17:07             ` Ville Syrjälä
2019-03-26 18:20 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [v2,1/6] drm/i915: Add broadcast RGB property for DP MST Patchwork
2019-03-26 18:22 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-03-26 18:58 ` ✓ Fi.CI.BAT: success " Patchwork
2019-03-27  2:57 ` ✓ Fi.CI.IGT: " Patchwork

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