* [PATCH v2 0/2] ARM: dts: sun8i: a83t: Add missing cooling device properties for CPUs
@ 2019-03-28 11:31 ` megous via linux-sunxi
0 siblings, 0 replies; 18+ messages in thread
From: megous @ 2019-03-28 11:31 UTC (permalink / raw)
To: Maxime Ripard, Chen-Yu Tsai
Cc: Ondrej Jirman, Mark Rutland, devicetree, linux-kernel,
linux-sunxi, Rob Herring, linux-arm-kernel
From: Ondrej Jirman <megous@megous.com>
This series adds some properties to prepare for passive cooling via
CPU frequency down-regulation, and fixes cpufreq for various CPU hotplug
situations.
#cooling-cells patch is not strictly necessary now, but now that SID
changes are soon to be merged, thermal sensor patches are likely to
follow, and it will be useful in short order, I expect.
Please take a look.
regards,
Ondrej Jirman
Changes for v2:
- split the former single patch into a series
- reformulated descriptions to accommodate the split
Ondrej Jirman (2):
ARM: dts: sun8i: a83t: Add missing cooling device properties for CPUs
ARM: dts: sun8i: a83t: Add missing CPU clock references
arch/arm/boot/dts/sun8i-a83t.dtsi | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
--
2.21.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH v2 0/2] ARM: dts: sun8i: a83t: Add missing cooling device properties for CPUs
@ 2019-03-28 11:31 ` megous via linux-sunxi
0 siblings, 0 replies; 18+ messages in thread
From: megous via linux-sunxi @ 2019-03-28 11:31 UTC (permalink / raw)
To: Maxime Ripard, Chen-Yu Tsai
Cc: Ondrej Jirman, Rob Herring, Mark Rutland,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
From: Ondrej Jirman <megous-5qf/QAjKc83QT0dZR+AlfA@public.gmane.org>
This series adds some properties to prepare for passive cooling via
CPU frequency down-regulation, and fixes cpufreq for various CPU hotplug
situations.
#cooling-cells patch is not strictly necessary now, but now that SID
changes are soon to be merged, thermal sensor patches are likely to
follow, and it will be useful in short order, I expect.
Please take a look.
regards,
Ondrej Jirman
Changes for v2:
- split the former single patch into a series
- reformulated descriptions to accommodate the split
Ondrej Jirman (2):
ARM: dts: sun8i: a83t: Add missing cooling device properties for CPUs
ARM: dts: sun8i: a83t: Add missing CPU clock references
arch/arm/boot/dts/sun8i-a83t.dtsi | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
--
2.21.0
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH v2 1/2] ARM: dts: sun8i: a83t: Add missing cooling device properties for CPUs
@ 2019-03-28 11:31 ` megous via linux-sunxi
0 siblings, 0 replies; 18+ messages in thread
From: megous @ 2019-03-28 11:31 UTC (permalink / raw)
To: Maxime Ripard, Chen-Yu Tsai
Cc: Ondrej Jirman, Rob Herring, Mark Rutland, devicetree,
linux-sunxi, linux-arm-kernel, linux-kernel
From: Ondrej Jirman <megous@megous.com>
Enable to use CPUs as cooling device in the future, by adding
"#cooling-cells" to each CPU node. This property should be present for
all the CPUs of a cluster. If these are present only for a subset of
CPUs of a cluster then things will start falling apart as soon as the
CPUs are brought online in a different order. For example, this will
happen because the operating system looks for such properties in the CPU
node it is trying to bring up, so that it can register a cooling device.
Signed-off-by: Ondrej Jirman <megous@megous.com>
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index fcb7ef5ce2df..7a40b7d77ec0 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -69,6 +69,7 @@
cci-control-port = <&cci_control0>;
enable-method = "allwinner,sun8i-a83t-smp";
reg = <0>;
+ #cooling-cells = <2>;
};
cpu@1 {
@@ -78,6 +79,7 @@
cci-control-port = <&cci_control0>;
enable-method = "allwinner,sun8i-a83t-smp";
reg = <1>;
+ #cooling-cells = <2>;
};
cpu@2 {
@@ -87,6 +89,7 @@
cci-control-port = <&cci_control0>;
enable-method = "allwinner,sun8i-a83t-smp";
reg = <2>;
+ #cooling-cells = <2>;
};
cpu@3 {
@@ -96,6 +99,7 @@
cci-control-port = <&cci_control0>;
enable-method = "allwinner,sun8i-a83t-smp";
reg = <3>;
+ #cooling-cells = <2>;
};
cpu100: cpu@100 {
@@ -107,6 +111,7 @@
cci-control-port = <&cci_control1>;
enable-method = "allwinner,sun8i-a83t-smp";
reg = <0x100>;
+ #cooling-cells = <2>;
};
cpu@101 {
@@ -116,6 +121,7 @@
cci-control-port = <&cci_control1>;
enable-method = "allwinner,sun8i-a83t-smp";
reg = <0x101>;
+ #cooling-cells = <2>;
};
cpu@102 {
@@ -125,6 +131,7 @@
cci-control-port = <&cci_control1>;
enable-method = "allwinner,sun8i-a83t-smp";
reg = <0x102>;
+ #cooling-cells = <2>;
};
cpu@103 {
@@ -134,6 +141,7 @@
cci-control-port = <&cci_control1>;
enable-method = "allwinner,sun8i-a83t-smp";
reg = <0x103>;
+ #cooling-cells = <2>;
};
};
--
2.21.0
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH v2 1/2] ARM: dts: sun8i: a83t: Add missing cooling device properties for CPUs
@ 2019-03-28 11:31 ` megous via linux-sunxi
0 siblings, 0 replies; 18+ messages in thread
From: megous @ 2019-03-28 11:31 UTC (permalink / raw)
To: Maxime Ripard, Chen-Yu Tsai
Cc: Ondrej Jirman, Mark Rutland, devicetree, linux-kernel,
linux-sunxi, Rob Herring, linux-arm-kernel
From: Ondrej Jirman <megous@megous.com>
Enable to use CPUs as cooling device in the future, by adding
"#cooling-cells" to each CPU node. This property should be present for
all the CPUs of a cluster. If these are present only for a subset of
CPUs of a cluster then things will start falling apart as soon as the
CPUs are brought online in a different order. For example, this will
happen because the operating system looks for such properties in the CPU
node it is trying to bring up, so that it can register a cooling device.
Signed-off-by: Ondrej Jirman <megous@megous.com>
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index fcb7ef5ce2df..7a40b7d77ec0 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -69,6 +69,7 @@
cci-control-port = <&cci_control0>;
enable-method = "allwinner,sun8i-a83t-smp";
reg = <0>;
+ #cooling-cells = <2>;
};
cpu@1 {
@@ -78,6 +79,7 @@
cci-control-port = <&cci_control0>;
enable-method = "allwinner,sun8i-a83t-smp";
reg = <1>;
+ #cooling-cells = <2>;
};
cpu@2 {
@@ -87,6 +89,7 @@
cci-control-port = <&cci_control0>;
enable-method = "allwinner,sun8i-a83t-smp";
reg = <2>;
+ #cooling-cells = <2>;
};
cpu@3 {
@@ -96,6 +99,7 @@
cci-control-port = <&cci_control0>;
enable-method = "allwinner,sun8i-a83t-smp";
reg = <3>;
+ #cooling-cells = <2>;
};
cpu100: cpu@100 {
@@ -107,6 +111,7 @@
cci-control-port = <&cci_control1>;
enable-method = "allwinner,sun8i-a83t-smp";
reg = <0x100>;
+ #cooling-cells = <2>;
};
cpu@101 {
@@ -116,6 +121,7 @@
cci-control-port = <&cci_control1>;
enable-method = "allwinner,sun8i-a83t-smp";
reg = <0x101>;
+ #cooling-cells = <2>;
};
cpu@102 {
@@ -125,6 +131,7 @@
cci-control-port = <&cci_control1>;
enable-method = "allwinner,sun8i-a83t-smp";
reg = <0x102>;
+ #cooling-cells = <2>;
};
cpu@103 {
@@ -134,6 +141,7 @@
cci-control-port = <&cci_control1>;
enable-method = "allwinner,sun8i-a83t-smp";
reg = <0x103>;
+ #cooling-cells = <2>;
};
};
--
2.21.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH v2 1/2] ARM: dts: sun8i: a83t: Add missing cooling device properties for CPUs
@ 2019-03-28 11:31 ` megous via linux-sunxi
0 siblings, 0 replies; 18+ messages in thread
From: megous via linux-sunxi @ 2019-03-28 11:31 UTC (permalink / raw)
To: Maxime Ripard, Chen-Yu Tsai
Cc: Ondrej Jirman, Rob Herring, Mark Rutland,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
From: Ondrej Jirman <megous-5qf/QAjKc83QT0dZR+AlfA@public.gmane.org>
Enable to use CPUs as cooling device in the future, by adding
"#cooling-cells" to each CPU node. This property should be present for
all the CPUs of a cluster. If these are present only for a subset of
CPUs of a cluster then things will start falling apart as soon as the
CPUs are brought online in a different order. For example, this will
happen because the operating system looks for such properties in the CPU
node it is trying to bring up, so that it can register a cooling device.
Signed-off-by: Ondrej Jirman <megous-5qf/QAjKc83QT0dZR+AlfA@public.gmane.org>
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index fcb7ef5ce2df..7a40b7d77ec0 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -69,6 +69,7 @@
cci-control-port = <&cci_control0>;
enable-method = "allwinner,sun8i-a83t-smp";
reg = <0>;
+ #cooling-cells = <2>;
};
cpu@1 {
@@ -78,6 +79,7 @@
cci-control-port = <&cci_control0>;
enable-method = "allwinner,sun8i-a83t-smp";
reg = <1>;
+ #cooling-cells = <2>;
};
cpu@2 {
@@ -87,6 +89,7 @@
cci-control-port = <&cci_control0>;
enable-method = "allwinner,sun8i-a83t-smp";
reg = <2>;
+ #cooling-cells = <2>;
};
cpu@3 {
@@ -96,6 +99,7 @@
cci-control-port = <&cci_control0>;
enable-method = "allwinner,sun8i-a83t-smp";
reg = <3>;
+ #cooling-cells = <2>;
};
cpu100: cpu@100 {
@@ -107,6 +111,7 @@
cci-control-port = <&cci_control1>;
enable-method = "allwinner,sun8i-a83t-smp";
reg = <0x100>;
+ #cooling-cells = <2>;
};
cpu@101 {
@@ -116,6 +121,7 @@
cci-control-port = <&cci_control1>;
enable-method = "allwinner,sun8i-a83t-smp";
reg = <0x101>;
+ #cooling-cells = <2>;
};
cpu@102 {
@@ -125,6 +131,7 @@
cci-control-port = <&cci_control1>;
enable-method = "allwinner,sun8i-a83t-smp";
reg = <0x102>;
+ #cooling-cells = <2>;
};
cpu@103 {
@@ -134,6 +141,7 @@
cci-control-port = <&cci_control1>;
enable-method = "allwinner,sun8i-a83t-smp";
reg = <0x103>;
+ #cooling-cells = <2>;
};
};
--
2.21.0
^ permalink raw reply related [flat|nested] 18+ messages in thread* Re: [PATCH v2 1/2] ARM: dts: sun8i: a83t: Add missing cooling device properties for CPUs
@ 2019-04-01 8:20 ` Maxime Ripard
0 siblings, 0 replies; 18+ messages in thread
From: Maxime Ripard @ 2019-04-01 8:20 UTC (permalink / raw)
To: megous
Cc: Chen-Yu Tsai, Rob Herring, Mark Rutland, devicetree, linux-sunxi,
linux-arm-kernel, linux-kernel
[-- Attachment #1: Type: text/plain, Size: 775 bytes --]
On Thu, Mar 28, 2019 at 12:31:58PM +0100, megous@megous.com wrote:
> From: Ondrej Jirman <megous@megous.com>
>
> Enable to use CPUs as cooling device in the future, by adding
> "#cooling-cells" to each CPU node. This property should be present for
> all the CPUs of a cluster. If these are present only for a subset of
> CPUs of a cluster then things will start falling apart as soon as the
> CPUs are brought online in a different order. For example, this will
> happen because the operating system looks for such properties in the CPU
> node it is trying to bring up, so that it can register a cooling device.
>
> Signed-off-by: Ondrej Jirman <megous@megous.com>
Applied, thanks!
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v2 1/2] ARM: dts: sun8i: a83t: Add missing cooling device properties for CPUs
@ 2019-04-01 8:20 ` Maxime Ripard
0 siblings, 0 replies; 18+ messages in thread
From: Maxime Ripard @ 2019-04-01 8:20 UTC (permalink / raw)
To: megous
Cc: Mark Rutland, devicetree, linux-sunxi, linux-kernel,
Chen-Yu Tsai, Rob Herring, linux-arm-kernel
[-- Attachment #1.1: Type: text/plain, Size: 775 bytes --]
On Thu, Mar 28, 2019 at 12:31:58PM +0100, megous@megous.com wrote:
> From: Ondrej Jirman <megous@megous.com>
>
> Enable to use CPUs as cooling device in the future, by adding
> "#cooling-cells" to each CPU node. This property should be present for
> all the CPUs of a cluster. If these are present only for a subset of
> CPUs of a cluster then things will start falling apart as soon as the
> CPUs are brought online in a different order. For example, this will
> happen because the operating system looks for such properties in the CPU
> node it is trying to bring up, so that it can register a cooling device.
>
> Signed-off-by: Ondrej Jirman <megous@megous.com>
Applied, thanks!
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
[-- Attachment #2: Type: text/plain, Size: 176 bytes --]
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v2 1/2] ARM: dts: sun8i: a83t: Add missing cooling device properties for CPUs
@ 2019-04-01 8:20 ` Maxime Ripard
0 siblings, 0 replies; 18+ messages in thread
From: Maxime Ripard @ 2019-04-01 8:20 UTC (permalink / raw)
To: megous-5qf/QAjKc83QT0dZR+AlfA
Cc: Chen-Yu Tsai, Rob Herring, Mark Rutland,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
[-- Attachment #1: Type: text/plain, Size: 861 bytes --]
On Thu, Mar 28, 2019 at 12:31:58PM +0100, megous-5qf/QAjKc83QT0dZR+AlfA@public.gmane.org wrote:
> From: Ondrej Jirman <megous-5qf/QAjKc83QT0dZR+AlfA@public.gmane.org>
>
> Enable to use CPUs as cooling device in the future, by adding
> "#cooling-cells" to each CPU node. This property should be present for
> all the CPUs of a cluster. If these are present only for a subset of
> CPUs of a cluster then things will start falling apart as soon as the
> CPUs are brought online in a different order. For example, this will
> happen because the operating system looks for such properties in the CPU
> node it is trying to bring up, so that it can register a cooling device.
>
> Signed-off-by: Ondrej Jirman <megous-5qf/QAjKc83QT0dZR+AlfA@public.gmane.org>
Applied, thanks!
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH v2 2/2] ARM: dts: sun8i: a83t: Add missing CPU clock references
@ 2019-03-28 11:31 ` megous via linux-sunxi
0 siblings, 0 replies; 18+ messages in thread
From: megous @ 2019-03-28 11:31 UTC (permalink / raw)
To: Maxime Ripard, Chen-Yu Tsai
Cc: Ondrej Jirman, Rob Herring, Mark Rutland, devicetree,
linux-sunxi, linux-arm-kernel, linux-kernel
From: Ondrej Jirman <megous@megous.com>
A83T DTSI has cpu clocks defined only on the first CPU in each cluster.
We can bring down any CPU in the cluster, so we need to define clock
for each CPU, so that the system knows what clock to use if the first
CPU is down.
Signed-off-by: Ondrej Jirman <megous@megous.com>
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index 7a40b7d77ec0..1b0b025b9250 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -73,6 +73,8 @@
};
cpu@1 {
+ clocks = <&ccu CLK_C0CPUX>;
+ clock-names = "cpu";
compatible = "arm,cortex-a7";
device_type = "cpu";
operating-points-v2 = <&cpu0_opp_table>;
@@ -83,6 +85,8 @@
};
cpu@2 {
+ clocks = <&ccu CLK_C0CPUX>;
+ clock-names = "cpu";
compatible = "arm,cortex-a7";
device_type = "cpu";
operating-points-v2 = <&cpu0_opp_table>;
@@ -93,6 +97,8 @@
};
cpu@3 {
+ clocks = <&ccu CLK_C0CPUX>;
+ clock-names = "cpu";
compatible = "arm,cortex-a7";
device_type = "cpu";
operating-points-v2 = <&cpu0_opp_table>;
@@ -115,6 +121,8 @@
};
cpu@101 {
+ clocks = <&ccu CLK_C1CPUX>;
+ clock-names = "cpu";
compatible = "arm,cortex-a7";
device_type = "cpu";
operating-points-v2 = <&cpu1_opp_table>;
@@ -125,6 +133,8 @@
};
cpu@102 {
+ clocks = <&ccu CLK_C1CPUX>;
+ clock-names = "cpu";
compatible = "arm,cortex-a7";
device_type = "cpu";
operating-points-v2 = <&cpu1_opp_table>;
@@ -135,6 +145,8 @@
};
cpu@103 {
+ clocks = <&ccu CLK_C1CPUX>;
+ clock-names = "cpu";
compatible = "arm,cortex-a7";
device_type = "cpu";
operating-points-v2 = <&cpu1_opp_table>;
--
2.21.0
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH v2 2/2] ARM: dts: sun8i: a83t: Add missing CPU clock references
@ 2019-03-28 11:31 ` megous via linux-sunxi
0 siblings, 0 replies; 18+ messages in thread
From: megous @ 2019-03-28 11:31 UTC (permalink / raw)
To: Maxime Ripard, Chen-Yu Tsai
Cc: Ondrej Jirman, Mark Rutland, devicetree, linux-kernel,
linux-sunxi, Rob Herring, linux-arm-kernel
From: Ondrej Jirman <megous@megous.com>
A83T DTSI has cpu clocks defined only on the first CPU in each cluster.
We can bring down any CPU in the cluster, so we need to define clock
for each CPU, so that the system knows what clock to use if the first
CPU is down.
Signed-off-by: Ondrej Jirman <megous@megous.com>
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index 7a40b7d77ec0..1b0b025b9250 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -73,6 +73,8 @@
};
cpu@1 {
+ clocks = <&ccu CLK_C0CPUX>;
+ clock-names = "cpu";
compatible = "arm,cortex-a7";
device_type = "cpu";
operating-points-v2 = <&cpu0_opp_table>;
@@ -83,6 +85,8 @@
};
cpu@2 {
+ clocks = <&ccu CLK_C0CPUX>;
+ clock-names = "cpu";
compatible = "arm,cortex-a7";
device_type = "cpu";
operating-points-v2 = <&cpu0_opp_table>;
@@ -93,6 +97,8 @@
};
cpu@3 {
+ clocks = <&ccu CLK_C0CPUX>;
+ clock-names = "cpu";
compatible = "arm,cortex-a7";
device_type = "cpu";
operating-points-v2 = <&cpu0_opp_table>;
@@ -115,6 +121,8 @@
};
cpu@101 {
+ clocks = <&ccu CLK_C1CPUX>;
+ clock-names = "cpu";
compatible = "arm,cortex-a7";
device_type = "cpu";
operating-points-v2 = <&cpu1_opp_table>;
@@ -125,6 +133,8 @@
};
cpu@102 {
+ clocks = <&ccu CLK_C1CPUX>;
+ clock-names = "cpu";
compatible = "arm,cortex-a7";
device_type = "cpu";
operating-points-v2 = <&cpu1_opp_table>;
@@ -135,6 +145,8 @@
};
cpu@103 {
+ clocks = <&ccu CLK_C1CPUX>;
+ clock-names = "cpu";
compatible = "arm,cortex-a7";
device_type = "cpu";
operating-points-v2 = <&cpu1_opp_table>;
--
2.21.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH v2 2/2] ARM: dts: sun8i: a83t: Add missing CPU clock references
@ 2019-03-28 11:31 ` megous via linux-sunxi
0 siblings, 0 replies; 18+ messages in thread
From: megous via linux-sunxi @ 2019-03-28 11:31 UTC (permalink / raw)
To: Maxime Ripard, Chen-Yu Tsai
Cc: Ondrej Jirman, Rob Herring, Mark Rutland,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
From: Ondrej Jirman <megous-5qf/QAjKc83QT0dZR+AlfA@public.gmane.org>
A83T DTSI has cpu clocks defined only on the first CPU in each cluster.
We can bring down any CPU in the cluster, so we need to define clock
for each CPU, so that the system knows what clock to use if the first
CPU is down.
Signed-off-by: Ondrej Jirman <megous-5qf/QAjKc83QT0dZR+AlfA@public.gmane.org>
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index 7a40b7d77ec0..1b0b025b9250 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -73,6 +73,8 @@
};
cpu@1 {
+ clocks = <&ccu CLK_C0CPUX>;
+ clock-names = "cpu";
compatible = "arm,cortex-a7";
device_type = "cpu";
operating-points-v2 = <&cpu0_opp_table>;
@@ -83,6 +85,8 @@
};
cpu@2 {
+ clocks = <&ccu CLK_C0CPUX>;
+ clock-names = "cpu";
compatible = "arm,cortex-a7";
device_type = "cpu";
operating-points-v2 = <&cpu0_opp_table>;
@@ -93,6 +97,8 @@
};
cpu@3 {
+ clocks = <&ccu CLK_C0CPUX>;
+ clock-names = "cpu";
compatible = "arm,cortex-a7";
device_type = "cpu";
operating-points-v2 = <&cpu0_opp_table>;
@@ -115,6 +121,8 @@
};
cpu@101 {
+ clocks = <&ccu CLK_C1CPUX>;
+ clock-names = "cpu";
compatible = "arm,cortex-a7";
device_type = "cpu";
operating-points-v2 = <&cpu1_opp_table>;
@@ -125,6 +133,8 @@
};
cpu@102 {
+ clocks = <&ccu CLK_C1CPUX>;
+ clock-names = "cpu";
compatible = "arm,cortex-a7";
device_type = "cpu";
operating-points-v2 = <&cpu1_opp_table>;
@@ -135,6 +145,8 @@
};
cpu@103 {
+ clocks = <&ccu CLK_C1CPUX>;
+ clock-names = "cpu";
compatible = "arm,cortex-a7";
device_type = "cpu";
operating-points-v2 = <&cpu1_opp_table>;
--
2.21.0
^ permalink raw reply related [flat|nested] 18+ messages in thread* Re: [PATCH v2 2/2] ARM: dts: sun8i: a83t: Add missing CPU clock references
@ 2019-04-01 8:22 ` Maxime Ripard
0 siblings, 0 replies; 18+ messages in thread
From: Maxime Ripard @ 2019-04-01 8:22 UTC (permalink / raw)
To: megous
Cc: Chen-Yu Tsai, Rob Herring, Mark Rutland, devicetree, linux-sunxi,
linux-arm-kernel, linux-kernel
[-- Attachment #1: Type: text/plain, Size: 987 bytes --]
Hi,
On Thu, Mar 28, 2019 at 12:31:59PM +0100, megous@megous.com wrote:
> From: Ondrej Jirman <megous@megous.com>
>
> A83T DTSI has cpu clocks defined only on the first CPU in each cluster.
> We can bring down any CPU in the cluster, so we need to define clock
> for each CPU, so that the system knows what clock to use if the first
> CPU is down.
>
> Signed-off-by: Ondrej Jirman <megous@megous.com>
> ---
> arch/arm/boot/dts/sun8i-a83t.dtsi | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
> index 7a40b7d77ec0..1b0b025b9250 100644
> --- a/arch/arm/boot/dts/sun8i-a83t.dtsi
> +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
> @@ -73,6 +73,8 @@
> };
>
> cpu@1 {
> + clocks = <&ccu CLK_C0CPUX>;
Usually we'll have the compatible first
> + clock-names = "cpu";
And that's not documented anywhere?
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [PATCH v2 2/2] ARM: dts: sun8i: a83t: Add missing CPU clock references
@ 2019-04-01 8:22 ` Maxime Ripard
0 siblings, 0 replies; 18+ messages in thread
From: Maxime Ripard @ 2019-04-01 8:22 UTC (permalink / raw)
To: megous
Cc: Mark Rutland, devicetree, linux-sunxi, linux-kernel,
Chen-Yu Tsai, Rob Herring, linux-arm-kernel
[-- Attachment #1.1: Type: text/plain, Size: 987 bytes --]
Hi,
On Thu, Mar 28, 2019 at 12:31:59PM +0100, megous@megous.com wrote:
> From: Ondrej Jirman <megous@megous.com>
>
> A83T DTSI has cpu clocks defined only on the first CPU in each cluster.
> We can bring down any CPU in the cluster, so we need to define clock
> for each CPU, so that the system knows what clock to use if the first
> CPU is down.
>
> Signed-off-by: Ondrej Jirman <megous@megous.com>
> ---
> arch/arm/boot/dts/sun8i-a83t.dtsi | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
> index 7a40b7d77ec0..1b0b025b9250 100644
> --- a/arch/arm/boot/dts/sun8i-a83t.dtsi
> +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
> @@ -73,6 +73,8 @@
> };
>
> cpu@1 {
> + clocks = <&ccu CLK_C0CPUX>;
Usually we'll have the compatible first
> + clock-names = "cpu";
And that's not documented anywhere?
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
[-- Attachment #2: Type: text/plain, Size: 176 bytes --]
_______________________________________________
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^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [PATCH v2 2/2] ARM: dts: sun8i: a83t: Add missing CPU clock references
@ 2019-04-01 8:22 ` Maxime Ripard
0 siblings, 0 replies; 18+ messages in thread
From: Maxime Ripard @ 2019-04-01 8:22 UTC (permalink / raw)
To: megous-5qf/QAjKc83QT0dZR+AlfA
Cc: Chen-Yu Tsai, Rob Herring, Mark Rutland,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
[-- Attachment #1: Type: text/plain, Size: 1073 bytes --]
Hi,
On Thu, Mar 28, 2019 at 12:31:59PM +0100, megous-5qf/QAjKc83QT0dZR+AlfA@public.gmane.org wrote:
> From: Ondrej Jirman <megous-5qf/QAjKc83QT0dZR+AlfA@public.gmane.org>
>
> A83T DTSI has cpu clocks defined only on the first CPU in each cluster.
> We can bring down any CPU in the cluster, so we need to define clock
> for each CPU, so that the system knows what clock to use if the first
> CPU is down.
>
> Signed-off-by: Ondrej Jirman <megous-5qf/QAjKc83QT0dZR+AlfA@public.gmane.org>
> ---
> arch/arm/boot/dts/sun8i-a83t.dtsi | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
> index 7a40b7d77ec0..1b0b025b9250 100644
> --- a/arch/arm/boot/dts/sun8i-a83t.dtsi
> +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
> @@ -73,6 +73,8 @@
> };
>
> cpu@1 {
> + clocks = <&ccu CLK_C0CPUX>;
Usually we'll have the compatible first
> + clock-names = "cpu";
And that's not documented anywhere?
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [PATCH v2 2/2] ARM: dts: sun8i: a83t: Add missing CPU clock references
2019-04-01 8:22 ` Maxime Ripard
(?)
@ 2019-04-01 11:30 ` 'Ondřej Jirman' via linux-sunxi
-1 siblings, 0 replies; 18+ messages in thread
From: Ondřej Jirman @ 2019-04-01 11:30 UTC (permalink / raw)
To: Maxime Ripard
Cc: Chen-Yu Tsai, Rob Herring, Mark Rutland, devicetree, linux-sunxi,
linux-arm-kernel, linux-kernel
Hello Maxime,
On Mon, Apr 01, 2019 at 10:22:42AM +0200, Maxime Ripard wrote:
> Hi,
>
> On Thu, Mar 28, 2019 at 12:31:59PM +0100, megous@megous.com wrote:
> > From: Ondrej Jirman <megous@megous.com>
> >
> > A83T DTSI has cpu clocks defined only on the first CPU in each cluster.
> > We can bring down any CPU in the cluster, so we need to define clock
> > for each CPU, so that the system knows what clock to use if the first
> > CPU is down.
> >
> > Signed-off-by: Ondrej Jirman <megous@megous.com>
> > ---
> > arch/arm/boot/dts/sun8i-a83t.dtsi | 12 ++++++++++++
> > 1 file changed, 12 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
> > index 7a40b7d77ec0..1b0b025b9250 100644
> > --- a/arch/arm/boot/dts/sun8i-a83t.dtsi
> > +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
> > @@ -73,6 +73,8 @@
> > };
> >
> > cpu@1 {
> > + clocks = <&ccu CLK_C0CPUX>;
>
> Usually we'll have the compatible first
I'll re-order it.
> > + clock-names = "cpu";
>
> And that's not documented anywhere?
Cpufreq doesn't use CPU clock names, except for the mediatek cpufreq driver.
It's not docummented explicitly, except it's used as part of examples in
bindings/opp/opp.txt.
I guess I can safely drop it, but other will probably keep using it, because
it's part of the examples.
thank you and regards,
Ondrej
> Maxime
>
> --
> Maxime Ripard, Bootlin
> Embedded Linux and Kernel engineering
> https://bootlin.com
^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [PATCH v2 2/2] ARM: dts: sun8i: a83t: Add missing CPU clock references
@ 2019-04-01 11:30 ` 'Ondřej Jirman' via linux-sunxi
0 siblings, 0 replies; 18+ messages in thread
From: Ondřej Jirman @ 2019-04-01 11:30 UTC (permalink / raw)
To: Maxime Ripard
Cc: Mark Rutland, devicetree, linux-sunxi, linux-kernel,
Chen-Yu Tsai, Rob Herring, linux-arm-kernel
Hello Maxime,
On Mon, Apr 01, 2019 at 10:22:42AM +0200, Maxime Ripard wrote:
> Hi,
>
> On Thu, Mar 28, 2019 at 12:31:59PM +0100, megous@megous.com wrote:
> > From: Ondrej Jirman <megous@megous.com>
> >
> > A83T DTSI has cpu clocks defined only on the first CPU in each cluster.
> > We can bring down any CPU in the cluster, so we need to define clock
> > for each CPU, so that the system knows what clock to use if the first
> > CPU is down.
> >
> > Signed-off-by: Ondrej Jirman <megous@megous.com>
> > ---
> > arch/arm/boot/dts/sun8i-a83t.dtsi | 12 ++++++++++++
> > 1 file changed, 12 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
> > index 7a40b7d77ec0..1b0b025b9250 100644
> > --- a/arch/arm/boot/dts/sun8i-a83t.dtsi
> > +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
> > @@ -73,6 +73,8 @@
> > };
> >
> > cpu@1 {
> > + clocks = <&ccu CLK_C0CPUX>;
>
> Usually we'll have the compatible first
I'll re-order it.
> > + clock-names = "cpu";
>
> And that's not documented anywhere?
Cpufreq doesn't use CPU clock names, except for the mediatek cpufreq driver.
It's not docummented explicitly, except it's used as part of examples in
bindings/opp/opp.txt.
I guess I can safely drop it, but other will probably keep using it, because
it's part of the examples.
thank you and regards,
Ondrej
> Maxime
>
> --
> Maxime Ripard, Bootlin
> Embedded Linux and Kernel engineering
> https://bootlin.com
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [PATCH v2 2/2] ARM: dts: sun8i: a83t: Add missing CPU clock references
@ 2019-04-01 11:30 ` 'Ondřej Jirman' via linux-sunxi
0 siblings, 0 replies; 18+ messages in thread
From: 'Ondřej Jirman' via linux-sunxi @ 2019-04-01 11:30 UTC (permalink / raw)
To: Maxime Ripard
Cc: Chen-Yu Tsai, Rob Herring, Mark Rutland,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
Hello Maxime,
On Mon, Apr 01, 2019 at 10:22:42AM +0200, Maxime Ripard wrote:
> Hi,
>
> On Thu, Mar 28, 2019 at 12:31:59PM +0100, megous-5qf/QAjKc83QT0dZR+AlfA@public.gmane.org wrote:
> > From: Ondrej Jirman <megous-5qf/QAjKc83QT0dZR+AlfA@public.gmane.org>
> >
> > A83T DTSI has cpu clocks defined only on the first CPU in each cluster.
> > We can bring down any CPU in the cluster, so we need to define clock
> > for each CPU, so that the system knows what clock to use if the first
> > CPU is down.
> >
> > Signed-off-by: Ondrej Jirman <megous-5qf/QAjKc83QT0dZR+AlfA@public.gmane.org>
> > ---
> > arch/arm/boot/dts/sun8i-a83t.dtsi | 12 ++++++++++++
> > 1 file changed, 12 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
> > index 7a40b7d77ec0..1b0b025b9250 100644
> > --- a/arch/arm/boot/dts/sun8i-a83t.dtsi
> > +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
> > @@ -73,6 +73,8 @@
> > };
> >
> > cpu@1 {
> > + clocks = <&ccu CLK_C0CPUX>;
>
> Usually we'll have the compatible first
I'll re-order it.
> > + clock-names = "cpu";
>
> And that's not documented anywhere?
Cpufreq doesn't use CPU clock names, except for the mediatek cpufreq driver.
It's not docummented explicitly, except it's used as part of examples in
bindings/opp/opp.txt.
I guess I can safely drop it, but other will probably keep using it, because
it's part of the examples.
thank you and regards,
Ondrej
> Maxime
>
> --
> Maxime Ripard, Bootlin
> Embedded Linux and Kernel engineering
> https://bootlin.com
^ permalink raw reply [flat|nested] 18+ messages in thread