[U-Boot] [PATCH 1/3] rockchip: fixup board choice in Kconfig

[U-Boot] [PATCH 1/3] rockchip: fixup board choice in Kconfig

[Kever Yang]

Kconfig for board target select is choice option, fixup for
rk3036, rk3288 and rv1108.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
---

 arch/arm/mach-rockchip/rk3036/Kconfig | 5 +++++
 arch/arm/mach-rockchip/rk3288/Kconfig | 5 +++++
 arch/arm/mach-rockchip/rv1108/Kconfig | 5 +++++
 3 files changed, 15 insertions(+)

diff --git a/arch/arm/mach-rockchip/rk3036/Kconfig b/arch/arm/mach-rockchip/rk3036/Kconfig
index 5e04d20448..0f6b5c4629 100644
--- a/arch/arm/mach-rockchip/rk3036/Kconfig
+++ b/arch/arm/mach-rockchip/rk3036/Kconfig
@@ -1,5 +1,8 @@
 if ROCKCHIP_RK3036
 
+choice
+	prompt "RK3036 board select"
+
 config TARGET_EVB_RK3036
 	bool "EVB_RK3036"
 	select BOARD_LATE_INIT
@@ -8,6 +11,8 @@ config TARGET_KYLIN_RK3036
 	bool "KYLIN_RK3036"
 	select BOARD_LATE_INIT
 
+endchoice
+
 config SYS_SOC
 	default "rk3036"
 
diff --git a/arch/arm/mach-rockchip/rk3288/Kconfig b/arch/arm/mach-rockchip/rk3288/Kconfig
index 50680ce606..59e403b7df 100644
--- a/arch/arm/mach-rockchip/rk3288/Kconfig
+++ b/arch/arm/mach-rockchip/rk3288/Kconfig
@@ -1,5 +1,8 @@
 if ROCKCHIP_RK3288
 
+choice
+	prompt "RK3288 board select"
+
 config TARGET_CHROMEBOOK_JERRY
 	bool "Google/Rockchip Veyron-Jerry Chromebook"
 	select BOARD_LATE_INIT
@@ -138,6 +141,8 @@ config TARGET_TINKER_RK3288
 	  8GB eMMC and 2GB of SDRAM. Expansion connectors provide access to
 	  I2C, SPI, UART, GPIOs.
 
+endchoice
+
 config ROCKCHIP_FAST_SPL
 	bool "Change the CPU to full speed in SPL"
 	depends on TARGET_CHROMEBOOK_JERRY
diff --git a/arch/arm/mach-rockchip/rv1108/Kconfig b/arch/arm/mach-rockchip/rv1108/Kconfig
index e3a63b80e1..c5402ab1bd 100644
--- a/arch/arm/mach-rockchip/rv1108/Kconfig
+++ b/arch/arm/mach-rockchip/rv1108/Kconfig
@@ -1,5 +1,8 @@
 if ROCKCHIP_RV1108
 
+choice
+	prompt "RV1108 board select"
+
 config TARGET_EVB_RV1108
 	bool "EVB_RV1108"
 	help
@@ -22,6 +25,8 @@ config TARGET_ELGIN_RV1108
 	help
 	  RV1108 ELGIN is a board based on the Rockchip RV1108.
 
+endchoice
+
 config SYS_SOC
 	default "rv1108"
 
-- 
2.20.1

[U-Boot] [PATCH 2/3] rockchip: introduce ROCKCHIP_IRAM_BASE

[Kever Yang]

Rockchip SoCs have internal sram for bootrom data area and for
sdram init program space. Introduce the base address in case
we need to use it.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
---

 arch/arm/mach-rockchip/Kconfig        | 5 +++++
 arch/arm/mach-rockchip/rk3036/Kconfig | 3 +++
 arch/arm/mach-rockchip/rk3128/Kconfig | 3 +++
 arch/arm/mach-rockchip/rk3188/Kconfig | 3 +++
 arch/arm/mach-rockchip/rk322x/Kconfig | 3 +++
 arch/arm/mach-rockchip/rk3288/Kconfig | 3 +++
 arch/arm/mach-rockchip/rk3328/Kconfig | 3 +++
 arch/arm/mach-rockchip/rk3368/Kconfig | 3 +++
 arch/arm/mach-rockchip/rk3399/Kconfig | 3 +++
 arch/arm/mach-rockchip/rv1108/Kconfig | 3 +++
 10 files changed, 32 insertions(+)

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 50add08338..462b3ea6e0 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -250,6 +250,11 @@ config ROCKCHIP_BOOT_MODE_REG
 	  The Soc will enter to different boot mode(defined in asm/arch-rockchip/boot_mode.h)
 	  according to the value from this register.
 
+config ROCKCHIP_IRAM_BASE
+	hex "Rockchip Internal sRAM base address"
+	help
+	  Rockchip SoCs has internal sram, U-Boot may need to use it.
+
 config ROCKCHIP_SPL_RESERVE_IRAM
 	hex "Size of IRAM reserved in SPL"
 	default 0
diff --git a/arch/arm/mach-rockchip/rk3036/Kconfig b/arch/arm/mach-rockchip/rk3036/Kconfig
index 0f6b5c4629..ffc0944c95 100644
--- a/arch/arm/mach-rockchip/rk3036/Kconfig
+++ b/arch/arm/mach-rockchip/rk3036/Kconfig
@@ -13,6 +13,9 @@ config TARGET_KYLIN_RK3036
 
 endchoice
 
+config ROCKCHIP_IRAM_BASE
+	default 0x10080000
+
 config SYS_SOC
 	default "rk3036"
 
diff --git a/arch/arm/mach-rockchip/rk3128/Kconfig b/arch/arm/mach-rockchip/rk3128/Kconfig
index a82b7dc063..51ed091053 100644
--- a/arch/arm/mach-rockchip/rk3128/Kconfig
+++ b/arch/arm/mach-rockchip/rk3128/Kconfig
@@ -13,6 +13,9 @@ config TARGET_EVB_RK3128
 
 endchoice
 
+config ROCKCHIP_IRAM_BASE
+	default 0x10080000
+
 config SYS_SOC
 	default "rk3128"
 
diff --git a/arch/arm/mach-rockchip/rk3188/Kconfig b/arch/arm/mach-rockchip/rk3188/Kconfig
index a6fc691fb6..2e597bb65f 100644
--- a/arch/arm/mach-rockchip/rk3188/Kconfig
+++ b/arch/arm/mach-rockchip/rk3188/Kconfig
@@ -9,6 +9,9 @@ config TARGET_ROCK
 	  Expansion connectors provide access to display pins, I2C, SPI,
 	  UART and GPIOs.
 
+config ROCKCHIP_IRAM_BASE
+	default 0x10080000
+
 config SYS_SOC
 	default "rk3188"
 
diff --git a/arch/arm/mach-rockchip/rk322x/Kconfig b/arch/arm/mach-rockchip/rk322x/Kconfig
index 8a1f95f785..15fd4a9acf 100644
--- a/arch/arm/mach-rockchip/rk322x/Kconfig
+++ b/arch/arm/mach-rockchip/rk322x/Kconfig
@@ -4,6 +4,9 @@ config TARGET_EVB_RK3229
 	bool "EVB_RK3229"
 	select BOARD_LATE_INIT
 
+config ROCKCHIP_IRAM_BASE
+	default 0x10080000
+
 config SYS_SOC
 	default "rk322x"
 
diff --git a/arch/arm/mach-rockchip/rk3288/Kconfig b/arch/arm/mach-rockchip/rk3288/Kconfig
index 59e403b7df..9aaae60363 100644
--- a/arch/arm/mach-rockchip/rk3288/Kconfig
+++ b/arch/arm/mach-rockchip/rk3288/Kconfig
@@ -152,6 +152,9 @@ config ROCKCHIP_FAST_SPL
 	  voltage. This option is only available on boards which support it
 	  and have the required PMIC code.
 
+config ROCKCHIP_IRAM_BASE
+	default 0xff700000
+
 config SYS_SOC
 	default "rk3288"
 
diff --git a/arch/arm/mach-rockchip/rk3328/Kconfig b/arch/arm/mach-rockchip/rk3328/Kconfig
index 6c5c4303a3..d9155ebc0a 100644
--- a/arch/arm/mach-rockchip/rk3328/Kconfig
+++ b/arch/arm/mach-rockchip/rk3328/Kconfig
@@ -12,6 +12,9 @@ config TARGET_EVB_RK3328
 
 endchoice
 
+config ROCKCHIP_IRAM_BASE
+	default 0xff090000
+
 config SYS_SOC
 	default "rk3328"
 
diff --git a/arch/arm/mach-rockchip/rk3368/Kconfig b/arch/arm/mach-rockchip/rk3368/Kconfig
index 325572a7e4..0502a0e30d 100644
--- a/arch/arm/mach-rockchip/rk3368/Kconfig
+++ b/arch/arm/mach-rockchip/rk3368/Kconfig
@@ -42,6 +42,9 @@ config TARGET_EVB_PX5
          sensor STK3410.
 endchoice
 
+config ROCKCHIP_IRAM_BASE
+	default 0xff8c0000
+
 config SYS_SOC
 	default "rk3368"
 
diff --git a/arch/arm/mach-rockchip/rk3399/Kconfig b/arch/arm/mach-rockchip/rk3399/Kconfig
index 2c5c93c0b8..9b0924033b 100644
--- a/arch/arm/mach-rockchip/rk3399/Kconfig
+++ b/arch/arm/mach-rockchip/rk3399/Kconfig
@@ -64,6 +64,9 @@ config TARGET_CHROMEBOOK_BOB
 
 endchoice
 
+config ROCKCHIP_IRAM_BASE
+	default 0xff8c0000
+
 config SYS_SOC
 	default "rk3399"
 
diff --git a/arch/arm/mach-rockchip/rv1108/Kconfig b/arch/arm/mach-rockchip/rv1108/Kconfig
index c5402ab1bd..0cbf71bf58 100644
--- a/arch/arm/mach-rockchip/rv1108/Kconfig
+++ b/arch/arm/mach-rockchip/rv1108/Kconfig
@@ -27,6 +27,9 @@ config TARGET_ELGIN_RV1108
 
 endchoice
 
+config ROCKCHIP_IRAM_BASE
+	default 0x10080000
+
 config SYS_SOC
 	default "rv1108"
 
-- 
2.20.1

[U-Boot] [PATCH 3/3] common: bouncebuf: handle address in sram for rockchip platform

[Kever Yang]

Rockchip SOC's mmc controller does not support read data
from mmc to sram, we need a bounce buffer(in sdram), and then
copy to sram.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
---

 common/bouncebuf.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/common/bouncebuf.c b/common/bouncebuf.c
index a7098e2caf..364fb17c96 100644
--- a/common/bouncebuf.c
+++ b/common/bouncebuf.c
@@ -26,6 +26,18 @@ static int addr_aligned(struct bounce_buffer *state)
 		return 0;
 	}
 
+#ifdef CONFIG_ARCH_ROCKCHIP
+	/*
+	 * Rockchip SOC's mmc controller does not support read data
+	 * from mmc to sram, we need a bounce buffer(in sdram), and then
+	 * copy to sram.
+	 */
+	if (((ulong)state->user_buffer & 0xfff80000) ==
+	    CONFIG_ROCKCHIP_IRAM_BASE) {
+		debug("Unsupport IRAM space %p\n", state->user_buffer);
+		return 0;
+	}
+#endif
 	/* Aligned */
 	return 1;
 }
-- 
2.20.1

[U-Boot] [PATCH 3/3] common: bouncebuf: handle address in sram for rockchip platform

[Heiko Stübner]

Hi Kever,

Am Dienstag, 2. April 2019, 10:46:54 CEST schrieb Kever Yang:
> Rockchip SOC's mmc controller does not support read data
> from mmc to sram, we need a bounce buffer(in sdram), and then
> copy to sram.
> 
> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
> ---
> 
>  common/bouncebuf.c | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
> 
> diff --git a/common/bouncebuf.c b/common/bouncebuf.c
> index a7098e2caf..364fb17c96 100644
> --- a/common/bouncebuf.c
> +++ b/common/bouncebuf.c
> @@ -26,6 +26,18 @@ static int addr_aligned(struct bounce_buffer *state)
>  		return 0;
>  	}
>  
> +#ifdef CONFIG_ARCH_ROCKCHIP
> +	/*
> +	 * Rockchip SOC's mmc controller does not support read data
> +	 * from mmc to sram, we need a bounce buffer(in sdram), and then
> +	 * copy to sram.
> +	 */
> +	if (((ulong)state->user_buffer & 0xfff80000) ==
> +	    CONFIG_ROCKCHIP_IRAM_BASE) {
> +		debug("Unsupport IRAM space %p\n", state->user_buffer);
> +		return 0;
> +	}

wouldn't it be easier to just check for "in-ddr-region"?
Rockchip SoCs may have multiple sram areas one might want to use.

Also I get the feeling this should not live in an ARCH_ROCKCHIP ifdef.
Instead maybe define some sort of kconfig settings to describe the
directly usable memory areas, that the bounce_buffer then could use?


Heiko

> +#endif
>  	/* Aligned */
>  	return 1;
>  }
> 

[U-Boot] [PATCH 3/3] common: bouncebuf: handle address in sram for rockchip platform

[Simon Goldschmidt]

On Tue, Apr 9, 2019 at 12:47 PM Heiko Stübner <heiko@sntech.de> wrote:
>
> Hi Kever,
>
> Am Dienstag, 2. April 2019, 10:46:54 CEST schrieb Kever Yang:
> > Rockchip SOC's mmc controller does not support read data
> > from mmc to sram, we need a bounce buffer(in sdram), and then
> > copy to sram.
> >
> > Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
> > ---
> >
> >  common/bouncebuf.c | 12 ++++++++++++
> >  1 file changed, 12 insertions(+)
> >
> > diff --git a/common/bouncebuf.c b/common/bouncebuf.c
> > index a7098e2caf..364fb17c96 100644
> > --- a/common/bouncebuf.c
> > +++ b/common/bouncebuf.c
> > @@ -26,6 +26,18 @@ static int addr_aligned(struct bounce_buffer *state)
> >               return 0;
> >       }
> >
> > +#ifdef CONFIG_ARCH_ROCKCHIP
> > +     /*
> > +      * Rockchip SOC's mmc controller does not support read data
> > +      * from mmc to sram, we need a bounce buffer(in sdram), and then
> > +      * copy to sram.
> > +      */
> > +     if (((ulong)state->user_buffer & 0xfff80000) ==
> > +         CONFIG_ROCKCHIP_IRAM_BASE) {
> > +             debug("Unsupport IRAM space %p\n", state->user_buffer);
> > +             return 0;
> > +     }
>
> wouldn't it be easier to just check for "in-ddr-region"?
> Rockchip SoCs may have multiple sram areas one might want to use.
>
> Also I get the feeling this should not live in an ARCH_ROCKCHIP ifdef.
> Instead maybe define some sort of kconfig settings to describe the
> directly usable memory areas, that the bounce_buffer then could use?

Indeed this still looks like a hack and should not be applied. My comments
to [1] still apply to this patch: arch-specific defines should not be located
in generic files if we can avoid it.

[1] https://patchwork.ozlabs.org/patch/1069730/

Regards,
Simon

>
>
> Heiko
>
> > +#endif
> >       /* Aligned */
> >       return 1;
> >  }
> >
>
>
>
>
> _______________________________________________
> U-Boot mailing list
> U-Boot at lists.denx.de
> https://lists.denx.de/listinfo/u-boot

[U-Boot] [PATCH 3/3] common: bouncebuf: handle address in sram for rockchip platform

[Christoph Müllner]

Hi Kever,

On 4/2/19 10:46 AM, Kever Yang wrote:
> Rockchip SOC's mmc controller does not support read data
> from mmc to sram, we need a bounce buffer(in sdram), and then
> copy to sram.

what exactly is the limitation here?
I mean a DMA engine does not care where it is copying to.

Additionally I was observing recently, that copying from SD card
to SRAM works on RK3399 boards with 4 GB of RAM.
I see a data error in dwmci_data_transfer() only on 2 GB boards.

Therefore my question:
Is this maybe just a problem of the memory area not being mapped in SPL?

Thanks,
Christoph

> 
> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
> ---
> 
>  common/bouncebuf.c | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
> 
> diff --git a/common/bouncebuf.c b/common/bouncebuf.c
> index a7098e2caf..364fb17c96 100644
> --- a/common/bouncebuf.c
> +++ b/common/bouncebuf.c
> @@ -26,6 +26,18 @@ static int addr_aligned(struct bounce_buffer *state)
>  		return 0;
>  	}
>  
> +#ifdef CONFIG_ARCH_ROCKCHIP
> +	/*
> +	 * Rockchip SOC's mmc controller does not support read data
> +	 * from mmc to sram, we need a bounce buffer(in sdram), and then
> +	 * copy to sram.
> +	 */
> +	if (((ulong)state->user_buffer & 0xfff80000) ==
> +	    CONFIG_ROCKCHIP_IRAM_BASE) {
> +		debug("Unsupport IRAM space %p\n", state->user_buffer);
> +		return 0;
> +	}
> +#endif
>  	/* Aligned */
>  	return 1;
>  }
>