* [PATCH 0/2] drm/bridge: ti-tfp410: Handle bus-format for 24/12 lines selection @ 2019-04-01 12:41 Peter Ujfalusi 2019-04-01 12:41 ` [PATCH 1/2] dt-bindings: display: tfp410: Add bus-width parameter property Peter Ujfalusi 2019-04-01 12:41 ` [PATCH 2/2] drm/bridge: ti-tfp410: Set the bus_format Peter Ujfalusi 0 siblings, 2 replies; 9+ messages in thread From: Peter Ujfalusi @ 2019-04-01 12:41 UTC (permalink / raw) To: tomi.valkeinen, laurent.pinchart, a.hajda, jsarha Cc: airlied, devicetree, dri-devel Hi, The TFP410 supports 24 bit, single-edge and 12 bit, dual-edge modes. Depending on how many wires are used (24/12) the driver can set the correct bus_format. In case the bus-width is not specified (old DT blobs) assume 24 lines as the driver assumed that in the past and all boards using tfp410 uave this setup. Regards, Peter --- Peter Ujfalusi (2): dt-bindings: display: tfp410: Add bus-width parameter property drm/bridge: ti-tfp410: Set the bus_format .../bindings/display/bridge/ti,tfp410.txt | 10 +++++++++- drivers/gpu/drm/bridge/ti-tfp410.c | 17 +++++++++++++++++ 2 files changed, 26 insertions(+), 1 deletion(-) -- Peter Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 1/2] dt-bindings: display: tfp410: Add bus-width parameter property 2019-04-01 12:41 [PATCH 0/2] drm/bridge: ti-tfp410: Handle bus-format for 24/12 lines selection Peter Ujfalusi @ 2019-04-01 12:41 ` Peter Ujfalusi 2019-04-02 11:45 ` Laurent Pinchart 2019-04-06 6:06 ` Rob Herring 2019-04-01 12:41 ` [PATCH 2/2] drm/bridge: ti-tfp410: Set the bus_format Peter Ujfalusi 1 sibling, 2 replies; 9+ messages in thread From: Peter Ujfalusi @ 2019-04-01 12:41 UTC (permalink / raw) To: tomi.valkeinen, laurent.pinchart, a.hajda, jsarha Cc: airlied, devicetree, dri-devel tfp410 can be connect to host processor in 24bit, single-edge (24 lines) or 12bit, dual-edge (12 lines). Add bus-width to the documentation so it can be used to select between the two connection scheme. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> --- .../devicetree/bindings/display/bridge/ti,tfp410.txt | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/bridge/ti,tfp410.txt b/Documentation/devicetree/bindings/display/bridge/ti,tfp410.txt index 3f903af93949..5ff4f64ef8e8 100644 --- a/Documentation/devicetree/bindings/display/bridge/ti,tfp410.txt +++ b/Documentation/devicetree/bindings/display/bridge/ti,tfp410.txt @@ -18,7 +18,14 @@ This device has two video ports. Their connections are modeled using the OF graph bindings specified in [1]. Each port node shall have a single endpoint. - Port 0 is the DPI input port. Its endpoint subnode shall contain a - pclk-sample property and a remote-endpoint property as specified in [1]. + pclk-sample and bus-width property and a remote-endpoint property as specified + in [1]. + - If pclk-sample is not defined, pclk-sample = 0 should be assumed for + backward compatibility. + - If bus-width is not defined then bus-width = 24 should be assumed for + backward compatibility. + bus-width = 24: 24 data lines are connected and single-edge mode + bus-width = 12: 12 data lines are connected and dual-edge mode - Port 1 is the DVI output port. Its endpoint subnode shall contain a remote-endpoint property is specified in [1]. @@ -43,6 +50,7 @@ tfp410: encoder@0 { tfp410_in: endpoint@0 { pclk-sample = <1>; + bus-width = <24>; remote-endpoint = <&dpi_out>; }; }; -- Peter Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH 1/2] dt-bindings: display: tfp410: Add bus-width parameter property 2019-04-01 12:41 ` [PATCH 1/2] dt-bindings: display: tfp410: Add bus-width parameter property Peter Ujfalusi @ 2019-04-02 11:45 ` Laurent Pinchart 2019-04-06 6:06 ` Rob Herring 1 sibling, 0 replies; 9+ messages in thread From: Laurent Pinchart @ 2019-04-02 11:45 UTC (permalink / raw) To: Peter Ujfalusi; +Cc: devicetree, airlied, dri-devel, tomi.valkeinen, jsarha Hi Peter, Thank you for the patch. On Mon, Apr 01, 2019 at 03:41:42PM +0300, Peter Ujfalusi wrote: > tfp410 can be connect to host processor in 24bit, single-edge (24 lines) or > 12bit, dual-edge (12 lines). > > Add bus-width to the documentation so it can be used to select between the > two connection scheme. > > Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > --- > .../devicetree/bindings/display/bridge/ti,tfp410.txt | 10 +++++++++- > 1 file changed, 9 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/display/bridge/ti,tfp410.txt b/Documentation/devicetree/bindings/display/bridge/ti,tfp410.txt > index 3f903af93949..5ff4f64ef8e8 100644 > --- a/Documentation/devicetree/bindings/display/bridge/ti,tfp410.txt > +++ b/Documentation/devicetree/bindings/display/bridge/ti,tfp410.txt > @@ -18,7 +18,14 @@ This device has two video ports. Their connections are modeled using the OF > graph bindings specified in [1]. Each port node shall have a single endpoint. > > - Port 0 is the DPI input port. Its endpoint subnode shall contain a > - pclk-sample property and a remote-endpoint property as specified in [1]. > + pclk-sample and bus-width property and a remote-endpoint property as specified > + in [1]. > + - If pclk-sample is not defined, pclk-sample = 0 should be assumed for > + backward compatibility. > + - If bus-width is not defined then bus-width = 24 should be assumed for > + backward compatibility. > + bus-width = 24: 24 data lines are connected and single-edge mode > + bus-width = 12: 12 data lines are connected and dual-edge mode > > - Port 1 is the DVI output port. Its endpoint subnode shall contain a > remote-endpoint property is specified in [1]. > @@ -43,6 +50,7 @@ tfp410: encoder@0 { > > tfp410_in: endpoint@0 { > pclk-sample = <1>; > + bus-width = <24>; > remote-endpoint = <&dpi_out>; > }; > }; -- Regards, Laurent Pinchart _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 1/2] dt-bindings: display: tfp410: Add bus-width parameter property 2019-04-01 12:41 ` [PATCH 1/2] dt-bindings: display: tfp410: Add bus-width parameter property Peter Ujfalusi 2019-04-02 11:45 ` Laurent Pinchart @ 2019-04-06 6:06 ` Rob Herring 1 sibling, 0 replies; 9+ messages in thread From: Rob Herring @ 2019-04-06 6:06 UTC (permalink / raw) To: Peter Ujfalusi Cc: devicetree, airlied, dri-devel, jsarha, tomi.valkeinen, laurent.pinchart On Mon, 1 Apr 2019 15:41:42 +0300, Peter Ujfalusi wrote: > tfp410 can be connect to host processor in 24bit, single-edge (24 lines) or > 12bit, dual-edge (12 lines). > > Add bus-width to the documentation so it can be used to select between the > two connection scheme. > > Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> > --- > .../devicetree/bindings/display/bridge/ti,tfp410.txt | 10 +++++++++- > 1 file changed, 9 insertions(+), 1 deletion(-) > Reviewed-by: Rob Herring <robh@kernel.org> _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 2/2] drm/bridge: ti-tfp410: Set the bus_format 2019-04-01 12:41 [PATCH 0/2] drm/bridge: ti-tfp410: Handle bus-format for 24/12 lines selection Peter Ujfalusi 2019-04-01 12:41 ` [PATCH 1/2] dt-bindings: display: tfp410: Add bus-width parameter property Peter Ujfalusi @ 2019-04-01 12:41 ` Peter Ujfalusi 2019-04-02 11:49 ` Laurent Pinchart 2019-04-12 7:33 ` Andrzej Hajda 1 sibling, 2 replies; 9+ messages in thread From: Peter Ujfalusi @ 2019-04-01 12:41 UTC (permalink / raw) To: tomi.valkeinen, laurent.pinchart, a.hajda, jsarha Cc: airlied, devicetree, dri-devel The TFP410 supports 24 bit, single-edge and 12 bit, dual-edge modes. Depending on how many wires are used (24/12) the driver can set the correct bus_format. If the information is not available in DT then assume 24 bit, single-edge setup. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> --- drivers/gpu/drm/bridge/ti-tfp410.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/gpu/drm/bridge/ti-tfp410.c b/drivers/gpu/drm/bridge/ti-tfp410.c index 6fc831eb3804..8b0e71bd3ca7 100644 --- a/drivers/gpu/drm/bridge/ti-tfp410.c +++ b/drivers/gpu/drm/bridge/ti-tfp410.c @@ -29,6 +29,7 @@ struct tfp410 { struct drm_connector connector; unsigned int connector_type; + u32 bus_format; struct i2c_adapter *ddc; struct gpio_desc *hpd; int hpd_irq; @@ -139,6 +140,9 @@ static int tfp410_attach(struct drm_bridge *bridge) return ret; } + drm_display_info_set_bus_formats(&dvi->connector.display_info, + &dvi->bus_format, 1); + drm_connector_attach_encoder(&dvi->connector, bridge->encoder); @@ -197,6 +201,7 @@ static int tfp410_parse_timings(struct tfp410 *dvi, bool i2c) struct drm_bridge_timings *timings = &dvi->timings; struct device_node *ep; u32 pclk_sample = 0; + u32 bus_width = 24; s32 deskew = 0; /* Start with defaults. */ @@ -221,6 +226,7 @@ static int tfp410_parse_timings(struct tfp410 *dvi, bool i2c) /* Get the sampling edge from the endpoint. */ of_property_read_u32(ep, "pclk-sample", &pclk_sample); + of_property_read_u32(ep, "bus-width", &bus_width); of_node_put(ep); timings->input_bus_flags = DRM_BUS_FLAG_DE_HIGH; @@ -238,6 +244,17 @@ static int tfp410_parse_timings(struct tfp410 *dvi, bool i2c) return -EINVAL; } + switch (bus_width) { + case 12: + dvi->bus_format = MEDIA_BUS_FMT_RGB888_2X12_LE; + break; + case 24: + dvi->bus_format = MEDIA_BUS_FMT_RGB888_1X24; + break; + default: + return -EINVAL; + } + /* Get the setup and hold time from vendor-specific properties. */ of_property_read_u32(dvi->dev->of_node, "ti,deskew", (u32 *)&deskew); if (deskew < -4 || deskew > 3) -- Peter Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH 2/2] drm/bridge: ti-tfp410: Set the bus_format 2019-04-01 12:41 ` [PATCH 2/2] drm/bridge: ti-tfp410: Set the bus_format Peter Ujfalusi @ 2019-04-02 11:49 ` Laurent Pinchart 2019-04-12 7:33 ` Andrzej Hajda 1 sibling, 0 replies; 9+ messages in thread From: Laurent Pinchart @ 2019-04-02 11:49 UTC (permalink / raw) To: Peter Ujfalusi; +Cc: devicetree, airlied, dri-devel, tomi.valkeinen, jsarha Hi Peter, Thank you for the patch. On Mon, Apr 01, 2019 at 03:41:43PM +0300, Peter Ujfalusi wrote: > The TFP410 supports 24 bit, single-edge and 12 bit, dual-edge modes. > Depending on how many wires are used (24/12) the driver can set the correct > bus_format. > > If the information is not available in DT then assume 24 bit, single-edge > setup. > > Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> > --- > drivers/gpu/drm/bridge/ti-tfp410.c | 17 +++++++++++++++++ > 1 file changed, 17 insertions(+) > > diff --git a/drivers/gpu/drm/bridge/ti-tfp410.c b/drivers/gpu/drm/bridge/ti-tfp410.c > index 6fc831eb3804..8b0e71bd3ca7 100644 > --- a/drivers/gpu/drm/bridge/ti-tfp410.c > +++ b/drivers/gpu/drm/bridge/ti-tfp410.c > @@ -29,6 +29,7 @@ struct tfp410 { > struct drm_connector connector; > unsigned int connector_type; > > + u32 bus_format; > struct i2c_adapter *ddc; > struct gpio_desc *hpd; > int hpd_irq; > @@ -139,6 +140,9 @@ static int tfp410_attach(struct drm_bridge *bridge) > return ret; > } > > + drm_display_info_set_bus_formats(&dvi->connector.display_info, > + &dvi->bus_format, 1); > + > drm_connector_attach_encoder(&dvi->connector, > bridge->encoder); > > @@ -197,6 +201,7 @@ static int tfp410_parse_timings(struct tfp410 *dvi, bool i2c) > struct drm_bridge_timings *timings = &dvi->timings; > struct device_node *ep; > u32 pclk_sample = 0; > + u32 bus_width = 24; > s32 deskew = 0; > > /* Start with defaults. */ > @@ -221,6 +226,7 @@ static int tfp410_parse_timings(struct tfp410 *dvi, bool i2c) > > /* Get the sampling edge from the endpoint. */ > of_property_read_u32(ep, "pclk-sample", &pclk_sample); > + of_property_read_u32(ep, "bus-width", &bus_width); > of_node_put(ep); > > timings->input_bus_flags = DRM_BUS_FLAG_DE_HIGH; > @@ -238,6 +244,17 @@ static int tfp410_parse_timings(struct tfp410 *dvi, bool i2c) > return -EINVAL; > } > > + switch (bus_width) { > + case 12: > + dvi->bus_format = MEDIA_BUS_FMT_RGB888_2X12_LE; > + break; > + case 24: > + dvi->bus_format = MEDIA_BUS_FMT_RGB888_1X24; > + break; > + default: Maybe an error message here (possibly just dev_dbg()) ? Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > + return -EINVAL; > + } > + > /* Get the setup and hold time from vendor-specific properties. */ > of_property_read_u32(dvi->dev->of_node, "ti,deskew", (u32 *)&deskew); > if (deskew < -4 || deskew > 3) -- Regards, Laurent Pinchart _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 2/2] drm/bridge: ti-tfp410: Set the bus_format 2019-04-01 12:41 ` [PATCH 2/2] drm/bridge: ti-tfp410: Set the bus_format Peter Ujfalusi 2019-04-02 11:49 ` Laurent Pinchart @ 2019-04-12 7:33 ` Andrzej Hajda 2019-04-12 7:40 ` Andrzej Hajda 1 sibling, 1 reply; 9+ messages in thread From: Andrzej Hajda @ 2019-04-12 7:33 UTC (permalink / raw) To: Peter Ujfalusi, tomi.valkeinen, laurent.pinchart, jsarha Cc: airlied, devicetree, dri-devel On 01.04.2019 14:41, Peter Ujfalusi wrote: > The TFP410 supports 24 bit, single-edge and 12 bit, dual-edge modes. > Depending on how many wires are used (24/12) the driver can set the correct > bus_format. > > If the information is not available in DT then assume 24 bit, single-edge > setup. > > Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com> The patch does not apply on drm-misc-next. Could you rebase it. -- Regards Andrzej > --- > drivers/gpu/drm/bridge/ti-tfp410.c | 17 +++++++++++++++++ > 1 file changed, 17 insertions(+) > > diff --git a/drivers/gpu/drm/bridge/ti-tfp410.c b/drivers/gpu/drm/bridge/ti-tfp410.c > index 6fc831eb3804..8b0e71bd3ca7 100644 > --- a/drivers/gpu/drm/bridge/ti-tfp410.c > +++ b/drivers/gpu/drm/bridge/ti-tfp410.c > @@ -29,6 +29,7 @@ struct tfp410 { > struct drm_connector connector; > unsigned int connector_type; > > + u32 bus_format; > struct i2c_adapter *ddc; > struct gpio_desc *hpd; > int hpd_irq; > @@ -139,6 +140,9 @@ static int tfp410_attach(struct drm_bridge *bridge) > return ret; > } > > + drm_display_info_set_bus_formats(&dvi->connector.display_info, > + &dvi->bus_format, 1); > + > drm_connector_attach_encoder(&dvi->connector, > bridge->encoder); > > @@ -197,6 +201,7 @@ static int tfp410_parse_timings(struct tfp410 *dvi, bool i2c) > struct drm_bridge_timings *timings = &dvi->timings; > struct device_node *ep; > u32 pclk_sample = 0; > + u32 bus_width = 24; > s32 deskew = 0; > > /* Start with defaults. */ > @@ -221,6 +226,7 @@ static int tfp410_parse_timings(struct tfp410 *dvi, bool i2c) > > /* Get the sampling edge from the endpoint. */ > of_property_read_u32(ep, "pclk-sample", &pclk_sample); > + of_property_read_u32(ep, "bus-width", &bus_width); > of_node_put(ep); > > timings->input_bus_flags = DRM_BUS_FLAG_DE_HIGH; > @@ -238,6 +244,17 @@ static int tfp410_parse_timings(struct tfp410 *dvi, bool i2c) > return -EINVAL; > } > > + switch (bus_width) { > + case 12: > + dvi->bus_format = MEDIA_BUS_FMT_RGB888_2X12_LE; > + break; > + case 24: > + dvi->bus_format = MEDIA_BUS_FMT_RGB888_1X24; > + break; > + default: > + return -EINVAL; > + } > + > /* Get the setup and hold time from vendor-specific properties. */ > of_property_read_u32(dvi->dev->of_node, "ti,deskew", (u32 *)&deskew); > if (deskew < -4 || deskew > 3) _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 2/2] drm/bridge: ti-tfp410: Set the bus_format 2019-04-12 7:33 ` Andrzej Hajda @ 2019-04-12 7:40 ` Andrzej Hajda 2019-04-17 12:36 ` Peter Ujfalusi 0 siblings, 1 reply; 9+ messages in thread From: Andrzej Hajda @ 2019-04-12 7:40 UTC (permalink / raw) To: Peter Ujfalusi, tomi.valkeinen, laurent.pinchart, jsarha Cc: airlied, devicetree, dri-devel On 12.04.2019 09:33, Andrzej Hajda wrote: > On 01.04.2019 14:41, Peter Ujfalusi wrote: >> The TFP410 supports 24 bit, single-edge and 12 bit, dual-edge modes. >> Depending on how many wires are used (24/12) the driver can set the correct >> bus_format. >> >> If the information is not available in DT then assume 24 bit, single-edge >> setup. >> >> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> > Reviewed-by: Andrzej Hajda <a.hajda@samsung.com> > > The patch does not apply on drm-misc-next. Could you rebase it. OK, with HPD patch applied it works, I will queue all three patches to drm-misc-next. Regards Andrzej > > > -- > Regards > Andrzej > >> --- >> drivers/gpu/drm/bridge/ti-tfp410.c | 17 +++++++++++++++++ >> 1 file changed, 17 insertions(+) >> >> diff --git a/drivers/gpu/drm/bridge/ti-tfp410.c b/drivers/gpu/drm/bridge/ti-tfp410.c >> index 6fc831eb3804..8b0e71bd3ca7 100644 >> --- a/drivers/gpu/drm/bridge/ti-tfp410.c >> +++ b/drivers/gpu/drm/bridge/ti-tfp410.c >> @@ -29,6 +29,7 @@ struct tfp410 { >> struct drm_connector connector; >> unsigned int connector_type; >> >> + u32 bus_format; >> struct i2c_adapter *ddc; >> struct gpio_desc *hpd; >> int hpd_irq; >> @@ -139,6 +140,9 @@ static int tfp410_attach(struct drm_bridge *bridge) >> return ret; >> } >> >> + drm_display_info_set_bus_formats(&dvi->connector.display_info, >> + &dvi->bus_format, 1); >> + >> drm_connector_attach_encoder(&dvi->connector, >> bridge->encoder); >> >> @@ -197,6 +201,7 @@ static int tfp410_parse_timings(struct tfp410 *dvi, bool i2c) >> struct drm_bridge_timings *timings = &dvi->timings; >> struct device_node *ep; >> u32 pclk_sample = 0; >> + u32 bus_width = 24; >> s32 deskew = 0; >> >> /* Start with defaults. */ >> @@ -221,6 +226,7 @@ static int tfp410_parse_timings(struct tfp410 *dvi, bool i2c) >> >> /* Get the sampling edge from the endpoint. */ >> of_property_read_u32(ep, "pclk-sample", &pclk_sample); >> + of_property_read_u32(ep, "bus-width", &bus_width); >> of_node_put(ep); >> >> timings->input_bus_flags = DRM_BUS_FLAG_DE_HIGH; >> @@ -238,6 +244,17 @@ static int tfp410_parse_timings(struct tfp410 *dvi, bool i2c) >> return -EINVAL; >> } >> >> + switch (bus_width) { >> + case 12: >> + dvi->bus_format = MEDIA_BUS_FMT_RGB888_2X12_LE; >> + break; >> + case 24: >> + dvi->bus_format = MEDIA_BUS_FMT_RGB888_1X24; >> + break; >> + default: >> + return -EINVAL; >> + } >> + >> /* Get the setup and hold time from vendor-specific properties. */ >> of_property_read_u32(dvi->dev->of_node, "ti,deskew", (u32 *)&deskew); >> if (deskew < -4 || deskew > 3) > > _______________________________________________ > dri-devel mailing list > dri-devel@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 2/2] drm/bridge: ti-tfp410: Set the bus_format 2019-04-12 7:40 ` Andrzej Hajda @ 2019-04-17 12:36 ` Peter Ujfalusi 0 siblings, 0 replies; 9+ messages in thread From: Peter Ujfalusi @ 2019-04-17 12:36 UTC (permalink / raw) To: Andrzej Hajda, tomi.valkeinen, laurent.pinchart, jsarha Cc: airlied, devicetree, dri-devel Hi Andrzej, On 12/04/2019 10.40, Andrzej Hajda wrote: > On 12.04.2019 09:33, Andrzej Hajda wrote: >> On 01.04.2019 14:41, Peter Ujfalusi wrote: >>> The TFP410 supports 24 bit, single-edge and 12 bit, dual-edge modes. >>> Depending on how many wires are used (24/12) the driver can set the correct >>> bus_format. >>> >>> If the information is not available in DT then assume 24 bit, single-edge >>> setup. >>> >>> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> >> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com> >> >> The patch does not apply on drm-misc-next. Could you rebase it. > > > OK, with HPD patch applied it works, I will queue all three patches to > drm-misc-next. Thank you! - Péter > > > Regards > > Andrzej > > >> >> >> -- >> Regards >> Andrzej >> >>> --- >>> drivers/gpu/drm/bridge/ti-tfp410.c | 17 +++++++++++++++++ >>> 1 file changed, 17 insertions(+) >>> >>> diff --git a/drivers/gpu/drm/bridge/ti-tfp410.c b/drivers/gpu/drm/bridge/ti-tfp410.c >>> index 6fc831eb3804..8b0e71bd3ca7 100644 >>> --- a/drivers/gpu/drm/bridge/ti-tfp410.c >>> +++ b/drivers/gpu/drm/bridge/ti-tfp410.c >>> @@ -29,6 +29,7 @@ struct tfp410 { >>> struct drm_connector connector; >>> unsigned int connector_type; >>> >>> + u32 bus_format; >>> struct i2c_adapter *ddc; >>> struct gpio_desc *hpd; >>> int hpd_irq; >>> @@ -139,6 +140,9 @@ static int tfp410_attach(struct drm_bridge *bridge) >>> return ret; >>> } >>> >>> + drm_display_info_set_bus_formats(&dvi->connector.display_info, >>> + &dvi->bus_format, 1); >>> + >>> drm_connector_attach_encoder(&dvi->connector, >>> bridge->encoder); >>> >>> @@ -197,6 +201,7 @@ static int tfp410_parse_timings(struct tfp410 *dvi, bool i2c) >>> struct drm_bridge_timings *timings = &dvi->timings; >>> struct device_node *ep; >>> u32 pclk_sample = 0; >>> + u32 bus_width = 24; >>> s32 deskew = 0; >>> >>> /* Start with defaults. */ >>> @@ -221,6 +226,7 @@ static int tfp410_parse_timings(struct tfp410 *dvi, bool i2c) >>> >>> /* Get the sampling edge from the endpoint. */ >>> of_property_read_u32(ep, "pclk-sample", &pclk_sample); >>> + of_property_read_u32(ep, "bus-width", &bus_width); >>> of_node_put(ep); >>> >>> timings->input_bus_flags = DRM_BUS_FLAG_DE_HIGH; >>> @@ -238,6 +244,17 @@ static int tfp410_parse_timings(struct tfp410 *dvi, bool i2c) >>> return -EINVAL; >>> } >>> >>> + switch (bus_width) { >>> + case 12: >>> + dvi->bus_format = MEDIA_BUS_FMT_RGB888_2X12_LE; >>> + break; >>> + case 24: >>> + dvi->bus_format = MEDIA_BUS_FMT_RGB888_1X24; >>> + break; >>> + default: >>> + return -EINVAL; >>> + } >>> + >>> /* Get the setup and hold time from vendor-specific properties. */ >>> of_property_read_u32(dvi->dev->of_node, "ti,deskew", (u32 *)&deskew); >>> if (deskew < -4 || deskew > 3) >> >> _______________________________________________ >> dri-devel mailing list >> dri-devel@lists.freedesktop.org >> https://lists.freedesktop.org/mailman/listinfo/dri-devel > > Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2019-04-17 12:36 UTC | newest] Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2019-04-01 12:41 [PATCH 0/2] drm/bridge: ti-tfp410: Handle bus-format for 24/12 lines selection Peter Ujfalusi 2019-04-01 12:41 ` [PATCH 1/2] dt-bindings: display: tfp410: Add bus-width parameter property Peter Ujfalusi 2019-04-02 11:45 ` Laurent Pinchart 2019-04-06 6:06 ` Rob Herring 2019-04-01 12:41 ` [PATCH 2/2] drm/bridge: ti-tfp410: Set the bus_format Peter Ujfalusi 2019-04-02 11:49 ` Laurent Pinchart 2019-04-12 7:33 ` Andrzej Hajda 2019-04-12 7:40 ` Andrzej Hajda 2019-04-17 12:36 ` Peter Ujfalusi
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