[igt-dev] [PATCH i-g-t 0/3] Remove global igt_global_mmio

[igt-dev] [PATCH i-g-t 0/3] Remove global igt_global_mmio

[Daniel Mrzyglod]

This patchset remove global igt_global_mmio pointer and structures.
Motivation for this patch is to move global pointers. Current behaviour
limit no of concurrent PCI device. In a future there will be multiple 
PCI devices.

Daniel Mrzyglod (2):
  lib/igt_device: add igt_map_bar_region
  lib/intel_mmio: Remove global igt_global_mmio

Michał Winiarski (1):
  lib/igt_device: add igt_device_get_pci_addr by fd

 benchmarks/gem_latency.c      |  11 +-
 benchmarks/gem_wsim.c         |   8 +-
 lib/igt_device.c              | 158 ++++++++++++++++++++
 lib/igt_device.h              |   3 +
 lib/intel_io.h                |  93 +++++++-----
 lib/intel_iosf.c              |  82 +++++++----
 lib/intel_mmio.c              | 206 +++++++++++++++-----------
 tests/i915/gem_exec_latency.c |  10 +-
 tests/i915/gem_exec_parse.c   |  14 +-
 tests/i915/i915_pm_lpsp.c     |   8 +-
 tools/intel_audio_dump.c      | 267 +++++++++++++++++-----------------
 tools/intel_backlight.c       |  13 +-
 tools/intel_display_poller.c  |  13 +-
 tools/intel_forcewaked.c      |  11 +-
 tools/intel_gpu_time.c        |   7 +-
 tools/intel_infoframes.c      |  74 +++++-----
 tools/intel_l3_parity.c       |  12 +-
 tools/intel_lid.c             |   5 +-
 tools/intel_panel_fitter.c    |  29 ++--
 tools/intel_perf_counters.c   |  11 +-
 tools/intel_reg.c             |  33 +++--
 tools/intel_reg_checker.c     |   6 +-
 tools/intel_watermark.c       |  37 ++---
 23 files changed, 688 insertions(+), 423 deletions(-)

-- 
2.20.1

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[igt-dev] [PATCH i-g-t 1/3] lib/igt_device: add igt_device_get_pci_addr by fd

[Daniel Mrzyglod]

From: Michał Winiarski <michal.winiarski@intel.com>

This function get us in easy way pci adress.
It allows us to make things a little bit more generic.
Also, we now require fd rather than doing guesswork when it comes to pci address.

Signed-off-by: Michał Winiarski <michal.winiarski@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Mrzyglod <daniel.t.mrzyglod@intel.com>
---
 lib/igt_device.c | 117 +++++++++++++++++++++++++++++++++++++++++++++++
 lib/igt_device.h |   2 +
 2 files changed, 119 insertions(+)

diff --git a/lib/igt_device.c b/lib/igt_device.c
index 08f39c8b..d3934efb 100644
--- a/lib/igt_device.c
+++ b/lib/igt_device.c
@@ -21,11 +21,14 @@
  * IN THE SOFTWARE.
  *
  */
+#include <sys/types.h>
+#include <fcntl.h>
 
 #include <sys/stat.h>
 #include <sys/sysmacros.h>
 #include "igt.h"
 #include "igt_device.h"
+#include "igt_sysfs.h"
 
 int __igt_device_set_master(int fd)
 {
@@ -103,3 +106,117 @@ int igt_device_get_card_index(int fd)
 
 	return minor(st.st_rdev);
 }
+
+#define IGT_DEV_PATH_LEN 80
+
+static bool igt_device_is_pci(int fd)
+{
+	char path[IGT_DEV_PATH_LEN];
+	char *subsystem;
+	int sysfs;
+	int len;
+
+	if ((sysfs = igt_sysfs_open(fd)) == -1)
+		return false;
+
+	len = readlinkat(sysfs, "device/subsystem", path, sizeof(path) - 1);
+	if (len == -1)
+		return false;
+	path[len] = '\0';
+
+	subsystem = strrchr(path, '/');
+	if (!subsystem)
+		return false;
+
+	return strcmp(subsystem, "/pci") == 0;
+}
+
+struct igt_pci_addr {
+	unsigned int domain;
+	unsigned int bus;
+	unsigned int device;
+	unsigned int function;
+};
+
+static int igt_device_get_pci_addr(int fd, struct igt_pci_addr *pci)
+{
+	char path[IGT_DEV_PATH_LEN];
+	char *buf;
+	int sysfs;
+	int len;
+
+	if (!igt_device_is_pci(fd))
+		return -ENODEV;
+
+	if ((sysfs = igt_sysfs_open(fd)) == -1)
+		return -ENOENT;
+
+	len = readlinkat(sysfs, "device", path, sizeof(path) - 1);
+	if (len == -1)
+		return -ENOENT;
+	path[len] = '\0';
+
+	buf = strrchr(path, '/');
+	if (!buf)
+		return -ENOENT;
+
+	if (sscanf(buf, "/%4x:%2x:%2x.%2x",
+		   &pci->domain, &pci->bus,
+		   &pci->device, &pci->function) != 4) {
+		igt_warn("Unable to extract PCI device address from '%s'\n", buf);
+		return -ENOENT;
+	}
+
+	return 0;
+}
+
+static struct pci_device *__igt_device_get_pci_device(int fd)
+{
+	struct igt_pci_addr pci_addr;
+	struct pci_device *pci_dev;
+
+	if (igt_device_get_pci_addr(fd, &pci_addr)) {
+		igt_warn("Unable to find device PCI address\n");
+		return NULL;
+	}
+
+	if (pci_system_init()) {
+		igt_warn("Couldn't initialize PCI system\n");
+		return NULL;
+	}
+
+	pci_dev = pci_device_find_by_slot(pci_addr.domain,
+					  pci_addr.bus,
+					  pci_addr.device,
+					  pci_addr.function);
+	if (!pci_dev) {
+		igt_warn("Couldn't find PCI device\n");
+		return NULL;
+	}
+
+	if (pci_device_probe(pci_dev)) {
+		igt_warn("Couldn't probe PCI device\n");
+		return NULL;
+	}
+
+	return pci_dev;
+}
+
+/**
+ * igt_device_get_pci_device:
+ *
+ * @fd: the device
+ *
+ * Looks up the main graphics pci device using libpciaccess.
+ *
+ * Returns:
+ * The pci_device, skips the test on any failures.
+ */
+struct pci_device *igt_device_get_pci_device(int fd)
+{
+	struct pci_device *pci_dev;
+
+	igt_require(pci_dev = __igt_device_get_pci_device(fd));
+
+	return pci_dev;
+}
diff --git a/lib/igt_device.h b/lib/igt_device.h
index 9d7dc2c3..860b3a8a 100644
--- a/lib/igt_device.h
+++ b/lib/igt_device.h
@@ -25,6 +25,7 @@
 #ifndef __IGT_DEVICE_H__
 #define __IGT_DEVICE_H__
 
+#include <stdint.h>
 int __igt_device_set_master(int fd);
 void igt_device_set_master(int fd);
 
@@ -32,5 +33,6 @@ int __igt_device_drop_master(int fd);
 void igt_device_drop_master(int fd);
 
 int igt_device_get_card_index(int fd);
+struct pci_device *igt_device_get_pci_device(int fd);
 
 #endif /* __IGT_DEVICE_H__ */
-- 
2.20.1

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Re: [igt-dev] [PATCH i-g-t 1/3] lib/igt_device: add igt_device_get_pci_addr by fd

[Katarzyna Dec]

On Thu, Apr 04, 2019 at 03:18:03PM +0200, Daniel Mrzyglod wrote:
> From: Michał Winiarski <michal.winiarski@intel.com>
> 
> This function get us in easy way pci adress.
s/adress/address/
> It allows us to make things a little bit more generic.
> Also, we now require fd rather than doing guesswork when it comes to pci address.
> 
> Signed-off-by: Michał Winiarski <michal.winiarski@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Signed-off-by: Daniel Mrzyglod <daniel.t.mrzyglod@intel.com>
> ---
>  lib/igt_device.c | 117 +++++++++++++++++++++++++++++++++++++++++++++++
>  lib/igt_device.h |   2 +
>  2 files changed, 119 insertions(+)
> 
> diff --git a/lib/igt_device.c b/lib/igt_device.c
> index 08f39c8b..d3934efb 100644
> --- a/lib/igt_device.c
> +++ b/lib/igt_device.c
> @@ -21,11 +21,14 @@
>   * IN THE SOFTWARE.
>   *
>   */
> +#include <sys/types.h>
> +#include <fcntl.h>
>  
>  #include <sys/stat.h>
>  #include <sys/sysmacros.h>
>  #include "igt.h"
>  #include "igt_device.h"
> +#include "igt_sysfs.h"
>  
>  int __igt_device_set_master(int fd)
>  {
> @@ -103,3 +106,117 @@ int igt_device_get_card_index(int fd)
>  
>  	return minor(st.st_rdev);
>  }
> +
> +#define IGT_DEV_PATH_LEN 80
> +
> +static bool igt_device_is_pci(int fd)
> +{
> +	char path[IGT_DEV_PATH_LEN];
> +	char *subsystem;
> +	int sysfs;
> +	int len;
> +
> +	if ((sysfs = igt_sysfs_open(fd)) == -1)
> +		return false;
Even checkpatch is returning error here - 'do not use assignment in if
condition'
> +
> +	len = readlinkat(sysfs, "device/subsystem", path, sizeof(path) - 1);
> +	if (len == -1)
> +		return false;
> +	path[len] = '\0';
> +
> +	subsystem = strrchr(path, '/');
> +	if (!subsystem)
> +		return false;
> +
> +	return strcmp(subsystem, "/pci") == 0;
> +}
> +
> +struct igt_pci_addr {
> +	unsigned int domain;
> +	unsigned int bus;
> +	unsigned int device;
> +	unsigned int function;
> +};
> +
> +static int igt_device_get_pci_addr(int fd, struct igt_pci_addr *pci)
> +{
> +	char path[IGT_DEV_PATH_LEN];
> +	char *buf;
> +	int sysfs;
> +	int len;
> +
> +	if (!igt_device_is_pci(fd))
> +		return -ENODEV;
> +
> +	if ((sysfs = igt_sysfs_open(fd)) == -1)
> +		return -ENOENT;
Same error from checkpatch as above.
Kasia
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Re: [igt-dev] [PATCH i-g-t 1/3] lib/igt_device: add igt_device_get_pci_addr by fd

[Petri Latvala]

On Thu, Apr 04, 2019 at 04:17:51PM +0200, Katarzyna Dec wrote:
> On Thu, Apr 04, 2019 at 03:18:03PM +0200, Daniel Mrzyglod wrote:
> > From: Michał Winiarski <michal.winiarski@intel.com>
> > 
> > This function get us in easy way pci adress.
> s/adress/address/
> > It allows us to make things a little bit more generic.
> > Also, we now require fd rather than doing guesswork when it comes to pci address.
> > 
> > Signed-off-by: Michał Winiarski <michal.winiarski@intel.com>
> > Cc: Chris Wilson <chris@chris-wilson.co.uk>
> > Signed-off-by: Daniel Mrzyglod <daniel.t.mrzyglod@intel.com>
> > ---
> >  lib/igt_device.c | 117 +++++++++++++++++++++++++++++++++++++++++++++++
> >  lib/igt_device.h |   2 +
> >  2 files changed, 119 insertions(+)
> > 
> > diff --git a/lib/igt_device.c b/lib/igt_device.c
> > index 08f39c8b..d3934efb 100644
> > --- a/lib/igt_device.c
> > +++ b/lib/igt_device.c
> > @@ -21,11 +21,14 @@
> >   * IN THE SOFTWARE.
> >   *
> >   */
> > +#include <sys/types.h>
> > +#include <fcntl.h>
> >  
> >  #include <sys/stat.h>
> >  #include <sys/sysmacros.h>
> >  #include "igt.h"
> >  #include "igt_device.h"
> > +#include "igt_sysfs.h"
> >  
> >  int __igt_device_set_master(int fd)
> >  {
> > @@ -103,3 +106,117 @@ int igt_device_get_card_index(int fd)
> >  
> >  	return minor(st.st_rdev);
> >  }
> > +
> > +#define IGT_DEV_PATH_LEN 80
> > +
> > +static bool igt_device_is_pci(int fd)
> > +{
> > +	char path[IGT_DEV_PATH_LEN];
> > +	char *subsystem;
> > +	int sysfs;
> > +	int len;
> > +
> > +	if ((sysfs = igt_sysfs_open(fd)) == -1)
> > +		return false;
> Even checkpatch is returning error here - 'do not use assignment in if
> condition'


Checkpatch is the one in the wrong here. That if statement is elegant,
valid and readable.


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Re: [igt-dev] [PATCH i-g-t 1/3] lib/igt_device: add igt_device_get_pci_addr by fd

[Jani Nikula]

On Mon, 08 Apr 2019, Petri Latvala <petri.latvala@intel.com> wrote:
> On Thu, Apr 04, 2019 at 04:17:51PM +0200, Katarzyna Dec wrote:
>> On Thu, Apr 04, 2019 at 03:18:03PM +0200, Daniel Mrzyglod wrote:
>> > From: Michał Winiarski <michal.winiarski@intel.com>
>> > 
>> > This function get us in easy way pci adress.
>> s/adress/address/
>> > It allows us to make things a little bit more generic.
>> > Also, we now require fd rather than doing guesswork when it comes to pci address.
>> > 
>> > Signed-off-by: Michał Winiarski <michal.winiarski@intel.com>
>> > Cc: Chris Wilson <chris@chris-wilson.co.uk>
>> > Signed-off-by: Daniel Mrzyglod <daniel.t.mrzyglod@intel.com>
>> > ---
>> >  lib/igt_device.c | 117 +++++++++++++++++++++++++++++++++++++++++++++++
>> >  lib/igt_device.h |   2 +
>> >  2 files changed, 119 insertions(+)
>> > 
>> > diff --git a/lib/igt_device.c b/lib/igt_device.c
>> > index 08f39c8b..d3934efb 100644
>> > --- a/lib/igt_device.c
>> > +++ b/lib/igt_device.c
>> > @@ -21,11 +21,14 @@
>> >   * IN THE SOFTWARE.
>> >   *
>> >   */
>> > +#include <sys/types.h>
>> > +#include <fcntl.h>
>> >  
>> >  #include <sys/stat.h>
>> >  #include <sys/sysmacros.h>
>> >  #include "igt.h"
>> >  #include "igt_device.h"
>> > +#include "igt_sysfs.h"
>> >  
>> >  int __igt_device_set_master(int fd)
>> >  {
>> > @@ -103,3 +106,117 @@ int igt_device_get_card_index(int fd)
>> >  
>> >  	return minor(st.st_rdev);
>> >  }
>> > +
>> > +#define IGT_DEV_PATH_LEN 80
>> > +
>> > +static bool igt_device_is_pci(int fd)
>> > +{
>> > +	char path[IGT_DEV_PATH_LEN];
>> > +	char *subsystem;
>> > +	int sysfs;
>> > +	int len;
>> > +
>> > +	if ((sysfs = igt_sysfs_open(fd)) == -1)
>> > +		return false;
>> Even checkpatch is returning error here - 'do not use assignment in if
>> condition'
>
>
> Checkpatch is the one in the wrong here. That if statement is elegant,
> valid and readable.

Here, your call, but in the kernel I'd have that split to assignment and
condition.

BR,
Jani.


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[igt-dev] [PATCH i-g-t 2/3] lib/igt_device: add igt_map_bar_region

[Daniel Mrzyglod]

This function use sysfs to map particular mmio region.

Signed-off-by: Daniel Mrzyglod <daniel.t.mrzyglod@intel.com>
---
 lib/igt_device.c | 41 +++++++++++++++++++++++++++++++++++++++++
 lib/igt_device.h |  1 +
 2 files changed, 42 insertions(+)

diff --git a/lib/igt_device.c b/lib/igt_device.c
index d3934efb..805109e5 100644
--- a/lib/igt_device.c
+++ b/lib/igt_device.c
@@ -220,3 +220,44 @@ struct pci_device *igt_device_get_pci_device(int fd)
 
 	return pci_dev;
 }
+
+/**
+ * igt_device_map_pci_bar_region:
+ *
+ * @fd: the device
+ * @mmio_bar: bar to be mapped
+ * @mmio_size: bar size
+ *
+ * Returns:
+ * The pointer for mmapped bar
+ */
+void *igt_device_map_pci_bar_region(int fd, int  mmio_bar, int mmio_size)
+{
+	struct igt_pci_addr pci_addr;
+	char filepath[4096];
+	int newfd;
+	void *igt_mmio = NULL;
+
+	if (igt_device_get_pci_addr(fd, &pci_addr)) {
+		igt_warn("Unable to find device PCI address\n");
+		return NULL;
+	}
+
+	sprintf(filepath, "/sys/devices/pci%.4x\:%.2x/%.4x\:%.2x\:%.2x.%.1x/resource%.1x",
+			pci_addr.domain,
+			pci_addr.bus,
+			pci_addr.domain,
+			pci_addr.bus,
+			pci_addr.device,
+			pci_addr.function,
+			mmio_bar);
+
+
+	newfd = open(filepath, O_RDWR | O_SYNC);
+	igt_mmio = mmap(0, mmio_size, PROT_READ | PROT_WRITE, MAP_SHARED, newfd, 0);
+
+	igt_fail_on_f(igt_mmio == MAP_FAILED,
+		      "Couldn't map MMIO region\n");
+
+	return igt_mmio;
+}
diff --git a/lib/igt_device.h b/lib/igt_device.h
index 860b3a8a..6ffc1d5e 100644
--- a/lib/igt_device.h
+++ b/lib/igt_device.h
@@ -34,5 +34,6 @@ void igt_device_drop_master(int fd);
 
 int igt_device_get_card_index(int fd);
 struct pci_device *igt_device_get_pci_device(int fd);
+void *igt_device_map_pci_bar_region(int fd, int  mmio_bar, int mmio_size);
 
 #endif /* __IGT_DEVICE_H__ */
-- 
2.20.1

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Re: [igt-dev] [PATCH i-g-t 2/3] lib/igt_device: add igt_map_bar_region

[Chris Wilson]

Quoting Daniel Mrzyglod (2019-04-04 14:18:04)
> This function use sysfs to map particular mmio region.
> 
> Signed-off-by: Daniel Mrzyglod <daniel.t.mrzyglod@intel.com>
> ---
>  lib/igt_device.c | 41 +++++++++++++++++++++++++++++++++++++++++
>  lib/igt_device.h |  1 +
>  2 files changed, 42 insertions(+)
> 
> diff --git a/lib/igt_device.c b/lib/igt_device.c
> index d3934efb..805109e5 100644
> --- a/lib/igt_device.c
> +++ b/lib/igt_device.c
> @@ -220,3 +220,44 @@ struct pci_device *igt_device_get_pci_device(int fd)
>  
>         return pci_dev;
>  }
> +
> +/**
> + * igt_device_map_pci_bar_region:
> + *
> + * @fd: the device
> + * @mmio_bar: bar to be mapped
> + * @mmio_size: bar size
> + *
> + * Returns:
> + * The pointer for mmapped bar
> + */
> +void *igt_device_map_pci_bar_region(int fd, int  mmio_bar, int mmio_size)
> +{
> +       struct igt_pci_addr pci_addr;
> +       char filepath[4096];
> +       int newfd;
> +       void *igt_mmio = NULL;
> +
> +       if (igt_device_get_pci_addr(fd, &pci_addr)) {
> +               igt_warn("Unable to find device PCI address\n");
> +               return NULL;
> +       }
> +
> +       sprintf(filepath, "/sys/devices/pci%.4x\:%.2x/%.4x\:%.2x\:%.2x.%.1x/resource%.1x",

Might as well use asprintf rather than a [4096]

Certainly snprintf is good habit (if irrelevant here).

> +                       pci_addr.domain,
> +                       pci_addr.bus,
> +                       pci_addr.domain,
> +                       pci_addr.bus,
> +                       pci_addr.device,
> +                       pci_addr.function,
> +                       mmio_bar);

> +
> +

Bonus
.

> +       newfd = open(filepath, O_RDWR | O_SYNC);
> +       igt_mmio = mmap(0, mmio_size, PROT_READ | PROT_WRITE, MAP_SHARED, newfd, 0);

Leaking newfd for fun and profit?

> +
> +       igt_fail_on_f(igt_mmio == MAP_FAILED,
> +                     "Couldn't map MMIO region\n");
> +
> +       return igt_mmio;
> +}
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Re: [igt-dev] [PATCH i-g-t 2/3] lib/igt_device: add igt_map_bar_region

[Katarzyna Dec]

On Thu, Apr 04, 2019 at 03:18:04PM +0200, Daniel Mrzyglod wrote:
> This function use sysfs to map particular mmio region.
s/use/uses/
> 
> Signed-off-by: Daniel Mrzyglod <daniel.t.mrzyglod@intel.com>
> ---
>  lib/igt_device.c | 41 +++++++++++++++++++++++++++++++++++++++++
>  lib/igt_device.h |  1 +
>  2 files changed, 42 insertions(+)
> 
> diff --git a/lib/igt_device.c b/lib/igt_device.c
> index d3934efb..805109e5 100644
> --- a/lib/igt_device.c
> +++ b/lib/igt_device.c
> @@ -220,3 +220,44 @@ struct pci_device *igt_device_get_pci_device(int fd)
>  
>  	return pci_dev;
>  }
> +
> +/**
> + * igt_device_map_pci_bar_region:
> + *
> + * @fd: the device
> + * @mmio_bar: bar to be mapped
> + * @mmio_size: bar size
> + *
> + * Returns:
> + * The pointer for mmapped bar
> + */
> +void *igt_device_map_pci_bar_region(int fd, int  mmio_bar, int mmio_size)
> +{
> +	struct igt_pci_addr pci_addr;
> +	char filepath[4096];
It would be better to have some variable here instead of 'magic' number.
> +	int newfd;
> +	void *igt_mmio = NULL;
> +
> +	if (igt_device_get_pci_addr(fd, &pci_addr)) {
> +		igt_warn("Unable to find device PCI address\n");
> +		return NULL;
> +	}
> +
> +	sprintf(filepath, "/sys/devices/pci%.4x\:%.2x/%.4x\:%.2x\:%.2x.%.1x/resource%.1x",
Even without warning from compiler this sprintf looks buggy. Is there any way we
can to it in a way to be sure it can be less error prone?
> +			pci_addr.domain,
> +			pci_addr.bus,
> +			pci_addr.domain,
> +			pci_addr.bus,
> +			pci_addr.device,
> +			pci_addr.function,
> +			mmio_bar);
> +
> +
> +	newfd = open(filepath, O_RDWR | O_SYNC);
> +	igt_mmio = mmap(0, mmio_size, PROT_READ | PROT_WRITE, MAP_SHARED, newfd, 0);
> +
> +	igt_fail_on_f(igt_mmio == MAP_FAILED,
> +		      "Couldn't map MMIO region\n");
> +
You're not closing fd on function end.
Kasia
> +	return igt_mmio;
> +}
> diff --git a/lib/igt_device.h b/lib/igt_device.h
> index 860b3a8a..6ffc1d5e 100644
> --- a/lib/igt_device.h
> +++ b/lib/igt_device.h
> @@ -34,5 +34,6 @@ void igt_device_drop_master(int fd);
>  
>  int igt_device_get_card_index(int fd);
>  struct pci_device *igt_device_get_pci_device(int fd);
> +void *igt_device_map_pci_bar_region(int fd, int  mmio_bar, int mmio_size);
>  
>  #endif /* __IGT_DEVICE_H__ */
> -- 
> 2.20.1
> 
> _______________________________________________
> igt-dev mailing list
> igt-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/igt-dev
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[igt-dev] [PATCH i-g-t 3/3] lib/intel_mmio: Remove global igt_global_mmio

[Daniel Mrzyglod]

In future tests there will be multiple PCI devices run at once.
It's good for them to have different mmio space.

Signed-off-by: Daniel Mrzyglod <daniel.t.mrzyglod@intel.com>
---
 benchmarks/gem_latency.c      |  11 +-
 benchmarks/gem_wsim.c         |   8 +-
 lib/intel_io.h                |  93 +++++++-----
 lib/intel_iosf.c              |  82 +++++++----
 lib/intel_mmio.c              | 206 +++++++++++++++-----------
 tests/i915/gem_exec_latency.c |  10 +-
 tests/i915/gem_exec_parse.c   |  14 +-
 tests/i915/i915_pm_lpsp.c     |   8 +-
 tools/intel_audio_dump.c      | 267 +++++++++++++++++-----------------
 tools/intel_backlight.c       |  13 +-
 tools/intel_display_poller.c  |  13 +-
 tools/intel_forcewaked.c      |  11 +-
 tools/intel_gpu_time.c        |   7 +-
 tools/intel_infoframes.c      |  74 +++++-----
 tools/intel_l3_parity.c       |  12 +-
 tools/intel_lid.c             |   5 +-
 tools/intel_panel_fitter.c    |  29 ++--
 tools/intel_perf_counters.c   |  11 +-
 tools/intel_reg.c             |  33 +++--
 tools/intel_reg_checker.c     |   6 +-
 tools/intel_watermark.c       |  37 ++---
 21 files changed, 527 insertions(+), 423 deletions(-)

diff --git a/benchmarks/gem_latency.c b/benchmarks/gem_latency.c
index c3fc4bf0..ea58098d 100644
--- a/benchmarks/gem_latency.c
+++ b/benchmarks/gem_latency.c
@@ -43,6 +43,7 @@
 #include <sys/poll.h>
 #include <sys/resource.h>
 #include "drm.h"
+#include "igt_device.h"
 
 #define LOCAL_I915_EXEC_FENCE_IN              (1<<16)
 #define LOCAL_I915_EXEC_FENCE_OUT             (1<<17)
@@ -55,9 +56,12 @@
 static int done;
 static int fd;
 static volatile uint32_t *timestamp_reg;
+struct mmio_data igt_global_mmio;
 
-#define REG(x) (volatile uint32_t *)((volatile char *)igt_global_mmio + x)
-#define REG_OFFSET(x) ((volatile char *)(x) - (volatile char *)igt_global_mmio)
+#define REG(x) \
+	(volatile uint32_t *)((volatile char *)igt_global_mmio.igt_mmio + x)
+#define REG_OFFSET(x) \
+	((volatile char *)(x) - (volatile char *)igt_global_mmio.igt_mmio)
 
 #if defined(__USE_XOPEN2K) && defined(gen7_safe_mmio)
 static pthread_spinlock_t timestamp_lock;
@@ -456,7 +460,8 @@ static int run(int seconds,
 	if (gen < 6)
 		return IGT_EXIT_SKIP; /* Needs BCS timestamp */
 
-	intel_register_access_init(intel_get_pci_device(), false, fd);
+	intel_register_access_init(igt_device_get_pci_device(fd), false, fd,
+				   &igt_global_mmio);
 
 	if (gen == 6)
 		timestamp_reg = REG(RCS_TIMESTAMP);
diff --git a/benchmarks/gem_wsim.c b/benchmarks/gem_wsim.c
index afb9644d..274182a3 100644
--- a/benchmarks/gem_wsim.c
+++ b/benchmarks/gem_wsim.c
@@ -50,6 +50,7 @@
 
 #include "intel_io.h"
 #include "igt_aux.h"
+#include "igt_device.h"
 #include "igt_rand.h"
 #include "igt_perf.h"
 #include "sw_sync.h"
@@ -57,6 +58,7 @@
 
 #include "ewma.h"
 
+struct mmio_data igt_global_mmio;
 #define LOCAL_I915_EXEC_FENCE_IN              (1<<16)
 #define LOCAL_I915_EXEC_FENCE_OUT             (1<<17)
 
@@ -229,7 +231,8 @@ static int fd;
 #define SEQNO_OFFSET(engine) (SEQNO_IDX(engine) * sizeof(uint32_t))
 
 #define RCS_TIMESTAMP (0x2000 + 0x358)
-#define REG(x) (volatile uint32_t *)((volatile char *)igt_global_mmio + x)
+#define REG(x) \
+	(volatile uint32_t *)((volatile char *)igt_global_mmio.igt_mmio + x)
 
 static const char *ring_str_map[NUM_ENGINES] = {
 	[RCS] = "RCS",
@@ -2223,7 +2226,8 @@ static void init_clocks(void)
 	uint32_t rcs_start, rcs_end;
 	double overhead, t;
 
-	intel_register_access_init(intel_get_pci_device(), false, fd);
+	intel_register_access_init(igt_device_get_pci_device(fd), false, fd,
+				   &igt_global_mmio);
 
 	if (verbose <= 1)
 		return;
diff --git a/lib/intel_io.h b/lib/intel_io.h
index 6014c485..35fab8e8 100644
--- a/lib/intel_io.h
+++ b/lib/intel_io.h
@@ -30,37 +30,67 @@
 
 #include <stdint.h>
 #include <pciaccess.h>
+#include <stdbool.h>
 
 /* register access helpers from intel_mmio.c */
-extern void *igt_global_mmio;
-void intel_mmio_use_pci_bar(struct pci_device *pci_dev);
-void intel_mmio_use_dump_file(char *file);
 
-int intel_register_access_init(struct pci_device *pci_dev, int safe, int fd);
-void intel_register_access_fini(void);
-uint32_t intel_register_read(uint32_t reg);
-void intel_register_write(uint32_t reg, uint32_t val);
-int intel_register_access_needs_fakewake(void);
+struct intel_register_range {
+	uint32_t base;
+	uint32_t size;
+	uint32_t flags;
+};
+
+struct intel_register_map {
+	struct intel_register_range *map;
+	uint32_t top;
+	uint32_t alignment_mask;
+};
+
+struct mmio_data {
+	int inited;
+	bool safe;
+	uint32_t i915_devid;
+	struct intel_register_map map;
+	int key;
+	void *igt_mmio;
+};
 
-uint32_t INREG(uint32_t reg);
-uint16_t INREG16(uint32_t reg);
-uint8_t INREG8(uint32_t reg);
-void OUTREG(uint32_t reg, uint32_t val);
-void OUTREG16(uint32_t reg, uint16_t val);
-void OUTREG8(uint32_t reg, uint8_t val);
+void intel_mmio_use_pci_bar(struct pci_device *pci_dev, int fd,
+			    struct mmio_data *mmio_data);
+void intel_mmio_use_dump_file(struct mmio_data *mmio_data, char *file);
+
+int intel_register_access_init(struct pci_device *pci_dev, int safe, int fd,
+			       struct mmio_data *mmio_data);
+void intel_register_access_fini(struct mmio_data *mmio_data);
+uint32_t intel_register_read(struct mmio_data *mmio_data, uint32_t reg);
+void intel_register_write(struct mmio_data *mmio_data, uint32_t reg,
+			  uint32_t val);
+int intel_register_access_needs_fakewake(struct mmio_data *mmio_data);
+
+uint32_t INREG(struct mmio_data *mmio_data, uint32_t reg);
+uint16_t INREG16(struct mmio_data *mmio_data, uint32_t reg);
+uint8_t INREG8(struct mmio_data *mmio_data, uint32_t reg);
+void OUTREG(struct mmio_data *mmio_data, uint32_t reg, uint32_t val);
+void OUTREG16(struct mmio_data *mmio_data, uint32_t reg, uint16_t val);
+void OUTREG8(struct mmio_data *mmio_data, uint32_t reg, uint8_t val);
 
 /* sideband access functions from intel_iosf.c */
-uint32_t intel_dpio_reg_read(uint32_t reg, int phy);
-void intel_dpio_reg_write(uint32_t reg, uint32_t val, int phy);
-uint32_t intel_flisdsi_reg_read(uint32_t reg);
-void intel_flisdsi_reg_write(uint32_t reg, uint32_t val);
-uint32_t intel_iosf_sb_read(uint32_t port, uint32_t reg);
-void intel_iosf_sb_write(uint32_t port, uint32_t reg, uint32_t val);
+uint32_t intel_dpio_reg_read(struct mmio_data *mmio_data, uint32_t reg,
+			     int phy);
+void intel_dpio_reg_write(struct mmio_data *mmio_data, uint32_t reg,
+			  uint32_t val, int phy);
+uint32_t intel_flisdsi_reg_read(struct mmio_data *mmio_data, uint32_t reg);
+void intel_flisdsi_reg_write(struct mmio_data *mmio_data, uint32_t reg,
+			     uint32_t val);
+uint32_t intel_iosf_sb_read(struct mmio_data *mmio_data, uint32_t port,
+			    uint32_t reg);
+void intel_iosf_sb_write(struct mmio_data *mmio_data, uint32_t port,
+			 uint32_t reg, uint32_t val);
 
-int intel_punit_read(uint32_t addr, uint32_t *val);
-int intel_punit_write(uint32_t addr, uint32_t val);
-int intel_nc_read(uint32_t addr, uint32_t *val);
-int intel_nc_write(uint32_t addr, uint32_t val);
+int intel_punit_read(struct mmio_data *mmio_data, uint32_t addr, uint32_t *val);
+int intel_punit_write(struct mmio_data *mmio_data, uint32_t addr, uint32_t val);
+int intel_nc_read(struct mmio_data *mmio_data, uint32_t addr, uint32_t *val);
+int intel_nc_write(struct mmio_data *mmio_data, uint32_t addr, uint32_t val);
 
 /* register maps from intel_reg_map.c */
 #ifndef __GTK_DOC_IGNORE__
@@ -71,19 +101,10 @@ int intel_nc_write(uint32_t addr, uint32_t val);
 #define INTEL_RANGE_RW		(INTEL_RANGE_READ | INTEL_RANGE_WRITE)
 #define INTEL_RANGE_END		(1<<31)
 
-struct intel_register_range {
-	uint32_t base;
-	uint32_t size;
-	uint32_t flags;
-};
-
-struct intel_register_map {
-	struct intel_register_range *map;
-	uint32_t top;
-	uint32_t alignment_mask;
-};
 struct intel_register_map intel_get_register_map(uint32_t devid);
-struct intel_register_range *intel_get_register_range(struct intel_register_map map, uint32_t offset, uint32_t mode);
+struct intel_register_range *intel_get_register_range(struct intel_register_map
+						      map, uint32_t offset,
+						      uint32_t mode);
 #endif /* __GTK_DOC_IGNORE__ */
 
 #endif /* INTEL_GPU_TOOLS_H */
diff --git a/lib/intel_iosf.c b/lib/intel_iosf.c
index 3b5a1370..52a885f5 100644
--- a/lib/intel_iosf.c
+++ b/lib/intel_iosf.c
@@ -19,8 +19,8 @@
 /* Private register write, double-word addressing, non-posted */
 #define SB_CRWRDA_NP   0x07
 
-static int vlv_sideband_rw(uint32_t port, uint8_t opcode, uint32_t addr,
-			   uint32_t *val)
+static int vlv_sideband_rw(struct mmio_data *mmio_data, uint32_t port,
+			   uint8_t opcode, uint32_t addr, uint32_t *val)
 {
 	int timeout = 0;
 	uint32_t cmd, devfn, be, bar;
@@ -34,22 +34,23 @@ static int vlv_sideband_rw(uint32_t port, uint8_t opcode, uint32_t addr,
 		(port << IOSF_PORT_SHIFT) | (be << IOSF_BYTE_ENABLES_SHIFT) |
 		(bar << IOSF_BAR_SHIFT);
 
-	if (intel_register_read(VLV_IOSF_DOORBELL_REQ) & IOSF_SB_BUSY) {
+	if (intel_register_read(mmio_data, VLV_IOSF_DOORBELL_REQ) &
+				IOSF_SB_BUSY) {
 		igt_warn("warning: pcode (%s) mailbox access failed\n", is_read ? "read" : "write");
 		return -EAGAIN;
 	}
 
-	intel_register_write(VLV_IOSF_ADDR, addr);
+	intel_register_write(mmio_data, VLV_IOSF_ADDR, addr);
 	if (!is_read)
-		intel_register_write(VLV_IOSF_DATA, *val);
+		intel_register_write(mmio_data, VLV_IOSF_DATA, *val);
 
-	intel_register_write(VLV_IOSF_DOORBELL_REQ, cmd);
+	intel_register_write(mmio_data, VLV_IOSF_DOORBELL_REQ, cmd);
 
 	do {
 		usleep(1);
 		timeout++;
-	} while (intel_register_read(VLV_IOSF_DOORBELL_REQ) & IOSF_SB_BUSY &&
-		 timeout < TIMEOUT_US);
+	} while (intel_register_read(mmio_data, VLV_IOSF_DOORBELL_REQ) &
+				     IOSF_SB_BUSY && timeout < TIMEOUT_US);
 
 	if (timeout >= TIMEOUT_US) {
 		igt_warn("timeout waiting for pcode %s (%d) to finish\n", is_read ? "read" : "write", addr);
@@ -57,14 +58,15 @@ static int vlv_sideband_rw(uint32_t port, uint8_t opcode, uint32_t addr,
 	}
 
 	if (is_read)
-		*val = intel_register_read(VLV_IOSF_DATA);
-	intel_register_write(VLV_IOSF_DATA, 0);
+		*val = intel_register_read(mmio_data, VLV_IOSF_DATA);
+	intel_register_write(mmio_data, VLV_IOSF_DATA, 0);
 
 	return 0;
 }
 
 /**
  * intel_punit_read:
+ * @mmio_data: structure data for particular pci device
  * @addr: register offset
  * @val: pointer to store the read result
  *
@@ -73,13 +75,14 @@ static int vlv_sideband_rw(uint32_t port, uint8_t opcode, uint32_t addr,
  * Returns:
  * 0 when the register access succeeded, negative errno code on failure.
  */
-int intel_punit_read(uint32_t addr, uint32_t *val)
+int intel_punit_read(struct mmio_data *mmio_data, uint32_t addr, uint32_t *val)
 {
-	return vlv_sideband_rw(IOSF_PORT_PUNIT, SB_CRRDDA_NP, addr, val);
+	return vlv_sideband_rw(mmio_data, IOSF_PORT_PUNIT, SB_CRRDDA_NP, addr, val);
 }
 
 /**
  * intel_punit_write:
+ * @mmio_data: structure data for particular pci device
  * @addr: register offset
  * @val: value to write
  *
@@ -88,13 +91,15 @@ int intel_punit_read(uint32_t addr, uint32_t *val)
  * Returns:
  * 0 when the register access succeeded, negative errno code on failure.
  */
-int intel_punit_write(uint32_t addr, uint32_t val)
+int intel_punit_write(struct mmio_data *mmio_data, uint32_t addr, uint32_t val)
 {
-	return vlv_sideband_rw(IOSF_PORT_PUNIT, SB_CRWRDA_NP, addr, &val);
+	return vlv_sideband_rw(mmio_data, IOSF_PORT_PUNIT, SB_CRWRDA_NP, addr,
+			       &val);
 }
 
 /**
  * intel_nc_read:
+ * @mmio_data: structure data for particular pci device
  * @addr: register offset
  * @val: pointer to starge for the read result
  *
@@ -103,13 +108,15 @@ int intel_punit_write(uint32_t addr, uint32_t val)
  * Returns:
  * 0 when the register access succeeded, negative errno code on failure.
  */
-int intel_nc_read(uint32_t addr, uint32_t *val)
+int intel_nc_read(struct mmio_data *mmio_data, uint32_t addr, uint32_t *val)
 {
-	return vlv_sideband_rw(IOSF_PORT_NC, SB_CRRDDA_NP, addr, val);
+	return vlv_sideband_rw(mmio_data, IOSF_PORT_NC, SB_CRRDDA_NP, addr,
+			       val);
 }
 
 /**
  * intel_nc_write:
+ * @mmio_data: structure data for particular pci device
  * @addr: register offset
  * @val: value to write
  *
@@ -118,13 +125,15 @@ int intel_nc_read(uint32_t addr, uint32_t *val)
  * Returns:
  * 0 when the register access succeeded, negative errno code on failure.
  */
-int intel_nc_write(uint32_t addr, uint32_t val)
+int intel_nc_write(struct mmio_data *mmio_data, uint32_t addr, uint32_t val)
 {
-	return vlv_sideband_rw(IOSF_PORT_NC, SB_CRWRDA_NP, addr, &val);
+	return vlv_sideband_rw(mmio_data, IOSF_PORT_NC, SB_CRWRDA_NP, addr,
+			       &val);
 }
 
 /**
  * intel_dpio_reg_read:
+ * @mmio_data: structure data for particular pci device
  * @reg: register offset
  * @phy: DPIO PHY to use
  *
@@ -133,57 +142,66 @@ int intel_nc_write(uint32_t addr, uint32_t val)
  * Returns:
  * The value read from the register.
  */
-uint32_t intel_dpio_reg_read(uint32_t reg, int phy)
+uint32_t intel_dpio_reg_read(struct mmio_data *mmio_data, uint32_t reg, int phy)
 {
 	uint32_t val;
 
 	if (phy == 0)
-		vlv_sideband_rw(IOSF_PORT_DPIO, SB_MRD_NP, reg, &val);
+		vlv_sideband_rw(mmio_data, IOSF_PORT_DPIO, SB_MRD_NP, reg,
+				&val);
 	else
-		vlv_sideband_rw(IOSF_PORT_DPIO_2, SB_MRD_NP, reg, &val);
+		vlv_sideband_rw(mmio_data, IOSF_PORT_DPIO_2, SB_MRD_NP, reg,
+				&val);
 	return val;
 }
 
 /**
  * intel_dpio_reg_write:
+ * @mmio_data: structure data for particular pci device
  * @reg: register offset
  * @val: value to write
  * @phy: dpio PHY to use
  *
  * 32-bit write of the register at @offset through the DPIO sideband port.
  */
-void intel_dpio_reg_write(uint32_t reg, uint32_t val, int phy)
+void intel_dpio_reg_write(struct mmio_data *mmio_data, uint32_t reg,
+			  uint32_t val, int phy)
 {
 	if (phy == 0)
-		vlv_sideband_rw(IOSF_PORT_DPIO, SB_MWR_NP, reg, &val);
+		vlv_sideband_rw(mmio_data, IOSF_PORT_DPIO, SB_MWR_NP, reg,
+				&val);
 	else
-		vlv_sideband_rw(IOSF_PORT_DPIO_2, SB_MWR_NP, reg, &val);
+		vlv_sideband_rw(mmio_data, IOSF_PORT_DPIO_2, SB_MWR_NP, reg,
+				&val);
 }
 
-uint32_t intel_flisdsi_reg_read(uint32_t reg)
+uint32_t intel_flisdsi_reg_read(struct mmio_data *mmio_data, uint32_t reg)
 {
 	uint32_t val = 0;
 
-	vlv_sideband_rw(IOSF_PORT_FLISDSI, SB_CRRDDA_NP, reg, &val);
+	vlv_sideband_rw(mmio_data, IOSF_PORT_FLISDSI, SB_CRRDDA_NP, reg, &val);
 
 	return val;
 }
 
-void intel_flisdsi_reg_write(uint32_t reg, uint32_t val)
+void intel_flisdsi_reg_write(struct mmio_data *mmio_data, uint32_t reg,
+			     uint32_t val)
 {
-	vlv_sideband_rw(IOSF_PORT_FLISDSI, SB_CRWRDA_NP, reg, &val);
+	vlv_sideband_rw(mmio_data, IOSF_PORT_FLISDSI, SB_CRWRDA_NP, reg, &val);
 }
 
-uint32_t intel_iosf_sb_read(uint32_t port, uint32_t reg)
+uint32_t intel_iosf_sb_read(struct mmio_data *mmio_data, uint32_t port,
+			    uint32_t reg)
 {
 	uint32_t val;
 
-	vlv_sideband_rw(port, SB_CRRDDA_NP, reg, &val);
+	vlv_sideband_rw(mmio_data, port, SB_CRRDDA_NP, reg, &val);
 
 	return val;
 }
 
-void intel_iosf_sb_write(uint32_t port, uint32_t reg, uint32_t val)
+void intel_iosf_sb_write(struct mmio_data *mmio_data, uint32_t port,
+			 uint32_t reg, uint32_t val)
 {
-	vlv_sideband_rw(port, SB_CRWRDA_NP, reg, &val);
+	vlv_sideband_rw(mmio_data, port, SB_CRWRDA_NP, reg, &val);
 }
diff --git a/lib/intel_mmio.c b/lib/intel_mmio.c
index a5458aeb..099c9ee5 100644
--- a/lib/intel_mmio.c
+++ b/lib/intel_mmio.c
@@ -45,6 +45,7 @@
 #include "igt_core.h"
 #include "igt_gt.h"
 #include "intel_chipset.h"
+#include "igt_device.h"
 
 /**
  * SECTION:intel_io
@@ -65,32 +66,17 @@
 
 #define FAKEKEY 0x2468ace0
 
-/**
- * igt_global_mmio:
- *
- * Pointer to the register range, initialized using intel_register_access_init()
- * or intel_mmio_use_dump_file(). It is not recommended to use this directly.
- */
-void *igt_global_mmio;
-
-static struct _mmio_data {
-	int inited;
-	bool safe;
-	uint32_t i915_devid;
-	struct intel_register_map map;
-	int key;
-} mmio_data;
-
 /**
  * intel_mmio_use_dump_file:
  * @file: name of the register dump file to open
+ * @mmio_data: structure data for particular pci device
  *
- * Sets up #igt_global_mmio to point at the data contained in @file. This allows
- * the same code to get reused for dumping and decoding from running hardware as
- * from register dumps.
+ * Sets up mmio_data->igt_mmio to point at the data contained in @file. T
+ * his allows the same code to get reused for dumping and decoding from running
+ * hardware as from register dumps.
  */
 void
-intel_mmio_use_dump_file(char *file)
+intel_mmio_use_dump_file(struct mmio_data *mmio_data, char *file)
 {
 	int fd;
 	struct stat st;
@@ -100,8 +86,9 @@ intel_mmio_use_dump_file(char *file)
 		      "Couldn't open %s\n", file);
 
 	fstat(fd, &st);
-	igt_global_mmio = mmap(NULL, st.st_size, PROT_READ|PROT_WRITE, MAP_PRIVATE, fd, 0);
-	igt_fail_on_f(igt_global_mmio == MAP_FAILED,
+	mmio_data->igt_mmio = mmap(NULL, st.st_size, PROT_READ | PROT_WRITE,
+				   MAP_PRIVATE, fd, 0);
+	igt_fail_on_f(mmio_data->igt_mmio == MAP_FAILED,
 		      "Couldn't mmap %s\n", file);
 	close(fd);
 }
@@ -109,17 +96,20 @@ intel_mmio_use_dump_file(char *file)
 /**
  * intel_mmio_use_pci_bar:
  * @pci_dev: intel gracphis pci device
+ * @mmio_data: structure data for particular pci device
+ * @fd: open device or -1 if we are going old path
  *
- * Sets up #igt_global_mmio to point at the mmio bar.
+ * Sets up mmio_data->igt_mmio to point at the mmio bar.
  *
  * @pci_dev can be obtained from intel_get_pci_device().
  */
 void
-intel_mmio_use_pci_bar(struct pci_device *pci_dev)
+intel_mmio_use_pci_bar(struct pci_device *pci_dev, int fd,
+		       struct mmio_data *mmio_data)
 {
 	uint32_t devid, gen;
 	int mmio_bar, mmio_size;
-	int error;
+	int err;
 
 	devid = pci_dev->device_id;
 	if (IS_GEN2(devid))
@@ -135,14 +125,28 @@ intel_mmio_use_pci_bar(struct pci_device *pci_dev)
 	else
 		mmio_size = 2*1024*1024;
 
-	error = pci_device_map_range (pci_dev,
-				      pci_dev->regions[mmio_bar].base_addr,
-				      mmio_size,
-				      PCI_DEV_MAP_FLAG_WRITABLE,
-				      &igt_global_mmio);
+	/* It's for some legacy tools existing in tree that require
+	 * working without driver
+	 */
+
+	if (fd == -1) {
+		err = pci_device_map_range(pci_dev,
+					   pci_dev->regions[mmio_bar].base_addr,
+					   mmio_size,
+					   PCI_DEV_MAP_FLAG_WRITABLE,
+					   &mmio_data->igt_mmio);
+
+		igt_fail_on_f(err != 0,
+			      "Couldn't map MMIO region\n");
+	} else {
+
+	/* This method is much more convenient when we have many concurrent
+	 * PCI devices
+	 */
+		mmio_data->igt_mmio = igt_device_map_pci_bar_region(fd, mmio_bar,
+							 mmio_size);
+	}
 
-	igt_fail_on_f(error != 0,
-		      "Couldn't map MMIO region\n");
 }
 
 static void
@@ -155,81 +159,83 @@ release_forcewake_lock(int fd)
  * intel_register_access_init:
  * @pci_dev: intel graphics pci device
  * @safe: use safe register access tables
+ * @fd: open device or -1 if we are going old path
+ * @mmio_data: structure data for particular pci device
  *
  * This initializes the new register access library, which supports forcewake
  * handling and also allows register access to be checked with an explicit
  * whitelist.
  *
- * It also initializes #igt_global_mmio like intel_mmio_use_pci_bar().
+ * It also initializes mmio_data->igt_mmio like intel_mmio_use_pci_bar().
  *
  * @pci_dev can be obtained from intel_get_pci_device().
  */
 int
-intel_register_access_init(struct pci_device *pci_dev, int safe, int fd)
+intel_register_access_init(struct pci_device *pci_dev, int safe, int fd,
+			   struct mmio_data *mmio_data)
 {
 	int ret;
 
-	/* after old API is deprecated, remove this */
-	if (igt_global_mmio == NULL)
-		intel_mmio_use_pci_bar(pci_dev);
-
-	igt_assert(igt_global_mmio != NULL);
+	memset(mmio_data, 0, sizeof(struct mmio_data));
+	intel_mmio_use_pci_bar(pci_dev, fd, mmio_data);
 
-	if (mmio_data.inited)
+	if (mmio_data->inited)
 		return -1;
 
-	mmio_data.safe = (safe != 0 &&
+	mmio_data->safe = (safe != 0 &&
 			intel_gen(pci_dev->device_id) >= 4) ? true : false;
-	mmio_data.i915_devid = pci_dev->device_id;
-	if (mmio_data.safe)
-		mmio_data.map = intel_get_register_map(mmio_data.i915_devid);
+	mmio_data->i915_devid = pci_dev->device_id;
+	if (mmio_data->safe)
+		mmio_data->map = intel_get_register_map(mmio_data->i915_devid);
 
 	/* Find where the forcewake lock is. Forcewake doesn't exist
 	 * gen < 6, but the debugfs should do the right things for us.
 	 */
 	ret = igt_open_forcewake_handle(fd);
 	if (ret == -1)
-		mmio_data.key = FAKEKEY;
+		mmio_data->key = FAKEKEY;
 	else
-		mmio_data.key = ret;
+		mmio_data->key = ret;
 
-	mmio_data.inited++;
+	mmio_data->inited++;
 	return 0;
 }
 
 static int
-intel_register_access_needs_wake(void)
+intel_register_access_needs_wake(struct mmio_data *mmio_data)
 {
-	return mmio_data.key != FAKEKEY;
+	return mmio_data->key != FAKEKEY;
 }
 
 /**
  * intel_register_access_needs_fakewake:
- *
+ * @mmio_data: structure data for particular pci device
  * Returns:
  * Non-zero when forcewake initialization failed.
  */
-int intel_register_access_needs_fakewake(void)
+int intel_register_access_needs_fakewake(struct mmio_data *mmio_data)
 {
-	return mmio_data.key == FAKEKEY;
+	return mmio_data->key == FAKEKEY;
 }
 
 /**
  * intel_register_access_fini:
+ * @mmio_data: structure data for particular pci device
  *
  * Clean up the register access helper initialized with
  * intel_register_access_init().
  */
 void
-intel_register_access_fini(void)
+intel_register_access_fini(struct mmio_data *mmio_data)
 {
-	if (mmio_data.key && intel_register_access_needs_wake())
-		release_forcewake_lock(mmio_data.key);
-	mmio_data.inited--;
+	if (mmio_data->key && intel_register_access_needs_wake(mmio_data))
+		release_forcewake_lock(mmio_data->key);
+	mmio_data->inited--;
 }
 
 /**
  * intel_register_read:
+ * @mmio_data: structure data for particular pci device
  * @reg: register offset
  *
  * 32-bit read of the register at @offset. This function only works when the new
@@ -242,20 +248,21 @@ intel_register_access_fini(void)
  * The value read from the register.
  */
 uint32_t
-intel_register_read(uint32_t reg)
+intel_register_read(struct mmio_data *mmio_data, uint32_t reg)
 {
 	struct intel_register_range *range;
+	void *igt_mmio = mmio_data->igt_mmio;
 	uint32_t ret;
 
-	igt_assert(mmio_data.inited);
+	igt_assert(mmio_data->inited);
 
-	if (intel_gen(mmio_data.i915_devid) >= 6)
-		igt_assert(mmio_data.key != -1);
+	if (intel_gen(mmio_data->i915_devid) >= 6)
+		igt_assert(mmio_data->key != -1);
 
-	if (!mmio_data.safe)
+	if (!mmio_data->safe)
 		goto read_out;
 
-	range = intel_get_register_range(mmio_data.map,
+	range = intel_get_register_range(mmio_data->map,
 					 reg,
 					 INTEL_RANGE_READ);
 
@@ -266,13 +273,14 @@ intel_register_read(uint32_t reg)
 	}
 
 read_out:
-	ret = *(volatile uint32_t *)((volatile char *)igt_global_mmio + reg);
+	ret = *(volatile uint32_t *)((volatile char *)igt_mmio + reg);
 out:
 	return ret;
 }
 
 /**
  * intel_register_write:
+ * @mmio_data: structure data for particular pci device
  * @reg: register offset
  * @val: value to write
  *
@@ -283,19 +291,20 @@ out:
  * white lists.
  */
 void
-intel_register_write(uint32_t reg, uint32_t val)
+intel_register_write(struct mmio_data *mmio_data, uint32_t reg, uint32_t val)
 {
 	struct intel_register_range *range;
+	void *igt_mmio = mmio_data->igt_mmio;
 
-	igt_assert(mmio_data.inited);
+	igt_assert(mmio_data->inited);
 
-	if (intel_gen(mmio_data.i915_devid) >= 6)
-		igt_assert(mmio_data.key != -1);
+	if (intel_gen(mmio_data->i915_devid) >= 6)
+		igt_assert(mmio_data->key != -1);
 
-	if (!mmio_data.safe)
+	if (!mmio_data->safe)
 		goto write_out;
 
-	range = intel_get_register_range(mmio_data.map,
+	range = intel_get_register_range(mmio_data->map,
 					 reg,
 					 INTEL_RANGE_WRITE);
 
@@ -303,63 +312,74 @@ intel_register_write(uint32_t reg, uint32_t val)
 		      "Register write blocked for safety ""(*0x%08x = 0x%x)\n", reg, val);
 
 write_out:
-	*(volatile uint32_t *)((volatile char *)igt_global_mmio + reg) = val;
+	*(volatile uint32_t *)((volatile char *)igt_mmio + reg) = val;
 }
 
 
 /**
  * INREG:
+ * @mmio_data: structure data for particular pci device
  * @reg: register offset
  *
  * 32-bit read of the register at offset @reg. This function only works when the
  * new register access helper is initialized with intel_register_access_init().
  *
- * This function directly accesses the #igt_global_mmio without safety checks.
+ * This function directly accesses mapped memory without safety checks.
  *
  * Returns:
  * The value read from the register.
  */
-uint32_t INREG(uint32_t reg)
+uint32_t INREG(struct mmio_data *mmio_data, uint32_t reg)
 {
-	return *(volatile uint32_t *)((volatile char *)igt_global_mmio + reg);
+	void *igt_mmio = mmio_data->igt_mmio;
+
+	return *(volatile uint32_t *)((volatile char *)igt_mmio + reg);
 }
 
 /**
  * INREG16:
+ * @mmio_data: structure data for particular pci device
  * @reg: register offset
  *
  * 16-bit read of the register at offset @reg. This function only works when the
  * new register access helper is initialized with intel_register_access_init().
  *
- * This function directly accesses the #igt_global_mmio without safety checks.
+ * This function directly accesses the mapped memory without safety checks.
  *
  * Returns:
  * The value read from the register.
  */
-uint16_t INREG16(uint32_t reg)
+uint16_t INREG16(struct mmio_data *mmio_data, uint32_t reg)
 {
-	return *(volatile uint16_t *)((volatile char *)igt_global_mmio + reg);
+	void *igt_mmio = mmio_data->igt_mmio;
+
+	return *(volatile uint16_t *)((volatile char *)igt_mmio + reg);
 }
 
 /**
  * INREG8:
+ * @mmio_data: structure data for particular pci device
  * @reg: register offset
  *
  * 8-bit read of the register at offset @reg. This function only works when the
  * new register access helper is initialized with intel_register_access_init().
  *
- * This function directly accesses the #igt_global_mmio without safety checks.
+ * This function directly accesses the mmio_data->igt_mmio without safety
+ * checks.
  *
  * Returns:
  * The value read from the register.
  */
-uint8_t INREG8(uint32_t reg)
+uint8_t INREG8(struct mmio_data *mmio_data, uint32_t reg)
 {
-	return *((volatile uint8_t *)igt_global_mmio + reg);
+	void *igt_mmio = mmio_data->igt_mmio;
+
+	return *((volatile uint8_t *)igt_mmio + reg);
 }
 
 /**
  * OUTREG:
+ * @mmio_data: structure data for particular pci device
  * @reg: register offset
  * @val: value to write
  *
@@ -367,15 +387,19 @@ uint8_t INREG8(uint32_t reg)
  * when the new register access helper is initialized with
  * intel_register_access_init().
  *
- * This function directly accesses the #igt_global_mmio without safety checks.
+ * This function directly accesses the mmio_data->igt_mmio without safety
+ * checks.
  */
-void OUTREG(uint32_t reg, uint32_t val)
+void OUTREG(struct mmio_data *mmio_data, uint32_t reg, uint32_t val)
 {
-	*(volatile uint32_t *)((volatile char *)igt_global_mmio + reg) = val;
+	void *igt_mmio = mmio_data->igt_mmio;
+
+	*(volatile uint32_t *)((volatile char *)igt_mmio + reg) = val;
 }
 
 /**
  * OUTREG16:
+ * @mmio_data: structure data for particular pci device
  * @reg: register offset
  * @val: value to write
  *
@@ -383,15 +407,19 @@ void OUTREG(uint32_t reg, uint32_t val)
  * when the new register access helper is initialized with
  * intel_register_access_init().
  *
- * This function directly accesses the #igt_global_mmio without safety checks.
+ * This function directly accesses the mmio_data->igt_mmio without safety
+ * checks.
  */
-void OUTREG16(uint32_t reg, uint16_t val)
+void OUTREG16(struct mmio_data *mmio_data, uint32_t reg, uint16_t val)
 {
-	*(volatile uint16_t *)((volatile char *)igt_global_mmio + reg) = val;
+	void *igt_mmio = mmio_data->igt_mmio;
+
+	*(volatile uint16_t *)((volatile char *)igt_mmio + reg) = val;
 }
 
 /**
  * OUTREG8:
+ * @mmio_data: structure data for particular pci device
  * @reg: register offset
  * @val: value to write
  *
@@ -399,9 +427,11 @@ void OUTREG16(uint32_t reg, uint16_t val)
  * when the new register access helper is initialized with
  * intel_register_access_init().
  *
- * This function directly accesses the #igt_global_mmio without safety checks.
+ * This function directly accesses the mapped memory without safety checks.
  */
-void OUTREG8(uint32_t reg, uint8_t val)
+void OUTREG8(struct mmio_data *mmio_data, uint32_t reg, uint8_t val)
 {
-	*((volatile uint8_t *)igt_global_mmio + reg) = val;
+	void *igt_mmio = mmio_data->igt_mmio;
+
+	*((volatile uint8_t *)igt_mmio + reg) = val;
 }
diff --git a/tests/i915/gem_exec_latency.c b/tests/i915/gem_exec_latency.c
index 39f441d2..6e62d298 100644
--- a/tests/i915/gem_exec_latency.c
+++ b/tests/i915/gem_exec_latency.c
@@ -41,6 +41,7 @@
 #include "drm.h"
 
 #include "igt_sysfs.h"
+#include "igt_device.h"
 #include "igt_vgem.h"
 #include "igt_dummyload.h"
 #include "igt_stats.h"
@@ -61,6 +62,7 @@
 
 static unsigned int ring_size;
 static double rcs_clock;
+struct mmio_data igt_global_mmio;
 
 static void
 poll_ring(int fd, unsigned ring, const char *name)
@@ -129,8 +131,9 @@ static void latency_on_ring(int fd,
 	uint64_t offset;
 	double gpu_latency;
 	int i, j;
+	void *igt_mmio = igt_global_mmio.igt_mmio;
 
-	reg = (volatile uint32_t *)((volatile char *)igt_global_mmio + RCS_TIMESTAMP);
+	reg = (volatile uint32_t *)((volatile char *)igt_mmio + RCS_TIMESTAMP);
 
 	memset(&execbuf, 0, sizeof(execbuf));
 	execbuf.buffers_ptr = to_user_pointer(&obj[1]);
@@ -645,7 +648,7 @@ static double clockrate(int i915, int reg)
 	if (igt_ioctl(i915, DRM_IOCTL_I915_GETPARAM, &gp) == 0)
 		return cs_timestamp_freq;
 
-	mmio = (volatile uint32_t *)((volatile char *)igt_global_mmio + reg);
+	mmio = (volatile uint32_t *)((volatile char *)igt_global_mmio.igt_mmio + reg);
 
 	t_start = igt_nsec_elapsed(&tv);
 	r_start = *mmio;
@@ -666,6 +669,7 @@ igt_main
 	const struct intel_execution_engine *e;
 	int device = -1;
 
+
 	igt_fixture {
 		device = drm_open_driver(DRIVER_INTEL);
 		igt_require_gem(device);
@@ -680,7 +684,7 @@ igt_main
 		if (ring_size > 1024)
 			ring_size = 1024;
 
-		intel_register_access_init(intel_get_pci_device(), false, device);
+		intel_register_access_init(igt_device_get_pci_device(device), false, device, &igt_global_mmio);
 		rcs_clock = clockrate(device, RCS_TIMESTAMP);
 		igt_info("RCS timestamp clock: %.0fKHz, %.1fns\n",
 			 rcs_clock / 1e3, 1e9 / rcs_clock);
diff --git a/tests/i915/gem_exec_parse.c b/tests/i915/gem_exec_parse.c
index 62e8d0a5..79b42af3 100644
--- a/tests/i915/gem_exec_parse.c
+++ b/tests/i915/gem_exec_parse.c
@@ -27,7 +27,7 @@
 #include <stdint.h>
 #include <stdio.h>
 #include <errno.h>
-
+#include "igt_device.h"
 #include <drm.h>
 
 #ifndef I915_PARAM_CMD_PARSER_VERSION
@@ -57,6 +57,7 @@
 #define   PIPE_CONTROL_LRI_POST_OP (1<<23)
 
 static int parser_version;
+struct mmio_data igt_global_mmio;
 
 static int command_parser_version(int fd)
 {
@@ -284,9 +285,9 @@ test_lri(int fd, uint32_t handle, struct test_lri *test)
 		  test->name, test->reg, test->test_val,
 		  expected_errno, expect);
 
-	intel_register_write(test->reg, test->init_val);
+	intel_register_write(&igt_global_mmio, test->reg, test->init_val);
 
-	igt_assert_eq_u32((intel_register_read(test->reg) &
+	igt_assert_eq_u32((intel_register_read(&igt_global_mmio, test->reg) &
 			   test->read_mask),
 			  test->init_val);
 
@@ -296,7 +297,7 @@ test_lri(int fd, uint32_t handle, struct test_lri *test)
 		   expected_errno);
 	gem_sync(fd, handle);
 
-	igt_assert_eq_u32((intel_register_read(test->reg) &
+	igt_assert_eq_u32((intel_register_read(&igt_global_mmio, test->reg) &
 			   test->read_mask),
 			  expect);
 }
@@ -430,6 +431,7 @@ igt_main
 	uint32_t handle;
 	int fd;
 
+
 	igt_fixture {
 		fd = drm_open_driver(DRIVER_INTEL);
 		igt_require_gem(fd);
@@ -530,7 +532,7 @@ igt_main
 #undef REG
 
 		igt_fixture {
-			intel_register_access_init(intel_get_pci_device(), 0, fd);
+			intel_register_access_init(igt_device_get_pci_device(fd), 0, fd, &igt_global_mmio);
 		}
 
 		for (int i = 0; i < ARRAY_SIZE(lris); i++) {
@@ -543,7 +545,7 @@ igt_main
 		}
 
 		igt_fixture {
-			intel_register_access_fini();
+			intel_register_access_fini(&igt_global_mmio);
 		}
 	}
 
diff --git a/tests/i915/i915_pm_lpsp.c b/tests/i915/i915_pm_lpsp.c
index b319dbe9..bfbd23dd 100644
--- a/tests/i915/i915_pm_lpsp.c
+++ b/tests/i915/i915_pm_lpsp.c
@@ -30,6 +30,8 @@
 #include <fcntl.h>
 #include <unistd.h>
 
+#include "igt_device.h"
+struct mmio_data igt_global_mmio;
 
 static bool supports_lpsp(uint32_t devid)
 {
@@ -40,7 +42,7 @@ static bool lpsp_is_enabled(int drm_fd)
 {
 	uint32_t val;
 
-	val = INREG(HSW_PWR_WELL_CTL2);
+	val = INREG(&igt_global_mmio, HSW_PWR_WELL_CTL2);
 	return !(val & HSW_PWR_WELL_STATE_ENABLED);
 }
 
@@ -210,7 +212,7 @@ igt_main
 
 		igt_require(supports_lpsp(devid));
 
-		intel_register_access_init(intel_get_pci_device(), 0, drm_fd);
+		intel_register_access_init(igt_device_get_pci_device(drm_fd), 0, drm_fd, &igt_global_mmio);
 
 		kmstest_set_vt_graphics_mode();
 	}
@@ -227,7 +229,7 @@ igt_main
 	igt_fixture {
 		int i;
 
-		intel_register_access_fini();
+		intel_register_access_fini(&igt_global_mmio);
 		for (i = 0; i < drm_res->count_connectors; i++)
 			drmModeFreeConnector(drm_connectors[i]);
 		drmModeFreeResources(drm_res);
diff --git a/tools/intel_audio_dump.c b/tools/intel_audio_dump.c
index 90260a2f..5a55235c 100644
--- a/tools/intel_audio_dump.c
+++ b/tools/intel_audio_dump.c
@@ -38,6 +38,7 @@
 #include "drmtest.h"
 
 static uint32_t devid;
+struct mmio_data igt_global_mmio;
 
 static int aud_reg_base = 0;	/* base address of audio registers */
 static int disp_reg_base = 0;	/* base address of display registers */
@@ -67,23 +68,23 @@ static int disp_reg_base = 0;	/* base address of display registers */
 
 #define dump_reg(reg, desc)					\
 	do {							\
-		dword = INREG(reg);	\
+		dword = INREG(&igt_global_mmio, reg);	\
 		printf("%-21s(%#x) 0x%08x  %s\n", # reg, reg, dword, desc);	\
 	} while (0)
 
 #define dump_disp_reg(reg, desc)					\
 	do {							\
-		dword = INREG(disp_reg_base + reg);	\
+		dword = INREG(&igt_global_mmio, disp_reg_base + reg);	\
 		printf("%-21s(%#x) 0x%08x  %s\n", # reg, reg, dword, desc);	\
 	} while (0)
 
 #define dump_aud_reg(reg, desc)					\
 	do {							\
-		dword = INREG(aud_reg_base + reg);	\
+		dword = INREG(&igt_global_mmio, aud_reg_base + reg);	\
 		printf("%-21s(%#x) 0x%08x  %s\n", # reg, reg, dword, desc);	\
 	} while (0)
 
-#define read_aud_reg(reg)	INREG(aud_reg_base + (reg))
+#define read_aud_reg(reg)	INREG(&igt_global_mmio, aud_reg_base + (reg))
 
 static int get_num_pipes(void)
 {
@@ -532,31 +533,31 @@ static void dump_eaglelake(void)
 
 	printf("\nDetails:\n\n");
 
-	dword = INREG(AUD_VID_DID);
+	dword = INREG(&igt_global_mmio, AUD_VID_DID);
 	printf("AUD_VID_DID vendor id\t\t\t0x%x\n", dword >> 16);
 	printf("AUD_VID_DID device id\t\t\t0x%x\n", dword & 0xffff);
 
-	dword = INREG(AUD_RID);
+	dword = INREG(&igt_global_mmio, AUD_RID);
 	printf("AUD_RID major revision\t\t\t0x%lx\n", BITS(dword, 23, 20));
 	printf("AUD_RID minor revision\t\t\t0x%lx\n", BITS(dword, 19, 16));
 	printf("AUD_RID revision id\t\t\t0x%lx\n",    BITS(dword, 15, 8));
 	printf("AUD_RID stepping id\t\t\t0x%lx\n",    BITS(dword, 7, 0));
 
-	dword = INREG(SDVOB);
+	dword = INREG(&igt_global_mmio, SDVOB);
 	printf("SDVOB enable\t\t\t\t%u\n",      !!(dword & SDVO_ENABLE));
 	printf("SDVOB HDMI encoding\t\t\t%u\n", !!(dword & SDVO_ENCODING_HDMI));
 	printf("SDVOB SDVO encoding\t\t\t%u\n", !!(dword & SDVO_ENCODING_SDVO));
 	printf("SDVOB null packets\t\t\t%u\n",  !!(dword & SDVO_NULL_PACKETS_DURING_VSYNC));
 	printf("SDVOB audio enabled\t\t\t%u\n", !!(dword & SDVO_AUDIO_ENABLE));
 
-	dword = INREG(SDVOC);
+	dword = INREG(&igt_global_mmio, SDVOC);
 	printf("SDVOC enable\t\t\t\t%u\n",      !!(dword & SDVO_ENABLE));
 	printf("SDVOC HDMI encoding\t\t\t%u\n", !!(dword & SDVO_ENCODING_HDMI));
 	printf("SDVOC SDVO encoding\t\t\t%u\n", !!(dword & SDVO_ENCODING_SDVO));
 	printf("SDVOC null packets\t\t\t%u\n",  !!(dword & SDVO_NULL_PACKETS_DURING_VSYNC));
 	printf("SDVOC audio enabled\t\t\t%u\n", !!(dword & SDVO_AUDIO_ENABLE));
 
-	dword = INREG(PORT_HOTPLUG_EN);
+	dword = INREG(&igt_global_mmio, PORT_HOTPLUG_EN);
 	printf("PORT_HOTPLUG_EN DisplayPort/HDMI port B\t%ld\n", BIT(dword, 29)),
 	printf("PORT_HOTPLUG_EN DisplayPort/HDMI port C\t%ld\n", BIT(dword, 28)),
 	printf("PORT_HOTPLUG_EN DisplayPort port D\t%ld\n",      BIT(dword, 27)),
@@ -566,7 +567,7 @@ static void dump_eaglelake(void)
 	printf("PORT_HOTPLUG_EN TV\t\t\t%ld\n",    BIT(dword, 23)),
 	printf("PORT_HOTPLUG_EN CRT\t\t\t%ld\n",   BIT(dword, 9)),
 
-	dword = INREG(VIDEO_DIP_CTL);
+	dword = INREG(&igt_global_mmio, VIDEO_DIP_CTL);
 	printf("VIDEO_DIP_CTL enable graphics DIP\t%ld\n",     BIT(dword, 31)),
 	printf("VIDEO_DIP_CTL port select\t\t[0x%lx] %s\n",
 				BITS(dword, 30, 29), dip_port[BITS(dword, 30, 29)]);
@@ -581,46 +582,46 @@ static void dump_eaglelake(void)
 	printf("VIDEO_DIP_CTL DIP buffer size\t\t%lu\n", BITS(dword, 11, 8));
 	printf("VIDEO_DIP_CTL DIP address\t\t%lu\n", BITS(dword, 3, 0));
 
-	dword = INREG(AUD_CONFIG);
+	dword = INREG(&igt_global_mmio, AUD_CONFIG);
 	printf("AUD_CONFIG pixel clock\t\t\t[0x%lx] %s\n", BITS(dword, 19, 16),
 			OPNAME(pixel_clock, BITS(dword, 19, 16)));
 	printf("AUD_CONFIG fabrication enabled\t\t%lu\n", BITS(dword, 2, 2));
 	printf("AUD_CONFIG professional use allowed\t%lu\n", BIT(dword, 1));
 	printf("AUD_CONFIG fuse enabled\t\t\t%lu\n", BIT(dword, 0));
 
-	dword = INREG(AUD_DEBUG);
+	dword = INREG(&igt_global_mmio, AUD_DEBUG);
 	printf("AUD_DEBUG function reset\t\t%lu\n", BIT(dword, 0));
 
-	dword = INREG(AUD_SUBN_CNT);
+	dword = INREG(&igt_global_mmio, AUD_SUBN_CNT);
 	printf("AUD_SUBN_CNT starting node number\t0x%lx\n",  BITS(dword, 23, 16));
 	printf("AUD_SUBN_CNT total number of nodes\t0x%lx\n", BITS(dword, 7, 0));
 
-	dword = INREG(AUD_SUBN_CNT2);
+	dword = INREG(&igt_global_mmio, AUD_SUBN_CNT2);
 	printf("AUD_SUBN_CNT2 starting node number\t0x%lx\n",  BITS(dword, 24, 16));
 	printf("AUD_SUBN_CNT2 total number of nodes\t0x%lx\n", BITS(dword, 7, 0));
 
-	dword = INREG(AUD_FUNC_GRP);
+	dword = INREG(&igt_global_mmio, AUD_FUNC_GRP);
 	printf("AUD_FUNC_GRP unsol capable\t\t%lu\n", BIT(dword, 8));
 	printf("AUD_FUNC_GRP node type\t\t\t0x%lx\n", BITS(dword, 7, 0));
 
-	dword = INREG(AUD_GRP_CAP);
+	dword = INREG(&igt_global_mmio, AUD_GRP_CAP);
 	printf("AUD_GRP_CAP beep 0\t\t\t%lu\n",       BIT(dword, 16));
 	printf("AUD_GRP_CAP input delay\t\t\t%lu\n",  BITS(dword, 11, 8));
 	printf("AUD_GRP_CAP output delay\t\t%lu\n",   BITS(dword, 3, 0));
 
-	dword = INREG(AUD_PWRST);
+	dword = INREG(&igt_global_mmio, AUD_PWRST);
 	printf("AUD_PWRST device power state\t\t%s\n",
 			power_state[BITS(dword, 5, 4)]);
 	printf("AUD_PWRST device power state setting\t%s\n",
 			power_state[BITS(dword, 1, 0)]);
 
-	dword = INREG(AUD_SUPPWR);
+	dword = INREG(&igt_global_mmio, AUD_SUPPWR);
 	printf("AUD_SUPPWR support D0\t\t\t%lu\n", BIT(dword, 0));
 	printf("AUD_SUPPWR support D1\t\t\t%lu\n", BIT(dword, 1));
 	printf("AUD_SUPPWR support D2\t\t\t%lu\n", BIT(dword, 2));
 	printf("AUD_SUPPWR support D3\t\t\t%lu\n", BIT(dword, 3));
 
-	dword = INREG(AUD_OUT_CWCAP);
+	dword = INREG(&igt_global_mmio, AUD_OUT_CWCAP);
 	printf("AUD_OUT_CWCAP widget type\t\t0x%lx\n",  BITS(dword, 23, 20));
 	printf("AUD_OUT_CWCAP sample delay\t\t0x%lx\n", BITS(dword, 19, 16));
 	printf("AUD_OUT_CWCAP channel count\t\t%lu\n",
@@ -636,7 +637,7 @@ static void dump_eaglelake(void)
 	printf("AUD_OUT_CWCAP out amp present\t\t%lu\n",  BIT(dword, 2));
 	printf("AUD_OUT_CWCAP in amp present\t\t%lu\n",   BIT(dword, 1));
 
-	dword = INREG(AUD_OUT_DIG_CNVT);
+	dword = INREG(&igt_global_mmio, AUD_OUT_DIG_CNVT);
 	printf("AUD_OUT_DIG_CNVT SPDIF category\t\t0x%lx\n", BITS(dword, 14, 8));
 	printf("AUD_OUT_DIG_CNVT SPDIF level\t\t%lu\n",      BIT(dword, 7));
 	printf("AUD_OUT_DIG_CNVT professional\t\t%lu\n",     BIT(dword, 6));
@@ -647,16 +648,16 @@ static void dump_eaglelake(void)
 	printf("AUD_OUT_DIG_CNVT validity flag\t\t%lu\n",    BIT(dword, 1));
 	printf("AUD_OUT_DIG_CNVT digital enable\t\t%lu\n",   BIT(dword, 0));
 
-	dword = INREG(AUD_OUT_CH_STR);
+	dword = INREG(&igt_global_mmio, AUD_OUT_CH_STR);
 	printf("AUD_OUT_CH_STR stream id\t\t0x%lx\n",        BITS(dword, 7, 4));
 	printf("AUD_OUT_CH_STR lowest channel\t\t%lu\n",     BITS(dword, 3, 0));
 
-	dword = INREG(AUD_OUT_STR_DESC);
+	dword = INREG(&igt_global_mmio, AUD_OUT_STR_DESC);
 	printf("AUD_OUT_STR_DESC stream channels\t%lu\n",    BITS(dword, 3, 0) + 1);
 	printf("AUD_OUT_STR_DESC Bits per Sample\t[%#lx] %s\n",
 			BITS(dword, 6, 4), OPNAME(bits_per_sample, BITS(dword, 6, 4)));
 
-	dword = INREG(AUD_PINW_CAP);
+	dword = INREG(&igt_global_mmio, AUD_PINW_CAP);
 	printf("AUD_PINW_CAP widget type\t\t0x%lx\n",        BITS(dword, 23, 20));
 	printf("AUD_PINW_CAP sample delay\t\t0x%lx\n",       BITS(dword, 19, 16));
 	printf("AUD_PINW_CAP channel count\t\t%lu\n",
@@ -674,13 +675,13 @@ static void dump_eaglelake(void)
 	printf("AUD_PINW_CAP in amp present\t\t%lu\n",       BIT(dword, 1));
 
 
-	dword = INREG(AUD_PIN_CAP);
+	dword = INREG(&igt_global_mmio, AUD_PIN_CAP);
 	printf("AUD_PIN_CAP EAPD\t\t\t%lu\n",          BIT(dword, 16));
 	printf("AUD_PIN_CAP HDMI\t\t\t%lu\n",          BIT(dword, 7));
 	printf("AUD_PIN_CAP output\t\t\t%lu\n",        BIT(dword, 4));
 	printf("AUD_PIN_CAP presence detect\t\t%lu\n", BIT(dword, 2));
 
-	dword = INREG(AUD_PINW_CNTR);
+	dword = INREG(&igt_global_mmio, AUD_PINW_CNTR);
 	printf("AUD_PINW_CNTR mute status\t\t%lu\n",     BIT(dword, 8));
 	printf("AUD_PINW_CNTR out enable\t\t%lu\n",      BIT(dword, 6));
 	printf("AUD_PINW_CNTR amp mute status\t\t%lu\n", BIT(dword, 8));
@@ -689,10 +690,10 @@ static void dump_eaglelake(void)
 			BITS(dword, 2, 0),
 			OPNAME(stream_type, BITS(dword, 2, 0)));
 
-	dword = INREG(AUD_PINW_UNSOLRESP);
+	dword = INREG(&igt_global_mmio, AUD_PINW_UNSOLRESP);
 	printf("AUD_PINW_UNSOLRESP enable unsol resp\t%lu\n", BIT(dword, 31));
 
-	dword = INREG(AUD_CNTL_ST);
+	dword = INREG(&igt_global_mmio, AUD_CNTL_ST);
 	printf("AUD_CNTL_ST DIP audio enabled\t\t%lu\n", BIT(dword, 21));
 	printf("AUD_CNTL_ST DIP ACP enabled\t\t%lu\n",   BIT(dword, 22));
 	printf("AUD_CNTL_ST DIP ISRCx enabled\t\t%lu\n", BIT(dword, 23));
@@ -709,38 +710,38 @@ static void dump_eaglelake(void)
 	printf("AUD_CNTL_ST ELD bufsize\t\t\t%lu\n", BITS(dword, 13, 9));
 	printf("AUD_CNTL_ST ELD address\t\t\t%lu\n", BITS(dword, 8, 5));
 
-	dword = INREG(AUD_HDMIW_STATUS);
+	dword = INREG(&igt_global_mmio, AUD_HDMIW_STATUS);
 	printf("AUD_HDMIW_STATUS CDCLK/DOTCLK underrun\t%lu\n", BIT(dword, 31));
 	printf("AUD_HDMIW_STATUS CDCLK/DOTCLK overrun\t%lu\n",  BIT(dword, 30));
 	printf("AUD_HDMIW_STATUS BCLK/CDCLK underrun\t%lu\n",   BIT(dword, 29));
 	printf("AUD_HDMIW_STATUS BCLK/CDCLK overrun\t%lu\n",    BIT(dword, 28));
 
-	dword = INREG(AUD_CONV_CHCNT);
+	dword = INREG(&igt_global_mmio, AUD_CONV_CHCNT);
 	printf("AUD_CONV_CHCNT HDMI HBR enabled\t\t%lu\n", BITS(dword, 15, 14));
 	printf("AUD_CONV_CHCNT HDMI channel count\t%lu\n", BITS(dword, 11, 8) + 1);
 
 	printf("AUD_CONV_CHCNT HDMI channel mapping:\n");
 	for (i = 0; i < 8; i++) {
-		OUTREG(AUD_CONV_CHCNT, i);
-		dword = INREG(AUD_CONV_CHCNT);
+		OUTREG(&igt_global_mmio, AUD_CONV_CHCNT, i);
+		dword = INREG(&igt_global_mmio, AUD_CONV_CHCNT);
 		printf("\t\t\t\t\t[0x%x] %u => %lu\n", dword, i, BITS(dword, 7, 4));
 	}
 
 	printf("AUD_HDMIW_HDMIEDID HDMI ELD:\n\t");
-	dword = INREG(AUD_CNTL_ST);
+	dword = INREG(&igt_global_mmio, AUD_CNTL_ST);
 	dword &= ~BITMASK(8, 5);
-	OUTREG(AUD_CNTL_ST, dword);
+	OUTREG(&igt_global_mmio, AUD_CNTL_ST, dword);
 	for (i = 0; i < BITS(dword, 14, 10) / 4; i++)
-		printf("%08x ", htonl(INREG(AUD_HDMIW_HDMIEDID)));
+		printf("%08x ", htonl(INREG(&igt_global_mmio, AUD_HDMIW_HDMIEDID)));
 	printf("\n");
 
 	printf("AUD_HDMIW_INFOFR HDMI audio Infoframe:\n\t");
-	dword = INREG(AUD_CNTL_ST);
+	dword = INREG(&igt_global_mmio, AUD_CNTL_ST);
 	dword &= ~BITMASK(20, 18);
 	dword &= ~BITMASK(3, 0);
-	OUTREG(AUD_CNTL_ST, dword);
+	OUTREG(&igt_global_mmio, AUD_CNTL_ST, dword);
 	for (i = 0; i < 8; i++)
-		printf("%08x ", htonl(INREG(AUD_HDMIW_INFOFR)));
+		printf("%08x ", htonl(INREG(&igt_global_mmio, AUD_HDMIW_INFOFR)));
 	printf("\n");
 }
 
@@ -863,7 +864,7 @@ static void dump_cpt(void)
 
 	printf("\nDetails:\n\n");
 
-	dword = INREG(VIDEO_DIP_CTL_A);
+	dword = INREG(&igt_global_mmio, VIDEO_DIP_CTL_A);
 	printf("VIDEO_DIP_CTL_A Enable_Graphics_DIP\t\t\t%ld\n",     BIT(dword, 31)),
 	printf("VIDEO_DIP_CTL_A GCP_DIP_enable\t\t\t\t%ld\n",     BIT(dword, 25)),
 	printf("VIDEO_DIP_CTL_A Video_DIP_type_enable AVI\t\t%lu\n",       BIT(dword, 21));
@@ -877,7 +878,7 @@ static void dump_cpt(void)
 	printf("VIDEO_DIP_CTL_A Video_DIP_buffer_size\t\t\t%lu\n", BITS(dword, 11, 8));
 	printf("VIDEO_DIP_CTL_A Video_DIP_access_address\t\t%lu\n", BITS(dword, 3, 0));
 
-	dword = INREG(VIDEO_DIP_CTL_B);
+	dword = INREG(&igt_global_mmio, VIDEO_DIP_CTL_B);
 	printf("VIDEO_DIP_CTL_B Enable_Graphics_DIP\t\t\t%ld\n",     BIT(dword, 31)),
 	printf("VIDEO_DIP_CTL_B GCP_DIP_enable\t\t\t\t%ld\n",     BIT(dword, 25)),
 	printf("VIDEO_DIP_CTL_B Video_DIP_type_enable AVI\t\t%lu\n",       BIT(dword, 21));
@@ -891,7 +892,7 @@ static void dump_cpt(void)
 	printf("VIDEO_DIP_CTL_B Video_DIP_buffer_size\t\t\t%lu\n", BITS(dword, 11, 8));
 	printf("VIDEO_DIP_CTL_B Video_DIP_access_address\t\t%lu\n", BITS(dword, 3, 0));
 
-	dword = INREG(VIDEO_DIP_CTL_C);
+	dword = INREG(&igt_global_mmio, VIDEO_DIP_CTL_C);
 	printf("VIDEO_DIP_CTL_C Enable_Graphics_DIP\t\t\t%ld\n",     BIT(dword, 31)),
 	printf("VIDEO_DIP_CTL_C GCP_DIP_enable\t\t\t\t%ld\n",     BIT(dword, 25)),
 	printf("VIDEO_DIP_CTL_C Video_DIP_type_enable AVI\t\t%lu\n",       BIT(dword, 21));
@@ -905,17 +906,17 @@ static void dump_cpt(void)
 	printf("VIDEO_DIP_CTL_C Video_DIP_buffer_size\t\t\t%lu\n", BITS(dword, 11, 8));
 	printf("VIDEO_DIP_CTL_C Video_DIP_access_address\t\t%lu\n", BITS(dword, 3, 0));
 
-	dword = INREG(AUD_VID_DID);
+	dword = INREG(&igt_global_mmio, AUD_VID_DID);
 	printf("AUD_VID_DID vendor id\t\t\t\t\t0x%x\n", dword >> 16);
 	printf("AUD_VID_DID device id\t\t\t\t\t0x%x\n", dword & 0xffff);
 
-	dword = INREG(AUD_RID);
+	dword = INREG(&igt_global_mmio, AUD_RID);
 	printf("AUD_RID Major_Revision\t\t\t\t\t0x%lx\n", BITS(dword, 23, 20));
 	printf("AUD_RID Minor_Revision\t\t\t\t\t0x%lx\n", BITS(dword, 19, 16));
 	printf("AUD_RID Revision_Id\t\t\t\t\t0x%lx\n",    BITS(dword, 15, 8));
 	printf("AUD_RID Stepping_Id\t\t\t\t\t0x%lx\n",    BITS(dword, 7, 0));
 
-	dword = INREG(HDMIB);
+	dword = INREG(&igt_global_mmio, HDMIB);
 	printf("HDMIB Port_Enable\t\t\t\t\t%u\n",      !!(dword & SDVO_ENABLE));
 	printf("HDMIB Transcoder_Select\t\t\t\t\t[0x%lx] %s\n",
 			BITS(dword, 30, 29), transcoder_select[BITS(dword, 30, 29)]);
@@ -928,7 +929,7 @@ static void dump_cpt(void)
 	printf("HDMIB HDMI_or_DVI_Select\t\t\t\t%s\n", BIT(dword, 9) ? "HDMI" : "DVI");
 	printf("HDMIB Audio_Output_Enable\t\t\t\t%u\n", !!(dword & SDVO_AUDIO_ENABLE));
 
-	dword = INREG(HDMIC);
+	dword = INREG(&igt_global_mmio, HDMIC);
 	printf("HDMIC Port_Enable\t\t\t\t\t%u\n",      !!(dword & SDVO_ENABLE));
 	printf("HDMIC Transcoder_Select\t\t\t\t\t[0x%lx] %s\n",
 			BITS(dword, 30, 29), transcoder_select[BITS(dword, 30, 29)]);
@@ -941,7 +942,7 @@ static void dump_cpt(void)
 	printf("HDMIC HDMI_or_DVI_Select\t\t\t\t%s\n", BIT(dword, 9) ? "HDMI" : "DVI");
 	printf("HDMIC Audio_Output_Enable\t\t\t\t%u\n", !!(dword & SDVO_AUDIO_ENABLE));
 
-	dword = INREG(HDMID);
+	dword = INREG(&igt_global_mmio, HDMID);
 	printf("HDMID Port_Enable\t\t\t\t\t%u\n",      !!(dword & SDVO_ENABLE));
 	printf("HDMID Transcoder_Select\t\t\t\t\t[0x%lx] %s\n",
 			BITS(dword, 30, 29), transcoder_select[BITS(dword, 30, 29)]);
@@ -954,7 +955,7 @@ static void dump_cpt(void)
 	printf("HDMID HDMI_or_DVI_Select\t\t\t\t%s\n", BIT(dword, 9) ? "HDMI" : "DVI");
 	printf("HDMID Audio_Output_Enable\t\t\t\t%u\n", !!(dword & SDVO_AUDIO_ENABLE));
 
-	dword = INREG(DP_CTL_B);
+	dword = INREG(&igt_global_mmio, DP_CTL_B);
 	printf("DP_CTL_B DisplayPort_Enable\t\t\t\t%lu\n", BIT(dword, 31));
 	printf("DP_CTL_B Port_Width_Selection\t\t\t\t[0x%lx] %s\n",
 			BITS(dword, 21, 19), dp_port_width[BITS(dword, 21, 19)]);
@@ -962,7 +963,7 @@ static void dump_cpt(void)
 	printf("DP_CTL_B HDCP_Port_Select\t\t\t\t%lu\n", BIT(dword, 5));
 	printf("DP_CTL_B Audio_Output_Enable\t\t\t\t%lu\n", BIT(dword, 6));
 
-	dword = INREG(DP_CTL_C);
+	dword = INREG(&igt_global_mmio, DP_CTL_C);
 	printf("DP_CTL_C DisplayPort_Enable\t\t\t\t%lu\n", BIT(dword, 31));
 	printf("DP_CTL_C Port_Width_Selection\t\t\t\t[0x%lx] %s\n",
 			BITS(dword, 21, 19), dp_port_width[BITS(dword, 21, 19)]);
@@ -970,7 +971,7 @@ static void dump_cpt(void)
 	printf("DP_CTL_C HDCP_Port_Select\t\t\t\t%lu\n", BIT(dword, 5));
 	printf("DP_CTL_C Audio_Output_Enable\t\t\t\t%lu\n", BIT(dword, 6));
 
-	dword = INREG(DP_CTL_D);
+	dword = INREG(&igt_global_mmio, DP_CTL_D);
 	printf("DP_CTL_D DisplayPort_Enable\t\t\t\t%lu\n", BIT(dword, 31));
 	printf("DP_CTL_D Port_Width_Selection\t\t\t\t[0x%lx] %s\n",
 			BITS(dword, 21, 19), dp_port_width[BITS(dword, 21, 19)]);
@@ -978,7 +979,7 @@ static void dump_cpt(void)
 	printf("DP_CTL_D HDCP_Port_Select\t\t\t\t%lu\n", BIT(dword, 5));
 	printf("DP_CTL_D Audio_Output_Enable\t\t\t\t%lu\n", BIT(dword, 6));
 
-	dword = INREG(AUD_CONFIG_A);
+	dword = INREG(&igt_global_mmio, AUD_CONFIG_A);
 	printf("AUD_CONFIG_A  N_index_value\t\t\t\t[0x%lx] %s\n", BIT(dword, 29),
 			n_index_value[BIT(dword, 29)]);
 	printf("AUD_CONFIG_A  N_programming_enable\t\t\t%lu\n", BIT(dword, 28));
@@ -987,7 +988,7 @@ static void dump_cpt(void)
 	printf("AUD_CONFIG_A  Pixel_Clock_HDMI\t\t\t\t[0x%lx] %s\n", BITS(dword, 19, 16),
 			OPNAME(pixel_clock, BITS(dword, 19, 16)));
 	printf("AUD_CONFIG_A  Disable_NCTS\t\t\t\t%lu\n", BIT(dword, 3));
-	dword = INREG(AUD_CONFIG_B);
+	dword = INREG(&igt_global_mmio, AUD_CONFIG_B);
 	printf("AUD_CONFIG_B  N_index_value\t\t\t\t[0x%lx] %s\n", BIT(dword, 29),
 			n_index_value[BIT(dword, 29)]);
 	printf("AUD_CONFIG_B  N_programming_enable\t\t\t%lu\n", BIT(dword, 28));
@@ -996,7 +997,7 @@ static void dump_cpt(void)
 	printf("AUD_CONFIG_B  Pixel_Clock_HDMI\t\t\t\t[0x%lx] %s\n", BITS(dword, 19, 16),
 			OPNAME(pixel_clock, BITS(dword, 19, 16)));
 	printf("AUD_CONFIG_B  Disable_NCTS\t\t\t\t%lu\n", BIT(dword, 3));
-	dword = INREG(AUD_CONFIG_C);
+	dword = INREG(&igt_global_mmio, AUD_CONFIG_C);
 	printf("AUD_CONFIG_C  N_index_value\t\t\t\t[0x%lx] %s\n", BIT(dword, 29),
 			n_index_value[BIT(dword, 29)]);
 	printf("AUD_CONFIG_C  N_programming_enable\t\t\t%lu\n", BIT(dword, 28));
@@ -1006,36 +1007,36 @@ static void dump_cpt(void)
 			OPNAME(pixel_clock, BITS(dword, 19, 16)));
 	printf("AUD_CONFIG_C  Disable_NCTS\t\t\t\t%lu\n", BIT(dword, 3));
 
-	dword = INREG(AUD_CTS_ENABLE_A);
+	dword = INREG(&igt_global_mmio, AUD_CTS_ENABLE_A);
 	printf("AUD_CTS_ENABLE_A  Enable_CTS_or_M_programming\t\t%lu\n", BIT(dword, 20));
 	printf("AUD_CTS_ENABLE_A  CTS_M value Index\t\t\t%s\n", BIT(dword, 21) ? "CTS" : "M");
 	printf("AUD_CTS_ENABLE_A  CTS_programming\t\t\t%#lx\n", BITS(dword, 19, 0));
-	dword = INREG(AUD_CTS_ENABLE_B);
+	dword = INREG(&igt_global_mmio, AUD_CTS_ENABLE_B);
 	printf("AUD_CTS_ENABLE_B  Enable_CTS_or_M_programming\t\t%lu\n", BIT(dword, 20));
 	printf("AUD_CTS_ENABLE_B  CTS_M value Index\t\t\t%s\n", BIT(dword, 21) ? "CTS" : "M");
 	printf("AUD_CTS_ENABLE_B  CTS_programming\t\t\t%#lx\n", BITS(dword, 19, 0));
-	dword = INREG(AUD_CTS_ENABLE_C);
+	dword = INREG(&igt_global_mmio, AUD_CTS_ENABLE_C);
 	printf("AUD_CTS_ENABLE_C  Enable_CTS_or_M_programming\t\t%lu\n", BIT(dword, 20));
 	printf("AUD_CTS_ENABLE_C  CTS_M value Index\t\t\t%s\n", BIT(dword, 21) ? "CTS" : "M");
 	printf("AUD_CTS_ENABLE_C  CTS_programming\t\t\t%#lx\n", BITS(dword, 19, 0));
 
-	dword = INREG(AUD_MISC_CTRL_A);
+	dword = INREG(&igt_global_mmio, AUD_MISC_CTRL_A);
 	printf("AUD_MISC_CTRL_A  Sample_Fabrication_EN_bit\t\t%lu\n",	BIT(dword, 2));
 	printf("AUD_MISC_CTRL_A  Sample_present_Disable\t\t\t%lu\n",	BIT(dword, 8));
 	printf("AUD_MISC_CTRL_A  Output_Delay\t\t\t\t%lu\n",		BITS(dword, 7, 4));
 	printf("AUD_MISC_CTRL_A  Pro_Allowed\t\t\t\t%lu\n",			BIT(dword, 1));
-	dword = INREG(AUD_MISC_CTRL_B);
+	dword = INREG(&igt_global_mmio, AUD_MISC_CTRL_B);
 	printf("AUD_MISC_CTRL_B  Sample_Fabrication_EN_bit\t\t%lu\n",	BIT(dword, 2));
 	printf("AUD_MISC_CTRL_B  Sample_present_Disable\t\t\t%lu\n",	BIT(dword, 8));
 	printf("AUD_MISC_CTRL_B  Output_Delay\t\t\t\t%lu\n",		BITS(dword, 7, 4));
 	printf("AUD_MISC_CTRL_B  Pro_Allowed\t\t\t\t%lu\n",			BIT(dword, 1));
-	dword = INREG(AUD_MISC_CTRL_C);
+	dword = INREG(&igt_global_mmio, AUD_MISC_CTRL_C);
 	printf("AUD_MISC_CTRL_C  Sample_Fabrication_EN_bit\t\t%lu\n",	BIT(dword, 2));
 	printf("AUD_MISC_CTRL_C  Sample_present_Disable\t\t\t%lu\n",	BIT(dword, 8));
 	printf("AUD_MISC_CTRL_C  Output_Delay\t\t\t\t%lu\n",		BITS(dword, 7, 4));
 	printf("AUD_MISC_CTRL_C  Pro_Allowed\t\t\t\t%lu\n",			BIT(dword, 1));
 
-	dword = INREG(AUD_PWRST);
+	dword = INREG(&igt_global_mmio, AUD_PWRST);
 	printf("AUD_PWRST  Func_Grp_Dev_PwrSt_Curr                  \t%s\n", power_state[BITS(dword, 27, 26)]);
 	printf("AUD_PWRST  Func_Grp_Dev_PwrSt_Set                   \t%s\n", power_state[BITS(dword, 25, 24)]);
 	printf("AUD_PWRST  ConvertorA_Widget_Power_State_Current    \t%s\n", power_state[BITS(dword, 15, 14)]);
@@ -1051,7 +1052,7 @@ static void dump_cpt(void)
 	printf("AUD_PWRST  PinD_Widget_Power_State_Current          \t%s\n", power_state[BITS(dword, 11, 10)]);
 	printf("AUD_PWRST  PinD_Widget_Power_State_Set              \t%s\n", power_state[BITS(dword,  9,  8)]);
 
-	dword = INREG(AUD_PORT_EN_HD_CFG);
+	dword = INREG(&igt_global_mmio, AUD_PORT_EN_HD_CFG);
 	printf("AUD_PORT_EN_HD_CFG  Convertor_A_Digen\t\t\t%lu\n",	BIT(dword, 0));
 	printf("AUD_PORT_EN_HD_CFG  Convertor_B_Digen\t\t\t%lu\n",	BIT(dword, 1));
 	printf("AUD_PORT_EN_HD_CFG  Convertor_C_Digen\t\t\t%lu\n",	BIT(dword, 2));
@@ -1065,7 +1066,7 @@ static void dump_cpt(void)
 	printf("AUD_PORT_EN_HD_CFG  Port_C_Amp_Mute_Status\t\t%lu\n", BIT(dword, 21));
 	printf("AUD_PORT_EN_HD_CFG  Port_D_Amp_Mute_Status\t\t%lu\n", BIT(dword, 22));
 
-	dword = INREG(AUD_OUT_DIG_CNVT_A);
+	dword = INREG(&igt_global_mmio, AUD_OUT_DIG_CNVT_A);
 	printf("AUD_OUT_DIG_CNVT_A  V\t\t\t\t\t%lu\n",		BIT(dword, 1));
 	printf("AUD_OUT_DIG_CNVT_A  VCFG\t\t\t\t%lu\n",		BIT(dword, 2));
 	printf("AUD_OUT_DIG_CNVT_A  PRE\t\t\t\t\t%lu\n",		BIT(dword, 3));
@@ -1077,7 +1078,7 @@ static void dump_cpt(void)
 	printf("AUD_OUT_DIG_CNVT_A  Lowest_Channel_Number\t\t%lu\n", BITS(dword, 19, 16));
 	printf("AUD_OUT_DIG_CNVT_A  Stream_ID\t\t\t\t%lu\n",	BITS(dword, 23, 20));
 
-	dword = INREG(AUD_OUT_DIG_CNVT_B);
+	dword = INREG(&igt_global_mmio, AUD_OUT_DIG_CNVT_B);
 	printf("AUD_OUT_DIG_CNVT_B  V\t\t\t\t\t%lu\n",		BIT(dword, 1));
 	printf("AUD_OUT_DIG_CNVT_B  VCFG\t\t\t\t%lu\n",		BIT(dword, 2));
 	printf("AUD_OUT_DIG_CNVT_B  PRE\t\t\t\t\t%lu\n",		BIT(dword, 3));
@@ -1089,7 +1090,7 @@ static void dump_cpt(void)
 	printf("AUD_OUT_DIG_CNVT_B  Lowest_Channel_Number\t\t%lu\n", BITS(dword, 19, 16));
 	printf("AUD_OUT_DIG_CNVT_B  Stream_ID\t\t\t\t%lu\n",	BITS(dword, 23, 20));
 
-	dword = INREG(AUD_OUT_DIG_CNVT_C);
+	dword = INREG(&igt_global_mmio, AUD_OUT_DIG_CNVT_C);
 	printf("AUD_OUT_DIG_CNVT_C  V\t\t\t\t\t%lu\n",		BIT(dword, 1));
 	printf("AUD_OUT_DIG_CNVT_C  VCFG\t\t\t\t%lu\n",		BIT(dword, 2));
 	printf("AUD_OUT_DIG_CNVT_C  PRE\t\t\t\t\t%lu\n",		BIT(dword, 3));
@@ -1103,8 +1104,8 @@ static void dump_cpt(void)
 
 	printf("AUD_OUT_CH_STR  Converter_Channel_MAP	PORTB	PORTC	PORTD\n");
 	for (i = 0; i < 8; i++) {
-		OUTREG(AUD_OUT_CH_STR, i | (i << 8) | (i << 16));
-		dword = INREG(AUD_OUT_CH_STR);
+		OUTREG(&igt_global_mmio, AUD_OUT_CH_STR, i | (i << 8) | (i << 16));
+		dword = INREG(&igt_global_mmio, AUD_OUT_CH_STR);
 		printf("\t\t\t\t%lu\t%lu\t%lu\t%lu\n",
 				1 + BITS(dword,  3,  0),
 				1 + BITS(dword,  7,  4),
@@ -1112,33 +1113,33 @@ static void dump_cpt(void)
 				1 + BITS(dword, 23, 20));
 	}
 
-	dword = INREG(AUD_OUT_STR_DESC_A);
+	dword = INREG(&igt_global_mmio, AUD_OUT_STR_DESC_A);
 	printf("AUD_OUT_STR_DESC_A  HBR_enable\t\t\t\t%lu\n",	 BITS(dword, 28, 27));
 	printf("AUD_OUT_STR_DESC_A  Convertor_Channel_Count\t\t%lu\n", BITS(dword, 20, 16) + 1);
 	printf("AUD_OUT_STR_DESC_A  Bits_per_Sample\t\t\t[%#lx] %s\n",
 			BITS(dword, 6, 4), OPNAME(bits_per_sample, BITS(dword, 6, 4)));
 	printf("AUD_OUT_STR_DESC_A  Number_of_Channels_in_a_Stream\t%lu\n", 1 + BITS(dword, 3, 0));
 
-	dword = INREG(AUD_OUT_STR_DESC_B);
+	dword = INREG(&igt_global_mmio, AUD_OUT_STR_DESC_B);
 	printf("AUD_OUT_STR_DESC_B  HBR_enable\t\t\t\t%lu\n",	 BITS(dword, 28, 27));
 	printf("AUD_OUT_STR_DESC_B  Convertor_Channel_Count\t\t%lu\n", BITS(dword, 20, 16) + 1);
 	printf("AUD_OUT_STR_DESC_B  Bits_per_Sample\t\t\t[%#lx] %s\n",
 			BITS(dword, 6, 4), OPNAME(bits_per_sample, BITS(dword, 6, 4)));
 	printf("AUD_OUT_STR_DESC_B  Number_of_Channels_in_a_Stream\t%lu\n", 1 + BITS(dword, 3, 0));
 
-	dword = INREG(AUD_OUT_STR_DESC_C);
+	dword = INREG(&igt_global_mmio, AUD_OUT_STR_DESC_C);
 	printf("AUD_OUT_STR_DESC_C  HBR_enable\t\t\t\t%lu\n",	 BITS(dword, 28, 27));
 	printf("AUD_OUT_STR_DESC_C  Convertor_Channel_Count\t\t%lu\n", BITS(dword, 20, 16) + 1);
 	printf("AUD_OUT_STR_DESC_C  Bits_per_Sample\t\t\t[%#lx] %s\n",
 			BITS(dword, 6, 4), OPNAME(bits_per_sample, BITS(dword, 6, 4)));
 	printf("AUD_OUT_STR_DESC_C  Number_of_Channels_in_a_Stream\t%lu\n", 1 + BITS(dword, 3, 0));
 
-	dword = INREG(AUD_PINW_CONNLNG_SEL);
+	dword = INREG(&igt_global_mmio, AUD_PINW_CONNLNG_SEL);
 	printf("AUD_PINW_CONNLNG_SEL  Connection_select_Control_B\t%#lx\n", BITS(dword,  7,  0));
 	printf("AUD_PINW_CONNLNG_SEL  Connection_select_Control_C\t%#lx\n", BITS(dword, 15,  8));
 	printf("AUD_PINW_CONNLNG_SEL  Connection_select_Control_D\t%#lx\n", BITS(dword, 23, 16));
 
-	dword = INREG(AUD_CNTL_ST_A);
+	dword = INREG(&igt_global_mmio, AUD_CNTL_ST_A);
 	printf("AUD_CNTL_ST_A  DIP_Port_Select\t\t\t\t[%#lx] %s\n",
 			BITS(dword, 30, 29), dip_port[BITS(dword, 30, 29)]);
 	printf("AUD_CNTL_ST_A  DIP_type_enable_status Audio DIP\t\t%lu\n", BIT(dword, 21));
@@ -1149,7 +1150,7 @@ static void dump_cpt(void)
 	printf("AUD_CNTL_ST_A  ELD_ACK\t\t\t\t\t%lu\n", BIT(dword, 4));
 	printf("AUD_CNTL_ST_A  ELD_buffer_size\t\t\t\t%lu\n", BITS(dword, 14, 10));
 
-	dword = INREG(AUD_CNTL_ST_B);
+	dword = INREG(&igt_global_mmio, AUD_CNTL_ST_B);
 	printf("AUD_CNTL_ST_B  DIP_Port_Select\t\t\t\t[%#lx] %s\n",
 			BITS(dword, 30, 29), dip_port[BITS(dword, 30, 29)]);
 	printf("AUD_CNTL_ST_B  DIP_type_enable_status Audio DIP\t\t%lu\n", BIT(dword, 21));
@@ -1160,7 +1161,7 @@ static void dump_cpt(void)
 	printf("AUD_CNTL_ST_B  ELD_ACK\t\t\t\t\t%lu\n", BIT(dword, 4));
 	printf("AUD_CNTL_ST_B  ELD_buffer_size\t\t\t\t%lu\n", BITS(dword, 14, 10));
 
-	dword = INREG(AUD_CNTL_ST_C);
+	dword = INREG(&igt_global_mmio, AUD_CNTL_ST_C);
 	printf("AUD_CNTL_ST_C  DIP_Port_Select\t\t\t\t[%#lx] %s\n",
 			BITS(dword, 30, 29), dip_port[BITS(dword, 30, 29)]);
 	printf("AUD_CNTL_ST_C  DIP_type_enable_status Audio DIP\t\t%lu\n", BIT(dword, 21));
@@ -1171,7 +1172,7 @@ static void dump_cpt(void)
 	printf("AUD_CNTL_ST_C  ELD_ACK\t\t\t\t\t%lu\n", BIT(dword, 4));
 	printf("AUD_CNTL_ST_C  ELD_buffer_size\t\t\t\t%lu\n", BITS(dword, 14, 10));
 
-	dword = INREG(AUD_CNTRL_ST2);
+	dword = INREG(&igt_global_mmio, AUD_CNTRL_ST2);
 	printf("AUD_CNTRL_ST2  CP_ReadyB\t\t\t\t%lu\n",	BIT(dword, 1));
 	printf("AUD_CNTRL_ST2  ELD_validB\t\t\t\t%lu\n",	BIT(dword, 0));
 	printf("AUD_CNTRL_ST2  CP_ReadyC\t\t\t\t%lu\n",	BIT(dword, 5));
@@ -1179,7 +1180,7 @@ static void dump_cpt(void)
 	printf("AUD_CNTRL_ST2  CP_ReadyD\t\t\t\t%lu\n",	BIT(dword, 9));
 	printf("AUD_CNTRL_ST2  ELD_validD\t\t\t\t%lu\n",	BIT(dword, 8));
 
-	dword = INREG(AUD_CNTRL_ST3);
+	dword = INREG(&igt_global_mmio, AUD_CNTRL_ST3);
 	printf("AUD_CNTRL_ST3  TransA_DPT_Audio_Output_En\t\t%lu\n",	BIT(dword, 3));
 	printf("AUD_CNTRL_ST3  TransA_to_Port_Sel\t\t\t[%#lx] %s\n",
 			BITS(dword, 2, 0), trans_to_port_sel[BITS(dword, 2, 0)]);
@@ -1190,7 +1191,7 @@ static void dump_cpt(void)
 	printf("AUD_CNTRL_ST3  TransC_to_Port_Sel\t\t\t[%#lx] %s\n",
 			BITS(dword, 10, 8), trans_to_port_sel[BITS(dword, 10, 8)]);
 
-	dword = INREG(AUD_HDMIW_STATUS);
+	dword = INREG(&igt_global_mmio, AUD_HDMIW_STATUS);
 	printf("AUD_HDMIW_STATUS  Conv_A_CDCLK/DOTCLK_FIFO_Underrun\t%lu\n", BIT(dword, 27));
 	printf("AUD_HDMIW_STATUS  Conv_A_CDCLK/DOTCLK_FIFO_Overrun\t%lu\n",  BIT(dword, 26));
 	printf("AUD_HDMIW_STATUS  Conv_B_CDCLK/DOTCLK_FIFO_Underrun\t%lu\n", BIT(dword, 29));
@@ -1201,54 +1202,54 @@ static void dump_cpt(void)
 	printf("AUD_HDMIW_STATUS  Function_Reset\t\t\t%lu\n",		 BIT(dword, 24));
 
 	printf("AUD_HDMIW_HDMIEDID_A HDMI ELD:\n\t");
-	dword = INREG(AUD_CNTL_ST_A);
+	dword = INREG(&igt_global_mmio, AUD_CNTL_ST_A);
 	dword &= ~BITMASK(9, 5);
-	OUTREG(AUD_CNTL_ST_A, dword);
+	OUTREG(&igt_global_mmio, AUD_CNTL_ST_A, dword);
 	for (i = 0; i < BITS(dword, 14, 10) / 4; i++)
-		printf("%08x ", htonl(INREG(AUD_HDMIW_HDMIEDID_A)));
+		printf("%08x ", htonl(INREG(&igt_global_mmio, AUD_HDMIW_HDMIEDID_A)));
 	printf("\n");
 
 	printf("AUD_HDMIW_HDMIEDID_B HDMI ELD:\n\t");
-	dword = INREG(AUD_CNTL_ST_B);
+	dword = INREG(&igt_global_mmio, AUD_CNTL_ST_B);
 	dword &= ~BITMASK(9, 5);
-	OUTREG(AUD_CNTL_ST_B, dword);
+	OUTREG(&igt_global_mmio, AUD_CNTL_ST_B, dword);
 	for (i = 0; i < BITS(dword, 14, 10) / 4; i++)
-		printf("%08x ", htonl(INREG(AUD_HDMIW_HDMIEDID_B)));
+		printf("%08x ", htonl(INREG(&igt_global_mmio, AUD_HDMIW_HDMIEDID_B)));
 	printf("\n");
 
 	printf("AUD_HDMIW_HDMIEDID_C HDMI ELD:\n\t");
-	dword = INREG(AUD_CNTL_ST_C);
+	dword = INREG(&igt_global_mmio, AUD_CNTL_ST_C);
 	dword &= ~BITMASK(9, 5);
-	OUTREG(AUD_CNTL_ST_C, dword);
+	OUTREG(&igt_global_mmio, AUD_CNTL_ST_C, dword);
 	for (i = 0; i < BITS(dword, 14, 10) / 4; i++)
-		printf("%08x ", htonl(INREG(AUD_HDMIW_HDMIEDID_C)));
+		printf("%08x ", htonl(INREG(&igt_global_mmio, AUD_HDMIW_HDMIEDID_C)));
 	printf("\n");
 
 	printf("AUD_HDMIW_INFOFR_A HDMI audio Infoframe:\n\t");
-	dword = INREG(AUD_CNTL_ST_A);
+	dword = INREG(&igt_global_mmio, AUD_CNTL_ST_A);
 	dword &= ~BITMASK(20, 18);
 	dword &= ~BITMASK(3, 0);
-	OUTREG(AUD_CNTL_ST_A, dword);
+	OUTREG(&igt_global_mmio, AUD_CNTL_ST_A, dword);
 	for (i = 0; i < 8; i++)
-		printf("%08x ", htonl(INREG(AUD_HDMIW_INFOFR_A)));
+		printf("%08x ", htonl(INREG(&igt_global_mmio, AUD_HDMIW_INFOFR_A)));
 	printf("\n");
 
 	printf("AUD_HDMIW_INFOFR_B HDMI audio Infoframe:\n\t");
-	dword = INREG(AUD_CNTL_ST_B);
+	dword = INREG(&igt_global_mmio, AUD_CNTL_ST_B);
 	dword &= ~BITMASK(20, 18);
 	dword &= ~BITMASK(3, 0);
-	OUTREG(AUD_CNTL_ST_B, dword);
+	OUTREG(&igt_global_mmio, AUD_CNTL_ST_B, dword);
 	for (i = 0; i < 8; i++)
-		printf("%08x ", htonl(INREG(AUD_HDMIW_INFOFR_B)));
+		printf("%08x ", htonl(INREG(&igt_global_mmio, AUD_HDMIW_INFOFR_B)));
 	printf("\n");
 
 	printf("AUD_HDMIW_INFOFR_C HDMI audio Infoframe:\n\t");
-	dword = INREG(AUD_CNTL_ST_C);
+	dword = INREG(&igt_global_mmio, AUD_CNTL_ST_C);
 	dword &= ~BITMASK(20, 18);
 	dword &= ~BITMASK(3, 0);
-	OUTREG(AUD_CNTL_ST_C, dword);
+	OUTREG(&igt_global_mmio, AUD_CNTL_ST_C, dword);
 	for (i = 0; i < 8; i++)
-		printf("%08x ", htonl(INREG(AUD_HDMIW_INFOFR_C)));
+		printf("%08x ", htonl(INREG(&igt_global_mmio, AUD_HDMIW_INFOFR_C)));
 	printf("\n");
 
 }
@@ -1374,10 +1375,10 @@ static void dump_aud_config(int index)
 	char prefix[MAX_PREFIX_SIZE];
 
 	if (!IS_HASWELL_PLUS(devid)) {
-		dword = INREG(aud_reg_base + AUD_CONFIG_A + (index - PIPE_A) * 0x100);
+		dword = INREG(&igt_global_mmio, aud_reg_base + AUD_CONFIG_A + (index - PIPE_A) * 0x100);
 		sprintf(prefix, "AUD_CONFIG_%c  ", 'A' + index - PIPE_A);
 	} else {
-		dword = INREG(aud_reg_base + AUD_TCA_CONFIG + (index - TRANSCODER_A) * 0x100);
+		dword = INREG(&igt_global_mmio, aud_reg_base + AUD_TCA_CONFIG + (index - TRANSCODER_A) * 0x100);
 		sprintf(prefix, "AUD_TC%c_CONFIG", 'A' + index - TRANSCODER_A);
 	}
 
@@ -1397,10 +1398,10 @@ static void dump_aud_misc_control(int index)
 	char prefix[MAX_PREFIX_SIZE];
 
 	if (!IS_HASWELL_PLUS(devid)) {
-		dword = INREG(aud_reg_base + AUD_MISC_CTRL_A + (index - PIPE_A) * 0x100);
+		dword = INREG(&igt_global_mmio, aud_reg_base + AUD_MISC_CTRL_A + (index - PIPE_A) * 0x100);
 		sprintf(prefix, "AUD_MISC_CTRL_%c ", 'A' + index - PIPE_A);
 	} else {
-		dword = INREG(aud_reg_base + AUD_C1_MISC_CTRL + (index - CONVERTER_1) * 0x100);
+		dword = INREG(&igt_global_mmio, aud_reg_base + AUD_C1_MISC_CTRL + (index - CONVERTER_1) * 0x100);
 		sprintf(prefix, "AUD_C%c_MISC_CTRL", '1' + index - CONVERTER_1);
 	}
 
@@ -1414,7 +1415,7 @@ static void dump_aud_vendor_device_id(void)
 {
 	uint32_t dword;
 
-	dword = INREG(aud_reg_base + AUD_VID_DID);
+	dword = INREG(&igt_global_mmio, aud_reg_base + AUD_VID_DID);
 	printf("AUD_VID_DID device id\t\t\t\t\t0x%lx\n", BITS(dword, 15, 0));
 	printf("AUD_VID_DID vendor id\t\t\t\t\t0x%lx\n", BITS(dword, 31, 16));
 }
@@ -1423,7 +1424,7 @@ static void dump_aud_revision_id(void)
 {
 	uint32_t dword;
 
-	dword = INREG(aud_reg_base + AUD_RID);
+	dword = INREG(&igt_global_mmio, aud_reg_base + AUD_RID);
 	printf("AUD_RID Stepping_Id\t\t\t\t\t0x%lx\n",    BITS(dword, 7, 0));
 	printf("AUD_RID Revision_Id\t\t\t\t\t0x%lx\n",    BITS(dword, 15, 8));
 	printf("AUD_RID Minor_Revision\t\t\t\t\t0x%lx\n", BITS(dword, 19, 16));
@@ -1436,10 +1437,10 @@ static void dump_aud_m_cts_enable(int index)
 	char prefix[MAX_PREFIX_SIZE];
 
 	if (!IS_HASWELL_PLUS(devid)) {
-		dword = INREG(aud_reg_base + AUD_CTS_ENABLE_A  + (index - PIPE_A) * 0x100);
+		dword = INREG(&igt_global_mmio, aud_reg_base + AUD_CTS_ENABLE_A  + (index - PIPE_A) * 0x100);
 		sprintf(prefix, "AUD_CTS_ENABLE_%c    ", 'A' + index - PIPE_A);
 	} else {
-		dword = INREG(aud_reg_base + AUD_TCA_M_CTS_ENABLE  + (index - TRANSCODER_A) * 0x100);
+		dword = INREG(&igt_global_mmio, aud_reg_base + AUD_TCA_M_CTS_ENABLE  + (index - TRANSCODER_A) * 0x100);
 		sprintf(prefix, "AUD_TC%c_M_CTS_ENABLE", 'A' + index - TRANSCODER_A);
 	}
 
@@ -1454,7 +1455,7 @@ static void dump_aud_power_state(void)
 	uint32_t dword;
 	int num_pipes;
 
-	dword = INREG(aud_reg_base + AUD_PWRST);
+	dword = INREG(&igt_global_mmio, aud_reg_base + AUD_PWRST);
 	printf("AUD_PWRST  PinB_Widget_Power_State_Set              \t%s\n",         power_state[BITS(dword,  1,  0)]);
 	printf("AUD_PWRST  PinB_Widget_Power_State_Current          \t%s\n",         power_state[BITS(dword,  3,  2)]);
 	printf("AUD_PWRST  PinC_Widget_Power_State_Set              \t%s\n",         power_state[BITS(dword,  5,  4)]);
@@ -1510,11 +1511,11 @@ static void dump_aud_edid_data(int index)
 		printf("AUD_HDMIW_HDMIEDID_%c HDMI ELD:\n\t",  'A' + index - PIPE_A);
 	}
 
-	dword = INREG(aud_ctrl_st);
+	dword = INREG(&igt_global_mmio, aud_ctrl_st);
 	dword &= ~BITMASK(9, 5);
-	OUTREG(aud_ctrl_st, dword);
+	OUTREG(&igt_global_mmio, aud_ctrl_st, dword);
 	for (i = 0; i < BITS(dword, 14, 10) / 4; i++)
-		printf("%08x ", htonl(INREG(edid_data)));
+		printf("%08x ", htonl(INREG(&igt_global_mmio, edid_data)));
 	printf("\n");
 }
 
@@ -1537,12 +1538,12 @@ static void dump_aud_infoframe(int index)
 		printf("AUD_HDMIW_INFOFR_%c HDMI audio Infoframe:\n\t",  'A' + index - PIPE_A);
 	}
 
-	dword = INREG(aud_ctrl_st);
+	dword = INREG(&igt_global_mmio, aud_ctrl_st);
 	dword &= ~BITMASK(20, 18);
 	dword &= ~BITMASK(3, 0);
-	OUTREG(aud_ctrl_st, dword);
+	OUTREG(&igt_global_mmio, aud_ctrl_st, dword);
 	for (i = 0; i < 8; i++)
-		printf("%08x ", htonl(INREG(info_frm)));
+		printf("%08x ", htonl(INREG(&igt_global_mmio, info_frm)));
 	printf("\n");
 }
 
@@ -1551,7 +1552,7 @@ static void dump_aud_port_en_hd_cfg(void)
 	uint32_t dword;
 	int num_pipes = get_num_pipes();
 
-	dword = INREG(aud_reg_base + AUD_PORT_EN_HD_CFG);
+	dword = INREG(&igt_global_mmio, aud_reg_base + AUD_PORT_EN_HD_CFG);
 	if (num_pipes == 2) {
 		printf("AUD_PORT_EN_HD_CFG  Convertor_A_Digen\t\t\t%lu\n",    BIT(dword, 0));
 		printf("AUD_PORT_EN_HD_CFG  Convertor_B_Digen\t\t\t%lu\n",    BIT(dword, 1));
@@ -1585,7 +1586,7 @@ static void dump_aud_pipe_conv_cfg(void)
 {
 	uint32_t dword;
 
-	dword = INREG(aud_reg_base + AUD_PIPE_CONV_CFG);
+	dword = INREG(&igt_global_mmio, aud_reg_base + AUD_PIPE_CONV_CFG);
 	printf("AUD_PIPE_CONV_CFG  Convertor_1_Digen\t\t\t%lu\n",    BIT(dword, 0));
 	printf("AUD_PIPE_CONV_CFG  Convertor_2_Digen\t\t\t%lu\n",    BIT(dword, 1));
 	printf("AUD_PIPE_CONV_CFG  Convertor_3_Digen\t\t\t%lu\n",    BIT(dword, 2));
@@ -1607,10 +1608,10 @@ static void dump_aud_dig_cnvt(int index)
 	char prefix[MAX_PREFIX_SIZE];
 
 	if (!IS_HASWELL_PLUS(devid)) {
-		dword = INREG(aud_reg_base + AUD_OUT_DIG_CNVT_A  + (index - PIPE_A) * 0x100);
+		dword = INREG(&igt_global_mmio, aud_reg_base + AUD_OUT_DIG_CNVT_A  + (index - PIPE_A) * 0x100);
 		sprintf(prefix, "AUD_OUT_DIG_CNVT_%c", 'A' + index - PIPE_A);
 	} else {
-		dword = INREG(aud_reg_base + AUD_C1_DIG_CNVT + (index - CONVERTER_1) * 0x100);
+		dword = INREG(&igt_global_mmio, aud_reg_base + AUD_C1_DIG_CNVT + (index - CONVERTER_1) * 0x100);
 		sprintf(prefix, "AUD_C%c_DIG_CNVT   ", '1' + index - CONVERTER_1);
 	}
 
@@ -1633,10 +1634,10 @@ static void dump_aud_str_desc(int index)
 	uint32_t rate;
 
 	if (!IS_HASWELL_PLUS(devid)) {
-		dword = INREG(aud_reg_base + AUD_OUT_STR_DESC_A + (index - PIPE_A) * 0x100);
+		dword = INREG(&igt_global_mmio, aud_reg_base + AUD_OUT_STR_DESC_A + (index - PIPE_A) * 0x100);
 		sprintf(prefix, "AUD_OUT_STR_DESC_%c", 'A' + index - PIPE_A);
 	} else {
-		dword = INREG(aud_reg_base + AUD_C1_STR_DESC + (index - CONVERTER_1) * 0x100);
+		dword = INREG(&igt_global_mmio, aud_reg_base + AUD_C1_STR_DESC + (index - CONVERTER_1) * 0x100);
 		sprintf(prefix, "AUD_C%c_STR_DESC  ", '1' + index - CONVERTER_1);
 	}
 
@@ -1668,8 +1669,8 @@ static void dump_aud_out_chan_map(void)
 
 	printf("AUD_OUT_CHAN_MAP  Converter_Channel_MAP	PORTB	PORTC	PORTD\n");
 	for (i = 0; i < 8; i++) {
-		OUTREG(aud_reg_base + AUD_OUT_CHAN_MAP, i | (i << 8) | (i << 16));
-		dword = INREG(aud_reg_base + AUD_OUT_CHAN_MAP);
+		OUTREG(&igt_global_mmio, aud_reg_base + AUD_OUT_CHAN_MAP, i | (i << 8) | (i << 16));
+		dword = INREG(&igt_global_mmio, aud_reg_base + AUD_OUT_CHAN_MAP);
 		printf("\t\t\t\t%lu\t%lu\t%lu\t%lu\n",
 				1 + BITS(dword,  3,  0),
 				1 + BITS(dword,  7,  4),
@@ -1683,7 +1684,7 @@ static void dump_aud_connect_list(void)
 	uint32_t dword;
 	char prefix[MAX_PREFIX_SIZE];
 
-	dword = INREG(aud_reg_base + AUD_PINW_CONNLNG_LIST);
+	dword = INREG(&igt_global_mmio, aud_reg_base + AUD_PINW_CONNLNG_LIST);
 	sprintf(prefix, "AUD_PINW_CONNLNG_LIST");
 
 	printf("%s  Connect_List_Length\t\t%lu\n",     prefix, BITS(dword, 6, 0));
@@ -1698,11 +1699,11 @@ static void dump_aud_connect_select(void)
 	char prefix[MAX_PREFIX_SIZE];
 
 	if (IS_HASWELL_PLUS(devid)) {
-		dword = INREG(aud_reg_base + AUD_PIPE_CONN_SEL_CTRL);
+		dword = INREG(&igt_global_mmio, aud_reg_base + AUD_PIPE_CONN_SEL_CTRL);
 		sprintf(prefix, "AUD_PIPE_CONN_SEL_CTRL");
 
 	} else {
-		dword = INREG(aud_reg_base + AUD_PINW_CONNLNG_SEL);
+		dword = INREG(&igt_global_mmio, aud_reg_base + AUD_PINW_CONNLNG_SEL);
 		sprintf(prefix, "AUD_PINW_CONNLNG_SEL  ");
 	}
 
@@ -1718,11 +1719,11 @@ static void dump_aud_ctrl_state(int index)
 
 	if (IS_HASWELL_PLUS(devid)) {
 		offset = (index - TRANSCODER_A) * 0x100;
-		dword = INREG(aud_reg_base + AUD_TCA_DIP_ELD_CTRL_ST + offset);
+		dword = INREG(&igt_global_mmio, aud_reg_base + AUD_TCA_DIP_ELD_CTRL_ST + offset);
 		printf("Audio DIP and ELD control state for Transcoder %c\n",  'A' + index - TRANSCODER_A);
 	} else {
 		offset = (index - PIPE_A) * 0x100;
-		dword = INREG(aud_reg_base + AUD_CNTL_ST_A + offset);
+		dword = INREG(&igt_global_mmio, aud_reg_base + AUD_CNTL_ST_A + offset);
 		printf("Audio control state - Pipe %c\n",  'A' + index - PIPE_A);
 	}
 
@@ -1743,7 +1744,7 @@ static void dump_aud_ctrl_state2(void)
 {
 	uint32_t dword;
 
-	dword = INREG(aud_reg_base + AUD_CNTL_ST2);
+	dword = INREG(&igt_global_mmio, aud_reg_base + AUD_CNTL_ST2);
 	printf("AUD_CNTL_ST2  ELD_validB\t\t\t\t%lu\n",  BIT(dword, 0));
 	printf("AUD_CNTL_ST2  CP_ReadyB\t\t\t\t\t%lu\n", BIT(dword, 1));
 	printf("AUD_CNTL_ST2  ELD_validC\t\t\t\t%lu\n",  BIT(dword, 4));
@@ -1757,7 +1758,7 @@ static void dump_aud_eld_cp_vld(void)
 {
 	uint32_t dword;
 
-	dword = INREG(aud_reg_base + AUD_PIN_ELD_CP_VLD);
+	dword = INREG(&igt_global_mmio, aud_reg_base + AUD_PIN_ELD_CP_VLD);
 	printf("AUD_PIN_ELD_CP_VLD  Transcoder_A ELD_valid\t\t%lu\n",	BIT(dword, 0));
 	printf("AUD_PIN_ELD_CP_VLD  Transcoder_A CP_Ready \t\t%lu\n",	BIT(dword, 1));
 	printf("AUD_PIN_ELD_CP_VLD  Transcoder_A Out_enable\t\t%lu\n",	BIT(dword, 2));
@@ -1776,7 +1777,7 @@ static void dump_aud_hdmi_status(void)
 {
 	uint32_t dword;
 
-	dword = INREG(aud_reg_base + AUD_HDMIW_STATUS);
+	dword = INREG(&igt_global_mmio, aud_reg_base + AUD_HDMIW_STATUS);
 	printf("AUD_HDMIW_STATUS  Function_Reset\t\t\t%lu\n",                BIT(dword, 24));
 	printf("AUD_HDMIW_STATUS  BCLK/CDCLK_FIFO_Overrun\t\t%lu\n",	     BIT(dword, 25));
 	printf("AUD_HDMIW_STATUS  Conv_A_CDCLK/DOTCLK_FIFO_Overrun\t%lu\n",  BIT(dword, 28));
@@ -1817,7 +1818,7 @@ static void dump_dp_port_ctrl(int port)
 	sprintf(prefix, "DP_%c", 'B' + port - PORT_B);
 
 	port_ctrl = disp_reg_base + DP_CTL_B + (port - PORT_B) * 0x100;
-	dword = INREG(port_ctrl);
+	dword = INREG(&igt_global_mmio, port_ctrl);
 	printf("%s DisplayPort_Enable\t\t\t\t\t%lu\n",        prefix, BIT(dword, 31));
 	printf("%s Transcoder_Select\t\t\t\t\t%s\n",          prefix, BIT(dword, 30) ? "Transcoder B" : "Transcoder A");
 	printf("%s Port_Width_Selection\t\t\t\t[0x%lx] %s\n", prefix, BITS(dword, 21, 19),
@@ -1841,7 +1842,7 @@ static void dump_hdmi_port_ctrl(int port)
 		port_ctrl = disp_reg_base + HDMI_CTL_B + (port - PORT_B) * 0x10;
 	}
 
-	dword = INREG(port_ctrl);
+	dword = INREG(&igt_global_mmio, port_ctrl);
 	printf("%s HDMI_Enable\t\t\t\t\t%u\n",                 prefix, !!(dword & SDVO_ENABLE));
 	printf("%s Transcoder_Select\t\t\t\t%s\n",             prefix, BIT(dword, 30) ? "Transcoder B" : "Transcoder A");
 	printf("%s HDCP_Port_Select\t\t\t\t%lu\n",             prefix, BIT(dword, 5));
@@ -2029,7 +2030,7 @@ static void dump_ddi_buf_ctl(int port)
 {
 	uint32_t dword;
 
-	dword = INREG(DDI_BUF_CTL_A + (port - PORT_A) * 0x100);
+	dword = INREG(&igt_global_mmio, DDI_BUF_CTL_A + (port - PORT_A) * 0x100);
 	printf("DDI %c Buffer control\n", 'A' + port - PORT_A);
 
 	printf("\tDP port width\t\t\t\t\t[0x%lx] %s\n", BITS(dword, 3, 1),
@@ -2041,7 +2042,7 @@ static void dump_ddi_func_ctl(int pipe)
 {
 	uint32_t dword;
 
-	dword = INREG(PIPE_DDI_FUNC_CTL_A + (pipe - PIPE_A) * 0x1000);
+	dword = INREG(&igt_global_mmio, PIPE_DDI_FUNC_CTL_A + (pipe - PIPE_A) * 0x1000);
 	printf("Pipe %c DDI Function Control\n", 'A' + pipe - PIPE_A);
 
 	printf("\tBITS per color\t\t\t\t\t[0x%lx] %s\n",    BITS(dword, 22, 20),
@@ -2058,7 +2059,7 @@ static void dump_aud_connect_list_entry_length(int transcoder)
 	uint32_t dword;
 	char prefix[MAX_PREFIX_SIZE];
 
-	dword = INREG(aud_reg_base + AUD_TCA_PIN_PIPE_CONN_ENTRY_LNGTH + (transcoder - TRANSCODER_A) * 0x100);
+	dword = INREG(&igt_global_mmio, aud_reg_base + AUD_TCA_PIN_PIPE_CONN_ENTRY_LNGTH + (transcoder - TRANSCODER_A) * 0x100);
 	sprintf(prefix, "AUD_TC%c_PIN_PIPE_CONN_ENTRY_LNGTH", 'A' + transcoder - TRANSCODER_A);
 
 	printf("%s  Connect_List_Length\t%lu\n", prefix, BITS(dword, 6, 0));
@@ -2071,7 +2072,7 @@ static void dump_aud_connect_select_ctrl(void)
 {
 	uint32_t dword;
 
-	dword = INREG(aud_reg_base + AUD_PIPE_CONN_SEL_CTRL);
+	dword = INREG(&igt_global_mmio, aud_reg_base + AUD_PIPE_CONN_SEL_CTRL);
 	printf("AUD_PIPE_CONN_SEL_CTRL  Connection_select_Port_B\t%#lx\n", BITS(dword,  7,  0));
 	printf("AUD_PIPE_CONN_SEL_CTRL  Connection_select_Port_C\t%#lx\n", BITS(dword, 15,  8));
 	printf("AUD_PIPE_CONN_SEL_CTRL  Connection_select_Port_D\t%#lx\n", BITS(dword, 23, 16));
@@ -2082,7 +2083,7 @@ static void dump_aud_dip_eld_ctrl_st(int transcoder)
 	uint32_t dword;
 	int offset = (transcoder - TRANSCODER_A) * 0x100;
 
-	dword = INREG(aud_reg_base + AUD_TCA_DIP_ELD_CTRL_ST + offset);
+	dword = INREG(&igt_global_mmio, aud_reg_base + AUD_TCA_DIP_ELD_CTRL_ST + offset);
 	printf("Audio DIP and ELD control state for Transcoder %c\n",  'A' + transcoder - TRANSCODER_A);
 
 	printf("\tELD_ACK\t\t\t\t\t\t%lu\n",                                 BIT(dword, 4));
@@ -2102,7 +2103,7 @@ static void dump_aud_hdmi_fifo_status(void)
 {
 	uint32_t dword;
 
-	dword = INREG(aud_reg_base + AUD_HDMI_FIFO_STATUS);
+	dword = INREG(&igt_global_mmio, aud_reg_base + AUD_HDMI_FIFO_STATUS);
 	printf("AUD_HDMI_FIFO_STATUS  Function_Reset\t\t\t%lu\n",                BIT(dword, 24));
 	printf("AUD_HDMI_FIFO_STATUS  Conv_1_CDCLK/DOTCLK_FIFO_Overrun\t%lu\n",  BIT(dword, 26));
 	printf("AUD_HDMI_FIFO_STATUS  Conv_1_CDCLK/DOTCLK_FIFO_Underrun\t%lu\n", BIT(dword, 27));
@@ -2471,9 +2472,9 @@ int main(int argc, char **argv)
 	do_self_tests();
 
 	if (argc == 2)
-		intel_mmio_use_dump_file(argv[1]);
+		intel_mmio_use_dump_file(&igt_global_mmio, argv[1]);
 	else
-		intel_mmio_use_pci_bar(pci_dev);
+		intel_mmio_use_pci_bar(pci_dev, -1, &igt_global_mmio);
 
 	printf("%s audio registers:\n\n", intel_get_device_info(devid)->codename);
 	if (IS_VALLEYVIEW(devid)) {
diff --git a/tools/intel_backlight.c b/tools/intel_backlight.c
index 067fd418..3e193124 100644
--- a/tools/intel_backlight.c
+++ b/tools/intel_backlight.c
@@ -35,15 +35,16 @@
 #include "intel_reg.h"
 
 /* XXX PCH only today */
+struct mmio_data igt_global_mmio;
 
 int main(int argc, char** argv)
 {
 	uint32_t current, max;
 
-	intel_mmio_use_pci_bar(intel_get_pci_device());
+	intel_mmio_use_pci_bar(intel_get_pci_device(), -1, &igt_global_mmio);
 
-	current = INREG(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
-	max = INREG(BLC_PWM_PCH_CTL2) >> 16;
+	current = INREG(&igt_global_mmio, BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
+	max = INREG(&igt_global_mmio, BLC_PWM_PCH_CTL2) >> 16;
 
 	printf ("current backlight value: %d%%\n", current * 100 / max);
 
@@ -51,9 +52,9 @@ int main(int argc, char** argv)
 		uint32_t v = atoi (argv[1]) * max / 100;
 		if (v > max)
 			v = max;
-		OUTREG(BLC_PWM_CPU_CTL,
-		       (INREG(BLC_PWM_CPU_CTL) &~ BACKLIGHT_DUTY_CYCLE_MASK) | v);
-		(void) INREG(BLC_PWM_CPU_CTL);
+		OUTREG(&igt_global_mmio, BLC_PWM_CPU_CTL,
+		       (INREG(&igt_global_mmio, BLC_PWM_CPU_CTL) &~ BACKLIGHT_DUTY_CYCLE_MASK) | v);
+		(void) INREG(&igt_global_mmio, BLC_PWM_CPU_CTL);
 		printf ("set backlight to %d%%\n", v * 100 / max);
 	}
 
diff --git a/tools/intel_display_poller.c b/tools/intel_display_poller.c
index 51f5b9a5..15646243 100644
--- a/tools/intel_display_poller.c
+++ b/tools/intel_display_poller.c
@@ -63,6 +63,7 @@ static uint16_t pipe_offset[3] = { 0, 0x1000, 0x2000, };
 #define PIPE_REG(pipe, reg_a) (pipe_offset[(pipe)] + (reg_a))
 
 static volatile bool quit;
+struct mmio_data igt_global_mmio;
 
 static void sighandler(int x)
 {
@@ -71,22 +72,22 @@ static void sighandler(int x)
 
 static uint16_t read_reg_16(uint32_t reg)
 {
-	return INREG16(vlv_offset + reg);
+	return INREG16(&igt_global_mmio, vlv_offset + reg);
 }
 
 static uint32_t read_reg(uint32_t reg)
 {
-	return INREG(vlv_offset + reg);
+	return INREG(&igt_global_mmio, vlv_offset + reg);
 }
 
 static void write_reg_16(uint32_t reg, uint16_t val)
 {
-	OUTREG16(vlv_offset + reg, val);
+	OUTREG16(&igt_global_mmio, vlv_offset + reg, val);
 }
 
 static void write_reg(uint32_t reg, uint32_t val)
 {
-	OUTREG(vlv_offset + reg, val);
+	OUTREG(&igt_global_mmio, vlv_offset + reg, val);
 }
 
 static char pipe_name(int pipe)
@@ -1187,7 +1188,7 @@ int main(int argc, char *argv[])
 		break;
 	}
 
-	intel_register_access_init(intel_get_pci_device(), 0, -1);
+	intel_register_access_init(intel_get_pci_device(), 0, -1, &igt_global_mmio);
 
 	printf("%s?\n", test_name(test, pipe, bit, test_pixelcount));
 
@@ -1262,7 +1263,7 @@ int main(int argc, char *argv[])
 		assert(0);
 	}
 
-	intel_register_access_fini();
+	intel_register_access_fini(&igt_global_mmio);
 
 	if (quit)
 		return 0;
diff --git a/tools/intel_forcewaked.c b/tools/intel_forcewaked.c
index 02fbf888..f833dfce 100644
--- a/tools/intel_forcewaked.c
+++ b/tools/intel_forcewaked.c
@@ -39,6 +39,7 @@
 #include "drmtest.h"
 
 bool daemonized;
+struct mmio_data igt_global_mmio;
 
 #define INFO_PRINT(...) \
 	do { \
@@ -59,7 +60,7 @@ help(char *prog) {
 static int
 is_alive(void) {
 	/* Read the timestamp, which should *almost* always be !0 */
-	return (intel_register_read(0x2358) != 0);
+	return (intel_register_read(&igt_global_mmio, 0x2358) != 0);
 }
 
 int main(int argc, char *argv[])
@@ -80,7 +81,7 @@ int main(int argc, char *argv[])
 		INFO_PRINT("started daemon");
 	}
 
-	ret = intel_register_access_init(intel_get_pci_device(), 1, -1);
+	ret = intel_register_access_init(intel_get_pci_device(), 1, -1, &igt_global_mmio);
 	if (ret) {
 		INFO_PRINT("Couldn't init register access\n");
 		exit(1);
@@ -90,14 +91,14 @@ int main(int argc, char *argv[])
 	while(1) {
 		if (!is_alive()) {
 			INFO_PRINT("gpu reset? restarting daemon\n");
-			intel_register_access_fini();
-			ret = intel_register_access_init(intel_get_pci_device(), 1, -1);
+			intel_register_access_fini(&igt_global_mmio);
+			ret = intel_register_access_init(intel_get_pci_device(), 1, -1, &igt_global_mmio);
 			if (ret)
 				INFO_PRINT("Reg access init fail\n");
 		}
 		sleep(1);
 	}
-	intel_register_access_fini();
+	intel_register_access_fini(&igt_global_mmio);
 	INFO_PRINT("Forcewake unlock\n");
 
 	if (daemonized) {
diff --git a/tools/intel_gpu_time.c b/tools/intel_gpu_time.c
index 56d65fe0..58326643 100644
--- a/tools/intel_gpu_time.c
+++ b/tools/intel_gpu_time.c
@@ -41,6 +41,7 @@
 #define SAMPLES_PER_SEC             10000
 
 static volatile int goddo;
+struct mmio_data igt_global_mmio;
 
 static pid_t spawn(char **argv)
 {
@@ -67,7 +68,7 @@ int main(int argc, char **argv)
 	static struct rusage rusage;
 	int status;
 
-	intel_mmio_use_pci_bar(intel_get_pci_device());
+	intel_mmio_use_pci_bar(intel_get_pci_device(), -1, &igt_global_mmio);
 
 	if (argc == 1) {
 		fprintf(stderr, "usage: %s cmd [args...]\n", argv[0]);
@@ -86,8 +87,8 @@ int main(int argc, char **argv)
 	while (!goddo) {
 		uint32_t ring_head, ring_tail;
 
-		ring_head = INREG(LP_RING + RING_HEAD) & HEAD_ADDR;
-		ring_tail = INREG(LP_RING + RING_TAIL) & TAIL_ADDR;
+		ring_head = INREG(&igt_global_mmio, LP_RING + RING_HEAD) & HEAD_ADDR;
+		ring_tail = INREG(&igt_global_mmio, LP_RING + RING_TAIL) & TAIL_ADDR;
 
 		if (ring_tail == ring_head)
 			ring_idle++;
diff --git a/tools/intel_infoframes.c b/tools/intel_infoframes.c
index 2ef5d4fd..190fa1b1 100644
--- a/tools/intel_infoframes.c
+++ b/tools/intel_infoframes.c
@@ -264,6 +264,7 @@ const char *dip_frequency_names[] = {
 
 struct pci_device *pci_dev;
 int gen = 0;
+struct mmio_data igt_global_mmio;
 
 static const char *spd_source_to_string(SourceDevice source)
 {
@@ -337,20 +338,20 @@ static void load_infoframe(Transcoder transcoder, DipInfoFrame *frame,
 	uint32_t ctl_val;
 	uint32_t i;
 
-	ctl_val = INREG(ctl_reg);
+	ctl_val = INREG(&igt_global_mmio, ctl_reg);
 
 	ctl_val &= ~DIP_CTL_BUFFER_INDEX;
 	ctl_val |= type << 19;
-	OUTREG(ctl_reg, ctl_val);
-	ctl_val = INREG(ctl_reg);
+	OUTREG(&igt_global_mmio, ctl_reg, ctl_val);
+	ctl_val = INREG(&igt_global_mmio, ctl_reg);
 
 	ctl_val &= ~DIP_CTL_ACCESS_ADDR;
-	OUTREG(ctl_reg, ctl_val);
+	OUTREG(&igt_global_mmio, ctl_reg, ctl_val);
 
 	for (i = 0; i < 16; i++) {
-		ctl_val = INREG(ctl_reg);
+		ctl_val = INREG(&igt_global_mmio, ctl_reg);
 		assert((ctl_val & DIP_CTL_ACCESS_ADDR) == i);
-		frame->data32[i] = INREG(data_reg);
+		frame->data32[i] = INREG(&igt_global_mmio, data_reg);
 	}
 }
 
@@ -385,7 +386,7 @@ static void infoframe_fix_checksum(DipInfoFrame *frame)
 static void dump_port_info(int hdmi_port_index)
 {
 	Register port = get_hdmi_port(hdmi_port_index);
-	uint32_t val = INREG(port);
+	uint32_t val = INREG(&igt_global_mmio, port);
 	Transcoder transcoder;
 
 	printf("\nPort %s:\n", hdmi_port_names[hdmi_port_index]);
@@ -438,7 +439,7 @@ static void dump_avi_info(Transcoder transcoder)
 	DipInfoFrame frame;
 
 	load_infoframe(transcoder, &frame, DIP_AVI);
-	val = INREG(reg);
+	val = INREG(&igt_global_mmio, reg);
 
 	printf("AVI InfoFrame:\n");
 
@@ -537,7 +538,7 @@ static void dump_vendor_info(Transcoder transcoder)
 	DipInfoFrame frame;
 
 	load_infoframe(transcoder, &frame, DIP_VENDOR);
-	val = INREG(reg);
+	val = INREG(&igt_global_mmio, reg);
 
 	printf("Vendor InfoFrame:\n");
 
@@ -572,7 +573,7 @@ static void dump_gamut_info(Transcoder transcoder)
 	DipInfoFrame frame;
 
 	load_infoframe(transcoder, &frame, DIP_GAMUT);
-	val = INREG(reg);
+	val = INREG(&igt_global_mmio, reg);
 
 	printf("Gamut InfoFrame:\n");
 
@@ -600,7 +601,7 @@ static void dump_spd_info(Transcoder transcoder)
 	char description[17];
 
 	load_infoframe(transcoder, &frame, DIP_SPD);
-	val = INREG(reg);
+	val = INREG(&igt_global_mmio, reg);
 
 	printf("SPD InfoFrame:\n");
 
@@ -635,7 +636,7 @@ static void dump_spd_info(Transcoder transcoder)
 static void dump_transcoder_info(Transcoder transcoder)
 {
 	Register reg = get_dip_ctl_reg(transcoder);
-	uint32_t val = INREG(reg);
+	uint32_t val = INREG(&igt_global_mmio, reg);
 
 	if (gen == 4) {
 		printf("\nDIP information:\n");
@@ -698,37 +699,37 @@ static void write_infoframe(Transcoder transcoder, DipType type,
 	uint32_t ctl_val;
 	unsigned int i;
 
-	ctl_val = INREG(ctl_reg);
+	ctl_val = INREG(&igt_global_mmio, ctl_reg);
 	ctl_val &= ~DIP_CTL_BUFFER_INDEX;
 	ctl_val |= (type << 19);
 	ctl_val &= ~DIP_CTL_ACCESS_ADDR;
-	OUTREG(ctl_reg, ctl_val);
+	OUTREG(&igt_global_mmio, ctl_reg, ctl_val);
 
 	for (i = 0; i < 8; i++) {
-		ctl_val = INREG(ctl_reg);
+		ctl_val = INREG(&igt_global_mmio, ctl_reg);
 		assert((ctl_val & DIP_CTL_ACCESS_ADDR) == i);
-		OUTREG(data_reg, frame->data32[i]);
+		OUTREG(&igt_global_mmio, data_reg, frame->data32[i]);
 	}
 }
 
 static void disable_infoframe(Transcoder transcoder, DipType type)
 {
 	Register reg = get_dip_ctl_reg(transcoder);
-	uint32_t val = INREG(reg);
+	uint32_t val = INREG(&igt_global_mmio, reg);
 	if (gen != 4 && type == DIP_AVI)
 		val &= ~DIP_CTL_ENABLE;
 	val &= ~(1 << (21 + type));
-	OUTREG(reg, val);
+	OUTREG(&igt_global_mmio, reg, val);
 }
 
 static void enable_infoframe(Transcoder transcoder, DipType type)
 {
 	Register reg = get_dip_ctl_reg(transcoder);
-	uint32_t val = INREG(reg);
+	uint32_t val = INREG(&igt_global_mmio, reg);
 	if (gen != 4 && type == DIP_AVI)
 		val |= DIP_CTL_ENABLE;
 	val |= (1 << (21 + type));
-	OUTREG(reg, val);
+	OUTREG(&igt_global_mmio, reg, val);
 }
 
 static int parse_infoframe_option_u(const char *name, const char *s,
@@ -787,7 +788,7 @@ static void change_avi_infoframe(Transcoder transcoder, char *commands)
 	char *current = commands;
 
 	load_infoframe(transcoder, &frame, DIP_AVI);
-	val = INREG(reg);
+	val = INREG(&igt_global_mmio, reg);
 
 	while (1) {
 		rc = sscanf(current, "%31s%n", option, &read);
@@ -856,7 +857,7 @@ static void change_avi_infoframe(Transcoder transcoder, char *commands)
 
 	val &= ~DIP_CTL_FREQUENCY;
 	val |= DIP_CTL_FREQ_EVERY;
-	OUTREG(reg, val);
+	OUTREG(&igt_global_mmio, reg, val);
 
 	frame.avi.header.type = AVI_INFOFRAME_TYPE;
 	frame.avi.header.version = AVI_INFOFRAME_VERSION;
@@ -888,7 +889,7 @@ static void change_spd_infoframe(Transcoder transcoder, char *commands)
 	char *current = commands;
 
 	load_infoframe(transcoder, &frame, DIP_SPD);
-	val = INREG(reg);
+	val = INREG(&igt_global_mmio, reg);
 
 	while (1) {
 		rc = sscanf(current, "%15s%n", option, &read);
@@ -917,7 +918,7 @@ static void change_spd_infoframe(Transcoder transcoder, char *commands)
 
 	val &= ~DIP_CTL_FREQUENCY;
 	val |= DIP_CTL_FREQ_EVERY_OTHER;
-	OUTREG(reg, val);
+	OUTREG(&igt_global_mmio, reg, val);
 
 	frame.spd.header.type = SPD_INFOFRAME_TYPE;
 	frame.spd.header.version = SPD_INFOFRAME_VERSION;
@@ -946,7 +947,7 @@ static void change_infoframe_frequency(Transcoder transcoder, DipType type,
 				       DipFrequency frequency)
 {
 	Register reg = get_dip_ctl_reg(transcoder);
-	uint32_t val = INREG(reg);
+	uint32_t val = INREG(&igt_global_mmio, reg);
 
 	if (type == DIP_AVI && frequency != DIP_FREQ_EVERY_VSYNC) {
 		printf("Error: AVI infoframe must be sent every VSync!\n");
@@ -955,37 +956,37 @@ static void change_infoframe_frequency(Transcoder transcoder, DipType type,
 
 	val &= ~DIP_CTL_FREQUENCY;
 	val |= (frequency << 16);
-	OUTREG(reg, val);
+	OUTREG(&igt_global_mmio, reg, val);
 }
 
 static void disable_dip(Transcoder transcoder)
 {
 	Register reg = get_dip_ctl_reg(transcoder);
-	uint32_t val = INREG(reg);
+	uint32_t val = INREG(&igt_global_mmio, reg);
 	val &= ~DIP_CTL_ENABLE;
-	OUTREG(reg, val);
+	OUTREG(&igt_global_mmio, reg, val);
 }
 
 static void enable_dip(Transcoder transcoder)
 {
 	Register reg = get_dip_ctl_reg(transcoder);
-	uint32_t val = INREG(reg);
+	uint32_t val = INREG(&igt_global_mmio, reg);
 	val |= DIP_CTL_ENABLE;
-	OUTREG(reg, val);
+	OUTREG(&igt_global_mmio, reg, val);
 }
 
 static void disable_hdmi_port(Register reg)
 {
-	uint32_t val = INREG(reg);
+	uint32_t val = INREG(&igt_global_mmio, reg);
 	val &= ~HDMI_PORT_ENABLE;
-	OUTREG(reg, val);
+	OUTREG(&igt_global_mmio, reg, val);
 }
 
 static void enable_hdmi_port(Register reg)
 {
-	uint32_t val = INREG(reg);
+	uint32_t val = INREG(&igt_global_mmio, reg);
 	val |= HDMI_PORT_ENABLE;
-	OUTREG(reg, val);
+	OUTREG(&igt_global_mmio, reg, val);
 }
 
 static void print_usage(void)
@@ -1108,7 +1109,8 @@ int main(int argc, char *argv[])
 	       " perfectly: the Kernel might undo our changes.\n");
 
 	pci_dev = intel_get_pci_device();
-	intel_register_access_init(pci_dev, 0, -1);
+	intel_register_access_init(pci_dev, 0, -1, &igt_global_mmio);
+
 	intel_check_pch();
 
 	if (IS_GEN4(pci_dev->device_id))
@@ -1256,6 +1258,6 @@ int main(int argc, char *argv[])
 	}
 
 out:
-	intel_register_access_fini();
+	intel_register_access_fini(&igt_global_mmio);
 	return ret;
 }
diff --git a/tools/intel_l3_parity.c b/tools/intel_l3_parity.c
index d8c997af..88158632 100644
--- a/tools/intel_l3_parity.c
+++ b/tools/intel_l3_parity.c
@@ -37,6 +37,7 @@
 #include "intel_chipset.h"
 #include "intel_io.h"
 #include "igt_sysfs.h"
+#include "igt_device.h"
 #include "drmtest.h"
 #include "config.h"
 #include <libudev.h>
@@ -53,6 +54,7 @@ static inline int num_banks(void) {
 	default: return 2;
 	}
 }
+struct mmio_data igt_global_mmio;
 #define NUM_SUBBANKS 8
 #define BYTES_PER_BANK (128 << 10)
 /* Each row addresses [up to] 4b. This multiplied by the number of subbanks
@@ -189,7 +191,7 @@ int main(int argc, char *argv[])
 	if (intel_gen(devid) < 7 || IS_VALLEYVIEW(devid))
 		exit(77);
 
-	assert(intel_register_access_init(intel_get_pci_device(), 0, device) == 0);
+	assert(intel_register_access_init(igt_device_get_pci_device(device), 0, device, &igt_global_mmio) == 0);
 
 	dir = igt_sysfs_open(device);
 
@@ -211,7 +213,7 @@ int main(int argc, char *argv[])
 	 * now. Just be aware of this if for some reason a hang is reported
 	 * when using this tool.
 	 */
-	dft = intel_register_read(0xb038);
+	dft = intel_register_read(&igt_global_mmio, 0xb038);
 
 	while (1) {
 		int c, option_index = 0;
@@ -357,10 +359,10 @@ int main(int argc, char *argv[])
 				assert(i < 2);
 				dft |= i << 1; /* slice */
 				dft |= 1 << 0; /* enable */
-				intel_register_write(0xb038, dft);
+				intel_register_write(&igt_global_mmio, 0xb038, dft);
 				break;
 			case 'u':
-				intel_register_write(0xb038, dft & ~(1<<0));
+				intel_register_write(&igt_global_mmio, 0xb038, dft & ~(1<<0));
 				break;
 			case 'L':
 				break;
@@ -369,7 +371,7 @@ int main(int argc, char *argv[])
 		}
 	}
 
-	intel_register_access_fini();
+	intel_register_access_fini(&igt_global_mmio);
 	if (action == 'l')
 		exit(EXIT_SUCCESS);
 
diff --git a/tools/intel_lid.c b/tools/intel_lid.c
index 37c6ba5e..32db9dd2 100644
--- a/tools/intel_lid.c
+++ b/tools/intel_lid.c
@@ -51,6 +51,7 @@ enum lid_status {
 
 #define ACPI_BUTTON "/proc/acpi/button/"
 #define ACPI_LID "/proc/acpi/button/lid/"
+struct mmio_data igt_global_mmio;
 
 static int i830_lvds_acpi_lid_state(void)
 {
@@ -119,10 +120,10 @@ int main(int argc, char **argv)
 {
 	int swf14, acpi_lid;
 
-	intel_mmio_use_pci_bar(intel_get_pci_device());
+	intel_mmio_use_pci_bar(intel_get_pci_device(), -1, &igt_global_mmio);
 
 	while (1) {
-		swf14 = INREG(SWF14);
+		swf14 = INREG(&igt_global_mmio, SWF14);
 
 		printf("Intel LVDS Lid status:\n");
 		printf("\tSWF14(0x%x) : %s\n", swf14,
diff --git a/tools/intel_panel_fitter.c b/tools/intel_panel_fitter.c
index 137ef61a..a50f42e8 100644
--- a/tools/intel_panel_fitter.c
+++ b/tools/intel_panel_fitter.c
@@ -36,6 +36,7 @@
 #include "drmtest.h"
 
 int gen;
+struct mmio_data igt_global_mmio;
 
 uint32_t HTOTAL[]     = { 0x60000, 0x61000, 0x62000 };
 uint32_t VTOTAL[]     = { 0x6000C, 0x6100C, 0x6200C };
@@ -84,12 +85,12 @@ static void read_pipe_info(int intel_pipe, struct pipe_info *info)
 {
 	uint32_t conf, vtotal, htotal, src, ctrl1, win_sz;
 
-	conf   = INREG(PIPECONF[intel_pipe]);
-	htotal = INREG(HTOTAL[intel_pipe]);
-	vtotal = INREG(VTOTAL[intel_pipe]);
-	src    = INREG(PIPESRC[intel_pipe]);
-	ctrl1  = INREG(PF_CTRL1[intel_pipe]);
-	win_sz = INREG(PF_WIN_SZ[intel_pipe]);
+	conf   = INREG(&igt_global_mmio, PIPECONF[intel_pipe]);
+	htotal = INREG(&igt_global_mmio, HTOTAL[intel_pipe]);
+	vtotal = INREG(&igt_global_mmio, VTOTAL[intel_pipe]);
+	src    = INREG(&igt_global_mmio, PIPESRC[intel_pipe]);
+	ctrl1  = INREG(&igt_global_mmio, PF_CTRL1[intel_pipe]);
+	win_sz = INREG(&igt_global_mmio, PF_WIN_SZ[intel_pipe]);
 
 	info->enabled = (conf & PIPECONF_ENABLE) ? true : false;
 	info->tot_width = (htotal & HTOTAL_ACTIVE_MASK) + 1;
@@ -232,24 +233,24 @@ static int change_screen_size(int intel_pipe, int x, int y)
 			assert(0);
 		}
 	}
-	OUTREG(PF_CTRL1[intel_pipe], ctrl1_val);
+	OUTREG(&igt_global_mmio, PF_CTRL1[intel_pipe], ctrl1_val);
 
 	win_pos_val = pos_x << 16;
 	win_pos_val |= pos_y;
-	OUTREG(PF_WIN_POS[intel_pipe], win_pos_val);
+	OUTREG(&igt_global_mmio, PF_WIN_POS[intel_pipe], win_pos_val);
 
 	win_sz_val = dst_width << 16;
 	win_sz_val |= dst_height;
-	OUTREG(PF_WIN_SZ[intel_pipe], win_sz_val);
+	OUTREG(&igt_global_mmio, PF_WIN_SZ[intel_pipe], win_sz_val);
 
 	return 0;
 }
 
 static int disable_panel_fitter(int intel_pipe)
 {
-	OUTREG(PF_CTRL1[intel_pipe], 0);
-	OUTREG(PF_WIN_POS[intel_pipe], 0);
-	OUTREG(PF_WIN_SZ[intel_pipe], 0);
+	OUTREG(&igt_global_mmio, PF_CTRL1[intel_pipe], 0);
+	OUTREG(&igt_global_mmio, PF_WIN_POS[intel_pipe], 0);
+	OUTREG(&igt_global_mmio, PF_WIN_SZ[intel_pipe], 0);
 	return 0;
 }
 
@@ -280,7 +281,7 @@ int main (int argc, char *argv[])
 	       "solution that may or may not work. Use it at your own risk.\n");
 
 	pci_dev = intel_get_pci_device();
-	intel_register_access_init(pci_dev, 0, -1);
+	intel_register_access_init(pci_dev, 0, -1, &igt_global_mmio);
 	devid = pci_dev->device_id;
 
 	if (!HAS_PCH_SPLIT(devid)) {
@@ -342,6 +343,6 @@ int main (int argc, char *argv[])
 	}
 
 out:
-	intel_register_access_fini();
+	intel_register_access_fini(&igt_global_mmio);
 	return ret;
 }
diff --git a/tools/intel_perf_counters.c b/tools/intel_perf_counters.c
index 50c4bce6..23b8f8b1 100644
--- a/tools/intel_perf_counters.c
+++ b/tools/intel_perf_counters.c
@@ -45,6 +45,7 @@
 #include "drm.h"
 #include "i915_drm.h"
 #include "drmtest.h"
+#include "igt_device.h"
 #include "intel_io.h"
 #include "intel_bufmgr.h"
 #include "intel_batchbuffer.h"
@@ -323,6 +324,8 @@ struct intel_batchbuffer *batch;
 # define OACONTROL_COUNTER_SELECT_SHIFT 2
 # define PERFORMANCE_COUNTER_ENABLE     (1 << 0)
 
+struct mmio_data igt_global_mmio;
+
 static void
 gen5_get_counters(void)
 {
@@ -483,10 +486,10 @@ main(int argc, char **argv)
 
 	if (oacontrol) {
 		/* Forcewake */
-		intel_register_access_init(intel_get_pci_device(), 0, fd);
+		intel_register_access_init(igt_device_get_pci_device(fd), 0, fd, &igt_global_mmio);
 
 		/* Enable performance counters */
-		intel_register_write(OACONTROL,
+		intel_register_write(&igt_global_mmio, OACONTROL,
 			counter_format << OACONTROL_COUNTER_SELECT_SHIFT |
 			PERFORMANCE_COUNTER_ENABLE);
 	}
@@ -520,10 +523,10 @@ main(int argc, char **argv)
 
 	if (oacontrol) {
 		/* Disable performance counters */
-		intel_register_write(OACONTROL, 0);
+		intel_register_write(&igt_global_mmio, OACONTROL, 0);
 
 		/* Forcewake */
-		intel_register_access_fini();
+		intel_register_access_fini(&igt_global_mmio);
 	}
 
 	free(totals);
diff --git a/tools/intel_reg.c b/tools/intel_reg.c
index 1247b70b..e816bb9f 100644
--- a/tools/intel_reg.c
+++ b/tools/intel_reg.c
@@ -39,6 +39,7 @@
 
 #include "intel_reg_spec.h"
 
+struct mmio_data igt_global_mmio;
 
 #ifdef HAVE_SYS_IO_H
 #include <sys/io.h>
@@ -364,7 +365,7 @@ static int read_register(struct config *config, struct reg *reg, uint32_t *valp)
 		if (reg->engine)
 			val = register_srm(config, reg, NULL);
 		else
-			val = INREG(reg->mmio_offset + reg->addr);
+			val = INREG(&igt_global_mmio, reg->mmio_offset + reg->addr);
 		break;
 	case PORT_PORTIO_VGA:
 		iopl(3);
@@ -372,7 +373,7 @@ static int read_register(struct config *config, struct reg *reg, uint32_t *valp)
 		iopl(0);
 		break;
 	case PORT_MMIO_VGA:
-		val = INREG8(reg->addr);
+		val = INREG8(&igt_global_mmio, reg->addr);
 		break;
 	case PORT_BUNIT:
 	case PORT_PUNIT:
@@ -389,7 +390,7 @@ static int read_register(struct config *config, struct reg *reg, uint32_t *valp)
 				reg->port_desc.name);
 			return -1;
 		}
-		val = intel_iosf_sb_read(reg->port_desc.port, reg->addr);
+		val = intel_iosf_sb_read(&igt_global_mmio, reg->port_desc.port, reg->addr);
 		break;
 	default:
 		fprintf(stderr, "port %d not supported\n", reg->port_desc.port);
@@ -424,7 +425,7 @@ static int write_register(struct config *config, struct reg *reg, uint32_t val)
 		if (reg->engine) {
 			register_srm(config, reg, &val);
 		} else {
-			OUTREG(reg->mmio_offset + reg->addr, val);
+			OUTREG(&igt_global_mmio, reg->mmio_offset + reg->addr, val);
 		}
 		break;
 	case PORT_PORTIO_VGA:
@@ -443,7 +444,7 @@ static int write_register(struct config *config, struct reg *reg, uint32_t val)
 				val, reg->port_desc.name);
 			return -1;
 		}
-		OUTREG8(reg->addr, val);
+		OUTREG8(&igt_global_mmio, reg->addr, val);
 		break;
 	case PORT_BUNIT:
 	case PORT_PUNIT:
@@ -460,7 +461,7 @@ static int write_register(struct config *config, struct reg *reg, uint32_t val)
 				reg->port_desc.name);
 			return -1;
 		}
-		intel_iosf_sb_write(reg->port_desc.port, reg->addr, val);
+		intel_iosf_sb_write(&igt_global_mmio, reg->port_desc.port, reg->addr, val);
 		break;
 	default:
 		fprintf(stderr, "port %d not supported\n", reg->port_desc.port);
@@ -554,9 +555,9 @@ static int intel_reg_read(struct config *config, int argc, char *argv[])
 	}
 
 	if (config->mmiofile)
-		intel_mmio_use_dump_file(config->mmiofile);
+		intel_mmio_use_dump_file(&igt_global_mmio, config->mmiofile);
 	else
-		intel_register_access_init(config->pci_dev, 0, -1);
+		intel_register_access_init(config->pci_dev, 0, config->fd, &igt_global_mmio);
 
 	for (i = 1; i < argc; i++) {
 		struct reg reg;
@@ -572,7 +573,7 @@ static int intel_reg_read(struct config *config, int argc, char *argv[])
 		}
 	}
 
-	intel_register_access_fini();
+	intel_register_access_fini(&igt_global_mmio);
 
 	return EXIT_SUCCESS;
 }
@@ -586,7 +587,7 @@ static int intel_reg_write(struct config *config, int argc, char *argv[])
 		return EXIT_FAILURE;
 	}
 
-	intel_register_access_init(config->pci_dev, 0, -1);
+	intel_register_access_init(config->pci_dev, 0, config->fd, &igt_global_mmio);
 
 	for (i = 1; i < argc; i += 2) {
 		struct reg reg;
@@ -611,7 +612,7 @@ static int intel_reg_write(struct config *config, int argc, char *argv[])
 		write_register(config, &reg, val);
 	}
 
-	intel_register_access_fini();
+	intel_register_access_fini(&igt_global_mmio);
 
 	return EXIT_SUCCESS;
 }
@@ -622,9 +623,9 @@ static int intel_reg_dump(struct config *config, int argc, char *argv[])
 	int i;
 
 	if (config->mmiofile)
-		intel_mmio_use_dump_file(config->mmiofile);
+		intel_mmio_use_dump_file(&igt_global_mmio, config->mmiofile);
 	else
-		intel_register_access_init(config->pci_dev, 0, -1);
+		intel_register_access_init(config->pci_dev, 0, config->fd, &igt_global_mmio);
 
 	for (i = 0; i < config->regcount; i++) {
 		reg = &config->regs[i];
@@ -636,7 +637,7 @@ static int intel_reg_dump(struct config *config, int argc, char *argv[])
 		dump_register(config, &config->regs[i]);
 	}
 
-	intel_register_access_fini();
+	intel_register_access_fini(&igt_global_mmio);
 
 	return EXIT_SUCCESS;
 }
@@ -650,10 +651,10 @@ static int intel_reg_snapshot(struct config *config, int argc, char *argv[])
 		return EXIT_FAILURE;
 	}
 
-	intel_mmio_use_pci_bar(config->pci_dev);
+	intel_mmio_use_pci_bar(config->pci_dev, config->fd, &igt_global_mmio);
 
 	/* XXX: error handling */
-	if (write(1, igt_global_mmio, config->pci_dev->regions[mmio_bar].size) == -1)
+	if (write(1, igt_global_mmio.igt_mmio, config->pci_dev->regions[mmio_bar].size) == -1)
 		fprintf(stderr, "Error writing snapshot: %s", strerror(errno));
 
 	if (config->verbosity > 0)
diff --git a/tools/intel_reg_checker.c b/tools/intel_reg_checker.c
index 6bde63ec..2112fdcb 100644
--- a/tools/intel_reg_checker.c
+++ b/tools/intel_reg_checker.c
@@ -26,16 +26,18 @@
 #include <err.h>
 #include <string.h>
 #include <stdbool.h>
+#include "igt_device.h"
 #include "intel_io.h"
 #include "intel_chipset.h"
 
 static uint32_t devid;
 static int gen;
+struct mmio_data igt_global_mmio;
 
 static uint32_t
 read_and_print_reg(const char *name, uint32_t reg)
 {
-	uint32_t val = INREG(reg);
+	uint32_t val = INREG(&igt_global_mmio, reg);
 
 	printf("%s (0x%x): 0x%08x\n", name, reg, val);
 
@@ -345,7 +347,7 @@ int main(int argc, char** argv)
 
 	dev = intel_get_pci_device();
 	devid = dev->device_id;
-	intel_mmio_use_pci_bar(dev);
+	intel_mmio_use_pci_bar(dev, -1, &igt_global_mmio);
 
 	if (IS_GEN7(devid))
 		gen = 7;
diff --git a/tools/intel_watermark.c b/tools/intel_watermark.c
index e71c3d9c..f602e015 100644
--- a/tools/intel_watermark.c
+++ b/tools/intel_watermark.c
@@ -35,10 +35,11 @@
 
 static uint32_t display_base;
 static uint32_t devid;
+struct mmio_data igt_global_mmio;
 
 static uint32_t read_reg(uint32_t addr)
 {
-	return INREG(display_base + addr);
+	return INREG(&igt_global_mmio, display_base + addr);
 }
 
 struct gmch_wm {
@@ -249,7 +250,7 @@ static void skl_wm_dump(void)
 	uint32_t plane_ctl[num_pipes][max_planes];
 	uint32_t wm_linetime[num_pipes];
 
-	intel_register_access_init(intel_get_pci_device(), 0, -1);
+	intel_register_access_init(intel_get_pci_device(), 0, -1, &igt_global_mmio);
 
 	for (pipe = 0; pipe < num_pipes; pipe++) {
 		int num_planes = skl_num_planes(devid, pipe);
@@ -469,7 +470,7 @@ static void ilk_wm_dump(void)
 	int num_pipes = intel_gen(devid) >= 7 ? 3 : 2;
 	struct ilk_wm wm = {};
 
-	intel_register_access_init(intel_get_pci_device(), 0, -1);
+	intel_register_access_init(intel_get_pci_device(), 0, -1, &igt_global_mmio);
 
 	for (i = 0; i < num_pipes; i++) {
 		dspcntr[i] = read_reg(0x70180 + i * 0x1000);
@@ -505,7 +506,7 @@ static void ilk_wm_dump(void)
 	if (IS_BROADWELL(devid) || IS_HASWELL(devid))
 		wm_misc = read_reg(0x45260);
 
-	intel_register_access_fini();
+	intel_register_access_fini(&igt_global_mmio);
 
 	for (i = 0; i < num_pipes; i++)
 		printf("    WM_PIPE_%c = 0x%08x\n", pipe_name(i), wm_pipe[i]);
@@ -619,7 +620,7 @@ static void vlv_wm_dump(void)
 	uint32_t dsp_ss_pm, ddr_setup2;
 	struct gmch_wm wms[MAX_PLANE] = {};
 
-	intel_register_access_init(intel_get_pci_device(), 0, -1);
+	intel_register_access_init(intel_get_pci_device(), 0, -1, &igt_global_mmio);
 
 	dsparb = read_reg(0x70030);
 	dsparb2 = read_reg(0x70060);
@@ -650,13 +651,13 @@ static void vlv_wm_dump(void)
 
 		ddl3 = read_reg(0x70058);
 
-		intel_punit_read(0x36, &dsp_ss_pm);
-		intel_punit_read(0x139, &ddr_setup2);
+		intel_punit_read(&igt_global_mmio, 0x36, &dsp_ss_pm);
+		intel_punit_read(&igt_global_mmio, 0x139, &ddr_setup2);
 	} else {
 		fw7 = read_reg(0x7007c);
 	}
 
-	intel_register_access_fini();
+	intel_register_access_fini(&igt_global_mmio);
 
 	printf("        FW1 = 0x%08x\n", fw1);
 	printf("        FW2 = 0x%08x\n", fw2);
@@ -835,7 +836,7 @@ static void g4x_wm_dump(void)
 	uint32_t mi_arb_state;
 	struct gmch_wm wms[MAX_PLANE] = {};
 
-	intel_register_access_init(intel_get_pci_device(), 0, -1);
+	intel_register_access_init(intel_get_pci_device(), 0, -1, &igt_global_mmio);
 
 	dspacntr = read_reg(0x70180);
 	dspbcntr = read_reg(0x71180);
@@ -846,7 +847,7 @@ static void g4x_wm_dump(void)
 	mi_display_power_down = read_reg(0x20e0);
 	mi_arb_state = read_reg(0x20e4);
 
-	intel_register_access_fini();
+	intel_register_access_fini(&igt_global_mmio);
 
 	printf("             DSPACNTR = 0x%08x\n", dspacntr);
 	printf("             DSPBCNTR = 0x%08x\n", dspbcntr);
@@ -921,7 +922,7 @@ static void gen4_wm_dump(void)
 	uint32_t mi_arb_state;
 	struct gmch_wm wms[MAX_PLANE] = {};
 
-	intel_register_access_init(intel_get_pci_device(), 0, -1);
+	intel_register_access_init(intel_get_pci_device(), 0, -1, &igt_global_mmio);
 
 	dsparb = read_reg(0x70030);
 	fw1 = read_reg(0x70034);
@@ -930,7 +931,7 @@ static void gen4_wm_dump(void)
 	mi_display_power_down = read_reg(0x20e0);
 	mi_arb_state = read_reg(0x20e4);
 
-	intel_register_access_fini();
+	intel_register_access_fini(&igt_global_mmio);
 
 	printf("                  FW1 = 0x%08x\n", fw1);
 	printf("                  FW2 = 0x%08x\n", fw2);
@@ -992,7 +993,7 @@ static void pnv_wm_dump(void)
 	uint32_t cbr;
 	struct gmch_wm wms[MAX_PLANE] = {};
 
-	intel_register_access_init(intel_get_pci_device(), 0, -1);
+	intel_register_access_init(intel_get_pci_device(), 0, -1, &igt_global_mmio);
 
 	dsparb = read_reg(0x70030);
 	fw1 = read_reg(0x70034);
@@ -1002,7 +1003,7 @@ static void pnv_wm_dump(void)
 	mi_display_power_down = read_reg(0x20e0);
 	mi_arb_state = read_reg(0x20e4);
 
-	intel_register_access_fini();
+	intel_register_access_fini(&igt_global_mmio);
 
 	printf("               DSPARB = 0x%08x\n", dsparb);
 	printf("                  FW1 = 0x%08x\n", fw1);
@@ -1082,7 +1083,7 @@ static void gen3_wm_dump(void)
 	uint32_t mi_arb_state;
 	struct gmch_wm wms[MAX_PLANE] = {};
 
-	intel_register_access_init(intel_get_pci_device(), 0, -1);
+	intel_register_access_init(intel_get_pci_device(), 0, -1, &igt_global_mmio);
 
 	dsparb = read_reg(0x70030);
 	instpm = read_reg(0x20c0);
@@ -1090,7 +1091,7 @@ static void gen3_wm_dump(void)
 	fw_blc_self = read_reg(0x20e0);
 	mi_arb_state = read_reg(0x20e4);
 
-	intel_register_access_fini();
+	intel_register_access_fini(&igt_global_mmio);
 
 	printf("      DSPARB = 0x%08x\n", dsparb);
 	printf("      FW_BLC = 0x%016" PRIx64 "\n", fw_blc);
@@ -1151,7 +1152,7 @@ static void gen2_wm_dump(void)
 	uint32_t mi_state;
 	struct gmch_wm wms[MAX_PLANE] = {};
 
-	intel_register_access_init(intel_get_pci_device(), 0, -1);
+	intel_register_access_init(intel_get_pci_device(), 0, -1, &igt_global_mmio);
 
 	dsparb = read_reg(0x70030);
 	mem_mode = read_reg(0x20cc);
@@ -1159,7 +1160,7 @@ static void gen2_wm_dump(void)
 	fw_blc_self = read_reg(0x20e0);
 	mi_state = read_reg(0x20e4);
 
-	intel_register_access_fini();
+	intel_register_access_fini(&igt_global_mmio);
 
 	printf("     DSPARB = 0x%08x\n", dsparb);
 	printf("   MEM_MODE = 0x%08x\n", mem_mode);
-- 
2.20.1

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Re: [igt-dev] [PATCH i-g-t 3/3] lib/intel_mmio: Remove global igt_global_mmio

[Katarzyna Dec]

On Thu, Apr 04, 2019 at 03:18:05PM +0200, Daniel Mrzyglod wrote:
> In future tests there will be multiple PCI devices run at once.
> It's good for them to have different mmio space.
> 
> Signed-off-by: Daniel Mrzyglod <daniel.t.mrzyglod@intel.com>
> ---
>  benchmarks/gem_latency.c      |  11 +-
>  benchmarks/gem_wsim.c         |   8 +-
>  lib/intel_io.h                |  93 +++++++-----
>  lib/intel_iosf.c              |  82 +++++++----
>  lib/intel_mmio.c              | 206 +++++++++++++++-----------
>  tests/i915/gem_exec_latency.c |  10 +-
>  tests/i915/gem_exec_parse.c   |  14 +-
>  tests/i915/i915_pm_lpsp.c     |   8 +-
>  tools/intel_audio_dump.c      | 267 +++++++++++++++++-----------------
>  tools/intel_backlight.c       |  13 +-
>  tools/intel_display_poller.c  |  13 +-
>  tools/intel_forcewaked.c      |  11 +-
>  tools/intel_gpu_time.c        |   7 +-
>  tools/intel_infoframes.c      |  74 +++++-----
>  tools/intel_l3_parity.c       |  12 +-
>  tools/intel_lid.c             |   5 +-
>  tools/intel_panel_fitter.c    |  29 ++--
>  tools/intel_perf_counters.c   |  11 +-
>  tools/intel_reg.c             |  33 +++--
>  tools/intel_reg_checker.c     |   6 +-
>  tools/intel_watermark.c       |  37 ++---
>  21 files changed, 527 insertions(+), 423 deletions(-)
> 
> diff --git a/benchmarks/gem_latency.c b/benchmarks/gem_latency.c
> index c3fc4bf0..ea58098d 100644
> --- a/benchmarks/gem_latency.c
> +++ b/benchmarks/gem_latency.c
> @@ -43,6 +43,7 @@
>  #include <sys/poll.h>
>  #include <sys/resource.h>
>  #include "drm.h"
> +#include "igt_device.h"
>  
>  #define LOCAL_I915_EXEC_FENCE_IN              (1<<16)
>  #define LOCAL_I915_EXEC_FENCE_OUT             (1<<17)
> @@ -55,9 +56,12 @@
>  static int done;
>  static int fd;
>  static volatile uint32_t *timestamp_reg;
> +struct mmio_data igt_global_mmio;
>  
> -#define REG(x) (volatile uint32_t *)((volatile char *)igt_global_mmio + x)
> -#define REG_OFFSET(x) ((volatile char *)(x) - (volatile char *)igt_global_mmio)
> +#define REG(x) \
> +	(volatile uint32_t *)((volatile char *)igt_global_mmio.igt_mmio + x)
> +#define REG_OFFSET(x) \
> +	((volatile char *)(x) - (volatile char *)igt_global_mmio.igt_mmio)
>  
>  #if defined(__USE_XOPEN2K) && defined(gen7_safe_mmio)
>  static pthread_spinlock_t timestamp_lock;
> @@ -456,7 +460,8 @@ static int run(int seconds,
>  	if (gen < 6)
>  		return IGT_EXIT_SKIP; /* Needs BCS timestamp */
>  
> -	intel_register_access_init(intel_get_pci_device(), false, fd);
> +	intel_register_access_init(igt_device_get_pci_device(fd), false, fd,
> +				   &igt_global_mmio);
>  
>  	if (gen == 6)
>  		timestamp_reg = REG(RCS_TIMESTAMP);
> diff --git a/benchmarks/gem_wsim.c b/benchmarks/gem_wsim.c
> index afb9644d..274182a3 100644
> --- a/benchmarks/gem_wsim.c
> +++ b/benchmarks/gem_wsim.c
> @@ -50,6 +50,7 @@
>  
>  #include "intel_io.h"
>  #include "igt_aux.h"
> +#include "igt_device.h"
>  #include "igt_rand.h"
>  #include "igt_perf.h"
>  #include "sw_sync.h"
> @@ -57,6 +58,7 @@
>  
>  #include "ewma.h"
>  
> +struct mmio_data igt_global_mmio;
>  #define LOCAL_I915_EXEC_FENCE_IN              (1<<16)
>  #define LOCAL_I915_EXEC_FENCE_OUT             (1<<17)
>  
> @@ -229,7 +231,8 @@ static int fd;
>  #define SEQNO_OFFSET(engine) (SEQNO_IDX(engine) * sizeof(uint32_t))
>  
>  #define RCS_TIMESTAMP (0x2000 + 0x358)
> -#define REG(x) (volatile uint32_t *)((volatile char *)igt_global_mmio + x)
> +#define REG(x) \
> +	(volatile uint32_t *)((volatile char *)igt_global_mmio.igt_mmio + x)
>  
>  static const char *ring_str_map[NUM_ENGINES] = {
>  	[RCS] = "RCS",
> @@ -2223,7 +2226,8 @@ static void init_clocks(void)
>  	uint32_t rcs_start, rcs_end;
>  	double overhead, t;
>  
> -	intel_register_access_init(intel_get_pci_device(), false, fd);
> +	intel_register_access_init(igt_device_get_pci_device(fd), false, fd,
> +				   &igt_global_mmio);
>  
>  	if (verbose <= 1)
>  		return;
> diff --git a/lib/intel_io.h b/lib/intel_io.h
> index 6014c485..35fab8e8 100644
> --- a/lib/intel_io.h
> +++ b/lib/intel_io.h
> @@ -30,37 +30,67 @@
>  
>  #include <stdint.h>
>  #include <pciaccess.h>
> +#include <stdbool.h>
>  
>  /* register access helpers from intel_mmio.c */
> -extern void *igt_global_mmio;
> -void intel_mmio_use_pci_bar(struct pci_device *pci_dev);
> -void intel_mmio_use_dump_file(char *file);
>  
> -int intel_register_access_init(struct pci_device *pci_dev, int safe, int fd);
> -void intel_register_access_fini(void);
> -uint32_t intel_register_read(uint32_t reg);
> -void intel_register_write(uint32_t reg, uint32_t val);
> -int intel_register_access_needs_fakewake(void);
> +struct intel_register_range {
> +	uint32_t base;
> +	uint32_t size;
> +	uint32_t flags;
> +};
> +
> +struct intel_register_map {
> +	struct intel_register_range *map;
> +	uint32_t top;
> +	uint32_t alignment_mask;
> +};
> +
> +struct mmio_data {
> +	int inited;
> +	bool safe;
> +	uint32_t i915_devid;
> +	struct intel_register_map map;
> +	int key;
> +	void *igt_mmio;
> +};
>  
> -uint32_t INREG(uint32_t reg);
> -uint16_t INREG16(uint32_t reg);
> -uint8_t INREG8(uint32_t reg);
> -void OUTREG(uint32_t reg, uint32_t val);
> -void OUTREG16(uint32_t reg, uint16_t val);
> -void OUTREG8(uint32_t reg, uint8_t val);
> +void intel_mmio_use_pci_bar(struct pci_device *pci_dev, int fd,
> +			    struct mmio_data *mmio_data);
> +void intel_mmio_use_dump_file(struct mmio_data *mmio_data, char *file);
> +
> +int intel_register_access_init(struct pci_device *pci_dev, int safe, int fd,
> +			       struct mmio_data *mmio_data);
> +void intel_register_access_fini(struct mmio_data *mmio_data);
> +uint32_t intel_register_read(struct mmio_data *mmio_data, uint32_t reg);
> +void intel_register_write(struct mmio_data *mmio_data, uint32_t reg,
> +			  uint32_t val);
> +int intel_register_access_needs_fakewake(struct mmio_data *mmio_data);
> +
> +uint32_t INREG(struct mmio_data *mmio_data, uint32_t reg);
> +uint16_t INREG16(struct mmio_data *mmio_data, uint32_t reg);
> +uint8_t INREG8(struct mmio_data *mmio_data, uint32_t reg);
> +void OUTREG(struct mmio_data *mmio_data, uint32_t reg, uint32_t val);
> +void OUTREG16(struct mmio_data *mmio_data, uint32_t reg, uint16_t val);
> +void OUTREG8(struct mmio_data *mmio_data, uint32_t reg, uint8_t val);
>  
>  /* sideband access functions from intel_iosf.c */
> -uint32_t intel_dpio_reg_read(uint32_t reg, int phy);
> -void intel_dpio_reg_write(uint32_t reg, uint32_t val, int phy);
> -uint32_t intel_flisdsi_reg_read(uint32_t reg);
> -void intel_flisdsi_reg_write(uint32_t reg, uint32_t val);
> -uint32_t intel_iosf_sb_read(uint32_t port, uint32_t reg);
> -void intel_iosf_sb_write(uint32_t port, uint32_t reg, uint32_t val);
> +uint32_t intel_dpio_reg_read(struct mmio_data *mmio_data, uint32_t reg,
> +			     int phy);
> +void intel_dpio_reg_write(struct mmio_data *mmio_data, uint32_t reg,
> +			  uint32_t val, int phy);
> +uint32_t intel_flisdsi_reg_read(struct mmio_data *mmio_data, uint32_t reg);
> +void intel_flisdsi_reg_write(struct mmio_data *mmio_data, uint32_t reg,
> +			     uint32_t val);
> +uint32_t intel_iosf_sb_read(struct mmio_data *mmio_data, uint32_t port,
> +			    uint32_t reg);
> +void intel_iosf_sb_write(struct mmio_data *mmio_data, uint32_t port,
> +			 uint32_t reg, uint32_t val);
>  
> -int intel_punit_read(uint32_t addr, uint32_t *val);
> -int intel_punit_write(uint32_t addr, uint32_t val);
> -int intel_nc_read(uint32_t addr, uint32_t *val);
> -int intel_nc_write(uint32_t addr, uint32_t val);
> +int intel_punit_read(struct mmio_data *mmio_data, uint32_t addr, uint32_t *val);
> +int intel_punit_write(struct mmio_data *mmio_data, uint32_t addr, uint32_t val);
> +int intel_nc_read(struct mmio_data *mmio_data, uint32_t addr, uint32_t *val);
> +int intel_nc_write(struct mmio_data *mmio_data, uint32_t addr, uint32_t val);
>  
>  /* register maps from intel_reg_map.c */
>  #ifndef __GTK_DOC_IGNORE__
> @@ -71,19 +101,10 @@ int intel_nc_write(uint32_t addr, uint32_t val);
>  #define INTEL_RANGE_RW		(INTEL_RANGE_READ | INTEL_RANGE_WRITE)
>  #define INTEL_RANGE_END		(1<<31)
>  
> -struct intel_register_range {
> -	uint32_t base;
> -	uint32_t size;
> -	uint32_t flags;
> -};
> -
> -struct intel_register_map {
> -	struct intel_register_range *map;
> -	uint32_t top;
> -	uint32_t alignment_mask;
> -};
>  struct intel_register_map intel_get_register_map(uint32_t devid);
> -struct intel_register_range *intel_get_register_range(struct intel_register_map map, uint32_t offset, uint32_t mode);
> +struct intel_register_range *intel_get_register_range(struct intel_register_map
> +						      map, uint32_t offset,
> +						      uint32_t mode);
>  #endif /* __GTK_DOC_IGNORE__ */
>  
>  #endif /* INTEL_GPU_TOOLS_H */
> diff --git a/lib/intel_iosf.c b/lib/intel_iosf.c
> index 3b5a1370..52a885f5 100644
> --- a/lib/intel_iosf.c
> +++ b/lib/intel_iosf.c
> @@ -19,8 +19,8 @@
>  /* Private register write, double-word addressing, non-posted */
>  #define SB_CRWRDA_NP   0x07
>  
> -static int vlv_sideband_rw(uint32_t port, uint8_t opcode, uint32_t addr,
> -			   uint32_t *val)
> +static int vlv_sideband_rw(struct mmio_data *mmio_data, uint32_t port,
> +			   uint8_t opcode, uint32_t addr, uint32_t *val)
As I undestand VLV is quite an old gen, do we need to add mmio_data here? Or not
adding it breaks some compatibility?

nit: patch is almost 3000 lines of different changes, please divide it in
smaller chunks. It is hard to read so large changes and yet we need to
understand what is going on :/
Kasia
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Re: [igt-dev] [PATCH i-g-t 3/3] lib/intel_mmio: Remove global igt_global_mmio

[Mrzyglod, Daniel T]

[-- Attachment #1.1: Type: text/plain, Size: 2137 bytes --]

On Thu, 2019-04-04 at 16:47 +0200, Katarzyna Dec wrote:
> On Thu, Apr 04, 2019 at 03:18:05PM +0200, Daniel Mrzyglod wrote:
> > In future tests there will be multiple PCI devices run at once.
> > It's good for them to have different mmio space.
> > 
> > Signed-off-by: Daniel Mrzyglod <daniel.t.mrzyglod@intel.com>
> > ---
<CUT>
> > diff --git a/lib/intel_iosf.c b/lib/intel_iosf.c
> > index 3b5a1370..52a885f5 100644
> > --- a/lib/intel_iosf.c
> > +++ b/lib/intel_iosf.c
> > @@ -19,8 +19,8 @@
> >  /* Private register write, double-word addressing, non-posted */
> >  #define SB_CRWRDA_NP   0x07
> >  
> > -static int vlv_sideband_rw(uint32_t port, uint8_t opcode, uint32_t
> > addr,
> > -			   uint32_t *val)
> > +static int vlv_sideband_rw(struct mmio_data *mmio_data, uint32_t
> > port,
> > +			   uint8_t opcode, uint32_t addr, uint32_t
> > *val)
> As I undestand VLV is quite an old gen, do we need to add mmio_data
> here? Or not
> adding it breaks some compatibility?
> 
> nit: patch is almost 3000 lines of different changes, please divide
> it in
> smaller chunks. It is hard to read so large changes and yet we need
> to
> understand what is going on :/
> Kasia

The problem is that igt_global_mmio is using by VLV also and almost all
functions in intel_io.h

Design that was chosen was perfect for single device for now there are
many challenges for us and that there will be in many future scenarios:
- For example we will run competition card and ours - run some 	scenari
os
- Run our integrated and our future PCI card
- Put few different models PCI cards to limit CI cost.
- other more real scenarios

When I moved igt_global_mmio there was a need to update everything
that  was using that global pointer. 

There were few Tools that required more changes that were using
INREG/OUTREG directly.... i think intel_audio.c was a leader in diff :>

It's used by tools/tests/benchmarks others... but if i divide this
patch it will probably not compile... so it will not meet acceptance
criteria.

There is a need for v2 so i will try to adress those problems. 

Daniel

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Re: [igt-dev] [PATCH i-g-t 3/3] lib/intel_mmio: Remove global igt_global_mmio

[Katarzyna Dec]

On Thu, Apr 04, 2019 at 04:27:01PM +0100, Mrzyglod, Daniel T wrote:
> On Thu, 2019-04-04 at 16:47 +0200, Katarzyna Dec wrote:
> > On Thu, Apr 04, 2019 at 03:18:05PM +0200, Daniel Mrzyglod wrote:
> > > In future tests there will be multiple PCI devices run at once.
> > > It's good for them to have different mmio space.
> > > 
> > > Signed-off-by: Daniel Mrzyglod <daniel.t.mrzyglod@intel.com>
> > > ---
> <CUT>
> > > diff --git a/lib/intel_iosf.c b/lib/intel_iosf.c
> > > index 3b5a1370..52a885f5 100644
> > > --- a/lib/intel_iosf.c
> > > +++ b/lib/intel_iosf.c
> > > @@ -19,8 +19,8 @@
> > >  /* Private register write, double-word addressing, non-posted */
> > >  #define SB_CRWRDA_NP   0x07
> > >  
> > > -static int vlv_sideband_rw(uint32_t port, uint8_t opcode, uint32_t
> > > addr,
> > > -			   uint32_t *val)
> > > +static int vlv_sideband_rw(struct mmio_data *mmio_data, uint32_t
> > > port,
> > > +			   uint8_t opcode, uint32_t addr, uint32_t
> > > *val)
> > As I undestand VLV is quite an old gen, do we need to add mmio_data
> > here? Or not
> > adding it breaks some compatibility?
> > 
> > nit: patch is almost 3000 lines of different changes, please divide
> > it in
> > smaller chunks. It is hard to read so large changes and yet we need
> > to
> > understand what is going on :/
> > Kasia
> 
> The problem is that igt_global_mmio is using by VLV also and almost all
> functions in intel_io.h
> 
> Design that was chosen was perfect for single device for now there are
> many challenges for us and that there will be in many future scenarios:
> - For example we will run competition card and ours - run some 	scenari
> os
> - Run our integrated and our future PCI card
> - Put few different models PCI cards to limit CI cost.
> - other more real scenarios
> 
> When I moved igt_global_mmio there was a need to update everything
> that  was using that global pointer. 
> 
> There were few Tools that required more changes that were using
> INREG/OUTREG directly.... i think intel_audio.c was a leader in diff :>
> 
> It's used by tools/tests/benchmarks others... but if i divide this
> patch it will probably not compile... so it will not meet acceptance
> criteria.
> 
> There is a need for v2 so i will try to adress those problems. 
> 
> Daniel

Maybe you can have 1 patch that is adding new functionality, few another with
appling the changes and last one that is removing old one? With this approach
everything should compile. And will be more review friendly.
Change is quite big and it would be nice to have a decent review to avoid
implementing bugs.
Kasia
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[igt-dev] ✓ Fi.CI.BAT: success for Remove global igt_global_mmio

[Patchwork]

== Series Details ==

Series: Remove global igt_global_mmio
URL   : https://patchwork.freedesktop.org/series/59008/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_5870 -> IGTPW_2789
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/59008/revisions/1/mbox/

Known issues
------------

  Here are the changes found in IGTPW_2789 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_selftest@live_uncore:
    - fi-skl-gvtdvm:      PASS -> DMESG-FAIL [fdo#110210]

  
#### Possible fixes ####

  * igt@debugfs_test@read_all_entries:
    - fi-ilk-650:         DMESG-WARN [fdo#106387] -> PASS
    - {fi-kbl-7567u}:     DMESG-WARN [fdo#103558] / [fdo#105602] -> PASS

  * igt@gem_exec_suspend@basic-s3:
    - {fi-kbl-7567u}:     DMESG-WARN [fdo#103558] / [fdo#105079] / [fdo#105602] -> PASS

  * igt@i915_module_load@reload-with-fault-injection:
    - {fi-kbl-7567u}:     DMESG-WARN [fdo#105602] / [fdo#108529] -> PASS +1

  * igt@i915_pm_rpm@module-reload:
    - {fi-kbl-7567u}:     DMESG-WARN [fdo#108529] -> PASS

  * igt@kms_busy@basic-flip-a:
    - {fi-kbl-7567u}:     SKIP [fdo#109271] / [fdo#109278] -> PASS +2

  * igt@kms_chamelium@hdmi-edid-read:
    - {fi-kbl-7567u}:     FAIL [fdo#109569] -> PASS +1

  * igt@kms_chamelium@hdmi-hpd-fast:
    - {fi-kbl-7567u}:     FAIL [fdo#109800] -> PASS

  * igt@kms_frontbuffer_tracking@basic:
    - fi-byt-clapper:     FAIL [fdo#103167] -> PASS

  * igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a:
    - fi-byt-clapper:     FAIL [fdo#107362] -> PASS

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
    - {fi-kbl-7567u}:     DMESG-FAIL [fdo#105079] -> PASS

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
    - fi-byt-clapper:     FAIL [fdo#103191] / [fdo#107362] -> PASS +1

  * igt@prime_vgem@basic-fence-flip:
    - {fi-kbl-7567u}:     SKIP [fdo#109271] -> PASS +4

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
  [fdo#103558]: https://bugs.freedesktop.org/show_bug.cgi?id=103558
  [fdo#105079]: https://bugs.freedesktop.org/show_bug.cgi?id=105079
  [fdo#105602]: https://bugs.freedesktop.org/show_bug.cgi?id=105602
  [fdo#106387]: https://bugs.freedesktop.org/show_bug.cgi?id=106387
  [fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362
  [fdo#108529]: https://bugs.freedesktop.org/show_bug.cgi?id=108529
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
  [fdo#109569]: https://bugs.freedesktop.org/show_bug.cgi?id=109569
  [fdo#109800]: https://bugs.freedesktop.org/show_bug.cgi?id=109800
  [fdo#110210]: https://bugs.freedesktop.org/show_bug.cgi?id=110210


Participating hosts (50 -> 44)
------------------------------

  Missing    (6): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-icl-y 


Build changes
-------------

    * IGT: IGT_4928 -> IGTPW_2789

  CI_DRM_5870: 122dc43df57c9a03132314ddc78a6d60c714fa32 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_2789: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2789/
  IGT_4928: 014a6fa238322b497116b359cb92df1ce7fa8847 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2789/
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[igt-dev] ✗ Fi.CI.IGT: failure for Remove global igt_global_mmio

[Patchwork]

== Series Details ==

Series: Remove global igt_global_mmio
URL   : https://patchwork.freedesktop.org/series/59008/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_5870_full -> IGTPW_2789_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with IGTPW_2789_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in IGTPW_2789_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/59008/revisions/1/mbox/

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_2789_full:

### IGT changes ###

#### Possible regressions ####

  * igt@i915_pm_rpm@gem-execbuf:
    - shard-glk:          PASS -> DMESG-WARN

  
Known issues
------------

  Here are the changes found in IGTPW_2789_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_atomic_transition@4x-modeset-transitions:
    - shard-apl:          NOTRUN -> SKIP [fdo#109271] / [fdo#109278]

  * igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-a:
    - shard-kbl:          PASS -> DMESG-WARN [fdo#110222]

  * igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-c:
    - shard-hsw:          PASS -> DMESG-WARN [fdo#110222] +1

  * igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-b:
    - shard-snb:          PASS -> DMESG-WARN [fdo#110222]

  * igt@kms_content_protection@atomic:
    - shard-apl:          NOTRUN -> FAIL [fdo#108739] / [fdo#110321]

  * igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic:
    - shard-hsw:          PASS -> FAIL [fdo#105767]

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-indfb-fliptrack:
    - shard-apl:          NOTRUN -> SKIP [fdo#109271] +6

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-draw-blt:
    - shard-glk:          NOTRUN -> SKIP [fdo#109271]

  * igt@kms_plane_scaling@pipe-b-scaler-with-rotation:
    - shard-glk:          PASS -> SKIP [fdo#109271] / [fdo#109278]

  * igt@kms_rotation_crc@multiplane-rotation:
    - shard-kbl:          PASS -> FAIL [fdo#109016]

  * igt@kms_rotation_crc@multiplane-rotation-cropping-bottom:
    - shard-kbl:          PASS -> DMESG-FAIL [fdo#105763]

  * igt@kms_setmode@basic:
    - shard-kbl:          PASS -> FAIL [fdo#99912]

  * igt@kms_vblank@pipe-b-ts-continuation-modeset:
    - shard-kbl:          PASS -> FAIL [fdo#104894]
    - shard-apl:          PASS -> FAIL [fdo#104894]

  
#### Possible fixes ####

  * igt@kms_cursor_edge_walk@pipe-a-64x64-left-edge:
    - shard-snb:          SKIP [fdo#109271] / [fdo#109278] -> PASS

  * igt@kms_flip@modeset-vs-vblank-race:
    - shard-kbl:          FAIL [fdo#103060] -> PASS

  * igt@kms_pipe_crc_basic@read-crc-pipe-b-frame-sequence:
    - shard-snb:          SKIP [fdo#109271] -> PASS +2

  * igt@kms_setmode@basic:
    - shard-apl:          FAIL [fdo#99912] -> PASS

  * igt@kms_vblank@pipe-c-ts-continuation-modeset:
    - shard-kbl:          FAIL [fdo#104894] -> PASS
    - shard-apl:          FAIL [fdo#104894] -> PASS

  
#### Warnings ####

  * igt@kms_lease@atomic_implicit_crtc:
    - shard-snb:          SKIP [fdo#109271] -> FAIL [fdo#110279]

  * igt@runner@aborted:
    - shard-glk:          FAIL [fdo#109373] / [k.org#202321] -> ( 2 FAIL ) [fdo#109373] / [k.org#202321]

  
  [fdo#103060]: https://bugs.freedesktop.org/show_bug.cgi?id=103060
  [fdo#104894]: https://bugs.freedesktop.org/show_bug.cgi?id=104894
  [fdo#105763]: https://bugs.freedesktop.org/show_bug.cgi?id=105763
  [fdo#105767]: https://bugs.freedesktop.org/show_bug.cgi?id=105767
  [fdo#108739]: https://bugs.freedesktop.org/show_bug.cgi?id=108739
  [fdo#109016]: https://bugs.freedesktop.org/show_bug.cgi?id=109016
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
  [fdo#109373]: https://bugs.freedesktop.org/show_bug.cgi?id=109373
  [fdo#110222]: https://bugs.freedesktop.org/show_bug.cgi?id=110222
  [fdo#110279]: https://bugs.freedesktop.org/show_bug.cgi?id=110279
  [fdo#110321]: https://bugs.freedesktop.org/show_bug.cgi?id=110321
  [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
  [k.org#202321]: https://bugzilla.kernel.org/show_bug.cgi?id=202321


Participating hosts (9 -> 5)
------------------------------

  Missing    (4): pig-skl-6260u shard-skl pig-glk-j5005 shard-iclb 


Build changes
-------------

    * IGT: IGT_4928 -> IGTPW_2789
    * Piglit: piglit_4509 -> None

  CI_DRM_5870: 122dc43df57c9a03132314ddc78a6d60c714fa32 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_2789: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2789/
  IGT_4928: 014a6fa238322b497116b359cb92df1ce7fa8847 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2789/
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