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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 2/2] drm/i915: Simplify some icl pll calculations
Date: Wed, 10 Apr 2019 21:51:43 +0300	[thread overview]
Message-ID: <20190410185143.GR3888@intel.com> (raw)
In-Reply-To: <155492002888.28388.14977042614807550593@skylake-alporthouse-com>

On Wed, Apr 10, 2019 at 07:13:48PM +0100, Chris Wilson wrote:
> Quoting Ville Syrjälä (2019-04-10 18:59:52)
> > On Mon, Apr 08, 2019 at 06:05:06PM +0100, Chris Wilson wrote:
> > > Quoting Ville Syrjälä (2019-04-08 17:06:01)
> > > > On Mon, Apr 08, 2019 at 04:49:13PM +0100, Chris Wilson wrote:
> > > > > Quoting Ville Syrjala (2019-04-08 16:27:02)
> > > > > > -       /*
> > > > > > -        * Adjust the original formula to delay the division by 2^22 in order to
> > > > > > -        * minimize possible rounding errors.
> > > > > > -        */
> > > > > > -       tmp = (u64)m1 * m2_int * ref_clock +
> > > > > > -             (((u64)m1 * m2_frac * ref_clock) >> 22);
> > > > > > -       tmp = div_u64(tmp, 5 * div1 * div2);
> > > > > > -
> > > > > > -       return tmp;
> > > > > > +       return div_u64(mul_u32_u32(ref_clock * m1, m2),
> > > > > > +                      (5 * div1 * div2) << 22);
> > > > > 
> > > > > You say the denominator here is a u64, so do you not need to cast
> > > > > (u64)(5 * d1 * d2) to ensure it doesn't overflow the shift?
> > > > 
> > > > It should fit into u32. The maximum value should be
> > > > <= (5*0xf*0x7)<<22 based on the number of bits available
> > > 3b * 4b * 3b = 10b. So just fits.
> > > 
> > > Is it worth asserting those limits? Feels like it is running close, and
> > > will be subject to cargo-culting.
> > 
> > I suppose checking for it might be a good idea.
> > 
> > Just 'WARN_ON(5 * div1 * div2 >= 1 << 10)' maybe, or were you thinking
> > of something fancier?
> 
> How about something like
> struct {
> 	unsigned int div1 : 3;
> 	unsigned int div2 : 3;
> } d;
> 
> then with a bit of luck smatch will spot an overflow, and people might
> think twice when copying?
> 
> Even weirder,
> add/remove: 0/0 grow/shrink: 0/1 up/down: 0/-29 (-29)
> Function                                     old     new   delta
> intel_ddi_get_config                        2377    2348     -29
> 
> I dread to look into the function to see how that changed gcc's mind.

I get 48 bytes with a 32bit build, but only if I let it inline that
function. With noinline there is no change apart from a few registers
getting shuffled around. gcc works in mysterious ways.

-- 
Ville Syrjälä
Intel
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  reply	other threads:[~2019-04-10 18:51 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-04-08 15:27 [PATCH 1/2] drm/i915: Use mul_u32_u32() more Ville Syrjala
2019-04-08 15:27 ` [PATCH 2/2] drm/i915: Simplify some icl pll calculations Ville Syrjala
2019-04-08 15:49   ` Chris Wilson
2019-04-08 16:06     ` Ville Syrjälä
2019-04-08 16:14       ` Chris Wilson
2019-04-08 17:05       ` Chris Wilson
2019-04-10 17:59         ` Ville Syrjälä
2019-04-10 18:13           ` Chris Wilson
2019-04-10 18:51             ` Ville Syrjälä [this message]
2019-04-08 15:40 ` ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915: Use mul_u32_u32() more Patchwork
2019-04-08 15:44 ` [PATCH 1/2] " Chris Wilson
2019-04-10 18:24   ` Ville Syrjälä
2019-04-08 16:28 ` ✗ Fi.CI.BAT: failure for series starting with [1/2] " Patchwork
2019-04-30 14:10 ` ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915: Use mul_u32_u32() more (rev2) Patchwork
2019-04-30 14:25 ` ✓ Fi.CI.BAT: success " Patchwork
2019-05-01  4:53 ` ✗ Fi.CI.IGT: failure " Patchwork
2019-05-02  7:43 ` Patchwork
2019-05-02  8:47 ` ✓ Fi.CI.IGT: success " Patchwork

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