* [U-Boot] [PATCH v2 2/2] ARM: imx6: update 1GB DDR3 calibration for DHCOM i.MX6qd PDK
@ 2019-04-15 7:31 Ludwig Zenz
2019-04-26 9:36 ` [U-Boot] [U-Boot, v2, " sbabic at denx.de
0 siblings, 1 reply; 2+ messages in thread
From: Ludwig Zenz @ 2019-04-15 7:31 UTC (permalink / raw)
To: u-boot
The existing calibration values were found to be incorrect
in comparison to newly determined values.
The new values were generated with the help of 5 boards. They have
been determined with the NXP Utility 'DDR Stress Test (2.9.0)'.
Signed-off-by: Ludwig Zenz <lzenz@dh-electronics.com>
---
board/dhelectronics/dh_imx6/dh_imx6_spl.c | 24 ++++++++++++------------
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/board/dhelectronics/dh_imx6/dh_imx6_spl.c b/board/dhelectronics/dh_imx6/dh_imx6_spl.c
index bbd2dc26828..2939389de39 100644
--- a/board/dhelectronics/dh_imx6/dh_imx6_spl.c
+++ b/board/dhelectronics/dh_imx6/dh_imx6_spl.c
@@ -161,18 +161,18 @@ static const struct mx6_mmdc_calibration dhcom_mmdc_calib_2x4g_800 = {
};
static const struct mx6_mmdc_calibration dhcom_mmdc_calib_4x2g_1066 = {
- .p0_mpwldectrl0 = 0x0011000E,
- .p0_mpwldectrl1 = 0x000E001B,
- .p1_mpwldectrl0 = 0x00190015,
- .p1_mpwldectrl1 = 0x00070018,
- .p0_mpdgctrl0 = 0x42720306,
- .p0_mpdgctrl1 = 0x026F0266,
- .p1_mpdgctrl0 = 0x4273030A,
- .p1_mpdgctrl1 = 0x02740240,
- .p0_mprddlctl = 0x45393B3E,
- .p1_mprddlctl = 0x403A3747,
- .p0_mpwrdlctl = 0x40434541,
- .p1_mpwrdlctl = 0x473E4A3B,
+ .p0_mpwldectrl0 = 0x001a001a,
+ .p0_mpwldectrl1 = 0x00260015,
+ .p0_mpdgctrl0 = 0x030c0320,
+ .p0_mpdgctrl1 = 0x03100304,
+ .p0_mprddlctl = 0x432e3538,
+ .p0_mpwrdlctl = 0x363f423d,
+ .p1_mpwldectrl0 = 0x0006001e,
+ .p1_mpwldectrl1 = 0x00050015,
+ .p1_mpdgctrl0 = 0x031c0324,
+ .p1_mpdgctrl1 = 0x030c0258,
+ .p1_mprddlctl = 0x3834313f,
+ .p1_mpwrdlctl = 0x47374a42,
};
static const struct mx6_mmdc_calibration dhcom_mmdc_calib_4x2g_800 = {
--
2.11.0
^ permalink raw reply related [flat|nested] 2+ messages in thread
* [U-Boot] [U-Boot, v2, 2/2] ARM: imx6: update 1GB DDR3 calibration for DHCOM i.MX6qd PDK
2019-04-15 7:31 [U-Boot] [PATCH v2 2/2] ARM: imx6: update 1GB DDR3 calibration for DHCOM i.MX6qd PDK Ludwig Zenz
@ 2019-04-26 9:36 ` sbabic at denx.de
0 siblings, 0 replies; 2+ messages in thread
From: sbabic at denx.de @ 2019-04-26 9:36 UTC (permalink / raw)
To: u-boot
> The existing calibration values were found to be incorrect
> in comparison to newly determined values.
> The new values were generated with the help of 5 boards. They have
> been determined with the NXP Utility 'DDR Stress Test (2.9.0)'.
> Signed-off-by: Ludwig Zenz <lzenz@dh-electronics.com>
Applied to u-boot-imx, master, thanks !
Best regards,
Stefano Babic
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2019-04-15 7:31 [U-Boot] [PATCH v2 2/2] ARM: imx6: update 1GB DDR3 calibration for DHCOM i.MX6qd PDK Ludwig Zenz
2019-04-26 9:36 ` [U-Boot] [U-Boot, v2, " sbabic at denx.de
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