[v2] arm64: dts: ls1028a: Add properties for Mali DP500 node

[v2] arm64: dts: ls1028a: Add properties for Mali DP500 node

[Wen He]

The LS1028A has a LCD controller and Displayport interface that
connects to eDP and Displayport connectors on the LS1028A board.

This patch enables the LCD controller driver on the LS1028A.

Signed-off-by: Alison Wang <alison.wang@nxp.com>
Signed-off-by: Wen He <wen.he_1@nxp.com>
Reviewed-by: Liviu Dudau <liviu.dudau@arm.com>
---
change in v2:
        - renamed node name 'dp0' to be generic name 'display-0'.
        - replace clk name 'xxclk' to 'clock-xx'.
        - add newline between properties and child node.

 .../arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 38 +++++++++++++++++++
 1 file changed, 38 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
index 8dd3501b1333..643b1bb435b6 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
@@ -70,6 +70,27 @@
 		clock-output-names = "sysclk";
 	};
 
+	dpclk: clock-dp {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <27000000>;
+		clock-output-names= "dpclk";
+	};
+
+	aclk: clock-axi {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <650000000>;
+		clock-output-names= "aclk";
+	};
+
+	pclk: clock-apb {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <650000000>;
+		clock-output-names= "pclk";
+	};
+
 	reboot {
 		compatible ="syscon-reboot";
 		regmap = <&dcfg>;
@@ -433,4 +454,21 @@
 			};
 		};
 	};
+
+	display-0: malidp@f080000 {
+		compatible = "arm,mali-dp500";
+		reg = <0x0 0xf080000 0x0 0x10000>;
+		interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 223 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "DE", "SE";
+		clocks = <&dpclk>, <&aclk>, <&aclk>, <&pclk>;
+		clock-names = "pxlclk", "mclk", "aclk", "pclk";
+		arm,malidp-output-port-lines = /bits/ 8 <8 8 8>;
+
+		port {
+			dp0_out: endpoint {
+
+			};
+		};
+	};
 };
-- 
2.17.1

RE: [v2] arm64: dts: ls1028a: Add properties for Mali DP500 node

[Leo Li]

> -----Original Message-----
> From: Wen He
> Sent: Monday, April 15, 2019 2:41 AM
> To: devicetree@vger.kernel.org; shawnguo@kernel.org
> Cc: Leo Li <leoyang.li@nxp.com>; liviu.dudau@arm.com; Wen He
> <wen.he_1@nxp.com>
> Subject: [v2] arm64: dts: ls1028a: Add properties for Mali DP500 node
> 
> The LS1028A has a LCD controller and Displayport interface that connects to
> eDP and Displayport connectors on the LS1028A board.
> 
> This patch enables the LCD controller driver on the LS1028A.
> 
> Signed-off-by: Alison Wang <alison.wang@nxp.com>
> Signed-off-by: Wen He <wen.he_1@nxp.com>
> Reviewed-by: Liviu Dudau <liviu.dudau@arm.com>
> ---
> change in v2:
>         - renamed node name 'dp0' to be generic name 'display-0'.
>         - replace clk name 'xxclk' to 'clock-xx'.
>         - add newline between properties and child node.
> 
>  .../arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 38 +++++++++++++++++++
>  1 file changed, 38 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> index 8dd3501b1333..643b1bb435b6 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> @@ -70,6 +70,27 @@
>  		clock-output-names = "sysclk";
>  	};
> 
> +	dpclk: clock-dp {
> +		compatible = "fixed-clock";
> +		#clock-cells = <0>;
> +		clock-frequency = <27000000>;
> +		clock-output-names= "dpclk";
> +	};
> +
> +	aclk: clock-axi {
> +		compatible = "fixed-clock";
> +		#clock-cells = <0>;
> +		clock-frequency = <650000000>;
> +		clock-output-names= "aclk";
> +	};
> +
> +	pclk: clock-apb {
> +		compatible = "fixed-clock";
> +		#clock-cells = <0>;
> +		clock-frequency = <650000000>;
> +		clock-output-names= "pclk";
> +	};

Are these clocks really fixed at the SoC level?  Can it be changing between different boards or different configurations?

> +
>  	reboot {
>  		compatible ="syscon-reboot";
>  		regmap = <&dcfg>;
> @@ -433,4 +454,21 @@
>  			};
>  		};
>  	};
> +
> +	display-0: malidp@f080000 {
> +		compatible = "arm,mali-dp500";
> +		reg = <0x0 0xf080000 0x0 0x10000>;
> +		interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>,
> +			     <0 223 IRQ_TYPE_LEVEL_HIGH>;
> +		interrupt-names = "DE", "SE";
> +		clocks = <&dpclk>, <&aclk>, <&aclk>, <&pclk>;
> +		clock-names = "pxlclk", "mclk", "aclk", "pclk";
> +		arm,malidp-output-port-lines = /bits/ 8 <8 8 8>;
> +
> +		port {
> +			dp0_out: endpoint {
> +
> +			};
> +		};
> +	};
>  };
> --
> 2.17.1

RE: [v2] arm64: dts: ls1028a: Add properties for Mali DP500 node

[Wen He]

> -----Original Message-----
> From: Leo Li
> Sent: 2019年4月16日 1:04
> To: Wen He <wen.he_1@nxp.com>; devicetree@vger.kernel.org;
> shawnguo@kernel.org
> Cc: liviu.dudau@arm.com
> Subject: RE: [v2] arm64: dts: ls1028a: Add properties for Mali DP500 node
> 
> 
> 
> > -----Original Message-----
> > From: Wen He
> > Sent: Monday, April 15, 2019 2:41 AM
> > To: devicetree@vger.kernel.org; shawnguo@kernel.org
> > Cc: Leo Li <leoyang.li@nxp.com>; liviu.dudau@arm.com; Wen He
> > <wen.he_1@nxp.com>
> > Subject: [v2] arm64: dts: ls1028a: Add properties for Mali DP500 node
> >
> > The LS1028A has a LCD controller and Displayport interface that
> > connects to eDP and Displayport connectors on the LS1028A board.
> >
> > This patch enables the LCD controller driver on the LS1028A.
> >
> > Signed-off-by: Alison Wang <alison.wang@nxp.com>
> > Signed-off-by: Wen He <wen.he_1@nxp.com>
> > Reviewed-by: Liviu Dudau <liviu.dudau@arm.com>
> > ---
> > change in v2:
> >         - renamed node name 'dp0' to be generic name 'display-0'.
> >         - replace clk name 'xxclk' to 'clock-xx'.
> >         - add newline between properties and child node.
> >
> >  .../arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 38
> > +++++++++++++++++++
> >  1 file changed, 38 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> > b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> > index 8dd3501b1333..643b1bb435b6 100644
> > --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> > @@ -70,6 +70,27 @@
> >  		clock-output-names = "sysclk";
> >  	};
> >
> > +	dpclk: clock-dp {
> > +		compatible = "fixed-clock";
> > +		#clock-cells = <0>;
> > +		clock-frequency = <27000000>;
> > +		clock-output-names= "dpclk";
> > +	};
> > +
> > +	aclk: clock-axi {
> > +		compatible = "fixed-clock";
> > +		#clock-cells = <0>;
> > +		clock-frequency = <650000000>;
> > +		clock-output-names= "aclk";
> > +	};
> > +
> > +	pclk: clock-apb {
> > +		compatible = "fixed-clock";
> > +		#clock-cells = <0>;
> > +		clock-frequency = <650000000>;
> > +		clock-output-names= "pclk";
> > +	};
> 
> Are these clocks really fixed at the SoC level?  Can it be changing between
> different boards or different configurations?
> 

Yes, it's fixed. and these clock value not have change between different board.

> > +
> >  	reboot {
> >  		compatible ="syscon-reboot";
> >  		regmap = <&dcfg>;
> > @@ -433,4 +454,21 @@
> >  			};
> >  		};
> >  	};
> > +
> > +	display-0: malidp@f080000 {

Sorry for that, node name display-0 has syntax error, I will using 'display0' to replace it.
And will sent next version patch.

Best Regards,
Wen

> > +		compatible = "arm,mali-dp500";
> > +		reg = <0x0 0xf080000 0x0 0x10000>;
> > +		interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>,
> > +			     <0 223 IRQ_TYPE_LEVEL_HIGH>;
> > +		interrupt-names = "DE", "SE";
> > +		clocks = <&dpclk>, <&aclk>, <&aclk>, <&pclk>;
> > +		clock-names = "pxlclk", "mclk", "aclk", "pclk";
> > +		arm,malidp-output-port-lines = /bits/ 8 <8 8 8>;
> > +
> > +		port {
> > +			dp0_out: endpoint {
> > +
> > +			};
> > +		};
> > +	};
> >  };
> > --
> > 2.17.1