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From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Boris Brezillon <boris.brezillon@collabora.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
	devicetree@vger.kernel.org, Vignesh Raghavendra <vigneshr@ti.com>,
	Tudor Ambarus <Tudor.Ambarus@microchip.com>,
	Maxime Ripard <maxime.ripard@bootlin.com>,
	Richard Weinberger <richard@nod.at>,
	Marek Vasut <marek.vasut@gmail.com>, Chen-Yu Tsai <wens@csie.org>,
	Rob Herring <robh+dt@kernel.org>,
	linux-mtd@lists.infradead.org,
	Brian Norris <computersforpeace@gmail.com>,
	David Woodhouse <dwmw2@infradead.org>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 2/3] mtd: rawnand: sunxi: Add DMA support for sun8i
Date: Mon, 15 Apr 2019 08:58:59 +0200	[thread overview]
Message-ID: <20190415085859.21f69396@xps13> (raw)
In-Reply-To: <20190414110549.5c91829d@collabora.com>

Hi Boris,

Boris Brezillon <boris.brezillon@collabora.com> wrote on Sun, 14 Apr
2019 11:05:49 +0200:

> On Thu,  4 Apr 2019 18:21:10 +0200
> Miquel Raynal <miquel.raynal@bootlin.com> wrote:
> 
> > Allwinner NAND controllers can make use of DMA to enhance the I/O
> > throughput thanks to ECC pipelining. DMA handling with sun8i NAND IP
> > is a bit different than with the older SoCs, hence the introduction of
> > a new compatible to handle:
> > * the differences between register offsets,
> > * the burst length change from 4 to minimum 8,
> > * drive SRAM accesses through the AHB bus instead of the MBUS.  
> 
> Hm, now that you know MBUS accesses are working fine (IIRC, that's what
> you used for the SPL DMA-based implementation), why not directly use
> MBUS accesses on A33? I mean, it's likely faster than going through
> the DMA engine (which is shared by several IPs), and AFAIR, the MBUS
> setup is pretty simple.

Because all the driver is already in shape to use the external DMA
engine and it was very easy and quick (have a look at the diff of the
v3) to use it again.

However, the choice I am describing here is not DMA vs. MBUS (or MDMA),
it is MBUS vs. AHB, it is just about the bus that will access the SRAM
(this is what we have understood with Maxime from the datasheets and
the tests we have done). For this choice, we tested with both buses: no
throughput change so we think that it is not a bottleneck anyway.

Thanks,
Miquèl

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Boris Brezillon <boris.brezillon@collabora.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
	devicetree@vger.kernel.org, Vignesh Raghavendra <vigneshr@ti.com>,
	Tudor Ambarus <Tudor.Ambarus@microchip.com>,
	Maxime Ripard <maxime.ripard@bootlin.com>,
	Richard Weinberger <richard@nod.at>,
	Marek Vasut <marek.vasut@gmail.com>, Chen-Yu Tsai <wens@csie.org>,
	Rob Herring <robh+dt@kernel.org>,
	linux-mtd@lists.infradead.org,
	Brian Norris <computersforpeace@gmail.com>,
	David Woodhouse <dwmw2@infradead.org>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 2/3] mtd: rawnand: sunxi: Add DMA support for sun8i
Date: Mon, 15 Apr 2019 08:58:59 +0200	[thread overview]
Message-ID: <20190415085859.21f69396@xps13> (raw)
In-Reply-To: <20190414110549.5c91829d@collabora.com>

Hi Boris,

Boris Brezillon <boris.brezillon@collabora.com> wrote on Sun, 14 Apr
2019 11:05:49 +0200:

> On Thu,  4 Apr 2019 18:21:10 +0200
> Miquel Raynal <miquel.raynal@bootlin.com> wrote:
> 
> > Allwinner NAND controllers can make use of DMA to enhance the I/O
> > throughput thanks to ECC pipelining. DMA handling with sun8i NAND IP
> > is a bit different than with the older SoCs, hence the introduction of
> > a new compatible to handle:
> > * the differences between register offsets,
> > * the burst length change from 4 to minimum 8,
> > * drive SRAM accesses through the AHB bus instead of the MBUS.  
> 
> Hm, now that you know MBUS accesses are working fine (IIRC, that's what
> you used for the SPL DMA-based implementation), why not directly use
> MBUS accesses on A33? I mean, it's likely faster than going through
> the DMA engine (which is shared by several IPs), and AFAIR, the MBUS
> setup is pretty simple.

Because all the driver is already in shape to use the external DMA
engine and it was very easy and quick (have a look at the diff of the
v3) to use it again.

However, the choice I am describing here is not DMA vs. MBUS (or MDMA),
it is MBUS vs. AHB, it is just about the bus that will access the SRAM
(this is what we have understood with Maxime from the datasheets and
the tests we have done). For this choice, we tested with both buses: no
throughput change so we think that it is not a bottleneck anyway.

Thanks,
Miquèl

______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

  reply	other threads:[~2019-04-15  6:58 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-04-04 16:21 [PATCH 0/3] Sun8i NAND DMA support Miquel Raynal
2019-04-04 16:21 ` Miquel Raynal
2019-04-04 16:21 ` [PATCH 1/3] dt-bindings: mtd: sunxi: Add new compatible Miquel Raynal
2019-04-04 16:21   ` Miquel Raynal
2019-04-04 16:21   ` Miquel Raynal
2019-04-05  9:13   ` Maxime Ripard
2019-04-05  9:13     ` Maxime Ripard
2019-04-05  9:28     ` Miquel Raynal
2019-04-05  9:28       ` Miquel Raynal
2019-04-05  9:56       ` Maxime Ripard
2019-04-05  9:56         ` Maxime Ripard
2019-04-04 16:21 ` [PATCH 2/3] mtd: rawnand: sunxi: Add DMA support for sun8i Miquel Raynal
2019-04-04 16:21   ` Miquel Raynal
2019-04-04 16:21   ` Miquel Raynal
2019-04-05  9:16   ` Maxime Ripard
2019-04-05  9:16     ` Maxime Ripard
2019-04-05  9:37     ` Miquel Raynal
2019-04-05  9:37       ` Miquel Raynal
2019-04-05 10:55       ` Maxime Ripard
2019-04-05 10:55         ` Maxime Ripard
2019-04-05 12:25         ` Miquel Raynal
2019-04-05 12:25           ` Miquel Raynal
2019-04-05 12:47           ` Maxime Ripard
2019-04-05 12:47             ` Maxime Ripard
2019-04-14  9:05   ` Boris Brezillon
2019-04-14  9:05     ` Boris Brezillon
2019-04-14  9:05     ` Boris Brezillon
2019-04-15  6:58     ` Miquel Raynal [this message]
2019-04-15  6:58       ` Miquel Raynal
2019-04-15  7:14       ` Boris Brezillon
2019-04-15  7:14         ` Boris Brezillon
2019-04-15  7:14         ` Boris Brezillon
2019-04-16 16:53         ` Miquel Raynal
2019-04-16 16:53           ` Miquel Raynal
2019-04-04 16:21 ` [PATCH 3/3] ARM: dts: sunxi: Improve sun8i NAND transfers by using DMA Miquel Raynal
2019-04-04 16:21   ` Miquel Raynal
2019-04-05  9:18   ` Maxime Ripard
2019-04-05  9:18     ` Maxime Ripard
2019-04-05  9:38     ` Miquel Raynal
2019-04-05  9:38       ` Miquel Raynal

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