* [igt-dev] [PATCH i-g-t v3 0/5] Remove global igt_global_mmio
@ 2019-04-15 8:59 Daniel Mrzyglod
2019-04-15 8:59 ` [igt-dev] [PATCH i-g-t v3 1/5] lib/igt_device: add igt_device_get_pci_addr by fd Daniel Mrzyglod
` (6 more replies)
0 siblings, 7 replies; 14+ messages in thread
From: Daniel Mrzyglod @ 2019-04-15 8:59 UTC (permalink / raw)
To: igt-dev
This patchset remove global igt_global_mmio pointer and structures.
Motivation for this patch is to move global pointers. Current behaviour
limit number of concurrent PCI device. There is a need to run multiple
devices.
v2: fixed bugs pointed out in review
v3: divide series to more patches - fix bugs
Cc: Katarzyna Dec <katarzyna.dec@intel.com>
Cc: Michal Winiarski <michal.winiarski@intel.com>
Daniel Mrzyglod (4):
lib/igt_device: add igt_device_map_pci_bar_region
lib/intel_mmio: different functions are used for mapping if fd is
known.
lib/intel_mmio: extend read write registers functions by a pointer for
mmaped area
lib/intel_mmio: remove igt_global_mmio and move pointer to mmio_data
structure
Michał Winiarski (1):
lib/igt_device: add igt_device_get_pci_addr by fd
benchmarks/gem_latency.c | 5 +-
benchmarks/gem_wsim.c | 6 +-
lib/igt_device.c | 160 ++++++++++++++++++
lib/igt_device.h | 3 +
lib/intel_io.h | 90 +++++++----
lib/intel_iosf.c | 80 +++++----
lib/intel_mmio.c | 178 ++++++++++----------
tests/i915/gem_exec_latency.c | 7 +-
tests/i915/gem_exec_parse.c | 14 +-
tests/i915/i915_pm_lpsp.c | 9 +-
tools/intel_audio_dump.c | 296 +++++++++++++++++++---------------
tools/intel_backlight.c | 15 +-
tools/intel_display_poller.c | 15 +-
tools/intel_forcewaked.c | 14 +-
tools/intel_gpu_time.c | 11 +-
tools/intel_infoframes.c | 75 ++++-----
tools/intel_l3_parity.c | 14 +-
tools/intel_lid.c | 8 +-
tools/intel_panel_fitter.c | 31 ++--
tools/intel_perf_counters.c | 17 +-
tools/intel_reg.c | 41 +++--
tools/intel_reg_checker.c | 8 +-
tools/intel_watermark.c | 46 +++---
23 files changed, 731 insertions(+), 412 deletions(-)
--
2.20.1
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 14+ messages in thread
* [igt-dev] [PATCH i-g-t v3 1/5] lib/igt_device: add igt_device_get_pci_addr by fd
2019-04-15 8:59 [igt-dev] [PATCH i-g-t v3 0/5] Remove global igt_global_mmio Daniel Mrzyglod
@ 2019-04-15 8:59 ` Daniel Mrzyglod
2019-04-15 13:24 ` Katarzyna Dec
2019-04-15 8:59 ` [igt-dev] [PATCH i-g-t v3 2/5] lib/igt_device: add igt_device_map_pci_bar_region Daniel Mrzyglod
` (5 subsequent siblings)
6 siblings, 1 reply; 14+ messages in thread
From: Daniel Mrzyglod @ 2019-04-15 8:59 UTC (permalink / raw)
To: igt-dev
From: Michał Winiarski <michal.winiarski@intel.com>
This function get us pci address based by fd.
It allows us to make things a little bit more generic.
Also, we now require fd rather than doing guesswork when it comes to pci address.
Signed-off-by: Michał Winiarski <michal.winiarski@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Mrzyglod <daniel.t.mrzyglod@intel.com>
---
lib/igt_device.c | 122 +++++++++++++++++++++++++++++++++++++++++++++++
lib/igt_device.h | 2 +
2 files changed, 124 insertions(+)
diff --git a/lib/igt_device.c b/lib/igt_device.c
index 08f39c8b..f3d2a9f5 100644
--- a/lib/igt_device.c
+++ b/lib/igt_device.c
@@ -21,11 +21,14 @@
* IN THE SOFTWARE.
*
*/
+#include <sys/types.h>
+#include <fcntl.h>
#include <sys/stat.h>
#include <sys/sysmacros.h>
#include "igt.h"
#include "igt_device.h"
+#include "igt_sysfs.h"
int __igt_device_set_master(int fd)
{
@@ -103,3 +106,122 @@ int igt_device_get_card_index(int fd)
return minor(st.st_rdev);
}
+
+#define IGT_DEV_PATH_LEN 80
+
+static bool igt_device_is_pci(int fd)
+{
+ char path[IGT_DEV_PATH_LEN];
+ char *subsystem;
+ int sysfs;
+ int len;
+
+ sysfs = igt_sysfs_open(fd);
+ if (sysfs == -1)
+ return false;
+
+ len = readlinkat(sysfs, "device/subsystem", path, sizeof(path) - 1);
+ if (len == -1)
+ return false;
+ path[len] = '\0';
+
+ subsystem = strrchr(path, '/');
+ if (!subsystem)
+ return false;
+
+ return strcmp(subsystem, "/pci") == 0;
+}
+
+struct igt_pci_addr {
+ unsigned int domain;
+ unsigned int bus;
+ unsigned int device;
+ unsigned int function;
+};
+
+static int igt_device_get_pci_addr(int fd, struct igt_pci_addr *pci)
+{
+ char path[IGT_DEV_PATH_LEN];
+ char *buf;
+ int sysfs;
+ int len;
+
+ if (!igt_device_is_pci(fd))
+ return -ENODEV;
+
+ sysfs = igt_sysfs_open(fd);
+ if (sysfs == -1)
+ return -ENOENT;
+
+ len = readlinkat(sysfs, "device", path, sizeof(path) - 1);
+ if (len == -1)
+ return -ENOENT;
+ path[len] = '\0';
+
+ buf = strrchr(path, '/');
+ if (!buf)
+ return -ENOENT;
+
+ if (sscanf(buf, "/%4x:%2x:%2x.%2x",
+ &pci->domain, &pci->bus,
+ &pci->device, &pci->function) != 4) {
+ igt_warn("Unable to extract PCI device address from '%s'\n", buf);
+ return -ENOENT;
+ }
+
+ return 0;
+}
+
+static struct pci_device *__igt_device_get_pci_device(int fd)
+{
+ struct igt_pci_addr pci_addr;
+ struct pci_device *pci_dev;
+
+ if (igt_device_get_pci_addr(fd, &pci_addr)) {
+ igt_warn("Unable to find device PCI address\n");
+ return NULL;
+ }
+
+ if (pci_system_init()) {
+ igt_warn("Couldn't initialize PCI system\n");
+ return NULL;
+ }
+
+ pci_dev = pci_device_find_by_slot(pci_addr.domain,
+ pci_addr.bus,
+ pci_addr.device,
+ pci_addr.function);
+ if (!pci_dev) {
+ igt_warn("Couldn't find PCI device %04x:%02x:%02x:%02x\n",
+ pci_addr.domain, pci_addr.bus,
+ pci_addr.device, pci_addr.function);
+ return NULL;
+ }
+
+ if (pci_device_probe(pci_dev)) {
+ igt_warn("Couldn't probe PCI device\n");
+ return NULL;
+ }
+
+ return pci_dev;
+}
+
+/**
+ * igt_device_get_pci_device:
+ *
+ * @fd: the device
+ *
+ * Looks up the main graphics pci device using libpciaccess.
+ *
+ * Returns:
+ * The pci_device, skips the test on any failures.
+ */
+struct pci_device *igt_device_get_pci_device(int fd)
+{
+ struct pci_device *pci_dev;
+
+ pci_dev = __igt_device_get_pci_device(fd);
+ igt_require(pci_dev);
+
+ return pci_dev;
+}
diff --git a/lib/igt_device.h b/lib/igt_device.h
index 9d7dc2c3..860b3a8a 100644
--- a/lib/igt_device.h
+++ b/lib/igt_device.h
@@ -25,6 +25,7 @@
#ifndef __IGT_DEVICE_H__
#define __IGT_DEVICE_H__
+#include <stdint.h>
int __igt_device_set_master(int fd);
void igt_device_set_master(int fd);
@@ -32,5 +33,6 @@ int __igt_device_drop_master(int fd);
void igt_device_drop_master(int fd);
int igt_device_get_card_index(int fd);
+struct pci_device *igt_device_get_pci_device(int fd);
#endif /* __IGT_DEVICE_H__ */
--
2.20.1
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [igt-dev] [PATCH i-g-t v3 2/5] lib/igt_device: add igt_device_map_pci_bar_region
2019-04-15 8:59 [igt-dev] [PATCH i-g-t v3 0/5] Remove global igt_global_mmio Daniel Mrzyglod
2019-04-15 8:59 ` [igt-dev] [PATCH i-g-t v3 1/5] lib/igt_device: add igt_device_get_pci_addr by fd Daniel Mrzyglod
@ 2019-04-15 8:59 ` Daniel Mrzyglod
2019-04-15 13:37 ` Katarzyna Dec
2019-04-15 8:59 ` [igt-dev] [PATCH i-g-t v3 3/5] lib/intel_mmio: different functions are used for mapping if fd is known Daniel Mrzyglod
` (4 subsequent siblings)
6 siblings, 1 reply; 14+ messages in thread
From: Daniel Mrzyglod @ 2019-04-15 8:59 UTC (permalink / raw)
To: igt-dev
This function use sysfs to map particular mmio region.
fd of opened device point us for specific pci device.
Signed-off-by: Daniel Mrzyglod <daniel.t.mrzyglod@intel.com>
---
lib/igt_device.c | 38 ++++++++++++++++++++++++++++++++++++++
lib/igt_device.h | 1 +
2 files changed, 39 insertions(+)
diff --git a/lib/igt_device.c b/lib/igt_device.c
index f3d2a9f5..8b280474 100644
--- a/lib/igt_device.c
+++ b/lib/igt_device.c
@@ -225,3 +225,41 @@ struct pci_device *igt_device_get_pci_device(int fd)
return pci_dev;
}
+
+/**
+ * igt_device_map_pci_bar_region:
+ *
+ * @fd: the device
+ * @mmio_bar: bar to be mapped
+ * @mmio_size: bar size
+ *
+ * Returns:
+ * The pointer for mmapped bar
+ */
+void *igt_device_map_pci_bar_region(int fd, int mmio_bar, int mmio_size)
+{
+ struct igt_pci_addr pci_addr;
+ char *filepath = NULL;
+ int newfd;
+ void *igt_mmio;
+
+ if (igt_device_get_pci_addr(fd, &pci_addr)) {
+ igt_warn("Unable to find device PCI address\n");
+ return NULL;
+ }
+
+ asprintf(&filepath, "/sys/devices/pci%.4x:%.2x/%.4x:%.2x:%.2x.%.1x/resource%.1x",
+ pci_addr.domain, pci_addr.bus, pci_addr.domain, pci_addr.bus,
+ pci_addr.device, pci_addr.function, mmio_bar);
+ newfd = open(filepath, O_RDWR | O_SYNC);
+ igt_mmio = mmap(0, mmio_size, PROT_READ | PROT_WRITE, MAP_SHARED,
+ newfd, 0);
+ free(filepath);
+ close(newfd);
+ igt_fail_on_f(igt_mmio == MAP_FAILED,
+ "Couldn't map MMIO region %.4x:%.2x:%.2x.%.1x BAR %d\n",
+ pci_addr.domain, pci_addr.bus, pci_addr.device,
+ pci_addr.function, mmio_bar);
+
+ return igt_mmio;
+}
diff --git a/lib/igt_device.h b/lib/igt_device.h
index 860b3a8a..6ffc1d5e 100644
--- a/lib/igt_device.h
+++ b/lib/igt_device.h
@@ -34,5 +34,6 @@ void igt_device_drop_master(int fd);
int igt_device_get_card_index(int fd);
struct pci_device *igt_device_get_pci_device(int fd);
+void *igt_device_map_pci_bar_region(int fd, int mmio_bar, int mmio_size);
#endif /* __IGT_DEVICE_H__ */
--
2.20.1
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [igt-dev] [PATCH i-g-t v3 3/5] lib/intel_mmio: different functions are used for mapping if fd is known.
2019-04-15 8:59 [igt-dev] [PATCH i-g-t v3 0/5] Remove global igt_global_mmio Daniel Mrzyglod
2019-04-15 8:59 ` [igt-dev] [PATCH i-g-t v3 1/5] lib/igt_device: add igt_device_get_pci_addr by fd Daniel Mrzyglod
2019-04-15 8:59 ` [igt-dev] [PATCH i-g-t v3 2/5] lib/igt_device: add igt_device_map_pci_bar_region Daniel Mrzyglod
@ 2019-04-15 8:59 ` Daniel Mrzyglod
2019-04-15 13:50 ` Katarzyna Dec
2019-04-15 8:59 ` [igt-dev] [PATCH i-g-t v3 4/5] lib/intel_mmio: extend read write registers functions by a pointer for mmaped area Daniel Mrzyglod
` (3 subsequent siblings)
6 siblings, 1 reply; 14+ messages in thread
From: Daniel Mrzyglod @ 2019-04-15 8:59 UTC (permalink / raw)
To: igt-dev
intel_mmio_use_pci_bar function if fd is known now use igt_device_map_pci_bar_region.
old method from pciaccess library is left for legacy
apps that work when driver is not loaded.
Signed-off-by: Daniel Mrzyglod <daniel.t.mrzyglod@intel.com>
---
lib/intel_io.h | 2 +-
lib/intel_mmio.c | 32 +++++++++++++++++++++++---------
tools/intel_audio_dump.c | 2 +-
tools/intel_backlight.c | 2 +-
tools/intel_gpu_time.c | 2 +-
tools/intel_lid.c | 2 +-
tools/intel_reg.c | 2 +-
tools/intel_reg_checker.c | 2 +-
8 files changed, 30 insertions(+), 16 deletions(-)
diff --git a/lib/intel_io.h b/lib/intel_io.h
index 6014c485..09fea386 100644
--- a/lib/intel_io.h
+++ b/lib/intel_io.h
@@ -33,7 +33,7 @@
/* register access helpers from intel_mmio.c */
extern void *igt_global_mmio;
-void intel_mmio_use_pci_bar(struct pci_device *pci_dev);
+void intel_mmio_use_pci_bar(struct pci_device *pci_dev, int fd);
void intel_mmio_use_dump_file(char *file);
int intel_register_access_init(struct pci_device *pci_dev, int safe, int fd);
diff --git a/lib/intel_mmio.c b/lib/intel_mmio.c
index a5458aeb..daca1ad2 100644
--- a/lib/intel_mmio.c
+++ b/lib/intel_mmio.c
@@ -45,6 +45,7 @@
#include "igt_core.h"
#include "igt_gt.h"
#include "intel_chipset.h"
+#include "igt_device.h"
/**
* SECTION:intel_io
@@ -115,7 +116,7 @@ intel_mmio_use_dump_file(char *file)
* @pci_dev can be obtained from intel_get_pci_device().
*/
void
-intel_mmio_use_pci_bar(struct pci_device *pci_dev)
+intel_mmio_use_pci_bar(struct pci_device *pci_dev, int fd)
{
uint32_t devid, gen;
int mmio_bar, mmio_size;
@@ -135,14 +136,27 @@ intel_mmio_use_pci_bar(struct pci_device *pci_dev)
else
mmio_size = 2*1024*1024;
- error = pci_device_map_range (pci_dev,
- pci_dev->regions[mmio_bar].base_addr,
- mmio_size,
- PCI_DEV_MAP_FLAG_WRITABLE,
- &igt_global_mmio);
+ /* It's for some legacy tools existing in tree that require
+ * working without driver
+ */
+
+ if (fd == -1) {
+ error = pci_device_map_range(pci_dev,
+ pci_dev->regions[mmio_bar].base_addr,
+ mmio_size,
+ PCI_DEV_MAP_FLAG_WRITABLE,
+ &igt_global_mmio);
+
+ igt_fail_on_f(error != 0, "Couldn't map MMIO region\n");
+ } else {
+ /* This method is much more convenient when we have many
+ * concurrent PCI devices
+ */
+ igt_global_mmio = igt_device_map_pci_bar_region(fd, mmio_bar,
+ mmio_size);
+ }
- igt_fail_on_f(error != 0,
- "Couldn't map MMIO region\n");
+ igt_fail_on_f(error != 0, "Couldn't map MMIO region\n");
}
static void
@@ -171,7 +185,7 @@ intel_register_access_init(struct pci_device *pci_dev, int safe, int fd)
/* after old API is deprecated, remove this */
if (igt_global_mmio == NULL)
- intel_mmio_use_pci_bar(pci_dev);
+ intel_mmio_use_pci_bar(pci_dev, fd);
igt_assert(igt_global_mmio != NULL);
diff --git a/tools/intel_audio_dump.c b/tools/intel_audio_dump.c
index 90260a2f..d952e54b 100644
--- a/tools/intel_audio_dump.c
+++ b/tools/intel_audio_dump.c
@@ -2473,7 +2473,7 @@ int main(int argc, char **argv)
if (argc == 2)
intel_mmio_use_dump_file(argv[1]);
else
- intel_mmio_use_pci_bar(pci_dev);
+ intel_mmio_use_pci_bar(pci_dev, -1);
printf("%s audio registers:\n\n", intel_get_device_info(devid)->codename);
if (IS_VALLEYVIEW(devid)) {
diff --git a/tools/intel_backlight.c b/tools/intel_backlight.c
index 067fd418..e4850e88 100644
--- a/tools/intel_backlight.c
+++ b/tools/intel_backlight.c
@@ -40,7 +40,7 @@ int main(int argc, char** argv)
{
uint32_t current, max;
- intel_mmio_use_pci_bar(intel_get_pci_device());
+ intel_mmio_use_pci_bar(intel_get_pci_device(), -1);
current = INREG(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
max = INREG(BLC_PWM_PCH_CTL2) >> 16;
diff --git a/tools/intel_gpu_time.c b/tools/intel_gpu_time.c
index 56d65fe0..4ed6430e 100644
--- a/tools/intel_gpu_time.c
+++ b/tools/intel_gpu_time.c
@@ -67,7 +67,7 @@ int main(int argc, char **argv)
static struct rusage rusage;
int status;
- intel_mmio_use_pci_bar(intel_get_pci_device());
+ intel_mmio_use_pci_bar(intel_get_pci_device(), -1);
if (argc == 1) {
fprintf(stderr, "usage: %s cmd [args...]\n", argv[0]);
diff --git a/tools/intel_lid.c b/tools/intel_lid.c
index 37c6ba5e..f45756e2 100644
--- a/tools/intel_lid.c
+++ b/tools/intel_lid.c
@@ -119,7 +119,7 @@ int main(int argc, char **argv)
{
int swf14, acpi_lid;
- intel_mmio_use_pci_bar(intel_get_pci_device());
+ intel_mmio_use_pci_bar(intel_get_pci_device(), -1);
while (1) {
swf14 = INREG(SWF14);
diff --git a/tools/intel_reg.c b/tools/intel_reg.c
index 1247b70b..947ec378 100644
--- a/tools/intel_reg.c
+++ b/tools/intel_reg.c
@@ -650,7 +650,7 @@ static int intel_reg_snapshot(struct config *config, int argc, char *argv[])
return EXIT_FAILURE;
}
- intel_mmio_use_pci_bar(config->pci_dev);
+ intel_mmio_use_pci_bar(config->pci_dev, -1);
/* XXX: error handling */
if (write(1, igt_global_mmio, config->pci_dev->regions[mmio_bar].size) == -1)
diff --git a/tools/intel_reg_checker.c b/tools/intel_reg_checker.c
index 6bde63ec..92a89ae0 100644
--- a/tools/intel_reg_checker.c
+++ b/tools/intel_reg_checker.c
@@ -345,7 +345,7 @@ int main(int argc, char** argv)
dev = intel_get_pci_device();
devid = dev->device_id;
- intel_mmio_use_pci_bar(dev);
+ intel_mmio_use_pci_bar(dev, -1);
if (IS_GEN7(devid))
gen = 7;
--
2.20.1
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [igt-dev] [PATCH i-g-t v3 4/5] lib/intel_mmio: extend read write registers functions by a pointer for mmaped area
2019-04-15 8:59 [igt-dev] [PATCH i-g-t v3 0/5] Remove global igt_global_mmio Daniel Mrzyglod
` (2 preceding siblings ...)
2019-04-15 8:59 ` [igt-dev] [PATCH i-g-t v3 3/5] lib/intel_mmio: different functions are used for mapping if fd is known Daniel Mrzyglod
@ 2019-04-15 8:59 ` Daniel Mrzyglod
2019-04-17 10:20 ` Katarzyna Dec
2019-04-15 8:59 ` [igt-dev] [PATCH i-g-t v3 5/5] lib/intel_mmio: remove igt_global_mmio and move pointer to mmio_data structure Daniel Mrzyglod
` (2 subsequent siblings)
6 siblings, 1 reply; 14+ messages in thread
From: Daniel Mrzyglod @ 2019-04-15 8:59 UTC (permalink / raw)
To: igt-dev
This patch is first move to extend functionality of intel_mmio library.
There were limitation for 1 device, adding pointer for io functions to mmaped area gives
us possibility to use those io functions for other mmaped areas.
Signed-off-by: Daniel Mrzyglod <daniel.t.mrzyglod@intel.com>
---
lib/intel_io.h | 37 ++---
lib/intel_iosf.c | 77 ++++++----
lib/intel_mmio.c | 39 +++--
tests/i915/gem_exec_parse.c | 6 +-
tests/i915/i915_pm_lpsp.c | 2 +-
tools/intel_audio_dump.c | 289 +++++++++++++++++++----------------
tools/intel_backlight.c | 10 +-
tools/intel_display_poller.c | 8 +-
tools/intel_forcewaked.c | 2 +-
tools/intel_gpu_time.c | 6 +-
tools/intel_infoframes.c | 68 ++++-----
tools/intel_l3_parity.c | 8 +-
tools/intel_lid.c | 2 +-
tools/intel_panel_fitter.c | 24 +--
tools/intel_perf_counters.c | 9 +-
tools/intel_reg.c | 16 +-
tools/intel_reg_checker.c | 2 +-
tools/intel_watermark.c | 6 +-
18 files changed, 334 insertions(+), 277 deletions(-)
diff --git a/lib/intel_io.h b/lib/intel_io.h
index 09fea386..fd99bbb7 100644
--- a/lib/intel_io.h
+++ b/lib/intel_io.h
@@ -38,29 +38,30 @@ void intel_mmio_use_dump_file(char *file);
int intel_register_access_init(struct pci_device *pci_dev, int safe, int fd);
void intel_register_access_fini(void);
-uint32_t intel_register_read(uint32_t reg);
-void intel_register_write(uint32_t reg, uint32_t val);
+uint32_t intel_register_read(void *igt_mmio, uint32_t reg);
+void intel_register_write(void *igt_mmio, uint32_t reg, uint32_t val);
int intel_register_access_needs_fakewake(void);
-uint32_t INREG(uint32_t reg);
-uint16_t INREG16(uint32_t reg);
-uint8_t INREG8(uint32_t reg);
-void OUTREG(uint32_t reg, uint32_t val);
-void OUTREG16(uint32_t reg, uint16_t val);
-void OUTREG8(uint32_t reg, uint8_t val);
+uint32_t INREG(void *igt_mmio, uint32_t reg);
+uint16_t INREG16(void *igt_mmio, uint32_t reg);
+uint8_t INREG8(void *igt_mmio, uint32_t reg);
+void OUTREG(void *igt_mmio, uint32_t reg, uint32_t val);
+void OUTREG16(void *igt_mmio, uint32_t reg, uint16_t val);
+void OUTREG8(void *igt_mmio, uint32_t reg, uint8_t val);
/* sideband access functions from intel_iosf.c */
-uint32_t intel_dpio_reg_read(uint32_t reg, int phy);
-void intel_dpio_reg_write(uint32_t reg, uint32_t val, int phy);
-uint32_t intel_flisdsi_reg_read(uint32_t reg);
-void intel_flisdsi_reg_write(uint32_t reg, uint32_t val);
-uint32_t intel_iosf_sb_read(uint32_t port, uint32_t reg);
-void intel_iosf_sb_write(uint32_t port, uint32_t reg, uint32_t val);
+uint32_t intel_dpio_reg_read(void *igt_mmio, uint32_t reg, int phy);
+void intel_dpio_reg_write(void *igt_mmio, uint32_t reg, uint32_t val, int phy);
+uint32_t intel_flisdsi_reg_read(void *igt_mmio, uint32_t reg);
+void intel_flisdsi_reg_write(void *igt_mmio, uint32_t reg, uint32_t val);
+uint32_t intel_iosf_sb_read(void *igt_mmio, uint32_t port, uint32_t reg);
+void intel_iosf_sb_write(void *igt_mmio, uint32_t port, uint32_t reg,
+ uint32_t val);
-int intel_punit_read(uint32_t addr, uint32_t *val);
-int intel_punit_write(uint32_t addr, uint32_t val);
-int intel_nc_read(uint32_t addr, uint32_t *val);
-int intel_nc_write(uint32_t addr, uint32_t val);
+int intel_punit_read(void *igt_mmio, uint32_t addr, uint32_t *val);
+int intel_punit_write(void *igt_mmio, uint32_t addr, uint32_t val);
+int intel_nc_read(void *igt_mmio, uint32_t addr, uint32_t *val);
+int intel_nc_write(void *igt_mmio, uint32_t addr, uint32_t val);
/* register maps from intel_reg_map.c */
#ifndef __GTK_DOC_IGNORE__
diff --git a/lib/intel_iosf.c b/lib/intel_iosf.c
index 3b5a1370..b4a483f2 100644
--- a/lib/intel_iosf.c
+++ b/lib/intel_iosf.c
@@ -19,8 +19,8 @@
/* Private register write, double-word addressing, non-posted */
#define SB_CRWRDA_NP 0x07
-static int vlv_sideband_rw(uint32_t port, uint8_t opcode, uint32_t addr,
- uint32_t *val)
+static int vlv_sideband_rw(void *igt_mmio, uint32_t port, uint8_t opcode,
+ uint32_t addr, uint32_t *val)
{
int timeout = 0;
uint32_t cmd, devfn, be, bar;
@@ -34,22 +34,23 @@ static int vlv_sideband_rw(uint32_t port, uint8_t opcode, uint32_t addr,
(port << IOSF_PORT_SHIFT) | (be << IOSF_BYTE_ENABLES_SHIFT) |
(bar << IOSF_BAR_SHIFT);
- if (intel_register_read(VLV_IOSF_DOORBELL_REQ) & IOSF_SB_BUSY) {
+ if (intel_register_read(igt_mmio, VLV_IOSF_DOORBELL_REQ) &
+ IOSF_SB_BUSY) {
igt_warn("warning: pcode (%s) mailbox access failed\n", is_read ? "read" : "write");
return -EAGAIN;
}
- intel_register_write(VLV_IOSF_ADDR, addr);
+ intel_register_write(igt_mmio, VLV_IOSF_ADDR, addr);
if (!is_read)
- intel_register_write(VLV_IOSF_DATA, *val);
+ intel_register_write(igt_mmio, VLV_IOSF_DATA, *val);
- intel_register_write(VLV_IOSF_DOORBELL_REQ, cmd);
+ intel_register_write(igt_mmio, VLV_IOSF_DOORBELL_REQ, cmd);
do {
usleep(1);
timeout++;
- } while (intel_register_read(VLV_IOSF_DOORBELL_REQ) & IOSF_SB_BUSY &&
- timeout < TIMEOUT_US);
+ } while (intel_register_read(igt_mmio, VLV_IOSF_DOORBELL_REQ) &
+ IOSF_SB_BUSY && timeout < TIMEOUT_US);
if (timeout >= TIMEOUT_US) {
igt_warn("timeout waiting for pcode %s (%d) to finish\n", is_read ? "read" : "write", addr);
@@ -57,14 +58,15 @@ static int vlv_sideband_rw(uint32_t port, uint8_t opcode, uint32_t addr,
}
if (is_read)
- *val = intel_register_read(VLV_IOSF_DATA);
- intel_register_write(VLV_IOSF_DATA, 0);
+ *val = intel_register_read(igt_mmio, VLV_IOSF_DATA);
+ intel_register_write(igt_mmio, VLV_IOSF_DATA, 0);
return 0;
}
/**
* intel_punit_read:
+ * @igt_mmio maped memory pointer
* @addr: register offset
* @val: pointer to store the read result
*
@@ -73,13 +75,15 @@ static int vlv_sideband_rw(uint32_t port, uint8_t opcode, uint32_t addr,
* Returns:
* 0 when the register access succeeded, negative errno code on failure.
*/
-int intel_punit_read(uint32_t addr, uint32_t *val)
+int intel_punit_read(void *igt_mmio, uint32_t addr, uint32_t *val)
{
- return vlv_sideband_rw(IOSF_PORT_PUNIT, SB_CRRDDA_NP, addr, val);
+ return vlv_sideband_rw(igt_mmio, IOSF_PORT_PUNIT, SB_CRRDDA_NP, addr,
+ val);
}
/**
* intel_punit_write:
+ * @igt_mmio maped memory pointer
* @addr: register offset
* @val: value to write
*
@@ -88,13 +92,15 @@ int intel_punit_read(uint32_t addr, uint32_t *val)
* Returns:
* 0 when the register access succeeded, negative errno code on failure.
*/
-int intel_punit_write(uint32_t addr, uint32_t val)
+int intel_punit_write(void *igt_mmio, uint32_t addr, uint32_t val)
{
- return vlv_sideband_rw(IOSF_PORT_PUNIT, SB_CRWRDA_NP, addr, &val);
+ return vlv_sideband_rw(igt_mmio, IOSF_PORT_PUNIT, SB_CRWRDA_NP, addr,
+ &val);
}
/**
* intel_nc_read:
+ * @igt_mmio maped memory pointer
* @addr: register offset
* @val: pointer to starge for the read result
*
@@ -103,13 +109,14 @@ int intel_punit_write(uint32_t addr, uint32_t val)
* Returns:
* 0 when the register access succeeded, negative errno code on failure.
*/
-int intel_nc_read(uint32_t addr, uint32_t *val)
+int intel_nc_read(void *igt_mmio, uint32_t addr, uint32_t *val)
{
- return vlv_sideband_rw(IOSF_PORT_NC, SB_CRRDDA_NP, addr, val);
+ return vlv_sideband_rw(igt_mmio, IOSF_PORT_NC, SB_CRRDDA_NP, addr, val);
}
/**
* intel_nc_write:
+ * @igt_mmio maped memory pointer
* @addr: register offset
* @val: value to write
*
@@ -118,13 +125,15 @@ int intel_nc_read(uint32_t addr, uint32_t *val)
* Returns:
* 0 when the register access succeeded, negative errno code on failure.
*/
-int intel_nc_write(uint32_t addr, uint32_t val)
+int intel_nc_write(void *igt_mmio, uint32_t addr, uint32_t val)
{
- return vlv_sideband_rw(IOSF_PORT_NC, SB_CRWRDA_NP, addr, &val);
+ return vlv_sideband_rw(igt_mmio, IOSF_PORT_NC, SB_CRWRDA_NP, addr,
+ &val);
}
/**
* intel_dpio_reg_read:
+ * @igt_mmio maped memory pointer
* @reg: register offset
* @phy: DPIO PHY to use
*
@@ -133,57 +142,61 @@ int intel_nc_write(uint32_t addr, uint32_t val)
* Returns:
* The value read from the register.
*/
-uint32_t intel_dpio_reg_read(uint32_t reg, int phy)
+uint32_t intel_dpio_reg_read(void *igt_mmio, uint32_t reg, int phy)
{
uint32_t val;
if (phy == 0)
- vlv_sideband_rw(IOSF_PORT_DPIO, SB_MRD_NP, reg, &val);
+ vlv_sideband_rw(igt_mmio, IOSF_PORT_DPIO, SB_MRD_NP, reg, &val);
else
- vlv_sideband_rw(IOSF_PORT_DPIO_2, SB_MRD_NP, reg, &val);
+ vlv_sideband_rw(igt_mmio, IOSF_PORT_DPIO_2, SB_MRD_NP, reg,
+ &val);
return val;
}
/**
* intel_dpio_reg_write:
+ * @igt_mmio maped memory pointer
* @reg: register offset
* @val: value to write
* @phy: dpio PHY to use
*
* 32-bit write of the register at @offset through the DPIO sideband port.
*/
-void intel_dpio_reg_write(uint32_t reg, uint32_t val, int phy)
+void intel_dpio_reg_write(void *igt_mmio, uint32_t reg, uint32_t val, int phy)
{
if (phy == 0)
- vlv_sideband_rw(IOSF_PORT_DPIO, SB_MWR_NP, reg, &val);
+ vlv_sideband_rw(igt_mmio, IOSF_PORT_DPIO, SB_MWR_NP, reg, &val);
else
- vlv_sideband_rw(IOSF_PORT_DPIO_2, SB_MWR_NP, reg, &val);
+ vlv_sideband_rw(igt_mmio, IOSF_PORT_DPIO_2, SB_MWR_NP, reg,
+ &val);
}
-uint32_t intel_flisdsi_reg_read(uint32_t reg)
+uint32_t intel_flisdsi_reg_read(void *igt_mmio, uint32_t reg)
{
uint32_t val = 0;
- vlv_sideband_rw(IOSF_PORT_FLISDSI, SB_CRRDDA_NP, reg, &val);
+ vlv_sideband_rw(igt_mmio, IOSF_PORT_FLISDSI, SB_CRRDDA_NP, reg, &val);
return val;
}
-void intel_flisdsi_reg_write(uint32_t reg, uint32_t val)
+void intel_flisdsi_reg_write(void *igt_mmio, uint32_t reg, uint32_t val)
{
- vlv_sideband_rw(IOSF_PORT_FLISDSI, SB_CRWRDA_NP, reg, &val);
+ vlv_sideband_rw(igt_mmio, IOSF_PORT_FLISDSI, SB_CRWRDA_NP, reg, &val);
}
-uint32_t intel_iosf_sb_read(uint32_t port, uint32_t reg)
+uint32_t intel_iosf_sb_read(void *igt_mmio, uint32_t port, uint32_t reg)
{
uint32_t val;
- vlv_sideband_rw(port, SB_CRRDDA_NP, reg, &val);
+ vlv_sideband_rw(igt_mmio, port, SB_CRRDDA_NP, reg, &val);
return val;
}
-void intel_iosf_sb_write(uint32_t port, uint32_t reg, uint32_t val)
+void intel_iosf_sb_write(void *igt_mmio, uint32_t port, uint32_t reg,
+ uint32_t val)
{
- vlv_sideband_rw(port, SB_CRWRDA_NP, reg, &val);
+ vlv_sideband_rw(igt_mmio, port, SB_CRWRDA_NP, reg, &val);
}
diff --git a/lib/intel_mmio.c b/lib/intel_mmio.c
index daca1ad2..24623fc6 100644
--- a/lib/intel_mmio.c
+++ b/lib/intel_mmio.c
@@ -244,6 +244,7 @@ intel_register_access_fini(void)
/**
* intel_register_read:
+ * @igt_mmio maped memory pointer
* @reg: register offset
*
* 32-bit read of the register at @offset. This function only works when the new
@@ -256,7 +257,7 @@ intel_register_access_fini(void)
* The value read from the register.
*/
uint32_t
-intel_register_read(uint32_t reg)
+intel_register_read(void *igt_mmio, uint32_t reg)
{
struct intel_register_range *range;
uint32_t ret;
@@ -280,13 +281,14 @@ intel_register_read(uint32_t reg)
}
read_out:
- ret = *(volatile uint32_t *)((volatile char *)igt_global_mmio + reg);
+ ret = *(volatile uint32_t *)((volatile char *)igt_mmio + reg);
out:
return ret;
}
/**
* intel_register_write:
+ * @igt_mmio maped memory pointer
* @reg: register offset
* @val: value to write
*
@@ -297,7 +299,7 @@ out:
* white lists.
*/
void
-intel_register_write(uint32_t reg, uint32_t val)
+intel_register_write(void *igt_mmio, uint32_t reg, uint32_t val)
{
struct intel_register_range *range;
@@ -317,12 +319,13 @@ intel_register_write(uint32_t reg, uint32_t val)
"Register write blocked for safety ""(*0x%08x = 0x%x)\n", reg, val);
write_out:
- *(volatile uint32_t *)((volatile char *)igt_global_mmio + reg) = val;
+ *(volatile uint32_t *)((volatile char *)igt_mmio + reg) = val;
}
/**
* INREG:
+ * @igt_mmio maped memory pointer
* @reg: register offset
*
* 32-bit read of the register at offset @reg. This function only works when the
@@ -333,13 +336,14 @@ write_out:
* Returns:
* The value read from the register.
*/
-uint32_t INREG(uint32_t reg)
+uint32_t INREG(void *igt_mmio, uint32_t reg)
{
- return *(volatile uint32_t *)((volatile char *)igt_global_mmio + reg);
+ return *(volatile uint32_t *)((volatile char *)igt_mmio + reg);
}
/**
* INREG16:
+ * @igt_mmio maped memory pointer
* @reg: register offset
*
* 16-bit read of the register at offset @reg. This function only works when the
@@ -350,13 +354,14 @@ uint32_t INREG(uint32_t reg)
* Returns:
* The value read from the register.
*/
-uint16_t INREG16(uint32_t reg)
+uint16_t INREG16(void *igt_mmio, uint32_t reg)
{
- return *(volatile uint16_t *)((volatile char *)igt_global_mmio + reg);
+ return *(volatile uint16_t *)((volatile char *)igt_mmio + reg);
}
/**
* INREG8:
+ * @igt_mmio maped memory pointer
* @reg: register offset
*
* 8-bit read of the register at offset @reg. This function only works when the
@@ -367,13 +372,14 @@ uint16_t INREG16(uint32_t reg)
* Returns:
* The value read from the register.
*/
-uint8_t INREG8(uint32_t reg)
+uint8_t INREG8(void *igt_mmio, uint32_t reg)
{
- return *((volatile uint8_t *)igt_global_mmio + reg);
+ return *((volatile uint8_t *)igt_mmio + reg);
}
/**
* OUTREG:
+ * @igt_mmio maped memory pointer
* @reg: register offset
* @val: value to write
*
@@ -383,9 +389,9 @@ uint8_t INREG8(uint32_t reg)
*
* This function directly accesses the #igt_global_mmio without safety checks.
*/
-void OUTREG(uint32_t reg, uint32_t val)
+void OUTREG(void *igt_mmio, uint32_t reg, uint32_t val)
{
- *(volatile uint32_t *)((volatile char *)igt_global_mmio + reg) = val;
+ *(volatile uint32_t *)((volatile char *)igt_mmio + reg) = val;
}
/**
@@ -399,13 +405,14 @@ void OUTREG(uint32_t reg, uint32_t val)
*
* This function directly accesses the #igt_global_mmio without safety checks.
*/
-void OUTREG16(uint32_t reg, uint16_t val)
+void OUTREG16(void *igt_mmio, uint32_t reg, uint16_t val)
{
- *(volatile uint16_t *)((volatile char *)igt_global_mmio + reg) = val;
+ *(volatile uint16_t *)((volatile char *)igt_mmio + reg) = val;
}
/**
* OUTREG8:
+ * @igt_mmio maped memory pointer
* @reg: register offset
* @val: value to write
*
@@ -415,7 +422,7 @@ void OUTREG16(uint32_t reg, uint16_t val)
*
* This function directly accesses the #igt_global_mmio without safety checks.
*/
-void OUTREG8(uint32_t reg, uint8_t val)
+void OUTREG8(void *igt_mmio, uint32_t reg, uint8_t val)
{
- *((volatile uint8_t *)igt_global_mmio + reg) = val;
+ *((volatile uint8_t *)igt_mmio + reg) = val;
}
diff --git a/tests/i915/gem_exec_parse.c b/tests/i915/gem_exec_parse.c
index 62e8d0a5..423d6ea6 100644
--- a/tests/i915/gem_exec_parse.c
+++ b/tests/i915/gem_exec_parse.c
@@ -284,9 +284,9 @@ test_lri(int fd, uint32_t handle, struct test_lri *test)
test->name, test->reg, test->test_val,
expected_errno, expect);
- intel_register_write(test->reg, test->init_val);
+ intel_register_write(igt_global_mmio, test->reg, test->init_val);
- igt_assert_eq_u32((intel_register_read(test->reg) &
+ igt_assert_eq_u32((intel_register_read(igt_global_mmio, test->reg) &
test->read_mask),
test->init_val);
@@ -296,7 +296,7 @@ test_lri(int fd, uint32_t handle, struct test_lri *test)
expected_errno);
gem_sync(fd, handle);
- igt_assert_eq_u32((intel_register_read(test->reg) &
+ igt_assert_eq_u32((intel_register_read(igt_global_mmio, test->reg) &
test->read_mask),
expect);
}
diff --git a/tests/i915/i915_pm_lpsp.c b/tests/i915/i915_pm_lpsp.c
index b319dbe9..f69c88f6 100644
--- a/tests/i915/i915_pm_lpsp.c
+++ b/tests/i915/i915_pm_lpsp.c
@@ -40,7 +40,7 @@ static bool lpsp_is_enabled(int drm_fd)
{
uint32_t val;
- val = INREG(HSW_PWR_WELL_CTL2);
+ val = INREG(igt_global_mmio, HSW_PWR_WELL_CTL2);
return !(val & HSW_PWR_WELL_STATE_ENABLED);
}
diff --git a/tools/intel_audio_dump.c b/tools/intel_audio_dump.c
index d952e54b..86664478 100644
--- a/tools/intel_audio_dump.c
+++ b/tools/intel_audio_dump.c
@@ -67,23 +67,23 @@ static int disp_reg_base = 0; /* base address of display registers */
#define dump_reg(reg, desc) \
do { \
- dword = INREG(reg); \
+ dword = INREG(igt_global_mmio, reg); \
printf("%-21s(%#x) 0x%08x %s\n", # reg, reg, dword, desc); \
} while (0)
#define dump_disp_reg(reg, desc) \
do { \
- dword = INREG(disp_reg_base + reg); \
+ dword = INREG(igt_global_mmio, disp_reg_base + reg); \
printf("%-21s(%#x) 0x%08x %s\n", # reg, reg, dword, desc); \
} while (0)
#define dump_aud_reg(reg, desc) \
do { \
- dword = INREG(aud_reg_base + reg); \
+ dword = INREG(igt_global_mmio, aud_reg_base + reg); \
printf("%-21s(%#x) 0x%08x %s\n", # reg, reg, dword, desc); \
} while (0)
-#define read_aud_reg(reg) INREG(aud_reg_base + (reg))
+#define read_aud_reg(reg) INREG(igt_global_mmio, aud_reg_base + (reg))
static int get_num_pipes(void)
{
@@ -532,31 +532,31 @@ static void dump_eaglelake(void)
printf("\nDetails:\n\n");
- dword = INREG(AUD_VID_DID);
+ dword = INREG(igt_global_mmio, AUD_VID_DID);
printf("AUD_VID_DID vendor id\t\t\t0x%x\n", dword >> 16);
printf("AUD_VID_DID device id\t\t\t0x%x\n", dword & 0xffff);
- dword = INREG(AUD_RID);
+ dword = INREG(igt_global_mmio, AUD_RID);
printf("AUD_RID major revision\t\t\t0x%lx\n", BITS(dword, 23, 20));
printf("AUD_RID minor revision\t\t\t0x%lx\n", BITS(dword, 19, 16));
printf("AUD_RID revision id\t\t\t0x%lx\n", BITS(dword, 15, 8));
printf("AUD_RID stepping id\t\t\t0x%lx\n", BITS(dword, 7, 0));
- dword = INREG(SDVOB);
+ dword = INREG(igt_global_mmio, SDVOB);
printf("SDVOB enable\t\t\t\t%u\n", !!(dword & SDVO_ENABLE));
printf("SDVOB HDMI encoding\t\t\t%u\n", !!(dword & SDVO_ENCODING_HDMI));
printf("SDVOB SDVO encoding\t\t\t%u\n", !!(dword & SDVO_ENCODING_SDVO));
printf("SDVOB null packets\t\t\t%u\n", !!(dword & SDVO_NULL_PACKETS_DURING_VSYNC));
printf("SDVOB audio enabled\t\t\t%u\n", !!(dword & SDVO_AUDIO_ENABLE));
- dword = INREG(SDVOC);
+ dword = INREG(igt_global_mmio, SDVOC);
printf("SDVOC enable\t\t\t\t%u\n", !!(dword & SDVO_ENABLE));
printf("SDVOC HDMI encoding\t\t\t%u\n", !!(dword & SDVO_ENCODING_HDMI));
printf("SDVOC SDVO encoding\t\t\t%u\n", !!(dword & SDVO_ENCODING_SDVO));
printf("SDVOC null packets\t\t\t%u\n", !!(dword & SDVO_NULL_PACKETS_DURING_VSYNC));
printf("SDVOC audio enabled\t\t\t%u\n", !!(dword & SDVO_AUDIO_ENABLE));
- dword = INREG(PORT_HOTPLUG_EN);
+ dword = INREG(igt_global_mmio, PORT_HOTPLUG_EN);
printf("PORT_HOTPLUG_EN DisplayPort/HDMI port B\t%ld\n", BIT(dword, 29)),
printf("PORT_HOTPLUG_EN DisplayPort/HDMI port C\t%ld\n", BIT(dword, 28)),
printf("PORT_HOTPLUG_EN DisplayPort port D\t%ld\n", BIT(dword, 27)),
@@ -566,7 +566,7 @@ static void dump_eaglelake(void)
printf("PORT_HOTPLUG_EN TV\t\t\t%ld\n", BIT(dword, 23)),
printf("PORT_HOTPLUG_EN CRT\t\t\t%ld\n", BIT(dword, 9)),
- dword = INREG(VIDEO_DIP_CTL);
+ dword = INREG(igt_global_mmio, VIDEO_DIP_CTL);
printf("VIDEO_DIP_CTL enable graphics DIP\t%ld\n", BIT(dword, 31)),
printf("VIDEO_DIP_CTL port select\t\t[0x%lx] %s\n",
BITS(dword, 30, 29), dip_port[BITS(dword, 30, 29)]);
@@ -581,46 +581,46 @@ static void dump_eaglelake(void)
printf("VIDEO_DIP_CTL DIP buffer size\t\t%lu\n", BITS(dword, 11, 8));
printf("VIDEO_DIP_CTL DIP address\t\t%lu\n", BITS(dword, 3, 0));
- dword = INREG(AUD_CONFIG);
+ dword = INREG(igt_global_mmio, AUD_CONFIG);
printf("AUD_CONFIG pixel clock\t\t\t[0x%lx] %s\n", BITS(dword, 19, 16),
OPNAME(pixel_clock, BITS(dword, 19, 16)));
printf("AUD_CONFIG fabrication enabled\t\t%lu\n", BITS(dword, 2, 2));
printf("AUD_CONFIG professional use allowed\t%lu\n", BIT(dword, 1));
printf("AUD_CONFIG fuse enabled\t\t\t%lu\n", BIT(dword, 0));
- dword = INREG(AUD_DEBUG);
+ dword = INREG(igt_global_mmio, AUD_DEBUG);
printf("AUD_DEBUG function reset\t\t%lu\n", BIT(dword, 0));
- dword = INREG(AUD_SUBN_CNT);
+ dword = INREG(igt_global_mmio, AUD_SUBN_CNT);
printf("AUD_SUBN_CNT starting node number\t0x%lx\n", BITS(dword, 23, 16));
printf("AUD_SUBN_CNT total number of nodes\t0x%lx\n", BITS(dword, 7, 0));
- dword = INREG(AUD_SUBN_CNT2);
+ dword = INREG(igt_global_mmio, AUD_SUBN_CNT2);
printf("AUD_SUBN_CNT2 starting node number\t0x%lx\n", BITS(dword, 24, 16));
printf("AUD_SUBN_CNT2 total number of nodes\t0x%lx\n", BITS(dword, 7, 0));
- dword = INREG(AUD_FUNC_GRP);
+ dword = INREG(igt_global_mmio, AUD_FUNC_GRP);
printf("AUD_FUNC_GRP unsol capable\t\t%lu\n", BIT(dword, 8));
printf("AUD_FUNC_GRP node type\t\t\t0x%lx\n", BITS(dword, 7, 0));
- dword = INREG(AUD_GRP_CAP);
+ dword = INREG(igt_global_mmio, AUD_GRP_CAP);
printf("AUD_GRP_CAP beep 0\t\t\t%lu\n", BIT(dword, 16));
printf("AUD_GRP_CAP input delay\t\t\t%lu\n", BITS(dword, 11, 8));
printf("AUD_GRP_CAP output delay\t\t%lu\n", BITS(dword, 3, 0));
- dword = INREG(AUD_PWRST);
+ dword = INREG(igt_global_mmio, AUD_PWRST);
printf("AUD_PWRST device power state\t\t%s\n",
power_state[BITS(dword, 5, 4)]);
printf("AUD_PWRST device power state setting\t%s\n",
power_state[BITS(dword, 1, 0)]);
- dword = INREG(AUD_SUPPWR);
+ dword = INREG(igt_global_mmio, AUD_SUPPWR);
printf("AUD_SUPPWR support D0\t\t\t%lu\n", BIT(dword, 0));
printf("AUD_SUPPWR support D1\t\t\t%lu\n", BIT(dword, 1));
printf("AUD_SUPPWR support D2\t\t\t%lu\n", BIT(dword, 2));
printf("AUD_SUPPWR support D3\t\t\t%lu\n", BIT(dword, 3));
- dword = INREG(AUD_OUT_CWCAP);
+ dword = INREG(igt_global_mmio, AUD_OUT_CWCAP);
printf("AUD_OUT_CWCAP widget type\t\t0x%lx\n", BITS(dword, 23, 20));
printf("AUD_OUT_CWCAP sample delay\t\t0x%lx\n", BITS(dword, 19, 16));
printf("AUD_OUT_CWCAP channel count\t\t%lu\n",
@@ -636,7 +636,7 @@ static void dump_eaglelake(void)
printf("AUD_OUT_CWCAP out amp present\t\t%lu\n", BIT(dword, 2));
printf("AUD_OUT_CWCAP in amp present\t\t%lu\n", BIT(dword, 1));
- dword = INREG(AUD_OUT_DIG_CNVT);
+ dword = INREG(igt_global_mmio, AUD_OUT_DIG_CNVT);
printf("AUD_OUT_DIG_CNVT SPDIF category\t\t0x%lx\n", BITS(dword, 14, 8));
printf("AUD_OUT_DIG_CNVT SPDIF level\t\t%lu\n", BIT(dword, 7));
printf("AUD_OUT_DIG_CNVT professional\t\t%lu\n", BIT(dword, 6));
@@ -647,16 +647,16 @@ static void dump_eaglelake(void)
printf("AUD_OUT_DIG_CNVT validity flag\t\t%lu\n", BIT(dword, 1));
printf("AUD_OUT_DIG_CNVT digital enable\t\t%lu\n", BIT(dword, 0));
- dword = INREG(AUD_OUT_CH_STR);
+ dword = INREG(igt_global_mmio, AUD_OUT_CH_STR);
printf("AUD_OUT_CH_STR stream id\t\t0x%lx\n", BITS(dword, 7, 4));
printf("AUD_OUT_CH_STR lowest channel\t\t%lu\n", BITS(dword, 3, 0));
- dword = INREG(AUD_OUT_STR_DESC);
+ dword = INREG(igt_global_mmio, AUD_OUT_STR_DESC);
printf("AUD_OUT_STR_DESC stream channels\t%lu\n", BITS(dword, 3, 0) + 1);
printf("AUD_OUT_STR_DESC Bits per Sample\t[%#lx] %s\n",
BITS(dword, 6, 4), OPNAME(bits_per_sample, BITS(dword, 6, 4)));
- dword = INREG(AUD_PINW_CAP);
+ dword = INREG(igt_global_mmio, AUD_PINW_CAP);
printf("AUD_PINW_CAP widget type\t\t0x%lx\n", BITS(dword, 23, 20));
printf("AUD_PINW_CAP sample delay\t\t0x%lx\n", BITS(dword, 19, 16));
printf("AUD_PINW_CAP channel count\t\t%lu\n",
@@ -674,13 +674,13 @@ static void dump_eaglelake(void)
printf("AUD_PINW_CAP in amp present\t\t%lu\n", BIT(dword, 1));
- dword = INREG(AUD_PIN_CAP);
+ dword = INREG(igt_global_mmio, AUD_PIN_CAP);
printf("AUD_PIN_CAP EAPD\t\t\t%lu\n", BIT(dword, 16));
printf("AUD_PIN_CAP HDMI\t\t\t%lu\n", BIT(dword, 7));
printf("AUD_PIN_CAP output\t\t\t%lu\n", BIT(dword, 4));
printf("AUD_PIN_CAP presence detect\t\t%lu\n", BIT(dword, 2));
- dword = INREG(AUD_PINW_CNTR);
+ dword = INREG(igt_global_mmio, AUD_PINW_CNTR);
printf("AUD_PINW_CNTR mute status\t\t%lu\n", BIT(dword, 8));
printf("AUD_PINW_CNTR out enable\t\t%lu\n", BIT(dword, 6));
printf("AUD_PINW_CNTR amp mute status\t\t%lu\n", BIT(dword, 8));
@@ -689,10 +689,10 @@ static void dump_eaglelake(void)
BITS(dword, 2, 0),
OPNAME(stream_type, BITS(dword, 2, 0)));
- dword = INREG(AUD_PINW_UNSOLRESP);
+ dword = INREG(igt_global_mmio, AUD_PINW_UNSOLRESP);
printf("AUD_PINW_UNSOLRESP enable unsol resp\t%lu\n", BIT(dword, 31));
- dword = INREG(AUD_CNTL_ST);
+ dword = INREG(igt_global_mmio, AUD_CNTL_ST);
printf("AUD_CNTL_ST DIP audio enabled\t\t%lu\n", BIT(dword, 21));
printf("AUD_CNTL_ST DIP ACP enabled\t\t%lu\n", BIT(dword, 22));
printf("AUD_CNTL_ST DIP ISRCx enabled\t\t%lu\n", BIT(dword, 23));
@@ -709,38 +709,39 @@ static void dump_eaglelake(void)
printf("AUD_CNTL_ST ELD bufsize\t\t\t%lu\n", BITS(dword, 13, 9));
printf("AUD_CNTL_ST ELD address\t\t\t%lu\n", BITS(dword, 8, 5));
- dword = INREG(AUD_HDMIW_STATUS);
+ dword = INREG(igt_global_mmio, AUD_HDMIW_STATUS);
printf("AUD_HDMIW_STATUS CDCLK/DOTCLK underrun\t%lu\n", BIT(dword, 31));
printf("AUD_HDMIW_STATUS CDCLK/DOTCLK overrun\t%lu\n", BIT(dword, 30));
printf("AUD_HDMIW_STATUS BCLK/CDCLK underrun\t%lu\n", BIT(dword, 29));
printf("AUD_HDMIW_STATUS BCLK/CDCLK overrun\t%lu\n", BIT(dword, 28));
- dword = INREG(AUD_CONV_CHCNT);
+ dword = INREG(igt_global_mmio, AUD_CONV_CHCNT);
printf("AUD_CONV_CHCNT HDMI HBR enabled\t\t%lu\n", BITS(dword, 15, 14));
printf("AUD_CONV_CHCNT HDMI channel count\t%lu\n", BITS(dword, 11, 8) + 1);
printf("AUD_CONV_CHCNT HDMI channel mapping:\n");
for (i = 0; i < 8; i++) {
- OUTREG(AUD_CONV_CHCNT, i);
- dword = INREG(AUD_CONV_CHCNT);
+ OUTREG(igt_global_mmio, AUD_CONV_CHCNT, i);
+ dword = INREG(igt_global_mmio, AUD_CONV_CHCNT);
printf("\t\t\t\t\t[0x%x] %u => %lu\n", dword, i, BITS(dword, 7, 4));
}
printf("AUD_HDMIW_HDMIEDID HDMI ELD:\n\t");
- dword = INREG(AUD_CNTL_ST);
+ dword = INREG(igt_global_mmio, AUD_CNTL_ST);
dword &= ~BITMASK(8, 5);
- OUTREG(AUD_CNTL_ST, dword);
+ OUTREG(igt_global_mmio, AUD_CNTL_ST, dword);
for (i = 0; i < BITS(dword, 14, 10) / 4; i++)
- printf("%08x ", htonl(INREG(AUD_HDMIW_HDMIEDID)));
+ printf("%08x ", htonl(INREG(igt_global_mmio, AUD_HDMIW_HDMIEDID)));
printf("\n");
printf("AUD_HDMIW_INFOFR HDMI audio Infoframe:\n\t");
- dword = INREG(AUD_CNTL_ST);
+ dword = INREG(igt_global_mmio, AUD_CNTL_ST);
dword &= ~BITMASK(20, 18);
dword &= ~BITMASK(3, 0);
- OUTREG(AUD_CNTL_ST, dword);
+ OUTREG(igt_global_mmio, AUD_CNTL_ST, dword);
for (i = 0; i < 8; i++)
- printf("%08x ", htonl(INREG(AUD_HDMIW_INFOFR)));
+ printf("%08x ", htonl(INREG(igt_global_mmio,
+ AUD_HDMIW_INFOFR)));
printf("\n");
}
@@ -863,7 +864,7 @@ static void dump_cpt(void)
printf("\nDetails:\n\n");
- dword = INREG(VIDEO_DIP_CTL_A);
+ dword = INREG(igt_global_mmio, VIDEO_DIP_CTL_A);
printf("VIDEO_DIP_CTL_A Enable_Graphics_DIP\t\t\t%ld\n", BIT(dword, 31)),
printf("VIDEO_DIP_CTL_A GCP_DIP_enable\t\t\t\t%ld\n", BIT(dword, 25)),
printf("VIDEO_DIP_CTL_A Video_DIP_type_enable AVI\t\t%lu\n", BIT(dword, 21));
@@ -877,7 +878,7 @@ static void dump_cpt(void)
printf("VIDEO_DIP_CTL_A Video_DIP_buffer_size\t\t\t%lu\n", BITS(dword, 11, 8));
printf("VIDEO_DIP_CTL_A Video_DIP_access_address\t\t%lu\n", BITS(dword, 3, 0));
- dword = INREG(VIDEO_DIP_CTL_B);
+ dword = INREG(igt_global_mmio, VIDEO_DIP_CTL_B);
printf("VIDEO_DIP_CTL_B Enable_Graphics_DIP\t\t\t%ld\n", BIT(dword, 31)),
printf("VIDEO_DIP_CTL_B GCP_DIP_enable\t\t\t\t%ld\n", BIT(dword, 25)),
printf("VIDEO_DIP_CTL_B Video_DIP_type_enable AVI\t\t%lu\n", BIT(dword, 21));
@@ -891,7 +892,7 @@ static void dump_cpt(void)
printf("VIDEO_DIP_CTL_B Video_DIP_buffer_size\t\t\t%lu\n", BITS(dword, 11, 8));
printf("VIDEO_DIP_CTL_B Video_DIP_access_address\t\t%lu\n", BITS(dword, 3, 0));
- dword = INREG(VIDEO_DIP_CTL_C);
+ dword = INREG(igt_global_mmio, VIDEO_DIP_CTL_C);
printf("VIDEO_DIP_CTL_C Enable_Graphics_DIP\t\t\t%ld\n", BIT(dword, 31)),
printf("VIDEO_DIP_CTL_C GCP_DIP_enable\t\t\t\t%ld\n", BIT(dword, 25)),
printf("VIDEO_DIP_CTL_C Video_DIP_type_enable AVI\t\t%lu\n", BIT(dword, 21));
@@ -905,17 +906,17 @@ static void dump_cpt(void)
printf("VIDEO_DIP_CTL_C Video_DIP_buffer_size\t\t\t%lu\n", BITS(dword, 11, 8));
printf("VIDEO_DIP_CTL_C Video_DIP_access_address\t\t%lu\n", BITS(dword, 3, 0));
- dword = INREG(AUD_VID_DID);
+ dword = INREG(igt_global_mmio, AUD_VID_DID);
printf("AUD_VID_DID vendor id\t\t\t\t\t0x%x\n", dword >> 16);
printf("AUD_VID_DID device id\t\t\t\t\t0x%x\n", dword & 0xffff);
- dword = INREG(AUD_RID);
+ dword = INREG(igt_global_mmio, AUD_RID);
printf("AUD_RID Major_Revision\t\t\t\t\t0x%lx\n", BITS(dword, 23, 20));
printf("AUD_RID Minor_Revision\t\t\t\t\t0x%lx\n", BITS(dword, 19, 16));
printf("AUD_RID Revision_Id\t\t\t\t\t0x%lx\n", BITS(dword, 15, 8));
printf("AUD_RID Stepping_Id\t\t\t\t\t0x%lx\n", BITS(dword, 7, 0));
- dword = INREG(HDMIB);
+ dword = INREG(igt_global_mmio, HDMIB);
printf("HDMIB Port_Enable\t\t\t\t\t%u\n", !!(dword & SDVO_ENABLE));
printf("HDMIB Transcoder_Select\t\t\t\t\t[0x%lx] %s\n",
BITS(dword, 30, 29), transcoder_select[BITS(dword, 30, 29)]);
@@ -928,7 +929,7 @@ static void dump_cpt(void)
printf("HDMIB HDMI_or_DVI_Select\t\t\t\t%s\n", BIT(dword, 9) ? "HDMI" : "DVI");
printf("HDMIB Audio_Output_Enable\t\t\t\t%u\n", !!(dword & SDVO_AUDIO_ENABLE));
- dword = INREG(HDMIC);
+ dword = INREG(igt_global_mmio, HDMIC);
printf("HDMIC Port_Enable\t\t\t\t\t%u\n", !!(dword & SDVO_ENABLE));
printf("HDMIC Transcoder_Select\t\t\t\t\t[0x%lx] %s\n",
BITS(dword, 30, 29), transcoder_select[BITS(dword, 30, 29)]);
@@ -941,7 +942,7 @@ static void dump_cpt(void)
printf("HDMIC HDMI_or_DVI_Select\t\t\t\t%s\n", BIT(dword, 9) ? "HDMI" : "DVI");
printf("HDMIC Audio_Output_Enable\t\t\t\t%u\n", !!(dword & SDVO_AUDIO_ENABLE));
- dword = INREG(HDMID);
+ dword = INREG(igt_global_mmio, HDMID);
printf("HDMID Port_Enable\t\t\t\t\t%u\n", !!(dword & SDVO_ENABLE));
printf("HDMID Transcoder_Select\t\t\t\t\t[0x%lx] %s\n",
BITS(dword, 30, 29), transcoder_select[BITS(dword, 30, 29)]);
@@ -954,7 +955,7 @@ static void dump_cpt(void)
printf("HDMID HDMI_or_DVI_Select\t\t\t\t%s\n", BIT(dword, 9) ? "HDMI" : "DVI");
printf("HDMID Audio_Output_Enable\t\t\t\t%u\n", !!(dword & SDVO_AUDIO_ENABLE));
- dword = INREG(DP_CTL_B);
+ dword = INREG(igt_global_mmio, DP_CTL_B);
printf("DP_CTL_B DisplayPort_Enable\t\t\t\t%lu\n", BIT(dword, 31));
printf("DP_CTL_B Port_Width_Selection\t\t\t\t[0x%lx] %s\n",
BITS(dword, 21, 19), dp_port_width[BITS(dword, 21, 19)]);
@@ -962,7 +963,7 @@ static void dump_cpt(void)
printf("DP_CTL_B HDCP_Port_Select\t\t\t\t%lu\n", BIT(dword, 5));
printf("DP_CTL_B Audio_Output_Enable\t\t\t\t%lu\n", BIT(dword, 6));
- dword = INREG(DP_CTL_C);
+ dword = INREG(igt_global_mmio, DP_CTL_C);
printf("DP_CTL_C DisplayPort_Enable\t\t\t\t%lu\n", BIT(dword, 31));
printf("DP_CTL_C Port_Width_Selection\t\t\t\t[0x%lx] %s\n",
BITS(dword, 21, 19), dp_port_width[BITS(dword, 21, 19)]);
@@ -970,7 +971,7 @@ static void dump_cpt(void)
printf("DP_CTL_C HDCP_Port_Select\t\t\t\t%lu\n", BIT(dword, 5));
printf("DP_CTL_C Audio_Output_Enable\t\t\t\t%lu\n", BIT(dword, 6));
- dword = INREG(DP_CTL_D);
+ dword = INREG(igt_global_mmio, DP_CTL_D);
printf("DP_CTL_D DisplayPort_Enable\t\t\t\t%lu\n", BIT(dword, 31));
printf("DP_CTL_D Port_Width_Selection\t\t\t\t[0x%lx] %s\n",
BITS(dword, 21, 19), dp_port_width[BITS(dword, 21, 19)]);
@@ -978,7 +979,7 @@ static void dump_cpt(void)
printf("DP_CTL_D HDCP_Port_Select\t\t\t\t%lu\n", BIT(dword, 5));
printf("DP_CTL_D Audio_Output_Enable\t\t\t\t%lu\n", BIT(dword, 6));
- dword = INREG(AUD_CONFIG_A);
+ dword = INREG(igt_global_mmio, AUD_CONFIG_A);
printf("AUD_CONFIG_A N_index_value\t\t\t\t[0x%lx] %s\n", BIT(dword, 29),
n_index_value[BIT(dword, 29)]);
printf("AUD_CONFIG_A N_programming_enable\t\t\t%lu\n", BIT(dword, 28));
@@ -987,7 +988,7 @@ static void dump_cpt(void)
printf("AUD_CONFIG_A Pixel_Clock_HDMI\t\t\t\t[0x%lx] %s\n", BITS(dword, 19, 16),
OPNAME(pixel_clock, BITS(dword, 19, 16)));
printf("AUD_CONFIG_A Disable_NCTS\t\t\t\t%lu\n", BIT(dword, 3));
- dword = INREG(AUD_CONFIG_B);
+ dword = INREG(igt_global_mmio, AUD_CONFIG_B);
printf("AUD_CONFIG_B N_index_value\t\t\t\t[0x%lx] %s\n", BIT(dword, 29),
n_index_value[BIT(dword, 29)]);
printf("AUD_CONFIG_B N_programming_enable\t\t\t%lu\n", BIT(dword, 28));
@@ -996,7 +997,7 @@ static void dump_cpt(void)
printf("AUD_CONFIG_B Pixel_Clock_HDMI\t\t\t\t[0x%lx] %s\n", BITS(dword, 19, 16),
OPNAME(pixel_clock, BITS(dword, 19, 16)));
printf("AUD_CONFIG_B Disable_NCTS\t\t\t\t%lu\n", BIT(dword, 3));
- dword = INREG(AUD_CONFIG_C);
+ dword = INREG(igt_global_mmio, AUD_CONFIG_C);
printf("AUD_CONFIG_C N_index_value\t\t\t\t[0x%lx] %s\n", BIT(dword, 29),
n_index_value[BIT(dword, 29)]);
printf("AUD_CONFIG_C N_programming_enable\t\t\t%lu\n", BIT(dword, 28));
@@ -1006,36 +1007,36 @@ static void dump_cpt(void)
OPNAME(pixel_clock, BITS(dword, 19, 16)));
printf("AUD_CONFIG_C Disable_NCTS\t\t\t\t%lu\n", BIT(dword, 3));
- dword = INREG(AUD_CTS_ENABLE_A);
+ dword = INREG(igt_global_mmio, AUD_CTS_ENABLE_A);
printf("AUD_CTS_ENABLE_A Enable_CTS_or_M_programming\t\t%lu\n", BIT(dword, 20));
printf("AUD_CTS_ENABLE_A CTS_M value Index\t\t\t%s\n", BIT(dword, 21) ? "CTS" : "M");
printf("AUD_CTS_ENABLE_A CTS_programming\t\t\t%#lx\n", BITS(dword, 19, 0));
- dword = INREG(AUD_CTS_ENABLE_B);
+ dword = INREG(igt_global_mmio, AUD_CTS_ENABLE_B);
printf("AUD_CTS_ENABLE_B Enable_CTS_or_M_programming\t\t%lu\n", BIT(dword, 20));
printf("AUD_CTS_ENABLE_B CTS_M value Index\t\t\t%s\n", BIT(dword, 21) ? "CTS" : "M");
printf("AUD_CTS_ENABLE_B CTS_programming\t\t\t%#lx\n", BITS(dword, 19, 0));
- dword = INREG(AUD_CTS_ENABLE_C);
+ dword = INREG(igt_global_mmio, AUD_CTS_ENABLE_C);
printf("AUD_CTS_ENABLE_C Enable_CTS_or_M_programming\t\t%lu\n", BIT(dword, 20));
printf("AUD_CTS_ENABLE_C CTS_M value Index\t\t\t%s\n", BIT(dword, 21) ? "CTS" : "M");
printf("AUD_CTS_ENABLE_C CTS_programming\t\t\t%#lx\n", BITS(dword, 19, 0));
- dword = INREG(AUD_MISC_CTRL_A);
+ dword = INREG(igt_global_mmio, AUD_MISC_CTRL_A);
printf("AUD_MISC_CTRL_A Sample_Fabrication_EN_bit\t\t%lu\n", BIT(dword, 2));
printf("AUD_MISC_CTRL_A Sample_present_Disable\t\t\t%lu\n", BIT(dword, 8));
printf("AUD_MISC_CTRL_A Output_Delay\t\t\t\t%lu\n", BITS(dword, 7, 4));
printf("AUD_MISC_CTRL_A Pro_Allowed\t\t\t\t%lu\n", BIT(dword, 1));
- dword = INREG(AUD_MISC_CTRL_B);
+ dword = INREG(igt_global_mmio, AUD_MISC_CTRL_B);
printf("AUD_MISC_CTRL_B Sample_Fabrication_EN_bit\t\t%lu\n", BIT(dword, 2));
printf("AUD_MISC_CTRL_B Sample_present_Disable\t\t\t%lu\n", BIT(dword, 8));
printf("AUD_MISC_CTRL_B Output_Delay\t\t\t\t%lu\n", BITS(dword, 7, 4));
printf("AUD_MISC_CTRL_B Pro_Allowed\t\t\t\t%lu\n", BIT(dword, 1));
- dword = INREG(AUD_MISC_CTRL_C);
+ dword = INREG(igt_global_mmio, AUD_MISC_CTRL_C);
printf("AUD_MISC_CTRL_C Sample_Fabrication_EN_bit\t\t%lu\n", BIT(dword, 2));
printf("AUD_MISC_CTRL_C Sample_present_Disable\t\t\t%lu\n", BIT(dword, 8));
printf("AUD_MISC_CTRL_C Output_Delay\t\t\t\t%lu\n", BITS(dword, 7, 4));
printf("AUD_MISC_CTRL_C Pro_Allowed\t\t\t\t%lu\n", BIT(dword, 1));
- dword = INREG(AUD_PWRST);
+ dword = INREG(igt_global_mmio, AUD_PWRST);
printf("AUD_PWRST Func_Grp_Dev_PwrSt_Curr \t%s\n", power_state[BITS(dword, 27, 26)]);
printf("AUD_PWRST Func_Grp_Dev_PwrSt_Set \t%s\n", power_state[BITS(dword, 25, 24)]);
printf("AUD_PWRST ConvertorA_Widget_Power_State_Current \t%s\n", power_state[BITS(dword, 15, 14)]);
@@ -1051,7 +1052,7 @@ static void dump_cpt(void)
printf("AUD_PWRST PinD_Widget_Power_State_Current \t%s\n", power_state[BITS(dword, 11, 10)]);
printf("AUD_PWRST PinD_Widget_Power_State_Set \t%s\n", power_state[BITS(dword, 9, 8)]);
- dword = INREG(AUD_PORT_EN_HD_CFG);
+ dword = INREG(igt_global_mmio, AUD_PORT_EN_HD_CFG);
printf("AUD_PORT_EN_HD_CFG Convertor_A_Digen\t\t\t%lu\n", BIT(dword, 0));
printf("AUD_PORT_EN_HD_CFG Convertor_B_Digen\t\t\t%lu\n", BIT(dword, 1));
printf("AUD_PORT_EN_HD_CFG Convertor_C_Digen\t\t\t%lu\n", BIT(dword, 2));
@@ -1065,7 +1066,7 @@ static void dump_cpt(void)
printf("AUD_PORT_EN_HD_CFG Port_C_Amp_Mute_Status\t\t%lu\n", BIT(dword, 21));
printf("AUD_PORT_EN_HD_CFG Port_D_Amp_Mute_Status\t\t%lu\n", BIT(dword, 22));
- dword = INREG(AUD_OUT_DIG_CNVT_A);
+ dword = INREG(igt_global_mmio, AUD_OUT_DIG_CNVT_A);
printf("AUD_OUT_DIG_CNVT_A V\t\t\t\t\t%lu\n", BIT(dword, 1));
printf("AUD_OUT_DIG_CNVT_A VCFG\t\t\t\t%lu\n", BIT(dword, 2));
printf("AUD_OUT_DIG_CNVT_A PRE\t\t\t\t\t%lu\n", BIT(dword, 3));
@@ -1077,7 +1078,7 @@ static void dump_cpt(void)
printf("AUD_OUT_DIG_CNVT_A Lowest_Channel_Number\t\t%lu\n", BITS(dword, 19, 16));
printf("AUD_OUT_DIG_CNVT_A Stream_ID\t\t\t\t%lu\n", BITS(dword, 23, 20));
- dword = INREG(AUD_OUT_DIG_CNVT_B);
+ dword = INREG(igt_global_mmio, AUD_OUT_DIG_CNVT_B);
printf("AUD_OUT_DIG_CNVT_B V\t\t\t\t\t%lu\n", BIT(dword, 1));
printf("AUD_OUT_DIG_CNVT_B VCFG\t\t\t\t%lu\n", BIT(dword, 2));
printf("AUD_OUT_DIG_CNVT_B PRE\t\t\t\t\t%lu\n", BIT(dword, 3));
@@ -1089,7 +1090,7 @@ static void dump_cpt(void)
printf("AUD_OUT_DIG_CNVT_B Lowest_Channel_Number\t\t%lu\n", BITS(dword, 19, 16));
printf("AUD_OUT_DIG_CNVT_B Stream_ID\t\t\t\t%lu\n", BITS(dword, 23, 20));
- dword = INREG(AUD_OUT_DIG_CNVT_C);
+ dword = INREG(igt_global_mmio, AUD_OUT_DIG_CNVT_C);
printf("AUD_OUT_DIG_CNVT_C V\t\t\t\t\t%lu\n", BIT(dword, 1));
printf("AUD_OUT_DIG_CNVT_C VCFG\t\t\t\t%lu\n", BIT(dword, 2));
printf("AUD_OUT_DIG_CNVT_C PRE\t\t\t\t\t%lu\n", BIT(dword, 3));
@@ -1103,8 +1104,9 @@ static void dump_cpt(void)
printf("AUD_OUT_CH_STR Converter_Channel_MAP PORTB PORTC PORTD\n");
for (i = 0; i < 8; i++) {
- OUTREG(AUD_OUT_CH_STR, i | (i << 8) | (i << 16));
- dword = INREG(AUD_OUT_CH_STR);
+ OUTREG(igt_global_mmio, AUD_OUT_CH_STR, i | (i << 8) |
+ (i << 16));
+ dword = INREG(igt_global_mmio, AUD_OUT_CH_STR);
printf("\t\t\t\t%lu\t%lu\t%lu\t%lu\n",
1 + BITS(dword, 3, 0),
1 + BITS(dword, 7, 4),
@@ -1112,33 +1114,33 @@ static void dump_cpt(void)
1 + BITS(dword, 23, 20));
}
- dword = INREG(AUD_OUT_STR_DESC_A);
+ dword = INREG(igt_global_mmio, AUD_OUT_STR_DESC_A);
printf("AUD_OUT_STR_DESC_A HBR_enable\t\t\t\t%lu\n", BITS(dword, 28, 27));
printf("AUD_OUT_STR_DESC_A Convertor_Channel_Count\t\t%lu\n", BITS(dword, 20, 16) + 1);
printf("AUD_OUT_STR_DESC_A Bits_per_Sample\t\t\t[%#lx] %s\n",
BITS(dword, 6, 4), OPNAME(bits_per_sample, BITS(dword, 6, 4)));
printf("AUD_OUT_STR_DESC_A Number_of_Channels_in_a_Stream\t%lu\n", 1 + BITS(dword, 3, 0));
- dword = INREG(AUD_OUT_STR_DESC_B);
+ dword = INREG(igt_global_mmio, AUD_OUT_STR_DESC_B);
printf("AUD_OUT_STR_DESC_B HBR_enable\t\t\t\t%lu\n", BITS(dword, 28, 27));
printf("AUD_OUT_STR_DESC_B Convertor_Channel_Count\t\t%lu\n", BITS(dword, 20, 16) + 1);
printf("AUD_OUT_STR_DESC_B Bits_per_Sample\t\t\t[%#lx] %s\n",
BITS(dword, 6, 4), OPNAME(bits_per_sample, BITS(dword, 6, 4)));
printf("AUD_OUT_STR_DESC_B Number_of_Channels_in_a_Stream\t%lu\n", 1 + BITS(dword, 3, 0));
- dword = INREG(AUD_OUT_STR_DESC_C);
+ dword = INREG(igt_global_mmio, AUD_OUT_STR_DESC_C);
printf("AUD_OUT_STR_DESC_C HBR_enable\t\t\t\t%lu\n", BITS(dword, 28, 27));
printf("AUD_OUT_STR_DESC_C Convertor_Channel_Count\t\t%lu\n", BITS(dword, 20, 16) + 1);
printf("AUD_OUT_STR_DESC_C Bits_per_Sample\t\t\t[%#lx] %s\n",
BITS(dword, 6, 4), OPNAME(bits_per_sample, BITS(dword, 6, 4)));
printf("AUD_OUT_STR_DESC_C Number_of_Channels_in_a_Stream\t%lu\n", 1 + BITS(dword, 3, 0));
- dword = INREG(AUD_PINW_CONNLNG_SEL);
+ dword = INREG(igt_global_mmio, AUD_PINW_CONNLNG_SEL);
printf("AUD_PINW_CONNLNG_SEL Connection_select_Control_B\t%#lx\n", BITS(dword, 7, 0));
printf("AUD_PINW_CONNLNG_SEL Connection_select_Control_C\t%#lx\n", BITS(dword, 15, 8));
printf("AUD_PINW_CONNLNG_SEL Connection_select_Control_D\t%#lx\n", BITS(dword, 23, 16));
- dword = INREG(AUD_CNTL_ST_A);
+ dword = INREG(igt_global_mmio, AUD_CNTL_ST_A);
printf("AUD_CNTL_ST_A DIP_Port_Select\t\t\t\t[%#lx] %s\n",
BITS(dword, 30, 29), dip_port[BITS(dword, 30, 29)]);
printf("AUD_CNTL_ST_A DIP_type_enable_status Audio DIP\t\t%lu\n", BIT(dword, 21));
@@ -1149,7 +1151,7 @@ static void dump_cpt(void)
printf("AUD_CNTL_ST_A ELD_ACK\t\t\t\t\t%lu\n", BIT(dword, 4));
printf("AUD_CNTL_ST_A ELD_buffer_size\t\t\t\t%lu\n", BITS(dword, 14, 10));
- dword = INREG(AUD_CNTL_ST_B);
+ dword = INREG(igt_global_mmio, AUD_CNTL_ST_B);
printf("AUD_CNTL_ST_B DIP_Port_Select\t\t\t\t[%#lx] %s\n",
BITS(dword, 30, 29), dip_port[BITS(dword, 30, 29)]);
printf("AUD_CNTL_ST_B DIP_type_enable_status Audio DIP\t\t%lu\n", BIT(dword, 21));
@@ -1160,7 +1162,7 @@ static void dump_cpt(void)
printf("AUD_CNTL_ST_B ELD_ACK\t\t\t\t\t%lu\n", BIT(dword, 4));
printf("AUD_CNTL_ST_B ELD_buffer_size\t\t\t\t%lu\n", BITS(dword, 14, 10));
- dword = INREG(AUD_CNTL_ST_C);
+ dword = INREG(igt_global_mmio, AUD_CNTL_ST_C);
printf("AUD_CNTL_ST_C DIP_Port_Select\t\t\t\t[%#lx] %s\n",
BITS(dword, 30, 29), dip_port[BITS(dword, 30, 29)]);
printf("AUD_CNTL_ST_C DIP_type_enable_status Audio DIP\t\t%lu\n", BIT(dword, 21));
@@ -1171,7 +1173,7 @@ static void dump_cpt(void)
printf("AUD_CNTL_ST_C ELD_ACK\t\t\t\t\t%lu\n", BIT(dword, 4));
printf("AUD_CNTL_ST_C ELD_buffer_size\t\t\t\t%lu\n", BITS(dword, 14, 10));
- dword = INREG(AUD_CNTRL_ST2);
+ dword = INREG(igt_global_mmio, AUD_CNTRL_ST2);
printf("AUD_CNTRL_ST2 CP_ReadyB\t\t\t\t%lu\n", BIT(dword, 1));
printf("AUD_CNTRL_ST2 ELD_validB\t\t\t\t%lu\n", BIT(dword, 0));
printf("AUD_CNTRL_ST2 CP_ReadyC\t\t\t\t%lu\n", BIT(dword, 5));
@@ -1179,7 +1181,7 @@ static void dump_cpt(void)
printf("AUD_CNTRL_ST2 CP_ReadyD\t\t\t\t%lu\n", BIT(dword, 9));
printf("AUD_CNTRL_ST2 ELD_validD\t\t\t\t%lu\n", BIT(dword, 8));
- dword = INREG(AUD_CNTRL_ST3);
+ dword = INREG(igt_global_mmio, AUD_CNTRL_ST3);
printf("AUD_CNTRL_ST3 TransA_DPT_Audio_Output_En\t\t%lu\n", BIT(dword, 3));
printf("AUD_CNTRL_ST3 TransA_to_Port_Sel\t\t\t[%#lx] %s\n",
BITS(dword, 2, 0), trans_to_port_sel[BITS(dword, 2, 0)]);
@@ -1190,7 +1192,7 @@ static void dump_cpt(void)
printf("AUD_CNTRL_ST3 TransC_to_Port_Sel\t\t\t[%#lx] %s\n",
BITS(dword, 10, 8), trans_to_port_sel[BITS(dword, 10, 8)]);
- dword = INREG(AUD_HDMIW_STATUS);
+ dword = INREG(igt_global_mmio, AUD_HDMIW_STATUS);
printf("AUD_HDMIW_STATUS Conv_A_CDCLK/DOTCLK_FIFO_Underrun\t%lu\n", BIT(dword, 27));
printf("AUD_HDMIW_STATUS Conv_A_CDCLK/DOTCLK_FIFO_Overrun\t%lu\n", BIT(dword, 26));
printf("AUD_HDMIW_STATUS Conv_B_CDCLK/DOTCLK_FIFO_Underrun\t%lu\n", BIT(dword, 29));
@@ -1201,54 +1203,60 @@ static void dump_cpt(void)
printf("AUD_HDMIW_STATUS Function_Reset\t\t\t%lu\n", BIT(dword, 24));
printf("AUD_HDMIW_HDMIEDID_A HDMI ELD:\n\t");
- dword = INREG(AUD_CNTL_ST_A);
+ dword = INREG(igt_global_mmio, AUD_CNTL_ST_A);
dword &= ~BITMASK(9, 5);
- OUTREG(AUD_CNTL_ST_A, dword);
+ OUTREG(igt_global_mmio, AUD_CNTL_ST_A, dword);
for (i = 0; i < BITS(dword, 14, 10) / 4; i++)
- printf("%08x ", htonl(INREG(AUD_HDMIW_HDMIEDID_A)));
+ printf("%08x ", htonl(INREG(igt_global_mmio,
+ AUD_HDMIW_HDMIEDID_A)));
printf("\n");
printf("AUD_HDMIW_HDMIEDID_B HDMI ELD:\n\t");
- dword = INREG(AUD_CNTL_ST_B);
+ dword = INREG(igt_global_mmio, AUD_CNTL_ST_B);
dword &= ~BITMASK(9, 5);
- OUTREG(AUD_CNTL_ST_B, dword);
+ OUTREG(igt_global_mmio, AUD_CNTL_ST_B, dword);
for (i = 0; i < BITS(dword, 14, 10) / 4; i++)
- printf("%08x ", htonl(INREG(AUD_HDMIW_HDMIEDID_B)));
+ printf("%08x ", htonl(INREG(igt_global_mmio,
+ AUD_HDMIW_HDMIEDID_B)));
printf("\n");
printf("AUD_HDMIW_HDMIEDID_C HDMI ELD:\n\t");
- dword = INREG(AUD_CNTL_ST_C);
+ dword = INREG(igt_global_mmio, AUD_CNTL_ST_C);
dword &= ~BITMASK(9, 5);
- OUTREG(AUD_CNTL_ST_C, dword);
+ OUTREG(igt_global_mmio, AUD_CNTL_ST_C, dword);
for (i = 0; i < BITS(dword, 14, 10) / 4; i++)
- printf("%08x ", htonl(INREG(AUD_HDMIW_HDMIEDID_C)));
+ printf("%08x ", htonl(INREG(igt_global_mmio,
+ AUD_HDMIW_HDMIEDID_C)));
printf("\n");
printf("AUD_HDMIW_INFOFR_A HDMI audio Infoframe:\n\t");
- dword = INREG(AUD_CNTL_ST_A);
+ dword = INREG(igt_global_mmio, AUD_CNTL_ST_A);
dword &= ~BITMASK(20, 18);
dword &= ~BITMASK(3, 0);
- OUTREG(AUD_CNTL_ST_A, dword);
+ OUTREG(igt_global_mmio, AUD_CNTL_ST_A, dword);
for (i = 0; i < 8; i++)
- printf("%08x ", htonl(INREG(AUD_HDMIW_INFOFR_A)));
+ printf("%08x ", htonl(INREG(igt_global_mmio,
+ AUD_HDMIW_INFOFR_A)));
printf("\n");
printf("AUD_HDMIW_INFOFR_B HDMI audio Infoframe:\n\t");
- dword = INREG(AUD_CNTL_ST_B);
+ dword = INREG(igt_global_mmio, AUD_CNTL_ST_B);
dword &= ~BITMASK(20, 18);
dword &= ~BITMASK(3, 0);
- OUTREG(AUD_CNTL_ST_B, dword);
+ OUTREG(igt_global_mmio, AUD_CNTL_ST_B, dword);
for (i = 0; i < 8; i++)
- printf("%08x ", htonl(INREG(AUD_HDMIW_INFOFR_B)));
+ printf("%08x ", htonl(INREG(igt_global_mmio,
+ AUD_HDMIW_INFOFR_B)));
printf("\n");
printf("AUD_HDMIW_INFOFR_C HDMI audio Infoframe:\n\t");
- dword = INREG(AUD_CNTL_ST_C);
+ dword = INREG(igt_global_mmio, AUD_CNTL_ST_C);
dword &= ~BITMASK(20, 18);
dword &= ~BITMASK(3, 0);
- OUTREG(AUD_CNTL_ST_C, dword);
+ OUTREG(igt_global_mmio, AUD_CNTL_ST_C, dword);
for (i = 0; i < 8; i++)
- printf("%08x ", htonl(INREG(AUD_HDMIW_INFOFR_C)));
+ printf("%08x ", htonl(INREG(igt_global_mmio,
+ AUD_HDMIW_INFOFR_C)));
printf("\n");
}
@@ -1374,10 +1382,12 @@ static void dump_aud_config(int index)
char prefix[MAX_PREFIX_SIZE];
if (!IS_HASWELL_PLUS(devid)) {
- dword = INREG(aud_reg_base + AUD_CONFIG_A + (index - PIPE_A) * 0x100);
+ dword = INREG(igt_global_mmio, aud_reg_base + AUD_CONFIG_A +
+ (index - PIPE_A) * 0x100);
sprintf(prefix, "AUD_CONFIG_%c ", 'A' + index - PIPE_A);
} else {
- dword = INREG(aud_reg_base + AUD_TCA_CONFIG + (index - TRANSCODER_A) * 0x100);
+ dword = INREG(igt_global_mmio, aud_reg_base + AUD_TCA_CONFIG +
+ (index - TRANSCODER_A) * 0x100);
sprintf(prefix, "AUD_TC%c_CONFIG", 'A' + index - TRANSCODER_A);
}
@@ -1397,10 +1407,12 @@ static void dump_aud_misc_control(int index)
char prefix[MAX_PREFIX_SIZE];
if (!IS_HASWELL_PLUS(devid)) {
- dword = INREG(aud_reg_base + AUD_MISC_CTRL_A + (index - PIPE_A) * 0x100);
+ dword = INREG(igt_global_mmio, aud_reg_base + AUD_MISC_CTRL_A +
+ (index - PIPE_A) * 0x100);
sprintf(prefix, "AUD_MISC_CTRL_%c ", 'A' + index - PIPE_A);
} else {
- dword = INREG(aud_reg_base + AUD_C1_MISC_CTRL + (index - CONVERTER_1) * 0x100);
+ dword = INREG(igt_global_mmio, aud_reg_base + AUD_C1_MISC_CTRL +
+ (index - CONVERTER_1) * 0x100);
sprintf(prefix, "AUD_C%c_MISC_CTRL", '1' + index - CONVERTER_1);
}
@@ -1414,7 +1426,7 @@ static void dump_aud_vendor_device_id(void)
{
uint32_t dword;
- dword = INREG(aud_reg_base + AUD_VID_DID);
+ dword = INREG(igt_global_mmio, aud_reg_base + AUD_VID_DID);
printf("AUD_VID_DID device id\t\t\t\t\t0x%lx\n", BITS(dword, 15, 0));
printf("AUD_VID_DID vendor id\t\t\t\t\t0x%lx\n", BITS(dword, 31, 16));
}
@@ -1423,7 +1435,7 @@ static void dump_aud_revision_id(void)
{
uint32_t dword;
- dword = INREG(aud_reg_base + AUD_RID);
+ dword = INREG(igt_global_mmio, aud_reg_base + AUD_RID);
printf("AUD_RID Stepping_Id\t\t\t\t\t0x%lx\n", BITS(dword, 7, 0));
printf("AUD_RID Revision_Id\t\t\t\t\t0x%lx\n", BITS(dword, 15, 8));
printf("AUD_RID Minor_Revision\t\t\t\t\t0x%lx\n", BITS(dword, 19, 16));
@@ -1436,10 +1448,13 @@ static void dump_aud_m_cts_enable(int index)
char prefix[MAX_PREFIX_SIZE];
if (!IS_HASWELL_PLUS(devid)) {
- dword = INREG(aud_reg_base + AUD_CTS_ENABLE_A + (index - PIPE_A) * 0x100);
+ dword = INREG(igt_global_mmio, aud_reg_base + AUD_CTS_ENABLE_A +
+ (index - PIPE_A) * 0x100);
sprintf(prefix, "AUD_CTS_ENABLE_%c ", 'A' + index - PIPE_A);
} else {
- dword = INREG(aud_reg_base + AUD_TCA_M_CTS_ENABLE + (index - TRANSCODER_A) * 0x100);
+ dword = INREG(igt_global_mmio, aud_reg_base +
+ AUD_TCA_M_CTS_ENABLE + (index - TRANSCODER_A) *
+ 0x100);
sprintf(prefix, "AUD_TC%c_M_CTS_ENABLE", 'A' + index - TRANSCODER_A);
}
@@ -1454,7 +1469,7 @@ static void dump_aud_power_state(void)
uint32_t dword;
int num_pipes;
- dword = INREG(aud_reg_base + AUD_PWRST);
+ dword = INREG(igt_global_mmio, aud_reg_base + AUD_PWRST);
printf("AUD_PWRST PinB_Widget_Power_State_Set \t%s\n", power_state[BITS(dword, 1, 0)]);
printf("AUD_PWRST PinB_Widget_Power_State_Current \t%s\n", power_state[BITS(dword, 3, 2)]);
printf("AUD_PWRST PinC_Widget_Power_State_Set \t%s\n", power_state[BITS(dword, 5, 4)]);
@@ -1510,11 +1525,11 @@ static void dump_aud_edid_data(int index)
printf("AUD_HDMIW_HDMIEDID_%c HDMI ELD:\n\t", 'A' + index - PIPE_A);
}
- dword = INREG(aud_ctrl_st);
+ dword = INREG(igt_global_mmio, aud_ctrl_st);
dword &= ~BITMASK(9, 5);
- OUTREG(aud_ctrl_st, dword);
+ OUTREG(igt_global_mmio, aud_ctrl_st, dword);
for (i = 0; i < BITS(dword, 14, 10) / 4; i++)
- printf("%08x ", htonl(INREG(edid_data)));
+ printf("%08x ", htonl(INREG(igt_global_mmio, edid_data)));
printf("\n");
}
@@ -1537,12 +1552,12 @@ static void dump_aud_infoframe(int index)
printf("AUD_HDMIW_INFOFR_%c HDMI audio Infoframe:\n\t", 'A' + index - PIPE_A);
}
- dword = INREG(aud_ctrl_st);
+ dword = INREG(igt_global_mmio, aud_ctrl_st);
dword &= ~BITMASK(20, 18);
dword &= ~BITMASK(3, 0);
- OUTREG(aud_ctrl_st, dword);
+ OUTREG(igt_global_mmio, aud_ctrl_st, dword);
for (i = 0; i < 8; i++)
- printf("%08x ", htonl(INREG(info_frm)));
+ printf("%08x ", htonl(INREG(igt_global_mmio, info_frm)));
printf("\n");
}
@@ -1551,7 +1566,7 @@ static void dump_aud_port_en_hd_cfg(void)
uint32_t dword;
int num_pipes = get_num_pipes();
- dword = INREG(aud_reg_base + AUD_PORT_EN_HD_CFG);
+ dword = INREG(igt_global_mmio, aud_reg_base + AUD_PORT_EN_HD_CFG);
if (num_pipes == 2) {
printf("AUD_PORT_EN_HD_CFG Convertor_A_Digen\t\t\t%lu\n", BIT(dword, 0));
printf("AUD_PORT_EN_HD_CFG Convertor_B_Digen\t\t\t%lu\n", BIT(dword, 1));
@@ -1585,7 +1600,7 @@ static void dump_aud_pipe_conv_cfg(void)
{
uint32_t dword;
- dword = INREG(aud_reg_base + AUD_PIPE_CONV_CFG);
+ dword = INREG(igt_global_mmio, aud_reg_base + AUD_PIPE_CONV_CFG);
printf("AUD_PIPE_CONV_CFG Convertor_1_Digen\t\t\t%lu\n", BIT(dword, 0));
printf("AUD_PIPE_CONV_CFG Convertor_2_Digen\t\t\t%lu\n", BIT(dword, 1));
printf("AUD_PIPE_CONV_CFG Convertor_3_Digen\t\t\t%lu\n", BIT(dword, 2));
@@ -1607,10 +1622,12 @@ static void dump_aud_dig_cnvt(int index)
char prefix[MAX_PREFIX_SIZE];
if (!IS_HASWELL_PLUS(devid)) {
- dword = INREG(aud_reg_base + AUD_OUT_DIG_CNVT_A + (index - PIPE_A) * 0x100);
+ dword = INREG(igt_global_mmio, aud_reg_base +
+ AUD_OUT_DIG_CNVT_A + (index - PIPE_A) * 0x100);
sprintf(prefix, "AUD_OUT_DIG_CNVT_%c", 'A' + index - PIPE_A);
} else {
- dword = INREG(aud_reg_base + AUD_C1_DIG_CNVT + (index - CONVERTER_1) * 0x100);
+ dword = INREG(igt_global_mmio, aud_reg_base + AUD_C1_DIG_CNVT +
+ (index - CONVERTER_1) * 0x100);
sprintf(prefix, "AUD_C%c_DIG_CNVT ", '1' + index - CONVERTER_1);
}
@@ -1633,10 +1650,12 @@ static void dump_aud_str_desc(int index)
uint32_t rate;
if (!IS_HASWELL_PLUS(devid)) {
- dword = INREG(aud_reg_base + AUD_OUT_STR_DESC_A + (index - PIPE_A) * 0x100);
+ dword = INREG(igt_global_mmio, aud_reg_base +
+ AUD_OUT_STR_DESC_A + (index - PIPE_A) * 0x100);
sprintf(prefix, "AUD_OUT_STR_DESC_%c", 'A' + index - PIPE_A);
} else {
- dword = INREG(aud_reg_base + AUD_C1_STR_DESC + (index - CONVERTER_1) * 0x100);
+ dword = INREG(igt_global_mmio, aud_reg_base + AUD_C1_STR_DESC +
+ (index - CONVERTER_1) * 0x100);
sprintf(prefix, "AUD_C%c_STR_DESC ", '1' + index - CONVERTER_1);
}
@@ -1668,8 +1687,9 @@ static void dump_aud_out_chan_map(void)
printf("AUD_OUT_CHAN_MAP Converter_Channel_MAP PORTB PORTC PORTD\n");
for (i = 0; i < 8; i++) {
- OUTREG(aud_reg_base + AUD_OUT_CHAN_MAP, i | (i << 8) | (i << 16));
- dword = INREG(aud_reg_base + AUD_OUT_CHAN_MAP);
+ OUTREG(igt_global_mmio, aud_reg_base + AUD_OUT_CHAN_MAP,
+ i | (i << 8) | (i << 16));
+ dword = INREG(igt_global_mmio, aud_reg_base + AUD_OUT_CHAN_MAP);
printf("\t\t\t\t%lu\t%lu\t%lu\t%lu\n",
1 + BITS(dword, 3, 0),
1 + BITS(dword, 7, 4),
@@ -1683,7 +1703,7 @@ static void dump_aud_connect_list(void)
uint32_t dword;
char prefix[MAX_PREFIX_SIZE];
- dword = INREG(aud_reg_base + AUD_PINW_CONNLNG_LIST);
+ dword = INREG(igt_global_mmio, aud_reg_base + AUD_PINW_CONNLNG_LIST);
sprintf(prefix, "AUD_PINW_CONNLNG_LIST");
printf("%s Connect_List_Length\t\t%lu\n", prefix, BITS(dword, 6, 0));
@@ -1698,11 +1718,13 @@ static void dump_aud_connect_select(void)
char prefix[MAX_PREFIX_SIZE];
if (IS_HASWELL_PLUS(devid)) {
- dword = INREG(aud_reg_base + AUD_PIPE_CONN_SEL_CTRL);
+ dword = INREG(igt_global_mmio, aud_reg_base +
+ AUD_PIPE_CONN_SEL_CTRL);
sprintf(prefix, "AUD_PIPE_CONN_SEL_CTRL");
} else {
- dword = INREG(aud_reg_base + AUD_PINW_CONNLNG_SEL);
+ dword = INREG(igt_global_mmio, aud_reg_base +
+ AUD_PINW_CONNLNG_SEL);
sprintf(prefix, "AUD_PINW_CONNLNG_SEL ");
}
@@ -1718,11 +1740,13 @@ static void dump_aud_ctrl_state(int index)
if (IS_HASWELL_PLUS(devid)) {
offset = (index - TRANSCODER_A) * 0x100;
- dword = INREG(aud_reg_base + AUD_TCA_DIP_ELD_CTRL_ST + offset);
+ dword = INREG(igt_global_mmio, aud_reg_base +
+ AUD_TCA_DIP_ELD_CTRL_ST + offset);
printf("Audio DIP and ELD control state for Transcoder %c\n", 'A' + index - TRANSCODER_A);
} else {
offset = (index - PIPE_A) * 0x100;
- dword = INREG(aud_reg_base + AUD_CNTL_ST_A + offset);
+ dword = INREG(igt_global_mmio, aud_reg_base + AUD_CNTL_ST_A +
+ offset);
printf("Audio control state - Pipe %c\n", 'A' + index - PIPE_A);
}
@@ -1743,7 +1767,7 @@ static void dump_aud_ctrl_state2(void)
{
uint32_t dword;
- dword = INREG(aud_reg_base + AUD_CNTL_ST2);
+ dword = INREG(igt_global_mmio, aud_reg_base + AUD_CNTL_ST2);
printf("AUD_CNTL_ST2 ELD_validB\t\t\t\t%lu\n", BIT(dword, 0));
printf("AUD_CNTL_ST2 CP_ReadyB\t\t\t\t\t%lu\n", BIT(dword, 1));
printf("AUD_CNTL_ST2 ELD_validC\t\t\t\t%lu\n", BIT(dword, 4));
@@ -1757,7 +1781,7 @@ static void dump_aud_eld_cp_vld(void)
{
uint32_t dword;
- dword = INREG(aud_reg_base + AUD_PIN_ELD_CP_VLD);
+ dword = INREG(igt_global_mmio, aud_reg_base + AUD_PIN_ELD_CP_VLD);
printf("AUD_PIN_ELD_CP_VLD Transcoder_A ELD_valid\t\t%lu\n", BIT(dword, 0));
printf("AUD_PIN_ELD_CP_VLD Transcoder_A CP_Ready \t\t%lu\n", BIT(dword, 1));
printf("AUD_PIN_ELD_CP_VLD Transcoder_A Out_enable\t\t%lu\n", BIT(dword, 2));
@@ -1776,7 +1800,7 @@ static void dump_aud_hdmi_status(void)
{
uint32_t dword;
- dword = INREG(aud_reg_base + AUD_HDMIW_STATUS);
+ dword = INREG(igt_global_mmio, aud_reg_base + AUD_HDMIW_STATUS);
printf("AUD_HDMIW_STATUS Function_Reset\t\t\t%lu\n", BIT(dword, 24));
printf("AUD_HDMIW_STATUS BCLK/CDCLK_FIFO_Overrun\t\t%lu\n", BIT(dword, 25));
printf("AUD_HDMIW_STATUS Conv_A_CDCLK/DOTCLK_FIFO_Overrun\t%lu\n", BIT(dword, 28));
@@ -1817,7 +1841,7 @@ static void dump_dp_port_ctrl(int port)
sprintf(prefix, "DP_%c", 'B' + port - PORT_B);
port_ctrl = disp_reg_base + DP_CTL_B + (port - PORT_B) * 0x100;
- dword = INREG(port_ctrl);
+ dword = INREG(igt_global_mmio, port_ctrl);
printf("%s DisplayPort_Enable\t\t\t\t\t%lu\n", prefix, BIT(dword, 31));
printf("%s Transcoder_Select\t\t\t\t\t%s\n", prefix, BIT(dword, 30) ? "Transcoder B" : "Transcoder A");
printf("%s Port_Width_Selection\t\t\t\t[0x%lx] %s\n", prefix, BITS(dword, 21, 19),
@@ -1841,7 +1865,7 @@ static void dump_hdmi_port_ctrl(int port)
port_ctrl = disp_reg_base + HDMI_CTL_B + (port - PORT_B) * 0x10;
}
- dword = INREG(port_ctrl);
+ dword = INREG(igt_global_mmio, port_ctrl);
printf("%s HDMI_Enable\t\t\t\t\t%u\n", prefix, !!(dword & SDVO_ENABLE));
printf("%s Transcoder_Select\t\t\t\t%s\n", prefix, BIT(dword, 30) ? "Transcoder B" : "Transcoder A");
printf("%s HDCP_Port_Select\t\t\t\t%lu\n", prefix, BIT(dword, 5));
@@ -2029,7 +2053,7 @@ static void dump_ddi_buf_ctl(int port)
{
uint32_t dword;
- dword = INREG(DDI_BUF_CTL_A + (port - PORT_A) * 0x100);
+ dword = INREG(igt_global_mmio, DDI_BUF_CTL_A + (port - PORT_A) * 0x100);
printf("DDI %c Buffer control\n", 'A' + port - PORT_A);
printf("\tDP port width\t\t\t\t\t[0x%lx] %s\n", BITS(dword, 3, 1),
@@ -2041,7 +2065,8 @@ static void dump_ddi_func_ctl(int pipe)
{
uint32_t dword;
- dword = INREG(PIPE_DDI_FUNC_CTL_A + (pipe - PIPE_A) * 0x1000);
+ dword = INREG(igt_global_mmio, PIPE_DDI_FUNC_CTL_A + (pipe - PIPE_A) *
+ 0x1000);
printf("Pipe %c DDI Function Control\n", 'A' + pipe - PIPE_A);
printf("\tBITS per color\t\t\t\t\t[0x%lx] %s\n", BITS(dword, 22, 20),
@@ -2058,7 +2083,8 @@ static void dump_aud_connect_list_entry_length(int transcoder)
uint32_t dword;
char prefix[MAX_PREFIX_SIZE];
- dword = INREG(aud_reg_base + AUD_TCA_PIN_PIPE_CONN_ENTRY_LNGTH + (transcoder - TRANSCODER_A) * 0x100);
+ dword = INREG(igt_global_mmio, aud_reg_base +
+ AUD_TCA_PIN_PIPE_CONN_ENTRY_LNGTH + (transcoder - TRANSCODER_A) * 0x100);
sprintf(prefix, "AUD_TC%c_PIN_PIPE_CONN_ENTRY_LNGTH", 'A' + transcoder - TRANSCODER_A);
printf("%s Connect_List_Length\t%lu\n", prefix, BITS(dword, 6, 0));
@@ -2071,7 +2097,7 @@ static void dump_aud_connect_select_ctrl(void)
{
uint32_t dword;
- dword = INREG(aud_reg_base + AUD_PIPE_CONN_SEL_CTRL);
+ dword = INREG(igt_global_mmio, aud_reg_base + AUD_PIPE_CONN_SEL_CTRL);
printf("AUD_PIPE_CONN_SEL_CTRL Connection_select_Port_B\t%#lx\n", BITS(dword, 7, 0));
printf("AUD_PIPE_CONN_SEL_CTRL Connection_select_Port_C\t%#lx\n", BITS(dword, 15, 8));
printf("AUD_PIPE_CONN_SEL_CTRL Connection_select_Port_D\t%#lx\n", BITS(dword, 23, 16));
@@ -2082,7 +2108,8 @@ static void dump_aud_dip_eld_ctrl_st(int transcoder)
uint32_t dword;
int offset = (transcoder - TRANSCODER_A) * 0x100;
- dword = INREG(aud_reg_base + AUD_TCA_DIP_ELD_CTRL_ST + offset);
+ dword = INREG(igt_global_mmio, aud_reg_base + AUD_TCA_DIP_ELD_CTRL_ST +
+ offset);
printf("Audio DIP and ELD control state for Transcoder %c\n", 'A' + transcoder - TRANSCODER_A);
printf("\tELD_ACK\t\t\t\t\t\t%lu\n", BIT(dword, 4));
@@ -2102,7 +2129,7 @@ static void dump_aud_hdmi_fifo_status(void)
{
uint32_t dword;
- dword = INREG(aud_reg_base + AUD_HDMI_FIFO_STATUS);
+ dword = INREG(igt_global_mmio, aud_reg_base + AUD_HDMI_FIFO_STATUS);
printf("AUD_HDMI_FIFO_STATUS Function_Reset\t\t\t%lu\n", BIT(dword, 24));
printf("AUD_HDMI_FIFO_STATUS Conv_1_CDCLK/DOTCLK_FIFO_Overrun\t%lu\n", BIT(dword, 26));
printf("AUD_HDMI_FIFO_STATUS Conv_1_CDCLK/DOTCLK_FIFO_Underrun\t%lu\n", BIT(dword, 27));
diff --git a/tools/intel_backlight.c b/tools/intel_backlight.c
index e4850e88..85d099d7 100644
--- a/tools/intel_backlight.c
+++ b/tools/intel_backlight.c
@@ -42,8 +42,8 @@ int main(int argc, char** argv)
intel_mmio_use_pci_bar(intel_get_pci_device(), -1);
- current = INREG(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
- max = INREG(BLC_PWM_PCH_CTL2) >> 16;
+ current = INREG(igt_global_mmio, BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
+ max = INREG(igt_global_mmio, BLC_PWM_PCH_CTL2) >> 16;
printf ("current backlight value: %d%%\n", current * 100 / max);
@@ -51,9 +51,9 @@ int main(int argc, char** argv)
uint32_t v = atoi (argv[1]) * max / 100;
if (v > max)
v = max;
- OUTREG(BLC_PWM_CPU_CTL,
- (INREG(BLC_PWM_CPU_CTL) &~ BACKLIGHT_DUTY_CYCLE_MASK) | v);
- (void) INREG(BLC_PWM_CPU_CTL);
+ OUTREG(igt_global_mmio, BLC_PWM_CPU_CTL,
+ (INREG(igt_global_mmio, BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK) | v);
+ (void)INREG(igt_global_mmio, BLC_PWM_CPU_CTL);
printf ("set backlight to %d%%\n", v * 100 / max);
}
diff --git a/tools/intel_display_poller.c b/tools/intel_display_poller.c
index 51f5b9a5..e1094d39 100644
--- a/tools/intel_display_poller.c
+++ b/tools/intel_display_poller.c
@@ -71,22 +71,22 @@ static void sighandler(int x)
static uint16_t read_reg_16(uint32_t reg)
{
- return INREG16(vlv_offset + reg);
+ return INREG16(igt_global_mmio, vlv_offset + reg);
}
static uint32_t read_reg(uint32_t reg)
{
- return INREG(vlv_offset + reg);
+ return INREG(igt_global_mmio, vlv_offset + reg);
}
static void write_reg_16(uint32_t reg, uint16_t val)
{
- OUTREG16(vlv_offset + reg, val);
+ OUTREG16(igt_global_mmio, vlv_offset + reg, val);
}
static void write_reg(uint32_t reg, uint32_t val)
{
- OUTREG(vlv_offset + reg, val);
+ OUTREG(igt_global_mmio, vlv_offset + reg, val);
}
static char pipe_name(int pipe)
diff --git a/tools/intel_forcewaked.c b/tools/intel_forcewaked.c
index 02fbf888..e057f5fe 100644
--- a/tools/intel_forcewaked.c
+++ b/tools/intel_forcewaked.c
@@ -59,7 +59,7 @@ help(char *prog) {
static int
is_alive(void) {
/* Read the timestamp, which should *almost* always be !0 */
- return (intel_register_read(0x2358) != 0);
+ return (intel_register_read(igt_global_mmio, 0x2358) != 0);
}
int main(int argc, char *argv[])
diff --git a/tools/intel_gpu_time.c b/tools/intel_gpu_time.c
index 4ed6430e..d90b816a 100644
--- a/tools/intel_gpu_time.c
+++ b/tools/intel_gpu_time.c
@@ -86,8 +86,10 @@ int main(int argc, char **argv)
while (!goddo) {
uint32_t ring_head, ring_tail;
- ring_head = INREG(LP_RING + RING_HEAD) & HEAD_ADDR;
- ring_tail = INREG(LP_RING + RING_TAIL) & TAIL_ADDR;
+ ring_head = INREG(igt_global_mmio, LP_RING + RING_HEAD) &
+ HEAD_ADDR;
+ ring_tail = INREG(igt_global_mmio, LP_RING + RING_TAIL) &
+ TAIL_ADDR;
if (ring_tail == ring_head)
ring_idle++;
diff --git a/tools/intel_infoframes.c b/tools/intel_infoframes.c
index 2ef5d4fd..689f5faa 100644
--- a/tools/intel_infoframes.c
+++ b/tools/intel_infoframes.c
@@ -337,20 +337,20 @@ static void load_infoframe(Transcoder transcoder, DipInfoFrame *frame,
uint32_t ctl_val;
uint32_t i;
- ctl_val = INREG(ctl_reg);
+ ctl_val = INREG(igt_global_mmio, ctl_reg);
ctl_val &= ~DIP_CTL_BUFFER_INDEX;
ctl_val |= type << 19;
- OUTREG(ctl_reg, ctl_val);
- ctl_val = INREG(ctl_reg);
+ OUTREG(igt_global_mmio, ctl_reg, ctl_val);
+ ctl_val = INREG(igt_global_mmio, ctl_reg);
ctl_val &= ~DIP_CTL_ACCESS_ADDR;
- OUTREG(ctl_reg, ctl_val);
+ OUTREG(igt_global_mmio, ctl_reg, ctl_val);
for (i = 0; i < 16; i++) {
- ctl_val = INREG(ctl_reg);
+ ctl_val = INREG(igt_global_mmio, ctl_reg);
assert((ctl_val & DIP_CTL_ACCESS_ADDR) == i);
- frame->data32[i] = INREG(data_reg);
+ frame->data32[i] = INREG(igt_global_mmio, data_reg);
}
}
@@ -385,7 +385,7 @@ static void infoframe_fix_checksum(DipInfoFrame *frame)
static void dump_port_info(int hdmi_port_index)
{
Register port = get_hdmi_port(hdmi_port_index);
- uint32_t val = INREG(port);
+ uint32_t val = INREG(igt_global_mmio, port);
Transcoder transcoder;
printf("\nPort %s:\n", hdmi_port_names[hdmi_port_index]);
@@ -438,7 +438,7 @@ static void dump_avi_info(Transcoder transcoder)
DipInfoFrame frame;
load_infoframe(transcoder, &frame, DIP_AVI);
- val = INREG(reg);
+ val = INREG(igt_global_mmio, reg);
printf("AVI InfoFrame:\n");
@@ -537,7 +537,7 @@ static void dump_vendor_info(Transcoder transcoder)
DipInfoFrame frame;
load_infoframe(transcoder, &frame, DIP_VENDOR);
- val = INREG(reg);
+ val = INREG(igt_global_mmio, reg);
printf("Vendor InfoFrame:\n");
@@ -572,7 +572,7 @@ static void dump_gamut_info(Transcoder transcoder)
DipInfoFrame frame;
load_infoframe(transcoder, &frame, DIP_GAMUT);
- val = INREG(reg);
+ val = INREG(igt_global_mmio, reg);
printf("Gamut InfoFrame:\n");
@@ -600,7 +600,7 @@ static void dump_spd_info(Transcoder transcoder)
char description[17];
load_infoframe(transcoder, &frame, DIP_SPD);
- val = INREG(reg);
+ val = INREG(igt_global_mmio, reg);
printf("SPD InfoFrame:\n");
@@ -635,7 +635,7 @@ static void dump_spd_info(Transcoder transcoder)
static void dump_transcoder_info(Transcoder transcoder)
{
Register reg = get_dip_ctl_reg(transcoder);
- uint32_t val = INREG(reg);
+ uint32_t val = INREG(igt_global_mmio, reg);
if (gen == 4) {
printf("\nDIP information:\n");
@@ -698,37 +698,37 @@ static void write_infoframe(Transcoder transcoder, DipType type,
uint32_t ctl_val;
unsigned int i;
- ctl_val = INREG(ctl_reg);
+ ctl_val = INREG(igt_global_mmio, ctl_reg);
ctl_val &= ~DIP_CTL_BUFFER_INDEX;
ctl_val |= (type << 19);
ctl_val &= ~DIP_CTL_ACCESS_ADDR;
- OUTREG(ctl_reg, ctl_val);
+ OUTREG(igt_global_mmio, ctl_reg, ctl_val);
for (i = 0; i < 8; i++) {
- ctl_val = INREG(ctl_reg);
+ ctl_val = INREG(igt_global_mmio, ctl_reg);
assert((ctl_val & DIP_CTL_ACCESS_ADDR) == i);
- OUTREG(data_reg, frame->data32[i]);
+ OUTREG(igt_global_mmio, data_reg, frame->data32[i]);
}
}
static void disable_infoframe(Transcoder transcoder, DipType type)
{
Register reg = get_dip_ctl_reg(transcoder);
- uint32_t val = INREG(reg);
+ uint32_t val = INREG(igt_global_mmio, reg);
if (gen != 4 && type == DIP_AVI)
val &= ~DIP_CTL_ENABLE;
val &= ~(1 << (21 + type));
- OUTREG(reg, val);
+ OUTREG(igt_global_mmio, reg, val);
}
static void enable_infoframe(Transcoder transcoder, DipType type)
{
Register reg = get_dip_ctl_reg(transcoder);
- uint32_t val = INREG(reg);
+ uint32_t val = INREG(igt_global_mmio, reg);
if (gen != 4 && type == DIP_AVI)
val |= DIP_CTL_ENABLE;
val |= (1 << (21 + type));
- OUTREG(reg, val);
+ OUTREG(igt_global_mmio, reg, val);
}
static int parse_infoframe_option_u(const char *name, const char *s,
@@ -787,7 +787,7 @@ static void change_avi_infoframe(Transcoder transcoder, char *commands)
char *current = commands;
load_infoframe(transcoder, &frame, DIP_AVI);
- val = INREG(reg);
+ val = INREG(igt_global_mmio, reg);
while (1) {
rc = sscanf(current, "%31s%n", option, &read);
@@ -856,7 +856,7 @@ static void change_avi_infoframe(Transcoder transcoder, char *commands)
val &= ~DIP_CTL_FREQUENCY;
val |= DIP_CTL_FREQ_EVERY;
- OUTREG(reg, val);
+ OUTREG(igt_global_mmio, reg, val);
frame.avi.header.type = AVI_INFOFRAME_TYPE;
frame.avi.header.version = AVI_INFOFRAME_VERSION;
@@ -888,7 +888,7 @@ static void change_spd_infoframe(Transcoder transcoder, char *commands)
char *current = commands;
load_infoframe(transcoder, &frame, DIP_SPD);
- val = INREG(reg);
+ val = INREG(igt_global_mmio, reg);
while (1) {
rc = sscanf(current, "%15s%n", option, &read);
@@ -917,7 +917,7 @@ static void change_spd_infoframe(Transcoder transcoder, char *commands)
val &= ~DIP_CTL_FREQUENCY;
val |= DIP_CTL_FREQ_EVERY_OTHER;
- OUTREG(reg, val);
+ OUTREG(igt_global_mmio, reg, val);
frame.spd.header.type = SPD_INFOFRAME_TYPE;
frame.spd.header.version = SPD_INFOFRAME_VERSION;
@@ -946,7 +946,7 @@ static void change_infoframe_frequency(Transcoder transcoder, DipType type,
DipFrequency frequency)
{
Register reg = get_dip_ctl_reg(transcoder);
- uint32_t val = INREG(reg);
+ uint32_t val = INREG(igt_global_mmio, reg);
if (type == DIP_AVI && frequency != DIP_FREQ_EVERY_VSYNC) {
printf("Error: AVI infoframe must be sent every VSync!\n");
@@ -955,37 +955,37 @@ static void change_infoframe_frequency(Transcoder transcoder, DipType type,
val &= ~DIP_CTL_FREQUENCY;
val |= (frequency << 16);
- OUTREG(reg, val);
+ OUTREG(igt_global_mmio, reg, val);
}
static void disable_dip(Transcoder transcoder)
{
Register reg = get_dip_ctl_reg(transcoder);
- uint32_t val = INREG(reg);
+ uint32_t val = INREG(igt_global_mmio, reg);
val &= ~DIP_CTL_ENABLE;
- OUTREG(reg, val);
+ OUTREG(igt_global_mmio, reg, val);
}
static void enable_dip(Transcoder transcoder)
{
Register reg = get_dip_ctl_reg(transcoder);
- uint32_t val = INREG(reg);
+ uint32_t val = INREG(igt_global_mmio, reg);
val |= DIP_CTL_ENABLE;
- OUTREG(reg, val);
+ OUTREG(igt_global_mmio, reg, val);
}
static void disable_hdmi_port(Register reg)
{
- uint32_t val = INREG(reg);
+ uint32_t val = INREG(igt_global_mmio, reg);
val &= ~HDMI_PORT_ENABLE;
- OUTREG(reg, val);
+ OUTREG(igt_global_mmio, reg, val);
}
static void enable_hdmi_port(Register reg)
{
- uint32_t val = INREG(reg);
+ uint32_t val = INREG(igt_global_mmio, reg);
val |= HDMI_PORT_ENABLE;
- OUTREG(reg, val);
+ OUTREG(igt_global_mmio, reg, val);
}
static void print_usage(void)
diff --git a/tools/intel_l3_parity.c b/tools/intel_l3_parity.c
index d8c997af..014ac9f1 100644
--- a/tools/intel_l3_parity.c
+++ b/tools/intel_l3_parity.c
@@ -211,7 +211,7 @@ int main(int argc, char *argv[])
* now. Just be aware of this if for some reason a hang is reported
* when using this tool.
*/
- dft = intel_register_read(0xb038);
+ dft = intel_register_read(igt_global_mmio, 0xb038);
while (1) {
int c, option_index = 0;
@@ -357,10 +357,12 @@ int main(int argc, char *argv[])
assert(i < 2);
dft |= i << 1; /* slice */
dft |= 1 << 0; /* enable */
- intel_register_write(0xb038, dft);
+ intel_register_write(igt_global_mmio, 0xb038,
+ dft);
break;
case 'u':
- intel_register_write(0xb038, dft & ~(1<<0));
+ intel_register_write(igt_global_mmio, 0xb038,
+ dft & ~(1 << 0));
break;
case 'L':
break;
diff --git a/tools/intel_lid.c b/tools/intel_lid.c
index f45756e2..a4132d56 100644
--- a/tools/intel_lid.c
+++ b/tools/intel_lid.c
@@ -122,7 +122,7 @@ int main(int argc, char **argv)
intel_mmio_use_pci_bar(intel_get_pci_device(), -1);
while (1) {
- swf14 = INREG(SWF14);
+ swf14 = INREG(igt_global_mmio, SWF14);
printf("Intel LVDS Lid status:\n");
printf("\tSWF14(0x%x) : %s\n", swf14,
diff --git a/tools/intel_panel_fitter.c b/tools/intel_panel_fitter.c
index 137ef61a..26843d7c 100644
--- a/tools/intel_panel_fitter.c
+++ b/tools/intel_panel_fitter.c
@@ -84,12 +84,12 @@ static void read_pipe_info(int intel_pipe, struct pipe_info *info)
{
uint32_t conf, vtotal, htotal, src, ctrl1, win_sz;
- conf = INREG(PIPECONF[intel_pipe]);
- htotal = INREG(HTOTAL[intel_pipe]);
- vtotal = INREG(VTOTAL[intel_pipe]);
- src = INREG(PIPESRC[intel_pipe]);
- ctrl1 = INREG(PF_CTRL1[intel_pipe]);
- win_sz = INREG(PF_WIN_SZ[intel_pipe]);
+ conf = INREG(igt_global_mmio, PIPECONF[intel_pipe]);
+ htotal = INREG(igt_global_mmio, HTOTAL[intel_pipe]);
+ vtotal = INREG(igt_global_mmio, VTOTAL[intel_pipe]);
+ src = INREG(igt_global_mmio, PIPESRC[intel_pipe]);
+ ctrl1 = INREG(igt_global_mmio, PF_CTRL1[intel_pipe]);
+ win_sz = INREG(igt_global_mmio, PF_WIN_SZ[intel_pipe]);
info->enabled = (conf & PIPECONF_ENABLE) ? true : false;
info->tot_width = (htotal & HTOTAL_ACTIVE_MASK) + 1;
@@ -232,24 +232,24 @@ static int change_screen_size(int intel_pipe, int x, int y)
assert(0);
}
}
- OUTREG(PF_CTRL1[intel_pipe], ctrl1_val);
+ OUTREG(igt_global_mmio, PF_CTRL1[intel_pipe], ctrl1_val);
win_pos_val = pos_x << 16;
win_pos_val |= pos_y;
- OUTREG(PF_WIN_POS[intel_pipe], win_pos_val);
+ OUTREG(igt_global_mmio, PF_WIN_POS[intel_pipe], win_pos_val);
win_sz_val = dst_width << 16;
win_sz_val |= dst_height;
- OUTREG(PF_WIN_SZ[intel_pipe], win_sz_val);
+ OUTREG(igt_global_mmio, PF_WIN_SZ[intel_pipe], win_sz_val);
return 0;
}
static int disable_panel_fitter(int intel_pipe)
{
- OUTREG(PF_CTRL1[intel_pipe], 0);
- OUTREG(PF_WIN_POS[intel_pipe], 0);
- OUTREG(PF_WIN_SZ[intel_pipe], 0);
+ OUTREG(igt_global_mmio, PF_CTRL1[intel_pipe], 0);
+ OUTREG(igt_global_mmio, PF_WIN_POS[intel_pipe], 0);
+ OUTREG(igt_global_mmio, PF_WIN_SZ[intel_pipe], 0);
return 0;
}
diff --git a/tools/intel_perf_counters.c b/tools/intel_perf_counters.c
index 50c4bce6..be573b55 100644
--- a/tools/intel_perf_counters.c
+++ b/tools/intel_perf_counters.c
@@ -486,9 +486,10 @@ main(int argc, char **argv)
intel_register_access_init(intel_get_pci_device(), 0, fd);
/* Enable performance counters */
- intel_register_write(OACONTROL,
- counter_format << OACONTROL_COUNTER_SELECT_SHIFT |
- PERFORMANCE_COUNTER_ENABLE);
+ intel_register_write(igt_global_mmio, OACONTROL,
+ counter_format <<
+ OACONTROL_COUNTER_SELECT_SHIFT |
+ PERFORMANCE_COUNTER_ENABLE);
}
totals = calloc(counter_count, sizeof(uint32_t));
@@ -520,7 +521,7 @@ main(int argc, char **argv)
if (oacontrol) {
/* Disable performance counters */
- intel_register_write(OACONTROL, 0);
+ intel_register_write(igt_global_mmio, OACONTROL, 0);
/* Forcewake */
intel_register_access_fini();
diff --git a/tools/intel_reg.c b/tools/intel_reg.c
index 947ec378..debd8c9a 100644
--- a/tools/intel_reg.c
+++ b/tools/intel_reg.c
@@ -364,7 +364,8 @@ static int read_register(struct config *config, struct reg *reg, uint32_t *valp)
if (reg->engine)
val = register_srm(config, reg, NULL);
else
- val = INREG(reg->mmio_offset + reg->addr);
+ val = INREG(igt_global_mmio,
+ reg->mmio_offset + reg->addr);
break;
case PORT_PORTIO_VGA:
iopl(3);
@@ -372,7 +373,7 @@ static int read_register(struct config *config, struct reg *reg, uint32_t *valp)
iopl(0);
break;
case PORT_MMIO_VGA:
- val = INREG8(reg->addr);
+ val = INREG8(igt_global_mmio, reg->addr);
break;
case PORT_BUNIT:
case PORT_PUNIT:
@@ -389,7 +390,8 @@ static int read_register(struct config *config, struct reg *reg, uint32_t *valp)
reg->port_desc.name);
return -1;
}
- val = intel_iosf_sb_read(reg->port_desc.port, reg->addr);
+ val = intel_iosf_sb_read(igt_global_mmio, reg->port_desc.port,
+ reg->addr);
break;
default:
fprintf(stderr, "port %d not supported\n", reg->port_desc.port);
@@ -424,7 +426,8 @@ static int write_register(struct config *config, struct reg *reg, uint32_t val)
if (reg->engine) {
register_srm(config, reg, &val);
} else {
- OUTREG(reg->mmio_offset + reg->addr, val);
+ OUTREG(igt_global_mmio,
+ reg->mmio_offset + reg->addr, val);
}
break;
case PORT_PORTIO_VGA:
@@ -443,7 +446,7 @@ static int write_register(struct config *config, struct reg *reg, uint32_t val)
val, reg->port_desc.name);
return -1;
}
- OUTREG8(reg->addr, val);
+ OUTREG8(igt_global_mmio, reg->addr, val);
break;
case PORT_BUNIT:
case PORT_PUNIT:
@@ -460,7 +463,8 @@ static int write_register(struct config *config, struct reg *reg, uint32_t val)
reg->port_desc.name);
return -1;
}
- intel_iosf_sb_write(reg->port_desc.port, reg->addr, val);
+ intel_iosf_sb_write(igt_global_mmio, reg->port_desc.port,
+ reg->addr, val);
break;
default:
fprintf(stderr, "port %d not supported\n", reg->port_desc.port);
diff --git a/tools/intel_reg_checker.c b/tools/intel_reg_checker.c
index 92a89ae0..1d40cd82 100644
--- a/tools/intel_reg_checker.c
+++ b/tools/intel_reg_checker.c
@@ -35,7 +35,7 @@ static int gen;
static uint32_t
read_and_print_reg(const char *name, uint32_t reg)
{
- uint32_t val = INREG(reg);
+ uint32_t val = INREG(igt_global_mmio, reg);
printf("%s (0x%x): 0x%08x\n", name, reg, val);
diff --git a/tools/intel_watermark.c b/tools/intel_watermark.c
index e71c3d9c..372947de 100644
--- a/tools/intel_watermark.c
+++ b/tools/intel_watermark.c
@@ -38,7 +38,7 @@ static uint32_t devid;
static uint32_t read_reg(uint32_t addr)
{
- return INREG(display_base + addr);
+ return INREG(igt_global_mmio, display_base + addr);
}
struct gmch_wm {
@@ -650,8 +650,8 @@ static void vlv_wm_dump(void)
ddl3 = read_reg(0x70058);
- intel_punit_read(0x36, &dsp_ss_pm);
- intel_punit_read(0x139, &ddr_setup2);
+ intel_punit_read(igt_global_mmio, 0x36, &dsp_ss_pm);
+ intel_punit_read(igt_global_mmio, 0x139, &ddr_setup2);
} else {
fw7 = read_reg(0x7007c);
}
--
2.20.1
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [igt-dev] [PATCH i-g-t v3 5/5] lib/intel_mmio: remove igt_global_mmio and move pointer to mmio_data structure
2019-04-15 8:59 [igt-dev] [PATCH i-g-t v3 0/5] Remove global igt_global_mmio Daniel Mrzyglod
` (3 preceding siblings ...)
2019-04-15 8:59 ` [igt-dev] [PATCH i-g-t v3 4/5] lib/intel_mmio: extend read write registers functions by a pointer for mmaped area Daniel Mrzyglod
@ 2019-04-15 8:59 ` Daniel Mrzyglod
2019-04-17 10:55 ` Katarzyna Dec
2019-04-15 10:34 ` [igt-dev] ✓ Fi.CI.BAT: success for Remove global igt_global_mmio (rev3) Patchwork
2019-04-15 11:33 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
6 siblings, 1 reply; 14+ messages in thread
From: Daniel Mrzyglod @ 2019-04-15 8:59 UTC (permalink / raw)
To: igt-dev
this patch remove need for igt_global_mmio from library space.
The reason that it was moved is the idea to support multiple device at once.
Signed-off-by: Daniel Mrzyglod <daniel.t.mrzyglod@intel.com>
---
benchmarks/gem_latency.c | 5 +-
benchmarks/gem_wsim.c | 6 +-
lib/intel_io.h | 79 +++++++++++++--------
lib/intel_iosf.c | 69 +++++++++---------
lib/intel_mmio.c | 127 ++++++++++++++++------------------
tests/i915/gem_exec_latency.c | 7 +-
tests/i915/gem_exec_parse.c | 14 ++--
tests/i915/i915_pm_lpsp.c | 7 +-
tools/intel_audio_dump.c | 7 +-
tools/intel_backlight.c | 5 +-
tools/intel_display_poller.c | 7 +-
tools/intel_forcewaked.c | 14 ++--
tools/intel_gpu_time.c | 5 +-
tools/intel_infoframes.c | 7 +-
tools/intel_l3_parity.c | 16 +++--
tools/intel_lid.c | 6 +-
tools/intel_panel_fitter.c | 7 +-
tools/intel_perf_counters.c | 12 ++--
tools/intel_reg.c | 27 +++++---
tools/intel_reg_checker.c | 6 +-
tools/intel_watermark.c | 44 +++++++-----
21 files changed, 281 insertions(+), 196 deletions(-)
diff --git a/benchmarks/gem_latency.c b/benchmarks/gem_latency.c
index c3fc4bf0..bcaaecef 100644
--- a/benchmarks/gem_latency.c
+++ b/benchmarks/gem_latency.c
@@ -55,6 +55,8 @@
static int done;
static int fd;
static volatile uint32_t *timestamp_reg;
+void *igt_global_mmio;
+static struct _mmio_data mmio_data;
#define REG(x) (volatile uint32_t *)((volatile char *)igt_global_mmio + x)
#define REG_OFFSET(x) ((volatile char *)(x) - (volatile char *)igt_global_mmio)
@@ -456,7 +458,8 @@ static int run(int seconds,
if (gen < 6)
return IGT_EXIT_SKIP; /* Needs BCS timestamp */
- intel_register_access_init(intel_get_pci_device(), false, fd);
+ intel_register_access_init(&mmio_data, intel_get_pci_device(), false, fd);
+ igt_global_mmio = mmio_data.igt_mmio;
if (gen == 6)
timestamp_reg = REG(RCS_TIMESTAMP);
diff --git a/benchmarks/gem_wsim.c b/benchmarks/gem_wsim.c
index afb9644d..86af58cb 100644
--- a/benchmarks/gem_wsim.c
+++ b/benchmarks/gem_wsim.c
@@ -206,6 +206,9 @@ struct workload
} busy_balancer;
};
+void *igt_global_mmio;
+static struct _mmio_data mmio_data;
+
static const unsigned int nop_calibration_us = 1000;
static unsigned long nop_calibration;
@@ -2223,7 +2226,8 @@ static void init_clocks(void)
uint32_t rcs_start, rcs_end;
double overhead, t;
- intel_register_access_init(intel_get_pci_device(), false, fd);
+ intel_register_access_init(&mmio_data, intel_get_pci_device(), false, fd);
+ igt_global_mmio = mmio_data.igt_mmio;
if (verbose <= 1)
return;
diff --git a/lib/intel_io.h b/lib/intel_io.h
index fd99bbb7..d98397af 100644
--- a/lib/intel_io.h
+++ b/lib/intel_io.h
@@ -30,17 +30,41 @@
#include <stdint.h>
#include <pciaccess.h>
+#include <stdbool.h>
/* register access helpers from intel_mmio.c */
-extern void *igt_global_mmio;
-void intel_mmio_use_pci_bar(struct pci_device *pci_dev, int fd);
-void intel_mmio_use_dump_file(char *file);
+struct intel_register_range {
+ uint32_t base;
+ uint32_t size;
+ uint32_t flags;
+};
+
+struct intel_register_map {
+ struct intel_register_range *map;
+ uint32_t top;
+ uint32_t alignment_mask;
+};
+
+struct _mmio_data {
+ int inited;
+ bool safe;
+ uint32_t i915_devid;
+ struct intel_register_map map;
+ int key;
+ void *igt_mmio;
+};
+
+void intel_mmio_use_pci_bar(struct _mmio_data *mmio_data,
+ struct pci_device *pci_dev, int fd);
+void intel_mmio_use_dump_file(struct _mmio_data *mmio_data, char *file);
-int intel_register_access_init(struct pci_device *pci_dev, int safe, int fd);
-void intel_register_access_fini(void);
-uint32_t intel_register_read(void *igt_mmio, uint32_t reg);
-void intel_register_write(void *igt_mmio, uint32_t reg, uint32_t val);
-int intel_register_access_needs_fakewake(void);
+int intel_register_access_init(struct _mmio_data *mmio_data,
+ struct pci_device *pci_dev, int safe, int fd);
+void intel_register_access_fini(struct _mmio_data *mmio_data);
+uint32_t intel_register_read(struct _mmio_data *mmio_data, uint32_t reg);
+void intel_register_write(struct _mmio_data *mmio_data, uint32_t reg,
+ uint32_t val);
+int intel_register_access_needs_fakewake(struct _mmio_data *mmio_data);
uint32_t INREG(void *igt_mmio, uint32_t reg);
uint16_t INREG16(void *igt_mmio, uint32_t reg);
@@ -50,18 +74,24 @@ void OUTREG16(void *igt_mmio, uint32_t reg, uint16_t val);
void OUTREG8(void *igt_mmio, uint32_t reg, uint8_t val);
/* sideband access functions from intel_iosf.c */
-uint32_t intel_dpio_reg_read(void *igt_mmio, uint32_t reg, int phy);
-void intel_dpio_reg_write(void *igt_mmio, uint32_t reg, uint32_t val, int phy);
-uint32_t intel_flisdsi_reg_read(void *igt_mmio, uint32_t reg);
-void intel_flisdsi_reg_write(void *igt_mmio, uint32_t reg, uint32_t val);
-uint32_t intel_iosf_sb_read(void *igt_mmio, uint32_t port, uint32_t reg);
-void intel_iosf_sb_write(void *igt_mmio, uint32_t port, uint32_t reg,
- uint32_t val);
+uint32_t intel_dpio_reg_read(struct _mmio_data *mmio_data, uint32_t reg,
+ int phy);
+void intel_dpio_reg_write(struct _mmio_data *mmio_data, uint32_t reg,
+ uint32_t val, int phy);
+uint32_t intel_flisdsi_reg_read(struct _mmio_data *mmio_data, uint32_t reg);
+void intel_flisdsi_reg_write(struct _mmio_data *mmio_data, uint32_t reg,
+ uint32_t val);
+uint32_t intel_iosf_sb_read(struct _mmio_data *mmio_data, uint32_t port,
+ uint32_t reg);
+void intel_iosf_sb_write(struct _mmio_data *mmio_data, uint32_t port,
+ uint32_t reg, uint32_t val);
-int intel_punit_read(void *igt_mmio, uint32_t addr, uint32_t *val);
-int intel_punit_write(void *igt_mmio, uint32_t addr, uint32_t val);
-int intel_nc_read(void *igt_mmio, uint32_t addr, uint32_t *val);
-int intel_nc_write(void *igt_mmio, uint32_t addr, uint32_t val);
+int intel_punit_read(struct _mmio_data *mmio_data, uint32_t addr,
+ uint32_t *val);
+int intel_punit_write(struct _mmio_data *mmio_data, uint32_t addr,
+ uint32_t val);
+int intel_nc_read(struct _mmio_data *mmio_data, uint32_t addr, uint32_t *val);
+int intel_nc_write(struct _mmio_data *mmio_data, uint32_t addr, uint32_t val);
/* register maps from intel_reg_map.c */
#ifndef __GTK_DOC_IGNORE__
@@ -72,17 +102,8 @@ int intel_nc_write(void *igt_mmio, uint32_t addr, uint32_t val);
#define INTEL_RANGE_RW (INTEL_RANGE_READ | INTEL_RANGE_WRITE)
#define INTEL_RANGE_END (1<<31)
-struct intel_register_range {
- uint32_t base;
- uint32_t size;
- uint32_t flags;
-};
-struct intel_register_map {
- struct intel_register_range *map;
- uint32_t top;
- uint32_t alignment_mask;
-};
+//static struct _mmio_data mmio_data;
struct intel_register_map intel_get_register_map(uint32_t devid);
struct intel_register_range *intel_get_register_range(struct intel_register_map map, uint32_t offset, uint32_t mode);
#endif /* __GTK_DOC_IGNORE__ */
diff --git a/lib/intel_iosf.c b/lib/intel_iosf.c
index b4a483f2..d541c7dc 100644
--- a/lib/intel_iosf.c
+++ b/lib/intel_iosf.c
@@ -19,8 +19,8 @@
/* Private register write, double-word addressing, non-posted */
#define SB_CRWRDA_NP 0x07
-static int vlv_sideband_rw(void *igt_mmio, uint32_t port, uint8_t opcode,
- uint32_t addr, uint32_t *val)
+static int vlv_sideband_rw(struct _mmio_data *mmio_data, uint32_t port,
+ uint8_t opcode, uint32_t addr, uint32_t *val)
{
int timeout = 0;
uint32_t cmd, devfn, be, bar;
@@ -34,23 +34,24 @@ static int vlv_sideband_rw(void *igt_mmio, uint32_t port, uint8_t opcode,
(port << IOSF_PORT_SHIFT) | (be << IOSF_BYTE_ENABLES_SHIFT) |
(bar << IOSF_BAR_SHIFT);
- if (intel_register_read(igt_mmio, VLV_IOSF_DOORBELL_REQ) &
+ if (intel_register_read(mmio_data, VLV_IOSF_DOORBELL_REQ) &
IOSF_SB_BUSY) {
igt_warn("warning: pcode (%s) mailbox access failed\n", is_read ? "read" : "write");
return -EAGAIN;
}
- intel_register_write(igt_mmio, VLV_IOSF_ADDR, addr);
+ intel_register_write(mmio_data, VLV_IOSF_ADDR, addr);
if (!is_read)
- intel_register_write(igt_mmio, VLV_IOSF_DATA, *val);
+ intel_register_write(mmio_data, VLV_IOSF_DATA, *val);
- intel_register_write(igt_mmio, VLV_IOSF_DOORBELL_REQ, cmd);
+ intel_register_write(mmio_data, VLV_IOSF_DOORBELL_REQ, cmd);
do {
usleep(1);
timeout++;
- } while (intel_register_read(igt_mmio, VLV_IOSF_DOORBELL_REQ) &
- IOSF_SB_BUSY && timeout < TIMEOUT_US);
+ } while (intel_register_read(mmio_data->igt_mmio,
+ VLV_IOSF_DOORBELL_REQ) &
+ IOSF_SB_BUSY && timeout < TIMEOUT_US);
if (timeout >= TIMEOUT_US) {
igt_warn("timeout waiting for pcode %s (%d) to finish\n", is_read ? "read" : "write", addr);
@@ -58,8 +59,8 @@ static int vlv_sideband_rw(void *igt_mmio, uint32_t port, uint8_t opcode,
}
if (is_read)
- *val = intel_register_read(igt_mmio, VLV_IOSF_DATA);
- intel_register_write(igt_mmio, VLV_IOSF_DATA, 0);
+ *val = intel_register_read(mmio_data->igt_mmio, VLV_IOSF_DATA);
+ intel_register_write(mmio_data->igt_mmio, VLV_IOSF_DATA, 0);
return 0;
}
@@ -75,9 +76,9 @@ static int vlv_sideband_rw(void *igt_mmio, uint32_t port, uint8_t opcode,
* Returns:
* 0 when the register access succeeded, negative errno code on failure.
*/
-int intel_punit_read(void *igt_mmio, uint32_t addr, uint32_t *val)
+int intel_punit_read(struct _mmio_data *mmio_data, uint32_t addr, uint32_t *val)
{
- return vlv_sideband_rw(igt_mmio, IOSF_PORT_PUNIT, SB_CRRDDA_NP, addr,
+ return vlv_sideband_rw(mmio_data, IOSF_PORT_PUNIT, SB_CRRDDA_NP, addr,
val);
}
@@ -92,9 +93,9 @@ int intel_punit_read(void *igt_mmio, uint32_t addr, uint32_t *val)
* Returns:
* 0 when the register access succeeded, negative errno code on failure.
*/
-int intel_punit_write(void *igt_mmio, uint32_t addr, uint32_t val)
+int intel_punit_write(struct _mmio_data *mmio_data, uint32_t addr, uint32_t val)
{
- return vlv_sideband_rw(igt_mmio, IOSF_PORT_PUNIT, SB_CRWRDA_NP, addr,
+ return vlv_sideband_rw(mmio_data, IOSF_PORT_PUNIT, SB_CRWRDA_NP, addr,
&val);
}
@@ -109,9 +110,10 @@ int intel_punit_write(void *igt_mmio, uint32_t addr, uint32_t val)
* Returns:
* 0 when the register access succeeded, negative errno code on failure.
*/
-int intel_nc_read(void *igt_mmio, uint32_t addr, uint32_t *val)
+int intel_nc_read(struct _mmio_data *mmio_data, uint32_t addr, uint32_t *val)
{
- return vlv_sideband_rw(igt_mmio, IOSF_PORT_NC, SB_CRRDDA_NP, addr, val);
+ return vlv_sideband_rw(mmio_data, IOSF_PORT_NC, SB_CRRDDA_NP, addr,
+ val);
}
/**
@@ -125,9 +127,9 @@ int intel_nc_read(void *igt_mmio, uint32_t addr, uint32_t *val)
* Returns:
* 0 when the register access succeeded, negative errno code on failure.
*/
-int intel_nc_write(void *igt_mmio, uint32_t addr, uint32_t val)
+int intel_nc_write(struct _mmio_data *mmio_data, uint32_t addr, uint32_t val)
{
- return vlv_sideband_rw(igt_mmio, IOSF_PORT_NC, SB_CRWRDA_NP, addr,
+ return vlv_sideband_rw(mmio_data, IOSF_PORT_NC, SB_CRWRDA_NP, addr,
&val);
}
@@ -142,14 +144,15 @@ int intel_nc_write(void *igt_mmio, uint32_t addr, uint32_t val)
* Returns:
* The value read from the register.
*/
-uint32_t intel_dpio_reg_read(void *igt_mmio, uint32_t reg, int phy)
+uint32_t intel_dpio_reg_read(struct _mmio_data *mmio_data, uint32_t reg, int phy)
{
uint32_t val;
if (phy == 0)
- vlv_sideband_rw(igt_mmio, IOSF_PORT_DPIO, SB_MRD_NP, reg, &val);
+ vlv_sideband_rw(mmio_data, IOSF_PORT_DPIO, SB_MRD_NP, reg,
+ &val);
else
- vlv_sideband_rw(igt_mmio, IOSF_PORT_DPIO_2, SB_MRD_NP, reg,
+ vlv_sideband_rw(mmio_data, IOSF_PORT_DPIO_2, SB_MRD_NP, reg,
&val);
return val;
}
@@ -163,40 +166,40 @@ uint32_t intel_dpio_reg_read(void *igt_mmio, uint32_t reg, int phy)
*
* 32-bit write of the register at @offset through the DPIO sideband port.
*/
-void intel_dpio_reg_write(void *igt_mmio, uint32_t reg, uint32_t val, int phy)
+void intel_dpio_reg_write(struct _mmio_data *mmio_data, uint32_t reg, uint32_t val, int phy)
{
if (phy == 0)
- vlv_sideband_rw(igt_mmio, IOSF_PORT_DPIO, SB_MWR_NP, reg, &val);
+ vlv_sideband_rw(mmio_data, IOSF_PORT_DPIO, SB_MWR_NP, reg, &val);
else
- vlv_sideband_rw(igt_mmio, IOSF_PORT_DPIO_2, SB_MWR_NP, reg,
+ vlv_sideband_rw(mmio_data, IOSF_PORT_DPIO_2, SB_MWR_NP, reg,
&val);
}
-uint32_t intel_flisdsi_reg_read(void *igt_mmio, uint32_t reg)
+uint32_t intel_flisdsi_reg_read(struct _mmio_data *mmio_data, uint32_t reg)
{
uint32_t val = 0;
- vlv_sideband_rw(igt_mmio, IOSF_PORT_FLISDSI, SB_CRRDDA_NP, reg, &val);
+ vlv_sideband_rw(mmio_data, IOSF_PORT_FLISDSI, SB_CRRDDA_NP, reg, &val);
return val;
}
-void intel_flisdsi_reg_write(void *igt_mmio, uint32_t reg, uint32_t val)
+void intel_flisdsi_reg_write(struct _mmio_data *mmio_data, uint32_t reg, uint32_t val)
{
- vlv_sideband_rw(igt_mmio, IOSF_PORT_FLISDSI, SB_CRWRDA_NP, reg, &val);
+ vlv_sideband_rw(mmio_data, IOSF_PORT_FLISDSI, SB_CRWRDA_NP, reg, &val);
}
-uint32_t intel_iosf_sb_read(void *igt_mmio, uint32_t port, uint32_t reg)
+uint32_t intel_iosf_sb_read(struct _mmio_data *mmio_data, uint32_t port, uint32_t reg)
{
uint32_t val;
- vlv_sideband_rw(igt_mmio, port, SB_CRRDDA_NP, reg, &val);
+ vlv_sideband_rw(mmio_data, port, SB_CRRDDA_NP, reg, &val);
return val;
}
-void intel_iosf_sb_write(void *igt_mmio, uint32_t port, uint32_t reg,
- uint32_t val)
+void intel_iosf_sb_write(struct _mmio_data *mmio_data, uint32_t port,
+ uint32_t reg, uint32_t val)
{
- vlv_sideband_rw(igt_mmio, port, SB_CRWRDA_NP, reg, &val);
+ vlv_sideband_rw(mmio_data, port, SB_CRWRDA_NP, reg, &val);
}
diff --git a/lib/intel_mmio.c b/lib/intel_mmio.c
index 24623fc6..dd1566c0 100644
--- a/lib/intel_mmio.c
+++ b/lib/intel_mmio.c
@@ -66,32 +66,17 @@
#define FAKEKEY 0x2468ace0
-/**
- * igt_global_mmio:
- *
- * Pointer to the register range, initialized using intel_register_access_init()
- * or intel_mmio_use_dump_file(). It is not recommended to use this directly.
- */
-void *igt_global_mmio;
-
-static struct _mmio_data {
- int inited;
- bool safe;
- uint32_t i915_devid;
- struct intel_register_map map;
- int key;
-} mmio_data;
-
/**
* intel_mmio_use_dump_file:
+ * @mmio_data: mmio structure for IO operations
* @file: name of the register dump file to open
*
- * Sets up #igt_global_mmio to point at the data contained in @file. This allows
- * the same code to get reused for dumping and decoding from running hardware as
- * from register dumps.
+ * Sets also up mmio_data->igt_mmio to point at the data contained
+ * in @file. This allows the same code to get reused for dumping and decoding
+ * from running hardware as from register dumps.
*/
void
-intel_mmio_use_dump_file(char *file)
+intel_mmio_use_dump_file(struct _mmio_data *mmio_data, char *file)
{
int fd;
struct stat st;
@@ -101,22 +86,23 @@ intel_mmio_use_dump_file(char *file)
"Couldn't open %s\n", file);
fstat(fd, &st);
- igt_global_mmio = mmap(NULL, st.st_size, PROT_READ|PROT_WRITE, MAP_PRIVATE, fd, 0);
- igt_fail_on_f(igt_global_mmio == MAP_FAILED,
+ mmio_data->igt_mmio = mmap(NULL, st.st_size, PROT_READ|PROT_WRITE, MAP_PRIVATE, fd, 0);
+ igt_fail_on_f(mmio_data->igt_mmio == MAP_FAILED,
"Couldn't mmap %s\n", file);
close(fd);
}
/**
* intel_mmio_use_pci_bar:
+ * @mmio_data: mmio structure for IO operations
* @pci_dev: intel gracphis pci device
*
- * Sets up #igt_global_mmio to point at the mmio bar.
+ * Fill a mmio_data stucture with igt_mmio to point at the mmio bar.
*
* @pci_dev can be obtained from intel_get_pci_device().
*/
void
-intel_mmio_use_pci_bar(struct pci_device *pci_dev, int fd)
+intel_mmio_use_pci_bar(struct _mmio_data *mmio_data ,struct pci_device *pci_dev, int fd)
{
uint32_t devid, gen;
int mmio_bar, mmio_size;
@@ -145,14 +131,14 @@ intel_mmio_use_pci_bar(struct pci_device *pci_dev, int fd)
pci_dev->regions[mmio_bar].base_addr,
mmio_size,
PCI_DEV_MAP_FLAG_WRITABLE,
- &igt_global_mmio);
+ &mmio_data->igt_mmio);
igt_fail_on_f(error != 0, "Couldn't map MMIO region\n");
} else {
/* This method is much more convenient when we have many
* concurrent PCI devices
*/
- igt_global_mmio = igt_device_map_pci_bar_region(fd, mmio_bar,
+ mmio_data->igt_mmio = igt_device_map_pci_bar_region(fd, mmio_bar,
mmio_size);
}
@@ -167,6 +153,7 @@ release_forcewake_lock(int fd)
/**
* intel_register_access_init:
+ * @mmio_data: mmio structure for IO operations
* @pci_dev: intel graphics pci device
* @safe: use safe register access tables
*
@@ -174,77 +161,79 @@ release_forcewake_lock(int fd)
* handling and also allows register access to be checked with an explicit
* whitelist.
*
- * It also initializes #igt_global_mmio like intel_mmio_use_pci_bar().
+ * It also initializes mmio_data->igt_mmio like intel_mmio_use_pci_bar().
*
* @pci_dev can be obtained from intel_get_pci_device().
*/
int
-intel_register_access_init(struct pci_device *pci_dev, int safe, int fd)
+intel_register_access_init(struct _mmio_data *mmio_data, struct pci_device *pci_dev, int safe, int fd)
{
int ret;
/* after old API is deprecated, remove this */
- if (igt_global_mmio == NULL)
- intel_mmio_use_pci_bar(pci_dev, fd);
+ if (mmio_data->igt_mmio == NULL)
+ intel_mmio_use_pci_bar(mmio_data, pci_dev, fd);
- igt_assert(igt_global_mmio != NULL);
+ igt_assert(mmio_data->igt_mmio != NULL);
- if (mmio_data.inited)
+ if (mmio_data->inited)
return -1;
- mmio_data.safe = (safe != 0 &&
+ mmio_data->safe = (safe != 0 &&
intel_gen(pci_dev->device_id) >= 4) ? true : false;
- mmio_data.i915_devid = pci_dev->device_id;
- if (mmio_data.safe)
- mmio_data.map = intel_get_register_map(mmio_data.i915_devid);
+ mmio_data->i915_devid = pci_dev->device_id;
+ if (mmio_data->safe)
+ mmio_data->map = intel_get_register_map(mmio_data->i915_devid);
/* Find where the forcewake lock is. Forcewake doesn't exist
* gen < 6, but the debugfs should do the right things for us.
*/
ret = igt_open_forcewake_handle(fd);
if (ret == -1)
- mmio_data.key = FAKEKEY;
+ mmio_data->key = FAKEKEY;
else
- mmio_data.key = ret;
+ mmio_data->key = ret;
- mmio_data.inited++;
+ mmio_data->inited++;
return 0;
}
static int
-intel_register_access_needs_wake(void)
+intel_register_access_needs_wake(struct _mmio_data *mmio_data)
{
- return mmio_data.key != FAKEKEY;
+ return mmio_data->key != FAKEKEY;
}
/**
* intel_register_access_needs_fakewake:
+ * @mmio_data: mmio structure for IO operations
*
* Returns:
* Non-zero when forcewake initialization failed.
*/
-int intel_register_access_needs_fakewake(void)
+int intel_register_access_needs_fakewake(struct _mmio_data *mmio_data)
{
- return mmio_data.key == FAKEKEY;
+ return mmio_data->key == FAKEKEY;
}
/**
* intel_register_access_fini:
+ * @mmio_data: mmio structure for IO operations
*
* Clean up the register access helper initialized with
* intel_register_access_init().
*/
void
-intel_register_access_fini(void)
+intel_register_access_fini(struct _mmio_data *mmio_data)
{
- if (mmio_data.key && intel_register_access_needs_wake())
- release_forcewake_lock(mmio_data.key);
- mmio_data.inited--;
+ if (mmio_data->key && intel_register_access_needs_wake(mmio_data))
+ release_forcewake_lock(mmio_data->key);
+ mmio_data->inited--;
}
/**
* intel_register_read:
- * @igt_mmio maped memory pointer
+ * @mmio_data: mmio structure for IO operations
* @reg: register offset
*
* 32-bit read of the register at @offset. This function only works when the new
@@ -257,20 +246,20 @@ intel_register_access_fini(void)
* The value read from the register.
*/
uint32_t
-intel_register_read(void *igt_mmio, uint32_t reg)
+intel_register_read(struct _mmio_data *mmio_data, uint32_t reg)
{
struct intel_register_range *range;
uint32_t ret;
- igt_assert(mmio_data.inited);
+ igt_assert(mmio_data->inited);
- if (intel_gen(mmio_data.i915_devid) >= 6)
- igt_assert(mmio_data.key != -1);
+ if (intel_gen(mmio_data->i915_devid) >= 6)
+ igt_assert(mmio_data->key != -1);
- if (!mmio_data.safe)
+ if (!mmio_data->safe)
goto read_out;
- range = intel_get_register_range(mmio_data.map,
+ range = intel_get_register_range(mmio_data->map,
reg,
INTEL_RANGE_READ);
@@ -281,14 +270,14 @@ intel_register_read(void *igt_mmio, uint32_t reg)
}
read_out:
- ret = *(volatile uint32_t *)((volatile char *)igt_mmio + reg);
+ ret = *(volatile uint32_t *)((volatile char *)mmio_data->igt_mmio + reg);
out:
return ret;
}
/**
* intel_register_write:
- * @igt_mmio maped memory pointer
+ * @mmio_data: mmio structure for IO operations
* @reg: register offset
* @val: value to write
*
@@ -299,19 +288,19 @@ out:
* white lists.
*/
void
-intel_register_write(void *igt_mmio, uint32_t reg, uint32_t val)
+intel_register_write(struct _mmio_data *mmio_data, uint32_t reg, uint32_t val)
{
struct intel_register_range *range;
- igt_assert(mmio_data.inited);
+ igt_assert(mmio_data->inited);
- if (intel_gen(mmio_data.i915_devid) >= 6)
- igt_assert(mmio_data.key != -1);
+ if (intel_gen(mmio_data->i915_devid) >= 6)
+ igt_assert(mmio_data->key != -1);
- if (!mmio_data.safe)
+ if (!mmio_data->safe)
goto write_out;
- range = intel_get_register_range(mmio_data.map,
+ range = intel_get_register_range(mmio_data->map,
reg,
INTEL_RANGE_WRITE);
@@ -319,7 +308,7 @@ intel_register_write(void *igt_mmio, uint32_t reg, uint32_t val)
"Register write blocked for safety ""(*0x%08x = 0x%x)\n", reg, val);
write_out:
- *(volatile uint32_t *)((volatile char *)igt_mmio + reg) = val;
+ *(volatile uint32_t *)((volatile char *)mmio_data->igt_mmio + reg) = val;
}
@@ -331,7 +320,7 @@ write_out:
* 32-bit read of the register at offset @reg. This function only works when the
* new register access helper is initialized with intel_register_access_init().
*
- * This function directly accesses the #igt_global_mmio without safety checks.
+ * This function directly accesses the igt_mmio without safety checks.
*
* Returns:
* The value read from the register.
@@ -349,7 +338,7 @@ uint32_t INREG(void *igt_mmio, uint32_t reg)
* 16-bit read of the register at offset @reg. This function only works when the
* new register access helper is initialized with intel_register_access_init().
*
- * This function directly accesses the #igt_global_mmio without safety checks.
+ * This function directly accesses the igt_mmio without safety checks.
*
* Returns:
* The value read from the register.
@@ -367,7 +356,7 @@ uint16_t INREG16(void *igt_mmio, uint32_t reg)
* 8-bit read of the register at offset @reg. This function only works when the
* new register access helper is initialized with intel_register_access_init().
*
- * This function directly accesses the #igt_global_mmio without safety checks.
+ * This function directly accesses the igt_mmio without safety checks.
*
* Returns:
* The value read from the register.
@@ -387,7 +376,7 @@ uint8_t INREG8(void *igt_mmio, uint32_t reg)
* when the new register access helper is initialized with
* intel_register_access_init().
*
- * This function directly accesses the #igt_global_mmio without safety checks.
+ * This function directly accesses the igt_mmio without safety checks.
*/
void OUTREG(void *igt_mmio, uint32_t reg, uint32_t val)
{
@@ -403,7 +392,7 @@ void OUTREG(void *igt_mmio, uint32_t reg, uint32_t val)
* when the new register access helper is initialized with
* intel_register_access_init().
*
- * This function directly accesses the #igt_global_mmio without safety checks.
+ * This function directly accesses the igt_mmio without safety checks.
*/
void OUTREG16(void *igt_mmio, uint32_t reg, uint16_t val)
{
@@ -420,7 +409,7 @@ void OUTREG16(void *igt_mmio, uint32_t reg, uint16_t val)
* when the new register access helper is initialized with
* intel_register_access_init().
*
- * This function directly accesses the #igt_global_mmio without safety checks.
+ * This function directly accesses the igt_mmio without safety checks.
*/
void OUTREG8(void *igt_mmio, uint32_t reg, uint8_t val)
{
diff --git a/tests/i915/gem_exec_latency.c b/tests/i915/gem_exec_latency.c
index 39f441d2..e36361d8 100644
--- a/tests/i915/gem_exec_latency.c
+++ b/tests/i915/gem_exec_latency.c
@@ -62,6 +62,9 @@
static unsigned int ring_size;
static double rcs_clock;
+void *igt_global_mmio;
+static struct _mmio_data mmio_data;
+
static void
poll_ring(int fd, unsigned ring, const char *name)
{
@@ -680,7 +683,9 @@ igt_main
if (ring_size > 1024)
ring_size = 1024;
- intel_register_access_init(intel_get_pci_device(), false, device);
+ intel_register_access_init(&mmio_data, intel_get_pci_device(), false, device);
+ igt_global_mmio = mmio_data.igt_mmio;
+
rcs_clock = clockrate(device, RCS_TIMESTAMP);
igt_info("RCS timestamp clock: %.0fKHz, %.1fns\n",
rcs_clock / 1e3, 1e9 / rcs_clock);
diff --git a/tests/i915/gem_exec_parse.c b/tests/i915/gem_exec_parse.c
index 423d6ea6..98b05267 100644
--- a/tests/i915/gem_exec_parse.c
+++ b/tests/i915/gem_exec_parse.c
@@ -58,6 +58,9 @@
static int parser_version;
+void *igt_global_mmio;
+static struct _mmio_data mmio_data;
+
static int command_parser_version(int fd)
{
int version = -1;
@@ -284,9 +287,9 @@ test_lri(int fd, uint32_t handle, struct test_lri *test)
test->name, test->reg, test->test_val,
expected_errno, expect);
- intel_register_write(igt_global_mmio, test->reg, test->init_val);
+ intel_register_write(&mmio_data, test->reg, test->init_val);
- igt_assert_eq_u32((intel_register_read(igt_global_mmio, test->reg) &
+ igt_assert_eq_u32((intel_register_read(&mmio_data, test->reg) &
test->read_mask),
test->init_val);
@@ -296,7 +299,7 @@ test_lri(int fd, uint32_t handle, struct test_lri *test)
expected_errno);
gem_sync(fd, handle);
- igt_assert_eq_u32((intel_register_read(igt_global_mmio, test->reg) &
+ igt_assert_eq_u32((intel_register_read(&mmio_data, test->reg) &
test->read_mask),
expect);
}
@@ -530,7 +533,8 @@ igt_main
#undef REG
igt_fixture {
- intel_register_access_init(intel_get_pci_device(), 0, fd);
+ intel_register_access_init(&mmio_data, intel_get_pci_device(), 0, fd);
+ igt_global_mmio = mmio_data.igt_mmio;
}
for (int i = 0; i < ARRAY_SIZE(lris); i++) {
@@ -543,7 +547,7 @@ igt_main
}
igt_fixture {
- intel_register_access_fini();
+ intel_register_access_fini(&mmio_data);
}
}
diff --git a/tests/i915/i915_pm_lpsp.c b/tests/i915/i915_pm_lpsp.c
index f69c88f6..cbbe6a4b 100644
--- a/tests/i915/i915_pm_lpsp.c
+++ b/tests/i915/i915_pm_lpsp.c
@@ -30,6 +30,8 @@
#include <fcntl.h>
#include <unistd.h>
+void *igt_global_mmio;
+static struct _mmio_data mmio_data;
static bool supports_lpsp(uint32_t devid)
{
@@ -210,7 +212,8 @@ igt_main
igt_require(supports_lpsp(devid));
- intel_register_access_init(intel_get_pci_device(), 0, drm_fd);
+ intel_register_access_init(&mmio_data, intel_get_pci_device(), 0, drm_fd);
+ igt_global_mmio = mmio_data.igt_mmio;
kmstest_set_vt_graphics_mode();
}
@@ -227,7 +230,7 @@ igt_main
igt_fixture {
int i;
- intel_register_access_fini();
+ intel_register_access_fini(&mmio_data);
for (i = 0; i < drm_res->count_connectors; i++)
drmModeFreeConnector(drm_connectors[i]);
drmModeFreeResources(drm_res);
diff --git a/tools/intel_audio_dump.c b/tools/intel_audio_dump.c
index 86664478..984c7da4 100644
--- a/tools/intel_audio_dump.c
+++ b/tools/intel_audio_dump.c
@@ -41,6 +41,8 @@ static uint32_t devid;
static int aud_reg_base = 0; /* base address of audio registers */
static int disp_reg_base = 0; /* base address of display registers */
+void *igt_global_mmio;
+static struct _mmio_data mmio_data;
#define IS_HASWELL_PLUS(devid) (IS_HASWELL(devid) || IS_BROADWELL(devid))
@@ -2498,9 +2500,10 @@ int main(int argc, char **argv)
do_self_tests();
if (argc == 2)
- intel_mmio_use_dump_file(argv[1]);
+ intel_mmio_use_dump_file(&mmio_data, argv[1]);
else
- intel_mmio_use_pci_bar(pci_dev, -1);
+ intel_mmio_use_pci_bar(&mmio_data, pci_dev, -1);
+ igt_global_mmio = mmio_data.igt_mmio;
printf("%s audio registers:\n\n", intel_get_device_info(devid)->codename);
if (IS_VALLEYVIEW(devid)) {
diff --git a/tools/intel_backlight.c b/tools/intel_backlight.c
index 85d099d7..4e6ad4bb 100644
--- a/tools/intel_backlight.c
+++ b/tools/intel_backlight.c
@@ -35,12 +35,15 @@
#include "intel_reg.h"
/* XXX PCH only today */
+static struct _mmio_data mmio_data;
+void *igt_global_mmio;
int main(int argc, char** argv)
{
uint32_t current, max;
- intel_mmio_use_pci_bar(intel_get_pci_device(), -1);
+ intel_mmio_use_pci_bar(&mmio_data, intel_get_pci_device(), -1);
+ igt_global_mmio = mmio_data.igt_mmio;
current = INREG(igt_global_mmio, BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
max = INREG(igt_global_mmio, BLC_PWM_PCH_CTL2) >> 16;
diff --git a/tools/intel_display_poller.c b/tools/intel_display_poller.c
index e1094d39..af7e40cc 100644
--- a/tools/intel_display_poller.c
+++ b/tools/intel_display_poller.c
@@ -59,6 +59,8 @@ enum test {
static uint32_t vlv_offset;
static uint16_t pipe_offset[3] = { 0, 0x1000, 0x2000, };
+void *igt_global_mmio;
+static struct _mmio_data mmio_data;
#define PIPE_REG(pipe, reg_a) (pipe_offset[(pipe)] + (reg_a))
@@ -1187,7 +1189,8 @@ int main(int argc, char *argv[])
break;
}
- intel_register_access_init(intel_get_pci_device(), 0, -1);
+ intel_register_access_init(&mmio_data, intel_get_pci_device(), 0, -1);
+ igt_global_mmio = mmio_data.igt_mmio;
printf("%s?\n", test_name(test, pipe, bit, test_pixelcount));
@@ -1262,7 +1265,7 @@ int main(int argc, char *argv[])
assert(0);
}
- intel_register_access_fini();
+ intel_register_access_fini(&mmio_data);
if (quit)
return 0;
diff --git a/tools/intel_forcewaked.c b/tools/intel_forcewaked.c
index e057f5fe..e52db5ed 100644
--- a/tools/intel_forcewaked.c
+++ b/tools/intel_forcewaked.c
@@ -39,6 +39,8 @@
#include "drmtest.h"
bool daemonized;
+void *igt_global_mmio;
+static struct _mmio_data mmio_data;
#define INFO_PRINT(...) \
do { \
@@ -59,7 +61,7 @@ help(char *prog) {
static int
is_alive(void) {
/* Read the timestamp, which should *almost* always be !0 */
- return (intel_register_read(igt_global_mmio, 0x2358) != 0);
+ return (intel_register_read(&mmio_data, 0x2358) != 0);
}
int main(int argc, char *argv[])
@@ -80,7 +82,8 @@ int main(int argc, char *argv[])
INFO_PRINT("started daemon");
}
- ret = intel_register_access_init(intel_get_pci_device(), 1, -1);
+ ret = intel_register_access_init(&mmio_data, intel_get_pci_device(), 1, -1);
+ igt_global_mmio = mmio_data.igt_mmio;
if (ret) {
INFO_PRINT("Couldn't init register access\n");
exit(1);
@@ -90,14 +93,15 @@ int main(int argc, char *argv[])
while(1) {
if (!is_alive()) {
INFO_PRINT("gpu reset? restarting daemon\n");
- intel_register_access_fini();
- ret = intel_register_access_init(intel_get_pci_device(), 1, -1);
+ intel_register_access_fini(&mmio_data);
+ ret = intel_register_access_init(&mmio_data, intel_get_pci_device(), 1, -1);
+ igt_global_mmio = mmio_data.igt_mmio;
if (ret)
INFO_PRINT("Reg access init fail\n");
}
sleep(1);
}
- intel_register_access_fini();
+ intel_register_access_fini(&mmio_data);
INFO_PRINT("Forcewake unlock\n");
if (daemonized) {
diff --git a/tools/intel_gpu_time.c b/tools/intel_gpu_time.c
index d90b816a..d7acfd2b 100644
--- a/tools/intel_gpu_time.c
+++ b/tools/intel_gpu_time.c
@@ -41,6 +41,8 @@
#define SAMPLES_PER_SEC 10000
static volatile int goddo;
+void *igt_global_mmio;
+static struct _mmio_data mmio_data;
static pid_t spawn(char **argv)
{
@@ -67,7 +69,8 @@ int main(int argc, char **argv)
static struct rusage rusage;
int status;
- intel_mmio_use_pci_bar(intel_get_pci_device(), -1);
+ intel_mmio_use_pci_bar(&mmio_data, intel_get_pci_device(), -1);
+ igt_global_mmio = mmio_data.igt_mmio;
if (argc == 1) {
fprintf(stderr, "usage: %s cmd [args...]\n", argv[0]);
diff --git a/tools/intel_infoframes.c b/tools/intel_infoframes.c
index 689f5faa..633a5e10 100644
--- a/tools/intel_infoframes.c
+++ b/tools/intel_infoframes.c
@@ -262,6 +262,8 @@ const char *dip_frequency_names[] = {
"reserved (invalid)"
};
+void *igt_global_mmio;
+static struct _mmio_data mmio_data;
struct pci_device *pci_dev;
int gen = 0;
@@ -1108,7 +1110,8 @@ int main(int argc, char *argv[])
" perfectly: the Kernel might undo our changes.\n");
pci_dev = intel_get_pci_device();
- intel_register_access_init(pci_dev, 0, -1);
+ intel_register_access_init(&mmio_data, pci_dev, 0, -1);
+ igt_global_mmio = mmio_data.igt_mmio;
intel_check_pch();
if (IS_GEN4(pci_dev->device_id))
@@ -1256,6 +1259,6 @@ int main(int argc, char *argv[])
}
out:
- intel_register_access_fini();
+ intel_register_access_fini(&mmio_data);
return ret;
}
diff --git a/tools/intel_l3_parity.c b/tools/intel_l3_parity.c
index 014ac9f1..7a461a54 100644
--- a/tools/intel_l3_parity.c
+++ b/tools/intel_l3_parity.c
@@ -44,6 +44,8 @@
#include "intel_l3_parity.h"
static unsigned int devid;
+void *igt_global_mmio;
+static struct _mmio_data mmio_data;
/* L3 size is always a function of banks. The number of banks cannot be
* determined by number of slices however */
static inline int num_banks(void) {
@@ -189,7 +191,8 @@ int main(int argc, char *argv[])
if (intel_gen(devid) < 7 || IS_VALLEYVIEW(devid))
exit(77);
- assert(intel_register_access_init(intel_get_pci_device(), 0, device) == 0);
+ assert(intel_register_access_init(&mmio_data, intel_get_pci_device(), 0, device) == 0);
+ igt_global_mmio = mmio_data.igt_mmio;
dir = igt_sysfs_open(device);
@@ -211,7 +214,7 @@ int main(int argc, char *argv[])
* now. Just be aware of this if for some reason a hang is reported
* when using this tool.
*/
- dft = intel_register_read(igt_global_mmio, 0xb038);
+ dft = intel_register_read(&mmio_data, 0xb038);
while (1) {
int c, option_index = 0;
@@ -357,12 +360,11 @@ int main(int argc, char *argv[])
assert(i < 2);
dft |= i << 1; /* slice */
dft |= 1 << 0; /* enable */
- intel_register_write(igt_global_mmio, 0xb038,
- dft);
+ intel_register_write(&mmio_data, 0xb038, dft);
break;
case 'u':
- intel_register_write(igt_global_mmio, 0xb038,
- dft & ~(1 << 0));
+ intel_register_write(&mmio_data, 0xb038, dft &
+ ~(1 << 0));
break;
case 'L':
break;
@@ -371,7 +373,7 @@ int main(int argc, char *argv[])
}
}
- intel_register_access_fini();
+ intel_register_access_fini(&mmio_data);
if (action == 'l')
exit(EXIT_SUCCESS);
diff --git a/tools/intel_lid.c b/tools/intel_lid.c
index a4132d56..c589822b 100644
--- a/tools/intel_lid.c
+++ b/tools/intel_lid.c
@@ -52,6 +52,9 @@ enum lid_status {
#define ACPI_BUTTON "/proc/acpi/button/"
#define ACPI_LID "/proc/acpi/button/lid/"
+void *igt_global_mmio;
+static struct _mmio_data mmio_data;
+
static int i830_lvds_acpi_lid_state(void)
{
int fd;
@@ -119,7 +122,8 @@ int main(int argc, char **argv)
{
int swf14, acpi_lid;
- intel_mmio_use_pci_bar(intel_get_pci_device(), -1);
+ intel_mmio_use_pci_bar(&mmio_data, intel_get_pci_device(), -1);
+ igt_global_mmio = mmio_data.igt_mmio;
while (1) {
swf14 = INREG(igt_global_mmio, SWF14);
diff --git a/tools/intel_panel_fitter.c b/tools/intel_panel_fitter.c
index 26843d7c..9663d0cc 100644
--- a/tools/intel_panel_fitter.c
+++ b/tools/intel_panel_fitter.c
@@ -35,6 +35,8 @@
#include "intel_reg.h"
#include "drmtest.h"
+void *igt_global_mmio;
+static struct _mmio_data mmio_data;
int gen;
uint32_t HTOTAL[] = { 0x60000, 0x61000, 0x62000 };
@@ -280,7 +282,8 @@ int main (int argc, char *argv[])
"solution that may or may not work. Use it at your own risk.\n");
pci_dev = intel_get_pci_device();
- intel_register_access_init(pci_dev, 0, -1);
+ intel_register_access_init(&mmio_data, pci_dev, 0, -1);
+ igt_global_mmio = mmio_data.igt_mmio;
devid = pci_dev->device_id;
if (!HAS_PCH_SPLIT(devid)) {
@@ -342,6 +345,6 @@ int main (int argc, char *argv[])
}
out:
- intel_register_access_fini();
+ intel_register_access_fini(&mmio_data);
return ret;
}
diff --git a/tools/intel_perf_counters.c b/tools/intel_perf_counters.c
index be573b55..38f71419 100644
--- a/tools/intel_perf_counters.c
+++ b/tools/intel_perf_counters.c
@@ -300,6 +300,8 @@ uint32_t *totals;
uint32_t *last_counter;
static drm_intel_bufmgr *bufmgr;
struct intel_batchbuffer *batch;
+void *igt_global_mmio;
+static struct _mmio_data mmio_data;
/* DW0 */
#define GEN5_MI_REPORT_PERF_COUNT ((0x26 << 23) | (3 - 2))
@@ -483,10 +485,12 @@ main(int argc, char **argv)
if (oacontrol) {
/* Forcewake */
- intel_register_access_init(intel_get_pci_device(), 0, fd);
+ intel_register_access_init(&mmio_data, intel_get_pci_device(),
+ 0, fd);
+ igt_global_mmio = mmio_data.igt_mmio;
/* Enable performance counters */
- intel_register_write(igt_global_mmio, OACONTROL,
+ intel_register_write(&mmio_data, OACONTROL,
counter_format <<
OACONTROL_COUNTER_SELECT_SHIFT |
PERFORMANCE_COUNTER_ENABLE);
@@ -521,10 +525,10 @@ main(int argc, char **argv)
if (oacontrol) {
/* Disable performance counters */
- intel_register_write(igt_global_mmio, OACONTROL, 0);
+ intel_register_write(&mmio_data, OACONTROL, 0);
/* Forcewake */
- intel_register_access_fini();
+ intel_register_access_fini(&mmio_data);
}
free(totals);
diff --git a/tools/intel_reg.c b/tools/intel_reg.c
index debd8c9a..3a90589f 100644
--- a/tools/intel_reg.c
+++ b/tools/intel_reg.c
@@ -84,6 +84,9 @@ struct config {
int verbosity;
};
+void *igt_global_mmio;
+static struct _mmio_data mmio_data;
+
/* port desc must have been set */
static int set_reg_by_addr(struct config *config, struct reg *reg,
uint32_t addr)
@@ -390,7 +393,7 @@ static int read_register(struct config *config, struct reg *reg, uint32_t *valp)
reg->port_desc.name);
return -1;
}
- val = intel_iosf_sb_read(igt_global_mmio, reg->port_desc.port,
+ val = intel_iosf_sb_read(&mmio_data, reg->port_desc.port,
reg->addr);
break;
default:
@@ -558,9 +561,10 @@ static int intel_reg_read(struct config *config, int argc, char *argv[])
}
if (config->mmiofile)
- intel_mmio_use_dump_file(config->mmiofile);
+ intel_mmio_use_dump_file(&mmio_data, config->mmiofile);
else
- intel_register_access_init(config->pci_dev, 0, -1);
+ intel_register_access_init(&mmio_data, config->pci_dev, 0, -1);
+ igt_global_mmio = mmio_data.igt_mmio;
for (i = 1; i < argc; i++) {
struct reg reg;
@@ -576,7 +580,7 @@ static int intel_reg_read(struct config *config, int argc, char *argv[])
}
}
- intel_register_access_fini();
+ intel_register_access_fini(&mmio_data);
return EXIT_SUCCESS;
}
@@ -590,7 +594,8 @@ static int intel_reg_write(struct config *config, int argc, char *argv[])
return EXIT_FAILURE;
}
- intel_register_access_init(config->pci_dev, 0, -1);
+ intel_register_access_init(&mmio_data,config->pci_dev, 0, -1);
+ igt_global_mmio = mmio_data.igt_mmio;
for (i = 1; i < argc; i += 2) {
struct reg reg;
@@ -615,7 +620,7 @@ static int intel_reg_write(struct config *config, int argc, char *argv[])
write_register(config, ®, val);
}
- intel_register_access_fini();
+ intel_register_access_fini(&mmio_data);
return EXIT_SUCCESS;
}
@@ -626,9 +631,10 @@ static int intel_reg_dump(struct config *config, int argc, char *argv[])
int i;
if (config->mmiofile)
- intel_mmio_use_dump_file(config->mmiofile);
+ intel_mmio_use_dump_file(&mmio_data, config->mmiofile);
else
- intel_register_access_init(config->pci_dev, 0, -1);
+ intel_register_access_init(&mmio_data, config->pci_dev, 0, -1);
+ igt_global_mmio = mmio_data.igt_mmio;
for (i = 0; i < config->regcount; i++) {
reg = &config->regs[i];
@@ -640,7 +646,7 @@ static int intel_reg_dump(struct config *config, int argc, char *argv[])
dump_register(config, &config->regs[i]);
}
- intel_register_access_fini();
+ intel_register_access_fini(&mmio_data);
return EXIT_SUCCESS;
}
@@ -654,7 +660,8 @@ static int intel_reg_snapshot(struct config *config, int argc, char *argv[])
return EXIT_FAILURE;
}
- intel_mmio_use_pci_bar(config->pci_dev, -1);
+ intel_mmio_use_pci_bar(&mmio_data, config->pci_dev, -1);
+ igt_global_mmio = mmio_data.igt_mmio;
/* XXX: error handling */
if (write(1, igt_global_mmio, config->pci_dev->regions[mmio_bar].size) == -1)
diff --git a/tools/intel_reg_checker.c b/tools/intel_reg_checker.c
index 1d40cd82..1cc9fa76 100644
--- a/tools/intel_reg_checker.c
+++ b/tools/intel_reg_checker.c
@@ -32,6 +32,9 @@
static uint32_t devid;
static int gen;
+static struct _mmio_data mmio_data;
+void *igt_global_mmio;
+
static uint32_t
read_and_print_reg(const char *name, uint32_t reg)
{
@@ -345,7 +348,8 @@ int main(int argc, char** argv)
dev = intel_get_pci_device();
devid = dev->device_id;
- intel_mmio_use_pci_bar(dev, -1);
+ intel_mmio_use_pci_bar(&mmio_data, dev, -1);
+ igt_global_mmio = mmio_data.igt_mmio;
if (IS_GEN7(devid))
gen = 7;
diff --git a/tools/intel_watermark.c b/tools/intel_watermark.c
index 372947de..3f267fa6 100644
--- a/tools/intel_watermark.c
+++ b/tools/intel_watermark.c
@@ -35,6 +35,8 @@
static uint32_t display_base;
static uint32_t devid;
+void *igt_global_mmio;
+static struct _mmio_data mmio_data;
static uint32_t read_reg(uint32_t addr)
{
@@ -249,7 +251,8 @@ static void skl_wm_dump(void)
uint32_t plane_ctl[num_pipes][max_planes];
uint32_t wm_linetime[num_pipes];
- intel_register_access_init(intel_get_pci_device(), 0, -1);
+ intel_register_access_init(&mmio_data, intel_get_pci_device(), 0, -1);
+ igt_global_mmio = mmio_data.igt_mmio;
for (pipe = 0; pipe < num_pipes; pipe++) {
int num_planes = skl_num_planes(devid, pipe);
@@ -469,7 +472,8 @@ static void ilk_wm_dump(void)
int num_pipes = intel_gen(devid) >= 7 ? 3 : 2;
struct ilk_wm wm = {};
- intel_register_access_init(intel_get_pci_device(), 0, -1);
+ intel_register_access_init(&mmio_data, intel_get_pci_device(), 0, -1);
+ igt_global_mmio = mmio_data.igt_mmio;
for (i = 0; i < num_pipes; i++) {
dspcntr[i] = read_reg(0x70180 + i * 0x1000);
@@ -505,7 +509,7 @@ static void ilk_wm_dump(void)
if (IS_BROADWELL(devid) || IS_HASWELL(devid))
wm_misc = read_reg(0x45260);
- intel_register_access_fini();
+ intel_register_access_fini(&mmio_data);
for (i = 0; i < num_pipes; i++)
printf(" WM_PIPE_%c = 0x%08x\n", pipe_name(i), wm_pipe[i]);
@@ -619,7 +623,8 @@ static void vlv_wm_dump(void)
uint32_t dsp_ss_pm, ddr_setup2;
struct gmch_wm wms[MAX_PLANE] = {};
- intel_register_access_init(intel_get_pci_device(), 0, -1);
+ intel_register_access_init(&mmio_data, intel_get_pci_device(), 0, -1);
+ igt_global_mmio = mmio_data.igt_mmio;
dsparb = read_reg(0x70030);
dsparb2 = read_reg(0x70060);
@@ -650,13 +655,13 @@ static void vlv_wm_dump(void)
ddl3 = read_reg(0x70058);
- intel_punit_read(igt_global_mmio, 0x36, &dsp_ss_pm);
- intel_punit_read(igt_global_mmio, 0x139, &ddr_setup2);
+ intel_punit_read(&mmio_data, 0x36, &dsp_ss_pm);
+ intel_punit_read(&mmio_data, 0x139, &ddr_setup2);
} else {
fw7 = read_reg(0x7007c);
}
- intel_register_access_fini();
+ intel_register_access_fini(&mmio_data);
printf(" FW1 = 0x%08x\n", fw1);
printf(" FW2 = 0x%08x\n", fw2);
@@ -835,7 +840,8 @@ static void g4x_wm_dump(void)
uint32_t mi_arb_state;
struct gmch_wm wms[MAX_PLANE] = {};
- intel_register_access_init(intel_get_pci_device(), 0, -1);
+ intel_register_access_init(&mmio_data, intel_get_pci_device(), 0, -1);
+ igt_global_mmio = mmio_data.igt_mmio;
dspacntr = read_reg(0x70180);
dspbcntr = read_reg(0x71180);
@@ -846,7 +852,7 @@ static void g4x_wm_dump(void)
mi_display_power_down = read_reg(0x20e0);
mi_arb_state = read_reg(0x20e4);
- intel_register_access_fini();
+ intel_register_access_fini(&mmio_data);
printf(" DSPACNTR = 0x%08x\n", dspacntr);
printf(" DSPBCNTR = 0x%08x\n", dspbcntr);
@@ -921,7 +927,8 @@ static void gen4_wm_dump(void)
uint32_t mi_arb_state;
struct gmch_wm wms[MAX_PLANE] = {};
- intel_register_access_init(intel_get_pci_device(), 0, -1);
+ intel_register_access_init(&mmio_data, intel_get_pci_device(), 0, -1);
+ igt_global_mmio = mmio_data.igt_mmio;
dsparb = read_reg(0x70030);
fw1 = read_reg(0x70034);
@@ -930,7 +937,7 @@ static void gen4_wm_dump(void)
mi_display_power_down = read_reg(0x20e0);
mi_arb_state = read_reg(0x20e4);
- intel_register_access_fini();
+ intel_register_access_fini(&mmio_data);
printf(" FW1 = 0x%08x\n", fw1);
printf(" FW2 = 0x%08x\n", fw2);
@@ -992,7 +999,8 @@ static void pnv_wm_dump(void)
uint32_t cbr;
struct gmch_wm wms[MAX_PLANE] = {};
- intel_register_access_init(intel_get_pci_device(), 0, -1);
+ intel_register_access_init(&mmio_data, intel_get_pci_device(), 0, -1);
+ igt_global_mmio = mmio_data.igt_mmio;
dsparb = read_reg(0x70030);
fw1 = read_reg(0x70034);
@@ -1002,7 +1010,7 @@ static void pnv_wm_dump(void)
mi_display_power_down = read_reg(0x20e0);
mi_arb_state = read_reg(0x20e4);
- intel_register_access_fini();
+ intel_register_access_fini(&mmio_data);
printf(" DSPARB = 0x%08x\n", dsparb);
printf(" FW1 = 0x%08x\n", fw1);
@@ -1082,7 +1090,8 @@ static void gen3_wm_dump(void)
uint32_t mi_arb_state;
struct gmch_wm wms[MAX_PLANE] = {};
- intel_register_access_init(intel_get_pci_device(), 0, -1);
+ intel_register_access_init(&mmio_data, intel_get_pci_device(), 0, -1);
+ igt_global_mmio = mmio_data.igt_mmio;
dsparb = read_reg(0x70030);
instpm = read_reg(0x20c0);
@@ -1090,7 +1099,7 @@ static void gen3_wm_dump(void)
fw_blc_self = read_reg(0x20e0);
mi_arb_state = read_reg(0x20e4);
- intel_register_access_fini();
+ intel_register_access_fini(&mmio_data);
printf(" DSPARB = 0x%08x\n", dsparb);
printf(" FW_BLC = 0x%016" PRIx64 "\n", fw_blc);
@@ -1151,7 +1160,8 @@ static void gen2_wm_dump(void)
uint32_t mi_state;
struct gmch_wm wms[MAX_PLANE] = {};
- intel_register_access_init(intel_get_pci_device(), 0, -1);
+ intel_register_access_init(&mmio_data, intel_get_pci_device(), 0, -1);
+ igt_global_mmio = mmio_data.igt_mmio;
dsparb = read_reg(0x70030);
mem_mode = read_reg(0x20cc);
@@ -1159,7 +1169,7 @@ static void gen2_wm_dump(void)
fw_blc_self = read_reg(0x20e0);
mi_state = read_reg(0x20e4);
- intel_register_access_fini();
+ intel_register_access_fini(&mmio_data);
printf(" DSPARB = 0x%08x\n", dsparb);
printf(" MEM_MODE = 0x%08x\n", mem_mode);
--
2.20.1
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [igt-dev] ✓ Fi.CI.BAT: success for Remove global igt_global_mmio (rev3)
2019-04-15 8:59 [igt-dev] [PATCH i-g-t v3 0/5] Remove global igt_global_mmio Daniel Mrzyglod
` (4 preceding siblings ...)
2019-04-15 8:59 ` [igt-dev] [PATCH i-g-t v3 5/5] lib/intel_mmio: remove igt_global_mmio and move pointer to mmio_data structure Daniel Mrzyglod
@ 2019-04-15 10:34 ` Patchwork
2019-04-15 11:33 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
6 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2019-04-15 10:34 UTC (permalink / raw)
To: Daniel Mrzyglod; +Cc: igt-dev
== Series Details ==
Series: Remove global igt_global_mmio (rev3)
URL : https://patchwork.freedesktop.org/series/59008/
State : success
== Summary ==
CI Bug Log - changes from IGT_4946 -> IGTPW_2857
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://patchwork.freedesktop.org/api/1.0/series/59008/revisions/3/mbox/
Known issues
------------
Here are the changes found in IGTPW_2857 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@amdgpu/amd_basic@userptr:
- fi-kbl-8809g: PASS -> DMESG-WARN [fdo#108965]
* igt@gem_exec_basic@readonly-bsd2:
- fi-pnv-d510: NOTRUN -> SKIP [fdo#109271] +71
* igt@i915_pm_rpm@module-reload:
- fi-skl-6770hq: PASS -> FAIL [fdo#108511]
* igt@kms_addfb_basic@addfb25-y-tiled-small:
- fi-byt-n2820: NOTRUN -> SKIP [fdo#109271] +51
* igt@kms_busy@basic-flip-c:
- fi-blb-e6850: NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
- fi-pnv-d510: NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
- fi-byt-n2820: NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
* igt@kms_chamelium@dp-crc-fast:
- fi-blb-e6850: NOTRUN -> SKIP [fdo#109271] +43
* igt@kms_force_connector_basic@force-edid:
- fi-glk-dsi: NOTRUN -> SKIP [fdo#109271] +36
* igt@kms_frontbuffer_tracking@basic:
- fi-glk-dsi: NOTRUN -> FAIL [fdo#103167]
#### Possible fixes ####
* igt@gem_exec_suspend@basic-s3:
- fi-blb-e6850: INCOMPLETE [fdo#107718] -> PASS
* igt@gem_mmap_gtt@basic-copy:
- fi-glk-dsi: INCOMPLETE [fdo#103359] / [k.org#198133] -> PASS
* igt@i915_selftest@live_contexts:
- fi-bdw-gvtdvm: DMESG-FAIL [fdo#110235 ] -> PASS
* igt@i915_selftest@live_objects:
- fi-icl-y: INCOMPLETE [fdo#107713] -> PASS
* igt@kms_frontbuffer_tracking@basic:
- fi-icl-u3: FAIL [fdo#103167] -> PASS
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
- fi-byt-clapper: FAIL [fdo#103191] -> PASS
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
[fdo#103359]: https://bugs.freedesktop.org/show_bug.cgi?id=103359
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
[fdo#108511]: https://bugs.freedesktop.org/show_bug.cgi?id=108511
[fdo#108965]: https://bugs.freedesktop.org/show_bug.cgi?id=108965
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#110235 ]: https://bugs.freedesktop.org/show_bug.cgi?id=110235
[k.org#198133]: https://bugzilla.kernel.org/show_bug.cgi?id=198133
Participating hosts (50 -> 44)
------------------------------
Additional (2): fi-byt-n2820 fi-pnv-d510
Missing (8): fi-kbl-soraka fi-kbl-7567u fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-bdw-samus
Build changes
-------------
* IGT: IGT_4946 -> IGTPW_2857
CI_DRM_5933: 6ba1335cf9dff71bed39ca38565e23a4d008614c @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_2857: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2857/
IGT_4946: 56bdc68638cec64c6b02cd6b220b52b76059b51a @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2857/
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 14+ messages in thread
* [igt-dev] ✓ Fi.CI.IGT: success for Remove global igt_global_mmio (rev3)
2019-04-15 8:59 [igt-dev] [PATCH i-g-t v3 0/5] Remove global igt_global_mmio Daniel Mrzyglod
` (5 preceding siblings ...)
2019-04-15 10:34 ` [igt-dev] ✓ Fi.CI.BAT: success for Remove global igt_global_mmio (rev3) Patchwork
@ 2019-04-15 11:33 ` Patchwork
6 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2019-04-15 11:33 UTC (permalink / raw)
To: Daniel Mrzyglod; +Cc: igt-dev
== Series Details ==
Series: Remove global igt_global_mmio (rev3)
URL : https://patchwork.freedesktop.org/series/59008/
State : success
== Summary ==
CI Bug Log - changes from IGT_4946_full -> IGTPW_2857_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://patchwork.freedesktop.org/api/1.0/series/59008/revisions/3/mbox/
Known issues
------------
Here are the changes found in IGTPW_2857_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_mocs_settings@mocs-settings-render:
- shard-glk: NOTRUN -> SKIP [fdo#109271] +22
* igt@gen3_render_mixed_blits:
- shard-hsw: NOTRUN -> SKIP [fdo#109271] +23
* igt@i915_suspend@fence-restore-untiled:
- shard-apl: PASS -> DMESG-WARN [fdo#108566] +4
* igt@kms_busy@extended-modeset-hang-oldfb-with-reset-render-e:
- shard-glk: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +1
* igt@kms_ccs@pipe-a-ccs-on-another-bo:
- shard-snb: NOTRUN -> SKIP [fdo#109271] +110
* igt@kms_cursor_crc@cursor-512x512-suspend:
- shard-iclb: NOTRUN -> SKIP [fdo#109279]
* igt@kms_cursor_crc@cursor-64x21-sliding:
- shard-glk: NOTRUN -> FAIL [fdo#103232]
* igt@kms_cursor_legacy@short-flip-after-cursor-toggle:
- shard-hsw: PASS -> DMESG-WARN [fdo#102614] +1
* igt@kms_flip@2x-blocking-wf_vblank:
- shard-hsw: PASS -> DMESG-FAIL [fdo#102614]
* igt@kms_flip@dpms-vs-vblank-race:
- shard-glk: PASS -> FAIL [fdo#103060]
* igt@kms_frontbuffer_tracking@fbc-stridechange:
- shard-iclb: PASS -> FAIL [fdo#103167] +6
- shard-hsw: PASS -> DMESG-FAIL [fdo#102614] / [fdo#103167]
* igt@kms_frontbuffer_tracking@fbc-tilingchange:
- shard-apl: PASS -> FAIL [fdo#103167]
- shard-glk: PASS -> FAIL [fdo#103167]
- shard-kbl: PASS -> FAIL [fdo#103167]
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-blt:
- shard-iclb: PASS -> FAIL [fdo#109247] +14
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-mmap-wc:
- shard-apl: NOTRUN -> SKIP [fdo#109271] +6
- shard-iclb: NOTRUN -> SKIP [fdo#109280] +1
* igt@kms_frontbuffer_tracking@psr-farfromfence:
- shard-kbl: NOTRUN -> SKIP [fdo#109271] +6
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-e:
- shard-apl: NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
- shard-kbl: NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
- shard-iclb: NOTRUN -> SKIP [fdo#109278]
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-f:
- shard-snb: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +9
* igt@kms_plane_alpha_blend@pipe-a-constant-alpha-max:
- shard-glk: NOTRUN -> FAIL [fdo#108145]
* igt@kms_plane_alpha_blend@pipe-c-coverage-vs-premult-vs-constant:
- shard-hsw: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +3
* igt@kms_psr@cursor_mmap_gtt:
- shard-iclb: PASS -> FAIL [fdo#107383] / [fdo#110215] +2
* igt@kms_psr@psr2_primary_render:
- shard-iclb: PASS -> SKIP [fdo#109441]
* igt@kms_setmode@basic:
- shard-kbl: PASS -> FAIL [fdo#99912]
* igt@kms_vblank@pipe-b-ts-continuation-suspend:
- shard-kbl: PASS -> DMESG-WARN [fdo#108566] +2
#### Possible fixes ####
* igt@gem_workarounds@suspend-resume:
- shard-apl: DMESG-WARN [fdo#108566] -> PASS +3
* igt@i915_selftest@live_requests:
- shard-snb: INCOMPLETE [fdo#105411] -> PASS
* igt@i915_selftest@live_workarounds:
- shard-iclb: DMESG-FAIL [fdo#108954] -> PASS
* igt@kms_cursor_crc@cursor-128x42-onscreen:
- shard-apl: FAIL [fdo#103232] -> PASS
- shard-kbl: FAIL [fdo#103232] -> PASS
* igt@kms_flip@dpms-vs-vblank-race-interruptible:
- shard-kbl: FAIL [fdo#103060] -> PASS
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render:
- shard-iclb: FAIL [fdo#103167] -> PASS +7
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-mmap-cpu:
- shard-iclb: FAIL [fdo#109247] -> PASS +5
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
- shard-kbl: DMESG-WARN [fdo#108566] -> PASS +3
* igt@kms_plane@pixel-format-pipe-a-planes-source-clamping:
- shard-glk: SKIP [fdo#109271] -> PASS
* igt@kms_plane_lowres@pipe-a-tiling-x:
- shard-iclb: FAIL [fdo#103166] -> PASS +1
* igt@kms_plane_scaling@pipe-c-scaler-with-pixel-format:
- shard-glk: SKIP [fdo#109271] / [fdo#109278] -> PASS
* igt@kms_psr@psr2_cursor_plane_onoff:
- shard-iclb: SKIP [fdo#109441] -> PASS +1
* igt@kms_psr@sprite_render:
- shard-iclb: FAIL [fdo#107383] / [fdo#110215] -> PASS +1
* igt@kms_rotation_crc@multiplane-rotation-cropping-bottom:
- shard-kbl: DMESG-FAIL [fdo#105763] -> PASS
* igt@kms_vblank@pipe-c-ts-continuation-dpms-suspend:
- shard-apl: DMESG-WARN [fdo#110376] -> PASS +1
* igt@tools_test@tools_test:
- shard-hsw: SKIP [fdo#109271] -> PASS
[fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614
[fdo#103060]: https://bugs.freedesktop.org/show_bug.cgi?id=103060
[fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
[fdo#105411]: https://bugs.freedesktop.org/show_bug.cgi?id=105411
[fdo#105763]: https://bugs.freedesktop.org/show_bug.cgi?id=105763
[fdo#107383]: https://bugs.freedesktop.org/show_bug.cgi?id=107383
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
[fdo#108954]: https://bugs.freedesktop.org/show_bug.cgi?id=108954
[fdo#109247]: https://bugs.freedesktop.org/show_bug.cgi?id=109247
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#110215]: https://bugs.freedesktop.org/show_bug.cgi?id=110215
[fdo#110376]: https://bugs.freedesktop.org/show_bug.cgi?id=110376
[fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
Participating hosts (7 -> 6)
------------------------------
Missing (1): shard-skl
Build changes
-------------
* IGT: IGT_4946 -> IGTPW_2857
CI_DRM_5933: 6ba1335cf9dff71bed39ca38565e23a4d008614c @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_2857: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2857/
IGT_4946: 56bdc68638cec64c6b02cd6b220b52b76059b51a @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2857/
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [igt-dev] [PATCH i-g-t v3 1/5] lib/igt_device: add igt_device_get_pci_addr by fd
2019-04-15 8:59 ` [igt-dev] [PATCH i-g-t v3 1/5] lib/igt_device: add igt_device_get_pci_addr by fd Daniel Mrzyglod
@ 2019-04-15 13:24 ` Katarzyna Dec
2019-04-15 15:28 ` Mrzyglod, Daniel T
0 siblings, 1 reply; 14+ messages in thread
From: Katarzyna Dec @ 2019-04-15 13:24 UTC (permalink / raw)
To: Daniel Mrzyglod; +Cc: igt-dev
On Mon, Apr 15, 2019 at 10:59:33AM +0200, Daniel Mrzyglod wrote:
> From: Michał Winiarski <michal.winiarski@intel.com>
>
> This function get us pci address based by fd.
> It allows us to make things a little bit more generic.
> Also, we now require fd rather than doing guesswork when it comes to pci address.
>
> Signed-off-by: Michał Winiarski <michal.winiarski@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Signed-off-by: Daniel Mrzyglod <daniel.t.mrzyglod@intel.com>
> ---
> lib/igt_device.c | 122 +++++++++++++++++++++++++++++++++++++++++++++++
> lib/igt_device.h | 2 +
> 2 files changed, 124 insertions(+)
>
> diff --git a/lib/igt_device.c b/lib/igt_device.c
> index 08f39c8b..f3d2a9f5 100644
> --- a/lib/igt_device.c
> +++ b/lib/igt_device.c
> @@ -21,11 +21,14 @@
> * IN THE SOFTWARE.
> *
> */
> +#include <sys/types.h>
> +#include <fcntl.h>
>
> #include <sys/stat.h>
> #include <sys/sysmacros.h>
> #include "igt.h"
> #include "igt_device.h"
> +#include "igt_sysfs.h"
>
> int __igt_device_set_master(int fd)
> {
> @@ -103,3 +106,122 @@ int igt_device_get_card_index(int fd)
>
> return minor(st.st_rdev);
> }
> +
> +#define IGT_DEV_PATH_LEN 80
> +
> +static bool igt_device_is_pci(int fd)
> +{
> + char path[IGT_DEV_PATH_LEN];
> + char *subsystem;
> + int sysfs;
> + int len;
> +
> + sysfs = igt_sysfs_open(fd);
> + if (sysfs == -1)
> + return false;
> +
> + len = readlinkat(sysfs, "device/subsystem", path, sizeof(path) - 1);
> + if (len == -1)
> + return false;
> + path[len] = '\0';
> +
> + subsystem = strrchr(path, '/');
> + if (!subsystem)
> + return false;
> +
I think that Chris already mentioned that you're leaking sysfs here.
> + return strcmp(subsystem, "/pci") == 0;
> +}
> +
> +struct igt_pci_addr {
> + unsigned int domain;
> + unsigned int bus;
> + unsigned int device;
> + unsigned int function;
> +};
> +
> +static int igt_device_get_pci_addr(int fd, struct igt_pci_addr *pci)
> +{
> + char path[IGT_DEV_PATH_LEN];
> + char *buf;
> + int sysfs;
> + int len;
> +
> + if (!igt_device_is_pci(fd))
> + return -ENODEV;
> +
> + sysfs = igt_sysfs_open(fd);
> + if (sysfs == -1)
> + return -ENOENT;
> +
> + len = readlinkat(sysfs, "device", path, sizeof(path) - 1);
> + if (len == -1)
> + return -ENOENT;
> + path[len] = '\0';
> +
> + buf = strrchr(path, '/');
> + if (!buf)
> + return -ENOENT;
> +
> + if (sscanf(buf, "/%4x:%2x:%2x.%2x",
> + &pci->domain, &pci->bus,
> + &pci->device, &pci->function) != 4) {
> + igt_warn("Unable to extract PCI device address from '%s'\n", buf);
> + return -ENOENT;
> + }
> +
Same about close(sysfs) here.
I can add r-b after above are fixed.
Kasia :)
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https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [igt-dev] [PATCH i-g-t v3 2/5] lib/igt_device: add igt_device_map_pci_bar_region
2019-04-15 8:59 ` [igt-dev] [PATCH i-g-t v3 2/5] lib/igt_device: add igt_device_map_pci_bar_region Daniel Mrzyglod
@ 2019-04-15 13:37 ` Katarzyna Dec
0 siblings, 0 replies; 14+ messages in thread
From: Katarzyna Dec @ 2019-04-15 13:37 UTC (permalink / raw)
To: Daniel Mrzyglod; +Cc: igt-dev
On Mon, Apr 15, 2019 at 10:59:34AM +0200, Daniel Mrzyglod wrote:
> This function use sysfs to map particular mmio region.
s/use/uses/
> fd of opened device point us for specific pci device.
s/point/points
(not a merge blocker)
>
> Signed-off-by: Daniel Mrzyglod <daniel.t.mrzyglod@intel.com>
> ---
> lib/igt_device.c | 38 ++++++++++++++++++++++++++++++++++++++
> lib/igt_device.h | 1 +
> 2 files changed, 39 insertions(+)
>
> diff --git a/lib/igt_device.c b/lib/igt_device.c
> index f3d2a9f5..8b280474 100644
> --- a/lib/igt_device.c
> +++ b/lib/igt_device.c
> @@ -225,3 +225,41 @@ struct pci_device *igt_device_get_pci_device(int fd)
>
> return pci_dev;
> }
> +
> +/**
> + * igt_device_map_pci_bar_region:
> + *
> + * @fd: the device
> + * @mmio_bar: bar to be mapped
> + * @mmio_size: bar size
> + *
> + * Returns:
> + * The pointer for mmapped bar
> + */
> +void *igt_device_map_pci_bar_region(int fd, int mmio_bar, int mmio_size)
> +{
> + struct igt_pci_addr pci_addr;
> + char *filepath = NULL;
> + int newfd;
> + void *igt_mmio;
> +
> + if (igt_device_get_pci_addr(fd, &pci_addr)) {
> + igt_warn("Unable to find device PCI address\n");
> + return NULL;
> + }
> +
> + asprintf(&filepath, "/sys/devices/pci%.4x:%.2x/%.4x:%.2x:%.2x.%.1x/resource%.1x",
> + pci_addr.domain, pci_addr.bus, pci_addr.domain, pci_addr.bus,
> + pci_addr.device, pci_addr.function, mmio_bar);
First this looks like a nightmatre for the person that is debugging.
Maybe is will be easier to use readlinkat for getting device path and
igt_sysfs_set for writing to resource?
> + newfd = open(filepath, O_RDWR | O_SYNC);
> + igt_mmio = mmap(0, mmio_size, PROT_READ | PROT_WRITE, MAP_SHARED,
> + newfd, 0);
> + free(filepath);
> + close(newfd);
Have you applied comment from Chris from last round? (I cannot see any changes,
but maybe you discussed with him on IRC about that).
> + igt_fail_on_f(igt_mmio == MAP_FAILED,
> + "Couldn't map MMIO region %.4x:%.2x:%.2x.%.1x BAR %d\n",
If you will be using this '%.4x:%.2x:%.2x.%.1x' in more than 1 place in this
function, I suggest to make a variable of this - this will decrease possiblity
of errors and will be easier to read.
Kasia
> + pci_addr.domain, pci_addr.bus, pci_addr.device,
> + pci_addr.function, mmio_bar);
> +
> + return igt_mmio;
> +}
> diff --git a/lib/igt_device.h b/lib/igt_device.h
> index 860b3a8a..6ffc1d5e 100644
> --- a/lib/igt_device.h
> +++ b/lib/igt_device.h
> @@ -34,5 +34,6 @@ void igt_device_drop_master(int fd);
>
> int igt_device_get_card_index(int fd);
> struct pci_device *igt_device_get_pci_device(int fd);
> +void *igt_device_map_pci_bar_region(int fd, int mmio_bar, int mmio_size);
>
> #endif /* __IGT_DEVICE_H__ */
> --
> 2.20.1
>
> _______________________________________________
> igt-dev mailing list
> igt-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/igt-dev
_______________________________________________
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igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [igt-dev] [PATCH i-g-t v3 3/5] lib/intel_mmio: different functions are used for mapping if fd is known.
2019-04-15 8:59 ` [igt-dev] [PATCH i-g-t v3 3/5] lib/intel_mmio: different functions are used for mapping if fd is known Daniel Mrzyglod
@ 2019-04-15 13:50 ` Katarzyna Dec
0 siblings, 0 replies; 14+ messages in thread
From: Katarzyna Dec @ 2019-04-15 13:50 UTC (permalink / raw)
To: Daniel Mrzyglod; +Cc: igt-dev
On Mon, Apr 15, 2019 at 10:59:35AM +0200, Daniel Mrzyglod wrote:
> intel_mmio_use_pci_bar function if fd is known now use igt_device_map_pci_bar_region.
> old method from pciaccess library is left for legacy
> apps that work when driver is not loaded.
Please rewrite commit msg, first sentence doesn't make sense at all.
Code seems ok.
Kasia
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igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [igt-dev] [PATCH i-g-t v3 1/5] lib/igt_device: add igt_device_get_pci_addr by fd
2019-04-15 13:24 ` Katarzyna Dec
@ 2019-04-15 15:28 ` Mrzyglod, Daniel T
0 siblings, 0 replies; 14+ messages in thread
From: Mrzyglod, Daniel T @ 2019-04-15 15:28 UTC (permalink / raw)
To: Dec, Katarzyna; +Cc: igt-dev
On Mon, 2019-04-15 at 15:24 +0200, Katarzyna Dec wrote:
> On Mon, Apr 15, 2019 at 10:59:33AM +0200, Daniel Mrzyglod wrote:
> > From: Michał Winiarski <michal.winiarski@intel.com>
> >
> > This function get us pci address based by fd.
> > It allows us to make things a little bit more generic.
> > Also, we now require fd rather than doing guesswork when it comes
> > to pci address.
> >
<CUT>
> Same about close(sysfs) here.
>
> I can add r-b after above are fixed.
> Kasia :)
You are right i missed Chris's email!
Thx!
Daniel
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^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [igt-dev] [PATCH i-g-t v3 4/5] lib/intel_mmio: extend read write registers functions by a pointer for mmaped area
2019-04-15 8:59 ` [igt-dev] [PATCH i-g-t v3 4/5] lib/intel_mmio: extend read write registers functions by a pointer for mmaped area Daniel Mrzyglod
@ 2019-04-17 10:20 ` Katarzyna Dec
0 siblings, 0 replies; 14+ messages in thread
From: Katarzyna Dec @ 2019-04-17 10:20 UTC (permalink / raw)
To: Daniel Mrzyglod; +Cc: igt-dev
On Mon, Apr 15, 2019 at 10:59:36AM +0200, Daniel Mrzyglod wrote:
There is something wrong with subject, please rephrase:
'extend read write registers functions by a pointer for mmaped area'.
> This patch is first move to extend functionality of intel_mmio library.
> There were limitation for 1 device, adding pointer for io functions to mmaped area gives
s/were/was/
s/io/IO?
> us possibility to use those io functions for other mmaped areas.
s/io/IO - yes it will be more readable this way.
>
> Signed-off-by: Daniel Mrzyglod <daniel.t.mrzyglod@intel.com>
> ---
> lib/intel_io.h | 37 ++---
> lib/intel_iosf.c | 77 ++++++----
> lib/intel_mmio.c | 39 +++--
> tests/i915/gem_exec_parse.c | 6 +-
> tests/i915/i915_pm_lpsp.c | 2 +-
> tools/intel_audio_dump.c | 289 +++++++++++++++++++----------------
> tools/intel_backlight.c | 10 +-
> tools/intel_display_poller.c | 8 +-
> tools/intel_forcewaked.c | 2 +-
> tools/intel_gpu_time.c | 6 +-
> tools/intel_infoframes.c | 68 ++++-----
> tools/intel_l3_parity.c | 8 +-
> tools/intel_lid.c | 2 +-
> tools/intel_panel_fitter.c | 24 +--
> tools/intel_perf_counters.c | 9 +-
> tools/intel_reg.c | 16 +-
> tools/intel_reg_checker.c | 2 +-
> tools/intel_watermark.c | 6 +-
> 18 files changed, 334 insertions(+), 277 deletions(-)
>
> diff --git a/lib/intel_io.h b/lib/intel_io.h
> index 09fea386..fd99bbb7 100644
> --- a/lib/intel_io.h
> +++ b/lib/intel_io.h
> @@ -38,29 +38,30 @@ void intel_mmio_use_dump_file(char *file);
>
> int intel_register_access_init(struct pci_device *pci_dev, int safe, int fd);
> void intel_register_access_fini(void);
> -uint32_t intel_register_read(uint32_t reg);
> -void intel_register_write(uint32_t reg, uint32_t val);
> +uint32_t intel_register_read(void *igt_mmio, uint32_t reg);
> +void intel_register_write(void *igt_mmio, uint32_t reg, uint32_t val);
> int intel_register_access_needs_fakewake(void);
>
> -uint32_t INREG(uint32_t reg);
> -uint16_t INREG16(uint32_t reg);
> -uint8_t INREG8(uint32_t reg);
> -void OUTREG(uint32_t reg, uint32_t val);
> -void OUTREG16(uint32_t reg, uint16_t val);
> -void OUTREG8(uint32_t reg, uint8_t val);
> +uint32_t INREG(void *igt_mmio, uint32_t reg);
> +uint16_t INREG16(void *igt_mmio, uint32_t reg);
> +uint8_t INREG8(void *igt_mmio, uint32_t reg);
> +void OUTREG(void *igt_mmio, uint32_t reg, uint32_t val);
> +void OUTREG16(void *igt_mmio, uint32_t reg, uint16_t val);
> +void OUTREG8(void *igt_mmio, uint32_t reg, uint8_t val);
>
> /* sideband access functions from intel_iosf.c */
> -uint32_t intel_dpio_reg_read(uint32_t reg, int phy);
> -void intel_dpio_reg_write(uint32_t reg, uint32_t val, int phy);
> -uint32_t intel_flisdsi_reg_read(uint32_t reg);
> -void intel_flisdsi_reg_write(uint32_t reg, uint32_t val);
> -uint32_t intel_iosf_sb_read(uint32_t port, uint32_t reg);
> -void intel_iosf_sb_write(uint32_t port, uint32_t reg, uint32_t val);
> +uint32_t intel_dpio_reg_read(void *igt_mmio, uint32_t reg, int phy);
> +void intel_dpio_reg_write(void *igt_mmio, uint32_t reg, uint32_t val, int phy);
> +uint32_t intel_flisdsi_reg_read(void *igt_mmio, uint32_t reg);
> +void intel_flisdsi_reg_write(void *igt_mmio, uint32_t reg, uint32_t val);
> +uint32_t intel_iosf_sb_read(void *igt_mmio, uint32_t port, uint32_t reg);
> +void intel_iosf_sb_write(void *igt_mmio, uint32_t port, uint32_t reg,
> + uint32_t val);
>
> -int intel_punit_read(uint32_t addr, uint32_t *val);
> -int intel_punit_write(uint32_t addr, uint32_t val);
> -int intel_nc_read(uint32_t addr, uint32_t *val);
> -int intel_nc_write(uint32_t addr, uint32_t val);
> +int intel_punit_read(void *igt_mmio, uint32_t addr, uint32_t *val);
> +int intel_punit_write(void *igt_mmio, uint32_t addr, uint32_t val);
> +int intel_nc_read(void *igt_mmio, uint32_t addr, uint32_t *val);
> +int intel_nc_write(void *igt_mmio, uint32_t addr, uint32_t val);
>
> /* register maps from intel_reg_map.c */
> #ifndef __GTK_DOC_IGNORE__
> diff --git a/lib/intel_iosf.c b/lib/intel_iosf.c
> index 3b5a1370..b4a483f2 100644
> --- a/lib/intel_iosf.c
> +++ b/lib/intel_iosf.c
> @@ -19,8 +19,8 @@
> /* Private register write, double-word addressing, non-posted */
> #define SB_CRWRDA_NP 0x07
>
> -static int vlv_sideband_rw(uint32_t port, uint8_t opcode, uint32_t addr,
> - uint32_t *val)
> +static int vlv_sideband_rw(void *igt_mmio, uint32_t port, uint8_t opcode,
> + uint32_t addr, uint32_t *val)
> {
> int timeout = 0;
> uint32_t cmd, devfn, be, bar;
> @@ -34,22 +34,23 @@ static int vlv_sideband_rw(uint32_t port, uint8_t opcode, uint32_t addr,
> (port << IOSF_PORT_SHIFT) | (be << IOSF_BYTE_ENABLES_SHIFT) |
> (bar << IOSF_BAR_SHIFT);
>
> - if (intel_register_read(VLV_IOSF_DOORBELL_REQ) & IOSF_SB_BUSY) {
> + if (intel_register_read(igt_mmio, VLV_IOSF_DOORBELL_REQ) &
> + IOSF_SB_BUSY) {
> igt_warn("warning: pcode (%s) mailbox access failed\n", is_read ? "read" : "write");
> return -EAGAIN;
> }
>
> - intel_register_write(VLV_IOSF_ADDR, addr);
> + intel_register_write(igt_mmio, VLV_IOSF_ADDR, addr);
> if (!is_read)
> - intel_register_write(VLV_IOSF_DATA, *val);
> + intel_register_write(igt_mmio, VLV_IOSF_DATA, *val);
>
> - intel_register_write(VLV_IOSF_DOORBELL_REQ, cmd);
> + intel_register_write(igt_mmio, VLV_IOSF_DOORBELL_REQ, cmd);
>
> do {
> usleep(1);
> timeout++;
> - } while (intel_register_read(VLV_IOSF_DOORBELL_REQ) & IOSF_SB_BUSY &&
> - timeout < TIMEOUT_US);
> + } while (intel_register_read(igt_mmio, VLV_IOSF_DOORBELL_REQ) &
> + IOSF_SB_BUSY && timeout < TIMEOUT_US);
>
> if (timeout >= TIMEOUT_US) {
> igt_warn("timeout waiting for pcode %s (%d) to finish\n", is_read ? "read" : "write", addr);
> @@ -57,14 +58,15 @@ static int vlv_sideband_rw(uint32_t port, uint8_t opcode, uint32_t addr,
> }
>
> if (is_read)
> - *val = intel_register_read(VLV_IOSF_DATA);
> - intel_register_write(VLV_IOSF_DATA, 0);
> + *val = intel_register_read(igt_mmio, VLV_IOSF_DATA);
> + intel_register_write(igt_mmio, VLV_IOSF_DATA, 0);
>
> return 0;
> }
>
> /**
> * intel_punit_read:
> + * @igt_mmio maped memory pointer
s/maped/mapped/
Please fix where appropriate in whole commit.
> * @addr: register offset
> * @val: pointer to store the read result
> *
> @@ -73,13 +75,15 @@ static int vlv_sideband_rw(uint32_t port, uint8_t opcode, uint32_t addr,
> * Returns:
> * 0 when the register access succeeded, negative errno code on failure.
> */
> -int intel_punit_read(uint32_t addr, uint32_t *val)
> +int intel_punit_read(void *igt_mmio, uint32_t addr, uint32_t *val)
> {
> - return vlv_sideband_rw(IOSF_PORT_PUNIT, SB_CRRDDA_NP, addr, val);
> + return vlv_sideband_rw(igt_mmio, IOSF_PORT_PUNIT, SB_CRRDDA_NP, addr,
> + val);
> }
>
> /**
> * intel_punit_write:
> + * @igt_mmio maped memory pointer
> * @addr: register offset
> * @val: value to write
> *
> @@ -88,13 +92,15 @@ int intel_punit_read(uint32_t addr, uint32_t *val)
> * Returns:
> * 0 when the register access succeeded, negative errno code on failure.
> */
> -int intel_punit_write(uint32_t addr, uint32_t val)
> +int intel_punit_write(void *igt_mmio, uint32_t addr, uint32_t val)
> {
> - return vlv_sideband_rw(IOSF_PORT_PUNIT, SB_CRWRDA_NP, addr, &val);
> + return vlv_sideband_rw(igt_mmio, IOSF_PORT_PUNIT, SB_CRWRDA_NP, addr,
> + &val);
> }
>
> /**
> * intel_nc_read:
> + * @igt_mmio maped memory pointer
> * @addr: register offset
> * @val: pointer to starge for the read result
> *
> @@ -103,13 +109,14 @@ int intel_punit_write(uint32_t addr, uint32_t val)
> * Returns:
> * 0 when the register access succeeded, negative errno code on failure.
> */
> -int intel_nc_read(uint32_t addr, uint32_t *val)
> +int intel_nc_read(void *igt_mmio, uint32_t addr, uint32_t *val)
> {
> - return vlv_sideband_rw(IOSF_PORT_NC, SB_CRRDDA_NP, addr, val);
> + return vlv_sideband_rw(igt_mmio, IOSF_PORT_NC, SB_CRRDDA_NP, addr, val);
> }
>
> /**
> * intel_nc_write:
> + * @igt_mmio maped memory pointer
> * @addr: register offset
> * @val: value to write
> *
> @@ -118,13 +125,15 @@ int intel_nc_read(uint32_t addr, uint32_t *val)
> * Returns:
> * 0 when the register access succeeded, negative errno code on failure.
> */
> -int intel_nc_write(uint32_t addr, uint32_t val)
> +int intel_nc_write(void *igt_mmio, uint32_t addr, uint32_t val)
> {
> - return vlv_sideband_rw(IOSF_PORT_NC, SB_CRWRDA_NP, addr, &val);
> + return vlv_sideband_rw(igt_mmio, IOSF_PORT_NC, SB_CRWRDA_NP, addr,
> + &val);
> }
>
> /**
> * intel_dpio_reg_read:
> + * @igt_mmio maped memory pointer
> * @reg: register offset
> * @phy: DPIO PHY to use
> *
> @@ -133,57 +142,61 @@ int intel_nc_write(uint32_t addr, uint32_t val)
> * Returns:
> * The value read from the register.
> */
> -uint32_t intel_dpio_reg_read(uint32_t reg, int phy)
> +uint32_t intel_dpio_reg_read(void *igt_mmio, uint32_t reg, int phy)
> {
> uint32_t val;
>
> if (phy == 0)
> - vlv_sideband_rw(IOSF_PORT_DPIO, SB_MRD_NP, reg, &val);
> + vlv_sideband_rw(igt_mmio, IOSF_PORT_DPIO, SB_MRD_NP, reg, &val);
> else
> - vlv_sideband_rw(IOSF_PORT_DPIO_2, SB_MRD_NP, reg, &val);
> + vlv_sideband_rw(igt_mmio, IOSF_PORT_DPIO_2, SB_MRD_NP, reg,
> + &val);
> return val;
> }
>
> /**
> * intel_dpio_reg_write:
> + * @igt_mmio maped memory pointer
> * @reg: register offset
> * @val: value to write
> * @phy: dpio PHY to use
> *
> * 32-bit write of the register at @offset through the DPIO sideband port.
> */
> -void intel_dpio_reg_write(uint32_t reg, uint32_t val, int phy)
> +void intel_dpio_reg_write(void *igt_mmio, uint32_t reg, uint32_t val, int phy)
> {
> if (phy == 0)
> - vlv_sideband_rw(IOSF_PORT_DPIO, SB_MWR_NP, reg, &val);
> + vlv_sideband_rw(igt_mmio, IOSF_PORT_DPIO, SB_MWR_NP, reg, &val);
> else
> - vlv_sideband_rw(IOSF_PORT_DPIO_2, SB_MWR_NP, reg, &val);
> + vlv_sideband_rw(igt_mmio, IOSF_PORT_DPIO_2, SB_MWR_NP, reg,
> + &val);
> }
>
> -uint32_t intel_flisdsi_reg_read(uint32_t reg)
> +uint32_t intel_flisdsi_reg_read(void *igt_mmio, uint32_t reg)
> {
> uint32_t val = 0;
>
> - vlv_sideband_rw(IOSF_PORT_FLISDSI, SB_CRRDDA_NP, reg, &val);
> + vlv_sideband_rw(igt_mmio, IOSF_PORT_FLISDSI, SB_CRRDDA_NP, reg, &val);
>
> return val;
> }
>
> -void intel_flisdsi_reg_write(uint32_t reg, uint32_t val)
> +void intel_flisdsi_reg_write(void *igt_mmio, uint32_t reg, uint32_t val)
> {
> - vlv_sideband_rw(IOSF_PORT_FLISDSI, SB_CRWRDA_NP, reg, &val);
> + vlv_sideband_rw(igt_mmio, IOSF_PORT_FLISDSI, SB_CRWRDA_NP, reg, &val);
> }
>
> -uint32_t intel_iosf_sb_read(uint32_t port, uint32_t reg)
> +uint32_t intel_iosf_sb_read(void *igt_mmio, uint32_t port, uint32_t reg)
> {
> uint32_t val;
>
> - vlv_sideband_rw(port, SB_CRRDDA_NP, reg, &val);
> + vlv_sideband_rw(igt_mmio, port, SB_CRRDDA_NP, reg, &val);
>
> return val;
> }
>
> -void intel_iosf_sb_write(uint32_t port, uint32_t reg, uint32_t val)
> +void intel_iosf_sb_write(void *igt_mmio, uint32_t port, uint32_t reg,
> + uint32_t val)
> {
> - vlv_sideband_rw(port, SB_CRWRDA_NP, reg, &val);
> + vlv_sideband_rw(igt_mmio, port, SB_CRWRDA_NP, reg, &val);
> }
> diff --git a/lib/intel_mmio.c b/lib/intel_mmio.c
> index daca1ad2..24623fc6 100644
> --- a/lib/intel_mmio.c
> +++ b/lib/intel_mmio.c
> @@ -244,6 +244,7 @@ intel_register_access_fini(void)
>
> /**
> * intel_register_read:
> + * @igt_mmio maped memory pointer
> * @reg: register offset
> *
> * 32-bit read of the register at @offset. This function only works when the new
> @@ -256,7 +257,7 @@ intel_register_access_fini(void)
> * The value read from the register.
> */
> uint32_t
> -intel_register_read(uint32_t reg)
> +intel_register_read(void *igt_mmio, uint32_t reg)
> {
> struct intel_register_range *range;
> uint32_t ret;
> @@ -280,13 +281,14 @@ intel_register_read(uint32_t reg)
> }
>
> read_out:
> - ret = *(volatile uint32_t *)((volatile char *)igt_global_mmio + reg);
> + ret = *(volatile uint32_t *)((volatile char *)igt_mmio + reg);
> out:
> return ret;
> }
>
> /**
> * intel_register_write:
> + * @igt_mmio maped memory pointer
> * @reg: register offset
> * @val: value to write
> *
> @@ -297,7 +299,7 @@ out:
> * white lists.
> */
> void
> -intel_register_write(uint32_t reg, uint32_t val)
> +intel_register_write(void *igt_mmio, uint32_t reg, uint32_t val)
> {
> struct intel_register_range *range;
>
> @@ -317,12 +319,13 @@ intel_register_write(uint32_t reg, uint32_t val)
> "Register write blocked for safety ""(*0x%08x = 0x%x)\n", reg, val);
>
> write_out:
> - *(volatile uint32_t *)((volatile char *)igt_global_mmio + reg) = val;
> + *(volatile uint32_t *)((volatile char *)igt_mmio + reg) = val;
> }
>
>
> /**
> * INREG:
> + * @igt_mmio maped memory pointer
> * @reg: register offset
> *
> * 32-bit read of the register at offset @reg. This function only works when the
> @@ -333,13 +336,14 @@ write_out:
> * Returns:
> * The value read from the register.
> */
> -uint32_t INREG(uint32_t reg)
> +uint32_t INREG(void *igt_mmio, uint32_t reg)
> {
> - return *(volatile uint32_t *)((volatile char *)igt_global_mmio + reg);
> + return *(volatile uint32_t *)((volatile char *)igt_mmio + reg);
> }
>
> /**
> * INREG16:
> + * @igt_mmio maped memory pointer
> * @reg: register offset
> *
> * 16-bit read of the register at offset @reg. This function only works when the
> @@ -350,13 +354,14 @@ uint32_t INREG(uint32_t reg)
> * Returns:
> * The value read from the register.
> */
> -uint16_t INREG16(uint32_t reg)
> +uint16_t INREG16(void *igt_mmio, uint32_t reg)
> {
> - return *(volatile uint16_t *)((volatile char *)igt_global_mmio + reg);
> + return *(volatile uint16_t *)((volatile char *)igt_mmio + reg);
> }
>
> /**
> * INREG8:
> + * @igt_mmio maped memory pointer
> * @reg: register offset
> *
> * 8-bit read of the register at offset @reg. This function only works when the
> @@ -367,13 +372,14 @@ uint16_t INREG16(uint32_t reg)
> * Returns:
> * The value read from the register.
> */
> -uint8_t INREG8(uint32_t reg)
> +uint8_t INREG8(void *igt_mmio, uint32_t reg)
> {
> - return *((volatile uint8_t *)igt_global_mmio + reg);
> + return *((volatile uint8_t *)igt_mmio + reg);
> }
>
> /**
> * OUTREG:
> + * @igt_mmio maped memory pointer
> * @reg: register offset
> * @val: value to write
> *
> @@ -383,9 +389,9 @@ uint8_t INREG8(uint32_t reg)
> *
> * This function directly accesses the #igt_global_mmio without safety checks.
> */
> -void OUTREG(uint32_t reg, uint32_t val)
> +void OUTREG(void *igt_mmio, uint32_t reg, uint32_t val)
> {
> - *(volatile uint32_t *)((volatile char *)igt_global_mmio + reg) = val;
> + *(volatile uint32_t *)((volatile char *)igt_mmio + reg) = val;
> }
>
> /**
> @@ -399,13 +405,14 @@ void OUTREG(uint32_t reg, uint32_t val)
> *
> * This function directly accesses the #igt_global_mmio without safety checks.
> */
> -void OUTREG16(uint32_t reg, uint16_t val)
> +void OUTREG16(void *igt_mmio, uint32_t reg, uint16_t val)
> {
> - *(volatile uint16_t *)((volatile char *)igt_global_mmio + reg) = val;
> + *(volatile uint16_t *)((volatile char *)igt_mmio + reg) = val;
> }
>
> /**
> * OUTREG8:
> + * @igt_mmio maped memory pointer
> * @reg: register offset
> * @val: value to write
> *
> @@ -415,7 +422,7 @@ void OUTREG16(uint32_t reg, uint16_t val)
> *
> * This function directly accesses the #igt_global_mmio without safety checks.
> */
> -void OUTREG8(uint32_t reg, uint8_t val)
> +void OUTREG8(void *igt_mmio, uint32_t reg, uint8_t val)
> {
> - *((volatile uint8_t *)igt_global_mmio + reg) = val;
> + *((volatile uint8_t *)igt_mmio + reg) = val;
> }
> diff --git a/tests/i915/gem_exec_parse.c b/tests/i915/gem_exec_parse.c
> index 62e8d0a5..423d6ea6 100644
> --- a/tests/i915/gem_exec_parse.c
> +++ b/tests/i915/gem_exec_parse.c
> @@ -284,9 +284,9 @@ test_lri(int fd, uint32_t handle, struct test_lri *test)
> test->name, test->reg, test->test_val,
> expected_errno, expect);
>
> - intel_register_write(test->reg, test->init_val);
> + intel_register_write(igt_global_mmio, test->reg, test->init_val);
>
> - igt_assert_eq_u32((intel_register_read(test->reg) &
> + igt_assert_eq_u32((intel_register_read(igt_global_mmio, test->reg) &
> test->read_mask),
> test->init_val);
>
> @@ -296,7 +296,7 @@ test_lri(int fd, uint32_t handle, struct test_lri *test)
> expected_errno);
> gem_sync(fd, handle);
>
> - igt_assert_eq_u32((intel_register_read(test->reg) &
> + igt_assert_eq_u32((intel_register_read(igt_global_mmio, test->reg) &
> test->read_mask),
> expect);
> }
> diff --git a/tests/i915/i915_pm_lpsp.c b/tests/i915/i915_pm_lpsp.c
> index b319dbe9..f69c88f6 100644
> --- a/tests/i915/i915_pm_lpsp.c
> +++ b/tests/i915/i915_pm_lpsp.c
> @@ -40,7 +40,7 @@ static bool lpsp_is_enabled(int drm_fd)
> {
> uint32_t val;
>
> - val = INREG(HSW_PWR_WELL_CTL2);
> + val = INREG(igt_global_mmio, HSW_PWR_WELL_CTL2);
> return !(val & HSW_PWR_WELL_STATE_ENABLED);
> }
>
> diff --git a/tools/intel_audio_dump.c b/tools/intel_audio_dump.c
> index d952e54b..86664478 100644
> --- a/tools/intel_audio_dump.c
> +++ b/tools/intel_audio_dump.c
> @@ -67,23 +67,23 @@ static int disp_reg_base = 0; /* base address of display registers */
>
> #define dump_reg(reg, desc) \
> do { \
> - dword = INREG(reg); \
> + dword = INREG(igt_global_mmio, reg); \
> printf("%-21s(%#x) 0x%08x %s\n", # reg, reg, dword, desc); \
> } while (0)
>
> #define dump_disp_reg(reg, desc) \
> do { \
> - dword = INREG(disp_reg_base + reg); \
> + dword = INREG(igt_global_mmio, disp_reg_base + reg); \
> printf("%-21s(%#x) 0x%08x %s\n", # reg, reg, dword, desc); \
> } while (0)
>
> #define dump_aud_reg(reg, desc) \
> do { \
> - dword = INREG(aud_reg_base + reg); \
> + dword = INREG(igt_global_mmio, aud_reg_base + reg); \
> printf("%-21s(%#x) 0x%08x %s\n", # reg, reg, dword, desc); \
> } while (0)
>
> -#define read_aud_reg(reg) INREG(aud_reg_base + (reg))
> +#define read_aud_reg(reg) INREG(igt_global_mmio, aud_reg_base + (reg))
>
> static int get_num_pipes(void)
> {
> @@ -532,31 +532,31 @@ static void dump_eaglelake(void)
>
> printf("\nDetails:\n\n");
>
> - dword = INREG(AUD_VID_DID);
> + dword = INREG(igt_global_mmio, AUD_VID_DID);
> printf("AUD_VID_DID vendor id\t\t\t0x%x\n", dword >> 16);
> printf("AUD_VID_DID device id\t\t\t0x%x\n", dword & 0xffff);
>
> - dword = INREG(AUD_RID);
> + dword = INREG(igt_global_mmio, AUD_RID);
> printf("AUD_RID major revision\t\t\t0x%lx\n", BITS(dword, 23, 20));
> printf("AUD_RID minor revision\t\t\t0x%lx\n", BITS(dword, 19, 16));
> printf("AUD_RID revision id\t\t\t0x%lx\n", BITS(dword, 15, 8));
> printf("AUD_RID stepping id\t\t\t0x%lx\n", BITS(dword, 7, 0));
>
> - dword = INREG(SDVOB);
> + dword = INREG(igt_global_mmio, SDVOB);
> printf("SDVOB enable\t\t\t\t%u\n", !!(dword & SDVO_ENABLE));
> printf("SDVOB HDMI encoding\t\t\t%u\n", !!(dword & SDVO_ENCODING_HDMI));
> printf("SDVOB SDVO encoding\t\t\t%u\n", !!(dword & SDVO_ENCODING_SDVO));
> printf("SDVOB null packets\t\t\t%u\n", !!(dword & SDVO_NULL_PACKETS_DURING_VSYNC));
> printf("SDVOB audio enabled\t\t\t%u\n", !!(dword & SDVO_AUDIO_ENABLE));
>
> - dword = INREG(SDVOC);
> + dword = INREG(igt_global_mmio, SDVOC);
> printf("SDVOC enable\t\t\t\t%u\n", !!(dword & SDVO_ENABLE));
> printf("SDVOC HDMI encoding\t\t\t%u\n", !!(dword & SDVO_ENCODING_HDMI));
> printf("SDVOC SDVO encoding\t\t\t%u\n", !!(dword & SDVO_ENCODING_SDVO));
> printf("SDVOC null packets\t\t\t%u\n", !!(dword & SDVO_NULL_PACKETS_DURING_VSYNC));
> printf("SDVOC audio enabled\t\t\t%u\n", !!(dword & SDVO_AUDIO_ENABLE));
>
> - dword = INREG(PORT_HOTPLUG_EN);
> + dword = INREG(igt_global_mmio, PORT_HOTPLUG_EN);
> printf("PORT_HOTPLUG_EN DisplayPort/HDMI port B\t%ld\n", BIT(dword, 29)),
> printf("PORT_HOTPLUG_EN DisplayPort/HDMI port C\t%ld\n", BIT(dword, 28)),
> printf("PORT_HOTPLUG_EN DisplayPort port D\t%ld\n", BIT(dword, 27)),
> @@ -566,7 +566,7 @@ static void dump_eaglelake(void)
> printf("PORT_HOTPLUG_EN TV\t\t\t%ld\n", BIT(dword, 23)),
> printf("PORT_HOTPLUG_EN CRT\t\t\t%ld\n", BIT(dword, 9)),
>
> - dword = INREG(VIDEO_DIP_CTL);
> + dword = INREG(igt_global_mmio, VIDEO_DIP_CTL);
> printf("VIDEO_DIP_CTL enable graphics DIP\t%ld\n", BIT(dword, 31)),
> printf("VIDEO_DIP_CTL port select\t\t[0x%lx] %s\n",
> BITS(dword, 30, 29), dip_port[BITS(dword, 30, 29)]);
> @@ -581,46 +581,46 @@ static void dump_eaglelake(void)
> printf("VIDEO_DIP_CTL DIP buffer size\t\t%lu\n", BITS(dword, 11, 8));
> printf("VIDEO_DIP_CTL DIP address\t\t%lu\n", BITS(dword, 3, 0));
>
> - dword = INREG(AUD_CONFIG);
> + dword = INREG(igt_global_mmio, AUD_CONFIG);
> printf("AUD_CONFIG pixel clock\t\t\t[0x%lx] %s\n", BITS(dword, 19, 16),
> OPNAME(pixel_clock, BITS(dword, 19, 16)));
> printf("AUD_CONFIG fabrication enabled\t\t%lu\n", BITS(dword, 2, 2));
> printf("AUD_CONFIG professional use allowed\t%lu\n", BIT(dword, 1));
> printf("AUD_CONFIG fuse enabled\t\t\t%lu\n", BIT(dword, 0));
>
> - dword = INREG(AUD_DEBUG);
> + dword = INREG(igt_global_mmio, AUD_DEBUG);
> printf("AUD_DEBUG function reset\t\t%lu\n", BIT(dword, 0));
>
> - dword = INREG(AUD_SUBN_CNT);
> + dword = INREG(igt_global_mmio, AUD_SUBN_CNT);
> printf("AUD_SUBN_CNT starting node number\t0x%lx\n", BITS(dword, 23, 16));
> printf("AUD_SUBN_CNT total number of nodes\t0x%lx\n", BITS(dword, 7, 0));
>
> - dword = INREG(AUD_SUBN_CNT2);
> + dword = INREG(igt_global_mmio, AUD_SUBN_CNT2);
> printf("AUD_SUBN_CNT2 starting node number\t0x%lx\n", BITS(dword, 24, 16));
> printf("AUD_SUBN_CNT2 total number of nodes\t0x%lx\n", BITS(dword, 7, 0));
>
> - dword = INREG(AUD_FUNC_GRP);
> + dword = INREG(igt_global_mmio, AUD_FUNC_GRP);
> printf("AUD_FUNC_GRP unsol capable\t\t%lu\n", BIT(dword, 8));
> printf("AUD_FUNC_GRP node type\t\t\t0x%lx\n", BITS(dword, 7, 0));
>
> - dword = INREG(AUD_GRP_CAP);
> + dword = INREG(igt_global_mmio, AUD_GRP_CAP);
> printf("AUD_GRP_CAP beep 0\t\t\t%lu\n", BIT(dword, 16));
> printf("AUD_GRP_CAP input delay\t\t\t%lu\n", BITS(dword, 11, 8));
> printf("AUD_GRP_CAP output delay\t\t%lu\n", BITS(dword, 3, 0));
>
> - dword = INREG(AUD_PWRST);
> + dword = INREG(igt_global_mmio, AUD_PWRST);
> printf("AUD_PWRST device power state\t\t%s\n",
> power_state[BITS(dword, 5, 4)]);
> printf("AUD_PWRST device power state setting\t%s\n",
> power_state[BITS(dword, 1, 0)]);
>
> - dword = INREG(AUD_SUPPWR);
> + dword = INREG(igt_global_mmio, AUD_SUPPWR);
> printf("AUD_SUPPWR support D0\t\t\t%lu\n", BIT(dword, 0));
> printf("AUD_SUPPWR support D1\t\t\t%lu\n", BIT(dword, 1));
> printf("AUD_SUPPWR support D2\t\t\t%lu\n", BIT(dword, 2));
> printf("AUD_SUPPWR support D3\t\t\t%lu\n", BIT(dword, 3));
>
> - dword = INREG(AUD_OUT_CWCAP);
> + dword = INREG(igt_global_mmio, AUD_OUT_CWCAP);
> printf("AUD_OUT_CWCAP widget type\t\t0x%lx\n", BITS(dword, 23, 20));
> printf("AUD_OUT_CWCAP sample delay\t\t0x%lx\n", BITS(dword, 19, 16));
> printf("AUD_OUT_CWCAP channel count\t\t%lu\n",
> @@ -636,7 +636,7 @@ static void dump_eaglelake(void)
> printf("AUD_OUT_CWCAP out amp present\t\t%lu\n", BIT(dword, 2));
> printf("AUD_OUT_CWCAP in amp present\t\t%lu\n", BIT(dword, 1));
>
> - dword = INREG(AUD_OUT_DIG_CNVT);
> + dword = INREG(igt_global_mmio, AUD_OUT_DIG_CNVT);
> printf("AUD_OUT_DIG_CNVT SPDIF category\t\t0x%lx\n", BITS(dword, 14, 8));
> printf("AUD_OUT_DIG_CNVT SPDIF level\t\t%lu\n", BIT(dword, 7));
> printf("AUD_OUT_DIG_CNVT professional\t\t%lu\n", BIT(dword, 6));
> @@ -647,16 +647,16 @@ static void dump_eaglelake(void)
> printf("AUD_OUT_DIG_CNVT validity flag\t\t%lu\n", BIT(dword, 1));
> printf("AUD_OUT_DIG_CNVT digital enable\t\t%lu\n", BIT(dword, 0));
>
> - dword = INREG(AUD_OUT_CH_STR);
> + dword = INREG(igt_global_mmio, AUD_OUT_CH_STR);
> printf("AUD_OUT_CH_STR stream id\t\t0x%lx\n", BITS(dword, 7, 4));
> printf("AUD_OUT_CH_STR lowest channel\t\t%lu\n", BITS(dword, 3, 0));
>
> - dword = INREG(AUD_OUT_STR_DESC);
> + dword = INREG(igt_global_mmio, AUD_OUT_STR_DESC);
> printf("AUD_OUT_STR_DESC stream channels\t%lu\n", BITS(dword, 3, 0) + 1);
> printf("AUD_OUT_STR_DESC Bits per Sample\t[%#lx] %s\n",
> BITS(dword, 6, 4), OPNAME(bits_per_sample, BITS(dword, 6, 4)));
>
> - dword = INREG(AUD_PINW_CAP);
> + dword = INREG(igt_global_mmio, AUD_PINW_CAP);
> printf("AUD_PINW_CAP widget type\t\t0x%lx\n", BITS(dword, 23, 20));
> printf("AUD_PINW_CAP sample delay\t\t0x%lx\n", BITS(dword, 19, 16));
> printf("AUD_PINW_CAP channel count\t\t%lu\n",
> @@ -674,13 +674,13 @@ static void dump_eaglelake(void)
> printf("AUD_PINW_CAP in amp present\t\t%lu\n", BIT(dword, 1));
>
>
> - dword = INREG(AUD_PIN_CAP);
> + dword = INREG(igt_global_mmio, AUD_PIN_CAP);
> printf("AUD_PIN_CAP EAPD\t\t\t%lu\n", BIT(dword, 16));
> printf("AUD_PIN_CAP HDMI\t\t\t%lu\n", BIT(dword, 7));
> printf("AUD_PIN_CAP output\t\t\t%lu\n", BIT(dword, 4));
> printf("AUD_PIN_CAP presence detect\t\t%lu\n", BIT(dword, 2));
>
> - dword = INREG(AUD_PINW_CNTR);
> + dword = INREG(igt_global_mmio, AUD_PINW_CNTR);
> printf("AUD_PINW_CNTR mute status\t\t%lu\n", BIT(dword, 8));
> printf("AUD_PINW_CNTR out enable\t\t%lu\n", BIT(dword, 6));
> printf("AUD_PINW_CNTR amp mute status\t\t%lu\n", BIT(dword, 8));
> @@ -689,10 +689,10 @@ static void dump_eaglelake(void)
> BITS(dword, 2, 0),
> OPNAME(stream_type, BITS(dword, 2, 0)));
>
> - dword = INREG(AUD_PINW_UNSOLRESP);
> + dword = INREG(igt_global_mmio, AUD_PINW_UNSOLRESP);
> printf("AUD_PINW_UNSOLRESP enable unsol resp\t%lu\n", BIT(dword, 31));
>
> - dword = INREG(AUD_CNTL_ST);
> + dword = INREG(igt_global_mmio, AUD_CNTL_ST);
> printf("AUD_CNTL_ST DIP audio enabled\t\t%lu\n", BIT(dword, 21));
> printf("AUD_CNTL_ST DIP ACP enabled\t\t%lu\n", BIT(dword, 22));
> printf("AUD_CNTL_ST DIP ISRCx enabled\t\t%lu\n", BIT(dword, 23));
> @@ -709,38 +709,39 @@ static void dump_eaglelake(void)
> printf("AUD_CNTL_ST ELD bufsize\t\t\t%lu\n", BITS(dword, 13, 9));
> printf("AUD_CNTL_ST ELD address\t\t\t%lu\n", BITS(dword, 8, 5));
>
> - dword = INREG(AUD_HDMIW_STATUS);
> + dword = INREG(igt_global_mmio, AUD_HDMIW_STATUS);
> printf("AUD_HDMIW_STATUS CDCLK/DOTCLK underrun\t%lu\n", BIT(dword, 31));
> printf("AUD_HDMIW_STATUS CDCLK/DOTCLK overrun\t%lu\n", BIT(dword, 30));
> printf("AUD_HDMIW_STATUS BCLK/CDCLK underrun\t%lu\n", BIT(dword, 29));
> printf("AUD_HDMIW_STATUS BCLK/CDCLK overrun\t%lu\n", BIT(dword, 28));
>
> - dword = INREG(AUD_CONV_CHCNT);
> + dword = INREG(igt_global_mmio, AUD_CONV_CHCNT);
> printf("AUD_CONV_CHCNT HDMI HBR enabled\t\t%lu\n", BITS(dword, 15, 14));
> printf("AUD_CONV_CHCNT HDMI channel count\t%lu\n", BITS(dword, 11, 8) + 1);
>
> printf("AUD_CONV_CHCNT HDMI channel mapping:\n");
> for (i = 0; i < 8; i++) {
> - OUTREG(AUD_CONV_CHCNT, i);
> - dword = INREG(AUD_CONV_CHCNT);
> + OUTREG(igt_global_mmio, AUD_CONV_CHCNT, i);
> + dword = INREG(igt_global_mmio, AUD_CONV_CHCNT);
> printf("\t\t\t\t\t[0x%x] %u => %lu\n", dword, i, BITS(dword, 7, 4));
> }
>
> printf("AUD_HDMIW_HDMIEDID HDMI ELD:\n\t");
> - dword = INREG(AUD_CNTL_ST);
> + dword = INREG(igt_global_mmio, AUD_CNTL_ST);
> dword &= ~BITMASK(8, 5);
> - OUTREG(AUD_CNTL_ST, dword);
> + OUTREG(igt_global_mmio, AUD_CNTL_ST, dword);
> for (i = 0; i < BITS(dword, 14, 10) / 4; i++)
> - printf("%08x ", htonl(INREG(AUD_HDMIW_HDMIEDID)));
> + printf("%08x ", htonl(INREG(igt_global_mmio, AUD_HDMIW_HDMIEDID)));
> printf("\n");
>
> printf("AUD_HDMIW_INFOFR HDMI audio Infoframe:\n\t");
> - dword = INREG(AUD_CNTL_ST);
> + dword = INREG(igt_global_mmio, AUD_CNTL_ST);
> dword &= ~BITMASK(20, 18);
> dword &= ~BITMASK(3, 0);
> - OUTREG(AUD_CNTL_ST, dword);
> + OUTREG(igt_global_mmio, AUD_CNTL_ST, dword);
> for (i = 0; i < 8; i++)
> - printf("%08x ", htonl(INREG(AUD_HDMIW_INFOFR)));
> + printf("%08x ", htonl(INREG(igt_global_mmio,
> + AUD_HDMIW_INFOFR)));
> printf("\n");
> }
>
> @@ -863,7 +864,7 @@ static void dump_cpt(void)
>
> printf("\nDetails:\n\n");
>
> - dword = INREG(VIDEO_DIP_CTL_A);
> + dword = INREG(igt_global_mmio, VIDEO_DIP_CTL_A);
> printf("VIDEO_DIP_CTL_A Enable_Graphics_DIP\t\t\t%ld\n", BIT(dword, 31)),
> printf("VIDEO_DIP_CTL_A GCP_DIP_enable\t\t\t\t%ld\n", BIT(dword, 25)),
> printf("VIDEO_DIP_CTL_A Video_DIP_type_enable AVI\t\t%lu\n", BIT(dword, 21));
> @@ -877,7 +878,7 @@ static void dump_cpt(void)
> printf("VIDEO_DIP_CTL_A Video_DIP_buffer_size\t\t\t%lu\n", BITS(dword, 11, 8));
> printf("VIDEO_DIP_CTL_A Video_DIP_access_address\t\t%lu\n", BITS(dword, 3, 0));
>
> - dword = INREG(VIDEO_DIP_CTL_B);
> + dword = INREG(igt_global_mmio, VIDEO_DIP_CTL_B);
> printf("VIDEO_DIP_CTL_B Enable_Graphics_DIP\t\t\t%ld\n", BIT(dword, 31)),
> printf("VIDEO_DIP_CTL_B GCP_DIP_enable\t\t\t\t%ld\n", BIT(dword, 25)),
> printf("VIDEO_DIP_CTL_B Video_DIP_type_enable AVI\t\t%lu\n", BIT(dword, 21));
> @@ -891,7 +892,7 @@ static void dump_cpt(void)
> printf("VIDEO_DIP_CTL_B Video_DIP_buffer_size\t\t\t%lu\n", BITS(dword, 11, 8));
> printf("VIDEO_DIP_CTL_B Video_DIP_access_address\t\t%lu\n", BITS(dword, 3, 0));
>
> - dword = INREG(VIDEO_DIP_CTL_C);
> + dword = INREG(igt_global_mmio, VIDEO_DIP_CTL_C);
> printf("VIDEO_DIP_CTL_C Enable_Graphics_DIP\t\t\t%ld\n", BIT(dword, 31)),
> printf("VIDEO_DIP_CTL_C GCP_DIP_enable\t\t\t\t%ld\n", BIT(dword, 25)),
> printf("VIDEO_DIP_CTL_C Video_DIP_type_enable AVI\t\t%lu\n", BIT(dword, 21));
> @@ -905,17 +906,17 @@ static void dump_cpt(void)
> printf("VIDEO_DIP_CTL_C Video_DIP_buffer_size\t\t\t%lu\n", BITS(dword, 11, 8));
> printf("VIDEO_DIP_CTL_C Video_DIP_access_address\t\t%lu\n", BITS(dword, 3, 0));
>
> - dword = INREG(AUD_VID_DID);
> + dword = INREG(igt_global_mmio, AUD_VID_DID);
> printf("AUD_VID_DID vendor id\t\t\t\t\t0x%x\n", dword >> 16);
> printf("AUD_VID_DID device id\t\t\t\t\t0x%x\n", dword & 0xffff);
>
> - dword = INREG(AUD_RID);
> + dword = INREG(igt_global_mmio, AUD_RID);
> printf("AUD_RID Major_Revision\t\t\t\t\t0x%lx\n", BITS(dword, 23, 20));
> printf("AUD_RID Minor_Revision\t\t\t\t\t0x%lx\n", BITS(dword, 19, 16));
> printf("AUD_RID Revision_Id\t\t\t\t\t0x%lx\n", BITS(dword, 15, 8));
> printf("AUD_RID Stepping_Id\t\t\t\t\t0x%lx\n", BITS(dword, 7, 0));
>
> - dword = INREG(HDMIB);
> + dword = INREG(igt_global_mmio, HDMIB);
> printf("HDMIB Port_Enable\t\t\t\t\t%u\n", !!(dword & SDVO_ENABLE));
> printf("HDMIB Transcoder_Select\t\t\t\t\t[0x%lx] %s\n",
> BITS(dword, 30, 29), transcoder_select[BITS(dword, 30, 29)]);
> @@ -928,7 +929,7 @@ static void dump_cpt(void)
> printf("HDMIB HDMI_or_DVI_Select\t\t\t\t%s\n", BIT(dword, 9) ? "HDMI" : "DVI");
> printf("HDMIB Audio_Output_Enable\t\t\t\t%u\n", !!(dword & SDVO_AUDIO_ENABLE));
>
> - dword = INREG(HDMIC);
> + dword = INREG(igt_global_mmio, HDMIC);
> printf("HDMIC Port_Enable\t\t\t\t\t%u\n", !!(dword & SDVO_ENABLE));
> printf("HDMIC Transcoder_Select\t\t\t\t\t[0x%lx] %s\n",
> BITS(dword, 30, 29), transcoder_select[BITS(dword, 30, 29)]);
> @@ -941,7 +942,7 @@ static void dump_cpt(void)
> printf("HDMIC HDMI_or_DVI_Select\t\t\t\t%s\n", BIT(dword, 9) ? "HDMI" : "DVI");
> printf("HDMIC Audio_Output_Enable\t\t\t\t%u\n", !!(dword & SDVO_AUDIO_ENABLE));
>
> - dword = INREG(HDMID);
> + dword = INREG(igt_global_mmio, HDMID);
> printf("HDMID Port_Enable\t\t\t\t\t%u\n", !!(dword & SDVO_ENABLE));
> printf("HDMID Transcoder_Select\t\t\t\t\t[0x%lx] %s\n",
> BITS(dword, 30, 29), transcoder_select[BITS(dword, 30, 29)]);
> @@ -954,7 +955,7 @@ static void dump_cpt(void)
> printf("HDMID HDMI_or_DVI_Select\t\t\t\t%s\n", BIT(dword, 9) ? "HDMI" : "DVI");
> printf("HDMID Audio_Output_Enable\t\t\t\t%u\n", !!(dword & SDVO_AUDIO_ENABLE));
>
> - dword = INREG(DP_CTL_B);
> + dword = INREG(igt_global_mmio, DP_CTL_B);
> printf("DP_CTL_B DisplayPort_Enable\t\t\t\t%lu\n", BIT(dword, 31));
> printf("DP_CTL_B Port_Width_Selection\t\t\t\t[0x%lx] %s\n",
> BITS(dword, 21, 19), dp_port_width[BITS(dword, 21, 19)]);
> @@ -962,7 +963,7 @@ static void dump_cpt(void)
> printf("DP_CTL_B HDCP_Port_Select\t\t\t\t%lu\n", BIT(dword, 5));
> printf("DP_CTL_B Audio_Output_Enable\t\t\t\t%lu\n", BIT(dword, 6));
>
> - dword = INREG(DP_CTL_C);
> + dword = INREG(igt_global_mmio, DP_CTL_C);
> printf("DP_CTL_C DisplayPort_Enable\t\t\t\t%lu\n", BIT(dword, 31));
> printf("DP_CTL_C Port_Width_Selection\t\t\t\t[0x%lx] %s\n",
> BITS(dword, 21, 19), dp_port_width[BITS(dword, 21, 19)]);
> @@ -970,7 +971,7 @@ static void dump_cpt(void)
> printf("DP_CTL_C HDCP_Port_Select\t\t\t\t%lu\n", BIT(dword, 5));
> printf("DP_CTL_C Audio_Output_Enable\t\t\t\t%lu\n", BIT(dword, 6));
>
> - dword = INREG(DP_CTL_D);
> + dword = INREG(igt_global_mmio, DP_CTL_D);
> printf("DP_CTL_D DisplayPort_Enable\t\t\t\t%lu\n", BIT(dword, 31));
> printf("DP_CTL_D Port_Width_Selection\t\t\t\t[0x%lx] %s\n",
> BITS(dword, 21, 19), dp_port_width[BITS(dword, 21, 19)]);
> @@ -978,7 +979,7 @@ static void dump_cpt(void)
> printf("DP_CTL_D HDCP_Port_Select\t\t\t\t%lu\n", BIT(dword, 5));
> printf("DP_CTL_D Audio_Output_Enable\t\t\t\t%lu\n", BIT(dword, 6));
>
> - dword = INREG(AUD_CONFIG_A);
> + dword = INREG(igt_global_mmio, AUD_CONFIG_A);
> printf("AUD_CONFIG_A N_index_value\t\t\t\t[0x%lx] %s\n", BIT(dword, 29),
> n_index_value[BIT(dword, 29)]);
> printf("AUD_CONFIG_A N_programming_enable\t\t\t%lu\n", BIT(dword, 28));
> @@ -987,7 +988,7 @@ static void dump_cpt(void)
> printf("AUD_CONFIG_A Pixel_Clock_HDMI\t\t\t\t[0x%lx] %s\n", BITS(dword, 19, 16),
> OPNAME(pixel_clock, BITS(dword, 19, 16)));
> printf("AUD_CONFIG_A Disable_NCTS\t\t\t\t%lu\n", BIT(dword, 3));
> - dword = INREG(AUD_CONFIG_B);
> + dword = INREG(igt_global_mmio, AUD_CONFIG_B);
> printf("AUD_CONFIG_B N_index_value\t\t\t\t[0x%lx] %s\n", BIT(dword, 29),
> n_index_value[BIT(dword, 29)]);
> printf("AUD_CONFIG_B N_programming_enable\t\t\t%lu\n", BIT(dword, 28));
> @@ -996,7 +997,7 @@ static void dump_cpt(void)
> printf("AUD_CONFIG_B Pixel_Clock_HDMI\t\t\t\t[0x%lx] %s\n", BITS(dword, 19, 16),
> OPNAME(pixel_clock, BITS(dword, 19, 16)));
> printf("AUD_CONFIG_B Disable_NCTS\t\t\t\t%lu\n", BIT(dword, 3));
> - dword = INREG(AUD_CONFIG_C);
> + dword = INREG(igt_global_mmio, AUD_CONFIG_C);
> printf("AUD_CONFIG_C N_index_value\t\t\t\t[0x%lx] %s\n", BIT(dword, 29),
> n_index_value[BIT(dword, 29)]);
> printf("AUD_CONFIG_C N_programming_enable\t\t\t%lu\n", BIT(dword, 28));
> @@ -1006,36 +1007,36 @@ static void dump_cpt(void)
> OPNAME(pixel_clock, BITS(dword, 19, 16)));
> printf("AUD_CONFIG_C Disable_NCTS\t\t\t\t%lu\n", BIT(dword, 3));
>
> - dword = INREG(AUD_CTS_ENABLE_A);
> + dword = INREG(igt_global_mmio, AUD_CTS_ENABLE_A);
> printf("AUD_CTS_ENABLE_A Enable_CTS_or_M_programming\t\t%lu\n", BIT(dword, 20));
> printf("AUD_CTS_ENABLE_A CTS_M value Index\t\t\t%s\n", BIT(dword, 21) ? "CTS" : "M");
> printf("AUD_CTS_ENABLE_A CTS_programming\t\t\t%#lx\n", BITS(dword, 19, 0));
> - dword = INREG(AUD_CTS_ENABLE_B);
> + dword = INREG(igt_global_mmio, AUD_CTS_ENABLE_B);
> printf("AUD_CTS_ENABLE_B Enable_CTS_or_M_programming\t\t%lu\n", BIT(dword, 20));
> printf("AUD_CTS_ENABLE_B CTS_M value Index\t\t\t%s\n", BIT(dword, 21) ? "CTS" : "M");
> printf("AUD_CTS_ENABLE_B CTS_programming\t\t\t%#lx\n", BITS(dword, 19, 0));
> - dword = INREG(AUD_CTS_ENABLE_C);
> + dword = INREG(igt_global_mmio, AUD_CTS_ENABLE_C);
> printf("AUD_CTS_ENABLE_C Enable_CTS_or_M_programming\t\t%lu\n", BIT(dword, 20));
> printf("AUD_CTS_ENABLE_C CTS_M value Index\t\t\t%s\n", BIT(dword, 21) ? "CTS" : "M");
> printf("AUD_CTS_ENABLE_C CTS_programming\t\t\t%#lx\n", BITS(dword, 19, 0));
>
> - dword = INREG(AUD_MISC_CTRL_A);
> + dword = INREG(igt_global_mmio, AUD_MISC_CTRL_A);
> printf("AUD_MISC_CTRL_A Sample_Fabrication_EN_bit\t\t%lu\n", BIT(dword, 2));
> printf("AUD_MISC_CTRL_A Sample_present_Disable\t\t\t%lu\n", BIT(dword, 8));
> printf("AUD_MISC_CTRL_A Output_Delay\t\t\t\t%lu\n", BITS(dword, 7, 4));
> printf("AUD_MISC_CTRL_A Pro_Allowed\t\t\t\t%lu\n", BIT(dword, 1));
> - dword = INREG(AUD_MISC_CTRL_B);
> + dword = INREG(igt_global_mmio, AUD_MISC_CTRL_B);
> printf("AUD_MISC_CTRL_B Sample_Fabrication_EN_bit\t\t%lu\n", BIT(dword, 2));
> printf("AUD_MISC_CTRL_B Sample_present_Disable\t\t\t%lu\n", BIT(dword, 8));
> printf("AUD_MISC_CTRL_B Output_Delay\t\t\t\t%lu\n", BITS(dword, 7, 4));
> printf("AUD_MISC_CTRL_B Pro_Allowed\t\t\t\t%lu\n", BIT(dword, 1));
> - dword = INREG(AUD_MISC_CTRL_C);
> + dword = INREG(igt_global_mmio, AUD_MISC_CTRL_C);
> printf("AUD_MISC_CTRL_C Sample_Fabrication_EN_bit\t\t%lu\n", BIT(dword, 2));
> printf("AUD_MISC_CTRL_C Sample_present_Disable\t\t\t%lu\n", BIT(dword, 8));
> printf("AUD_MISC_CTRL_C Output_Delay\t\t\t\t%lu\n", BITS(dword, 7, 4));
> printf("AUD_MISC_CTRL_C Pro_Allowed\t\t\t\t%lu\n", BIT(dword, 1));
>
> - dword = INREG(AUD_PWRST);
> + dword = INREG(igt_global_mmio, AUD_PWRST);
> printf("AUD_PWRST Func_Grp_Dev_PwrSt_Curr \t%s\n", power_state[BITS(dword, 27, 26)]);
> printf("AUD_PWRST Func_Grp_Dev_PwrSt_Set \t%s\n", power_state[BITS(dword, 25, 24)]);
> printf("AUD_PWRST ConvertorA_Widget_Power_State_Current \t%s\n", power_state[BITS(dword, 15, 14)]);
> @@ -1051,7 +1052,7 @@ static void dump_cpt(void)
> printf("AUD_PWRST PinD_Widget_Power_State_Current \t%s\n", power_state[BITS(dword, 11, 10)]);
> printf("AUD_PWRST PinD_Widget_Power_State_Set \t%s\n", power_state[BITS(dword, 9, 8)]);
>
> - dword = INREG(AUD_PORT_EN_HD_CFG);
> + dword = INREG(igt_global_mmio, AUD_PORT_EN_HD_CFG);
> printf("AUD_PORT_EN_HD_CFG Convertor_A_Digen\t\t\t%lu\n", BIT(dword, 0));
> printf("AUD_PORT_EN_HD_CFG Convertor_B_Digen\t\t\t%lu\n", BIT(dword, 1));
> printf("AUD_PORT_EN_HD_CFG Convertor_C_Digen\t\t\t%lu\n", BIT(dword, 2));
> @@ -1065,7 +1066,7 @@ static void dump_cpt(void)
> printf("AUD_PORT_EN_HD_CFG Port_C_Amp_Mute_Status\t\t%lu\n", BIT(dword, 21));
> printf("AUD_PORT_EN_HD_CFG Port_D_Amp_Mute_Status\t\t%lu\n", BIT(dword, 22));
>
> - dword = INREG(AUD_OUT_DIG_CNVT_A);
> + dword = INREG(igt_global_mmio, AUD_OUT_DIG_CNVT_A);
> printf("AUD_OUT_DIG_CNVT_A V\t\t\t\t\t%lu\n", BIT(dword, 1));
> printf("AUD_OUT_DIG_CNVT_A VCFG\t\t\t\t%lu\n", BIT(dword, 2));
> printf("AUD_OUT_DIG_CNVT_A PRE\t\t\t\t\t%lu\n", BIT(dword, 3));
> @@ -1077,7 +1078,7 @@ static void dump_cpt(void)
> printf("AUD_OUT_DIG_CNVT_A Lowest_Channel_Number\t\t%lu\n", BITS(dword, 19, 16));
> printf("AUD_OUT_DIG_CNVT_A Stream_ID\t\t\t\t%lu\n", BITS(dword, 23, 20));
>
> - dword = INREG(AUD_OUT_DIG_CNVT_B);
> + dword = INREG(igt_global_mmio, AUD_OUT_DIG_CNVT_B);
> printf("AUD_OUT_DIG_CNVT_B V\t\t\t\t\t%lu\n", BIT(dword, 1));
> printf("AUD_OUT_DIG_CNVT_B VCFG\t\t\t\t%lu\n", BIT(dword, 2));
> printf("AUD_OUT_DIG_CNVT_B PRE\t\t\t\t\t%lu\n", BIT(dword, 3));
> @@ -1089,7 +1090,7 @@ static void dump_cpt(void)
> printf("AUD_OUT_DIG_CNVT_B Lowest_Channel_Number\t\t%lu\n", BITS(dword, 19, 16));
> printf("AUD_OUT_DIG_CNVT_B Stream_ID\t\t\t\t%lu\n", BITS(dword, 23, 20));
>
> - dword = INREG(AUD_OUT_DIG_CNVT_C);
> + dword = INREG(igt_global_mmio, AUD_OUT_DIG_CNVT_C);
> printf("AUD_OUT_DIG_CNVT_C V\t\t\t\t\t%lu\n", BIT(dword, 1));
> printf("AUD_OUT_DIG_CNVT_C VCFG\t\t\t\t%lu\n", BIT(dword, 2));
> printf("AUD_OUT_DIG_CNVT_C PRE\t\t\t\t\t%lu\n", BIT(dword, 3));
> @@ -1103,8 +1104,9 @@ static void dump_cpt(void)
>
> printf("AUD_OUT_CH_STR Converter_Channel_MAP PORTB PORTC PORTD\n");
> for (i = 0; i < 8; i++) {
> - OUTREG(AUD_OUT_CH_STR, i | (i << 8) | (i << 16));
> - dword = INREG(AUD_OUT_CH_STR);
> + OUTREG(igt_global_mmio, AUD_OUT_CH_STR, i | (i << 8) |
> + (i << 16));
> + dword = INREG(igt_global_mmio, AUD_OUT_CH_STR);
> printf("\t\t\t\t%lu\t%lu\t%lu\t%lu\n",
> 1 + BITS(dword, 3, 0),
> 1 + BITS(dword, 7, 4),
> @@ -1112,33 +1114,33 @@ static void dump_cpt(void)
> 1 + BITS(dword, 23, 20));
> }
>
> - dword = INREG(AUD_OUT_STR_DESC_A);
> + dword = INREG(igt_global_mmio, AUD_OUT_STR_DESC_A);
> printf("AUD_OUT_STR_DESC_A HBR_enable\t\t\t\t%lu\n", BITS(dword, 28, 27));
> printf("AUD_OUT_STR_DESC_A Convertor_Channel_Count\t\t%lu\n", BITS(dword, 20, 16) + 1);
> printf("AUD_OUT_STR_DESC_A Bits_per_Sample\t\t\t[%#lx] %s\n",
> BITS(dword, 6, 4), OPNAME(bits_per_sample, BITS(dword, 6, 4)));
> printf("AUD_OUT_STR_DESC_A Number_of_Channels_in_a_Stream\t%lu\n", 1 + BITS(dword, 3, 0));
>
> - dword = INREG(AUD_OUT_STR_DESC_B);
> + dword = INREG(igt_global_mmio, AUD_OUT_STR_DESC_B);
> printf("AUD_OUT_STR_DESC_B HBR_enable\t\t\t\t%lu\n", BITS(dword, 28, 27));
> printf("AUD_OUT_STR_DESC_B Convertor_Channel_Count\t\t%lu\n", BITS(dword, 20, 16) + 1);
> printf("AUD_OUT_STR_DESC_B Bits_per_Sample\t\t\t[%#lx] %s\n",
> BITS(dword, 6, 4), OPNAME(bits_per_sample, BITS(dword, 6, 4)));
> printf("AUD_OUT_STR_DESC_B Number_of_Channels_in_a_Stream\t%lu\n", 1 + BITS(dword, 3, 0));
>
> - dword = INREG(AUD_OUT_STR_DESC_C);
> + dword = INREG(igt_global_mmio, AUD_OUT_STR_DESC_C);
> printf("AUD_OUT_STR_DESC_C HBR_enable\t\t\t\t%lu\n", BITS(dword, 28, 27));
> printf("AUD_OUT_STR_DESC_C Convertor_Channel_Count\t\t%lu\n", BITS(dword, 20, 16) + 1);
> printf("AUD_OUT_STR_DESC_C Bits_per_Sample\t\t\t[%#lx] %s\n",
> BITS(dword, 6, 4), OPNAME(bits_per_sample, BITS(dword, 6, 4)));
> printf("AUD_OUT_STR_DESC_C Number_of_Channels_in_a_Stream\t%lu\n", 1 + BITS(dword, 3, 0));
>
> - dword = INREG(AUD_PINW_CONNLNG_SEL);
> + dword = INREG(igt_global_mmio, AUD_PINW_CONNLNG_SEL);
> printf("AUD_PINW_CONNLNG_SEL Connection_select_Control_B\t%#lx\n", BITS(dword, 7, 0));
> printf("AUD_PINW_CONNLNG_SEL Connection_select_Control_C\t%#lx\n", BITS(dword, 15, 8));
> printf("AUD_PINW_CONNLNG_SEL Connection_select_Control_D\t%#lx\n", BITS(dword, 23, 16));
>
> - dword = INREG(AUD_CNTL_ST_A);
> + dword = INREG(igt_global_mmio, AUD_CNTL_ST_A);
> printf("AUD_CNTL_ST_A DIP_Port_Select\t\t\t\t[%#lx] %s\n",
> BITS(dword, 30, 29), dip_port[BITS(dword, 30, 29)]);
> printf("AUD_CNTL_ST_A DIP_type_enable_status Audio DIP\t\t%lu\n", BIT(dword, 21));
> @@ -1149,7 +1151,7 @@ static void dump_cpt(void)
> printf("AUD_CNTL_ST_A ELD_ACK\t\t\t\t\t%lu\n", BIT(dword, 4));
> printf("AUD_CNTL_ST_A ELD_buffer_size\t\t\t\t%lu\n", BITS(dword, 14, 10));
>
> - dword = INREG(AUD_CNTL_ST_B);
> + dword = INREG(igt_global_mmio, AUD_CNTL_ST_B);
> printf("AUD_CNTL_ST_B DIP_Port_Select\t\t\t\t[%#lx] %s\n",
> BITS(dword, 30, 29), dip_port[BITS(dword, 30, 29)]);
> printf("AUD_CNTL_ST_B DIP_type_enable_status Audio DIP\t\t%lu\n", BIT(dword, 21));
> @@ -1160,7 +1162,7 @@ static void dump_cpt(void)
> printf("AUD_CNTL_ST_B ELD_ACK\t\t\t\t\t%lu\n", BIT(dword, 4));
> printf("AUD_CNTL_ST_B ELD_buffer_size\t\t\t\t%lu\n", BITS(dword, 14, 10));
>
> - dword = INREG(AUD_CNTL_ST_C);
> + dword = INREG(igt_global_mmio, AUD_CNTL_ST_C);
> printf("AUD_CNTL_ST_C DIP_Port_Select\t\t\t\t[%#lx] %s\n",
> BITS(dword, 30, 29), dip_port[BITS(dword, 30, 29)]);
> printf("AUD_CNTL_ST_C DIP_type_enable_status Audio DIP\t\t%lu\n", BIT(dword, 21));
> @@ -1171,7 +1173,7 @@ static void dump_cpt(void)
> printf("AUD_CNTL_ST_C ELD_ACK\t\t\t\t\t%lu\n", BIT(dword, 4));
> printf("AUD_CNTL_ST_C ELD_buffer_size\t\t\t\t%lu\n", BITS(dword, 14, 10));
>
> - dword = INREG(AUD_CNTRL_ST2);
> + dword = INREG(igt_global_mmio, AUD_CNTRL_ST2);
> printf("AUD_CNTRL_ST2 CP_ReadyB\t\t\t\t%lu\n", BIT(dword, 1));
> printf("AUD_CNTRL_ST2 ELD_validB\t\t\t\t%lu\n", BIT(dword, 0));
> printf("AUD_CNTRL_ST2 CP_ReadyC\t\t\t\t%lu\n", BIT(dword, 5));
> @@ -1179,7 +1181,7 @@ static void dump_cpt(void)
> printf("AUD_CNTRL_ST2 CP_ReadyD\t\t\t\t%lu\n", BIT(dword, 9));
> printf("AUD_CNTRL_ST2 ELD_validD\t\t\t\t%lu\n", BIT(dword, 8));
>
> - dword = INREG(AUD_CNTRL_ST3);
> + dword = INREG(igt_global_mmio, AUD_CNTRL_ST3);
> printf("AUD_CNTRL_ST3 TransA_DPT_Audio_Output_En\t\t%lu\n", BIT(dword, 3));
> printf("AUD_CNTRL_ST3 TransA_to_Port_Sel\t\t\t[%#lx] %s\n",
> BITS(dword, 2, 0), trans_to_port_sel[BITS(dword, 2, 0)]);
> @@ -1190,7 +1192,7 @@ static void dump_cpt(void)
> printf("AUD_CNTRL_ST3 TransC_to_Port_Sel\t\t\t[%#lx] %s\n",
> BITS(dword, 10, 8), trans_to_port_sel[BITS(dword, 10, 8)]);
>
> - dword = INREG(AUD_HDMIW_STATUS);
> + dword = INREG(igt_global_mmio, AUD_HDMIW_STATUS);
> printf("AUD_HDMIW_STATUS Conv_A_CDCLK/DOTCLK_FIFO_Underrun\t%lu\n", BIT(dword, 27));
> printf("AUD_HDMIW_STATUS Conv_A_CDCLK/DOTCLK_FIFO_Overrun\t%lu\n", BIT(dword, 26));
> printf("AUD_HDMIW_STATUS Conv_B_CDCLK/DOTCLK_FIFO_Underrun\t%lu\n", BIT(dword, 29));
> @@ -1201,54 +1203,60 @@ static void dump_cpt(void)
> printf("AUD_HDMIW_STATUS Function_Reset\t\t\t%lu\n", BIT(dword, 24));
>
> printf("AUD_HDMIW_HDMIEDID_A HDMI ELD:\n\t");
> - dword = INREG(AUD_CNTL_ST_A);
> + dword = INREG(igt_global_mmio, AUD_CNTL_ST_A);
> dword &= ~BITMASK(9, 5);
> - OUTREG(AUD_CNTL_ST_A, dword);
> + OUTREG(igt_global_mmio, AUD_CNTL_ST_A, dword);
> for (i = 0; i < BITS(dword, 14, 10) / 4; i++)
> - printf("%08x ", htonl(INREG(AUD_HDMIW_HDMIEDID_A)));
> + printf("%08x ", htonl(INREG(igt_global_mmio,
> + AUD_HDMIW_HDMIEDID_A)));
> printf("\n");
>
> printf("AUD_HDMIW_HDMIEDID_B HDMI ELD:\n\t");
> - dword = INREG(AUD_CNTL_ST_B);
> + dword = INREG(igt_global_mmio, AUD_CNTL_ST_B);
> dword &= ~BITMASK(9, 5);
> - OUTREG(AUD_CNTL_ST_B, dword);
> + OUTREG(igt_global_mmio, AUD_CNTL_ST_B, dword);
> for (i = 0; i < BITS(dword, 14, 10) / 4; i++)
> - printf("%08x ", htonl(INREG(AUD_HDMIW_HDMIEDID_B)));
> + printf("%08x ", htonl(INREG(igt_global_mmio,
> + AUD_HDMIW_HDMIEDID_B)));
> printf("\n");
>
> printf("AUD_HDMIW_HDMIEDID_C HDMI ELD:\n\t");
> - dword = INREG(AUD_CNTL_ST_C);
> + dword = INREG(igt_global_mmio, AUD_CNTL_ST_C);
> dword &= ~BITMASK(9, 5);
> - OUTREG(AUD_CNTL_ST_C, dword);
> + OUTREG(igt_global_mmio, AUD_CNTL_ST_C, dword);
> for (i = 0; i < BITS(dword, 14, 10) / 4; i++)
> - printf("%08x ", htonl(INREG(AUD_HDMIW_HDMIEDID_C)));
> + printf("%08x ", htonl(INREG(igt_global_mmio,
> + AUD_HDMIW_HDMIEDID_C)));
> printf("\n");
>
> printf("AUD_HDMIW_INFOFR_A HDMI audio Infoframe:\n\t");
> - dword = INREG(AUD_CNTL_ST_A);
> + dword = INREG(igt_global_mmio, AUD_CNTL_ST_A);
> dword &= ~BITMASK(20, 18);
> dword &= ~BITMASK(3, 0);
> - OUTREG(AUD_CNTL_ST_A, dword);
> + OUTREG(igt_global_mmio, AUD_CNTL_ST_A, dword);
> for (i = 0; i < 8; i++)
> - printf("%08x ", htonl(INREG(AUD_HDMIW_INFOFR_A)));
> + printf("%08x ", htonl(INREG(igt_global_mmio,
> + AUD_HDMIW_INFOFR_A)));
> printf("\n");
>
> printf("AUD_HDMIW_INFOFR_B HDMI audio Infoframe:\n\t");
> - dword = INREG(AUD_CNTL_ST_B);
> + dword = INREG(igt_global_mmio, AUD_CNTL_ST_B);
> dword &= ~BITMASK(20, 18);
> dword &= ~BITMASK(3, 0);
> - OUTREG(AUD_CNTL_ST_B, dword);
> + OUTREG(igt_global_mmio, AUD_CNTL_ST_B, dword);
> for (i = 0; i < 8; i++)
> - printf("%08x ", htonl(INREG(AUD_HDMIW_INFOFR_B)));
> + printf("%08x ", htonl(INREG(igt_global_mmio,
> + AUD_HDMIW_INFOFR_B)));
> printf("\n");
>
> printf("AUD_HDMIW_INFOFR_C HDMI audio Infoframe:\n\t");
> - dword = INREG(AUD_CNTL_ST_C);
> + dword = INREG(igt_global_mmio, AUD_CNTL_ST_C);
> dword &= ~BITMASK(20, 18);
> dword &= ~BITMASK(3, 0);
> - OUTREG(AUD_CNTL_ST_C, dword);
> + OUTREG(igt_global_mmio, AUD_CNTL_ST_C, dword);
> for (i = 0; i < 8; i++)
> - printf("%08x ", htonl(INREG(AUD_HDMIW_INFOFR_C)));
> + printf("%08x ", htonl(INREG(igt_global_mmio,
> + AUD_HDMIW_INFOFR_C)));
> printf("\n");
>
> }
> @@ -1374,10 +1382,12 @@ static void dump_aud_config(int index)
> char prefix[MAX_PREFIX_SIZE];
>
> if (!IS_HASWELL_PLUS(devid)) {
> - dword = INREG(aud_reg_base + AUD_CONFIG_A + (index - PIPE_A) * 0x100);
> + dword = INREG(igt_global_mmio, aud_reg_base + AUD_CONFIG_A +
> + (index - PIPE_A) * 0x100);
> sprintf(prefix, "AUD_CONFIG_%c ", 'A' + index - PIPE_A);
> } else {
> - dword = INREG(aud_reg_base + AUD_TCA_CONFIG + (index - TRANSCODER_A) * 0x100);
> + dword = INREG(igt_global_mmio, aud_reg_base + AUD_TCA_CONFIG +
> + (index - TRANSCODER_A) * 0x100);
> sprintf(prefix, "AUD_TC%c_CONFIG", 'A' + index - TRANSCODER_A);
> }
>
> @@ -1397,10 +1407,12 @@ static void dump_aud_misc_control(int index)
> char prefix[MAX_PREFIX_SIZE];
>
> if (!IS_HASWELL_PLUS(devid)) {
> - dword = INREG(aud_reg_base + AUD_MISC_CTRL_A + (index - PIPE_A) * 0x100);
> + dword = INREG(igt_global_mmio, aud_reg_base + AUD_MISC_CTRL_A +
> + (index - PIPE_A) * 0x100);
> sprintf(prefix, "AUD_MISC_CTRL_%c ", 'A' + index - PIPE_A);
> } else {
> - dword = INREG(aud_reg_base + AUD_C1_MISC_CTRL + (index - CONVERTER_1) * 0x100);
> + dword = INREG(igt_global_mmio, aud_reg_base + AUD_C1_MISC_CTRL +
> + (index - CONVERTER_1) * 0x100);
> sprintf(prefix, "AUD_C%c_MISC_CTRL", '1' + index - CONVERTER_1);
> }
>
> @@ -1414,7 +1426,7 @@ static void dump_aud_vendor_device_id(void)
> {
> uint32_t dword;
>
> - dword = INREG(aud_reg_base + AUD_VID_DID);
> + dword = INREG(igt_global_mmio, aud_reg_base + AUD_VID_DID);
> printf("AUD_VID_DID device id\t\t\t\t\t0x%lx\n", BITS(dword, 15, 0));
> printf("AUD_VID_DID vendor id\t\t\t\t\t0x%lx\n", BITS(dword, 31, 16));
> }
> @@ -1423,7 +1435,7 @@ static void dump_aud_revision_id(void)
> {
> uint32_t dword;
>
> - dword = INREG(aud_reg_base + AUD_RID);
> + dword = INREG(igt_global_mmio, aud_reg_base + AUD_RID);
> printf("AUD_RID Stepping_Id\t\t\t\t\t0x%lx\n", BITS(dword, 7, 0));
> printf("AUD_RID Revision_Id\t\t\t\t\t0x%lx\n", BITS(dword, 15, 8));
> printf("AUD_RID Minor_Revision\t\t\t\t\t0x%lx\n", BITS(dword, 19, 16));
> @@ -1436,10 +1448,13 @@ static void dump_aud_m_cts_enable(int index)
> char prefix[MAX_PREFIX_SIZE];
>
> if (!IS_HASWELL_PLUS(devid)) {
> - dword = INREG(aud_reg_base + AUD_CTS_ENABLE_A + (index - PIPE_A) * 0x100);
> + dword = INREG(igt_global_mmio, aud_reg_base + AUD_CTS_ENABLE_A +
> + (index - PIPE_A) * 0x100);
> sprintf(prefix, "AUD_CTS_ENABLE_%c ", 'A' + index - PIPE_A);
> } else {
> - dword = INREG(aud_reg_base + AUD_TCA_M_CTS_ENABLE + (index - TRANSCODER_A) * 0x100);
> + dword = INREG(igt_global_mmio, aud_reg_base +
> + AUD_TCA_M_CTS_ENABLE + (index - TRANSCODER_A) *
> + 0x100);
> sprintf(prefix, "AUD_TC%c_M_CTS_ENABLE", 'A' + index - TRANSCODER_A);
> }
>
> @@ -1454,7 +1469,7 @@ static void dump_aud_power_state(void)
> uint32_t dword;
> int num_pipes;
>
> - dword = INREG(aud_reg_base + AUD_PWRST);
> + dword = INREG(igt_global_mmio, aud_reg_base + AUD_PWRST);
> printf("AUD_PWRST PinB_Widget_Power_State_Set \t%s\n", power_state[BITS(dword, 1, 0)]);
> printf("AUD_PWRST PinB_Widget_Power_State_Current \t%s\n", power_state[BITS(dword, 3, 2)]);
> printf("AUD_PWRST PinC_Widget_Power_State_Set \t%s\n", power_state[BITS(dword, 5, 4)]);
> @@ -1510,11 +1525,11 @@ static void dump_aud_edid_data(int index)
> printf("AUD_HDMIW_HDMIEDID_%c HDMI ELD:\n\t", 'A' + index - PIPE_A);
> }
>
> - dword = INREG(aud_ctrl_st);
> + dword = INREG(igt_global_mmio, aud_ctrl_st);
> dword &= ~BITMASK(9, 5);
> - OUTREG(aud_ctrl_st, dword);
> + OUTREG(igt_global_mmio, aud_ctrl_st, dword);
> for (i = 0; i < BITS(dword, 14, 10) / 4; i++)
> - printf("%08x ", htonl(INREG(edid_data)));
> + printf("%08x ", htonl(INREG(igt_global_mmio, edid_data)));
> printf("\n");
> }
>
> @@ -1537,12 +1552,12 @@ static void dump_aud_infoframe(int index)
> printf("AUD_HDMIW_INFOFR_%c HDMI audio Infoframe:\n\t", 'A' + index - PIPE_A);
> }
>
> - dword = INREG(aud_ctrl_st);
> + dword = INREG(igt_global_mmio, aud_ctrl_st);
> dword &= ~BITMASK(20, 18);
> dword &= ~BITMASK(3, 0);
> - OUTREG(aud_ctrl_st, dword);
> + OUTREG(igt_global_mmio, aud_ctrl_st, dword);
> for (i = 0; i < 8; i++)
> - printf("%08x ", htonl(INREG(info_frm)));
> + printf("%08x ", htonl(INREG(igt_global_mmio, info_frm)));
> printf("\n");
> }
>
> @@ -1551,7 +1566,7 @@ static void dump_aud_port_en_hd_cfg(void)
> uint32_t dword;
> int num_pipes = get_num_pipes();
>
> - dword = INREG(aud_reg_base + AUD_PORT_EN_HD_CFG);
> + dword = INREG(igt_global_mmio, aud_reg_base + AUD_PORT_EN_HD_CFG);
> if (num_pipes == 2) {
> printf("AUD_PORT_EN_HD_CFG Convertor_A_Digen\t\t\t%lu\n", BIT(dword, 0));
> printf("AUD_PORT_EN_HD_CFG Convertor_B_Digen\t\t\t%lu\n", BIT(dword, 1));
> @@ -1585,7 +1600,7 @@ static void dump_aud_pipe_conv_cfg(void)
> {
> uint32_t dword;
>
> - dword = INREG(aud_reg_base + AUD_PIPE_CONV_CFG);
> + dword = INREG(igt_global_mmio, aud_reg_base + AUD_PIPE_CONV_CFG);
> printf("AUD_PIPE_CONV_CFG Convertor_1_Digen\t\t\t%lu\n", BIT(dword, 0));
> printf("AUD_PIPE_CONV_CFG Convertor_2_Digen\t\t\t%lu\n", BIT(dword, 1));
> printf("AUD_PIPE_CONV_CFG Convertor_3_Digen\t\t\t%lu\n", BIT(dword, 2));
> @@ -1607,10 +1622,12 @@ static void dump_aud_dig_cnvt(int index)
> char prefix[MAX_PREFIX_SIZE];
>
> if (!IS_HASWELL_PLUS(devid)) {
> - dword = INREG(aud_reg_base + AUD_OUT_DIG_CNVT_A + (index - PIPE_A) * 0x100);
> + dword = INREG(igt_global_mmio, aud_reg_base +
> + AUD_OUT_DIG_CNVT_A + (index - PIPE_A) * 0x100);
> sprintf(prefix, "AUD_OUT_DIG_CNVT_%c", 'A' + index - PIPE_A);
> } else {
> - dword = INREG(aud_reg_base + AUD_C1_DIG_CNVT + (index - CONVERTER_1) * 0x100);
> + dword = INREG(igt_global_mmio, aud_reg_base + AUD_C1_DIG_CNVT +
> + (index - CONVERTER_1) * 0x100);
> sprintf(prefix, "AUD_C%c_DIG_CNVT ", '1' + index - CONVERTER_1);
> }
>
> @@ -1633,10 +1650,12 @@ static void dump_aud_str_desc(int index)
> uint32_t rate;
>
> if (!IS_HASWELL_PLUS(devid)) {
> - dword = INREG(aud_reg_base + AUD_OUT_STR_DESC_A + (index - PIPE_A) * 0x100);
> + dword = INREG(igt_global_mmio, aud_reg_base +
> + AUD_OUT_STR_DESC_A + (index - PIPE_A) * 0x100);
> sprintf(prefix, "AUD_OUT_STR_DESC_%c", 'A' + index - PIPE_A);
> } else {
> - dword = INREG(aud_reg_base + AUD_C1_STR_DESC + (index - CONVERTER_1) * 0x100);
> + dword = INREG(igt_global_mmio, aud_reg_base + AUD_C1_STR_DESC +
> + (index - CONVERTER_1) * 0x100);
> sprintf(prefix, "AUD_C%c_STR_DESC ", '1' + index - CONVERTER_1);
> }
>
> @@ -1668,8 +1687,9 @@ static void dump_aud_out_chan_map(void)
>
> printf("AUD_OUT_CHAN_MAP Converter_Channel_MAP PORTB PORTC PORTD\n");
> for (i = 0; i < 8; i++) {
> - OUTREG(aud_reg_base + AUD_OUT_CHAN_MAP, i | (i << 8) | (i << 16));
> - dword = INREG(aud_reg_base + AUD_OUT_CHAN_MAP);
> + OUTREG(igt_global_mmio, aud_reg_base + AUD_OUT_CHAN_MAP,
> + i | (i << 8) | (i << 16));
> + dword = INREG(igt_global_mmio, aud_reg_base + AUD_OUT_CHAN_MAP);
> printf("\t\t\t\t%lu\t%lu\t%lu\t%lu\n",
> 1 + BITS(dword, 3, 0),
> 1 + BITS(dword, 7, 4),
> @@ -1683,7 +1703,7 @@ static void dump_aud_connect_list(void)
> uint32_t dword;
> char prefix[MAX_PREFIX_SIZE];
>
> - dword = INREG(aud_reg_base + AUD_PINW_CONNLNG_LIST);
> + dword = INREG(igt_global_mmio, aud_reg_base + AUD_PINW_CONNLNG_LIST);
> sprintf(prefix, "AUD_PINW_CONNLNG_LIST");
>
> printf("%s Connect_List_Length\t\t%lu\n", prefix, BITS(dword, 6, 0));
> @@ -1698,11 +1718,13 @@ static void dump_aud_connect_select(void)
> char prefix[MAX_PREFIX_SIZE];
>
> if (IS_HASWELL_PLUS(devid)) {
> - dword = INREG(aud_reg_base + AUD_PIPE_CONN_SEL_CTRL);
> + dword = INREG(igt_global_mmio, aud_reg_base +
> + AUD_PIPE_CONN_SEL_CTRL);
> sprintf(prefix, "AUD_PIPE_CONN_SEL_CTRL");
>
> } else {
> - dword = INREG(aud_reg_base + AUD_PINW_CONNLNG_SEL);
> + dword = INREG(igt_global_mmio, aud_reg_base +
> + AUD_PINW_CONNLNG_SEL);
> sprintf(prefix, "AUD_PINW_CONNLNG_SEL ");
> }
>
> @@ -1718,11 +1740,13 @@ static void dump_aud_ctrl_state(int index)
>
> if (IS_HASWELL_PLUS(devid)) {
> offset = (index - TRANSCODER_A) * 0x100;
> - dword = INREG(aud_reg_base + AUD_TCA_DIP_ELD_CTRL_ST + offset);
> + dword = INREG(igt_global_mmio, aud_reg_base +
> + AUD_TCA_DIP_ELD_CTRL_ST + offset);
> printf("Audio DIP and ELD control state for Transcoder %c\n", 'A' + index - TRANSCODER_A);
> } else {
> offset = (index - PIPE_A) * 0x100;
> - dword = INREG(aud_reg_base + AUD_CNTL_ST_A + offset);
> + dword = INREG(igt_global_mmio, aud_reg_base + AUD_CNTL_ST_A +
> + offset);
> printf("Audio control state - Pipe %c\n", 'A' + index - PIPE_A);
> }
>
> @@ -1743,7 +1767,7 @@ static void dump_aud_ctrl_state2(void)
> {
> uint32_t dword;
>
> - dword = INREG(aud_reg_base + AUD_CNTL_ST2);
> + dword = INREG(igt_global_mmio, aud_reg_base + AUD_CNTL_ST2);
> printf("AUD_CNTL_ST2 ELD_validB\t\t\t\t%lu\n", BIT(dword, 0));
> printf("AUD_CNTL_ST2 CP_ReadyB\t\t\t\t\t%lu\n", BIT(dword, 1));
> printf("AUD_CNTL_ST2 ELD_validC\t\t\t\t%lu\n", BIT(dword, 4));
> @@ -1757,7 +1781,7 @@ static void dump_aud_eld_cp_vld(void)
> {
> uint32_t dword;
>
> - dword = INREG(aud_reg_base + AUD_PIN_ELD_CP_VLD);
> + dword = INREG(igt_global_mmio, aud_reg_base + AUD_PIN_ELD_CP_VLD);
> printf("AUD_PIN_ELD_CP_VLD Transcoder_A ELD_valid\t\t%lu\n", BIT(dword, 0));
> printf("AUD_PIN_ELD_CP_VLD Transcoder_A CP_Ready \t\t%lu\n", BIT(dword, 1));
> printf("AUD_PIN_ELD_CP_VLD Transcoder_A Out_enable\t\t%lu\n", BIT(dword, 2));
> @@ -1776,7 +1800,7 @@ static void dump_aud_hdmi_status(void)
> {
> uint32_t dword;
>
> - dword = INREG(aud_reg_base + AUD_HDMIW_STATUS);
> + dword = INREG(igt_global_mmio, aud_reg_base + AUD_HDMIW_STATUS);
> printf("AUD_HDMIW_STATUS Function_Reset\t\t\t%lu\n", BIT(dword, 24));
> printf("AUD_HDMIW_STATUS BCLK/CDCLK_FIFO_Overrun\t\t%lu\n", BIT(dword, 25));
> printf("AUD_HDMIW_STATUS Conv_A_CDCLK/DOTCLK_FIFO_Overrun\t%lu\n", BIT(dword, 28));
> @@ -1817,7 +1841,7 @@ static void dump_dp_port_ctrl(int port)
> sprintf(prefix, "DP_%c", 'B' + port - PORT_B);
>
> port_ctrl = disp_reg_base + DP_CTL_B + (port - PORT_B) * 0x100;
> - dword = INREG(port_ctrl);
> + dword = INREG(igt_global_mmio, port_ctrl);
> printf("%s DisplayPort_Enable\t\t\t\t\t%lu\n", prefix, BIT(dword, 31));
> printf("%s Transcoder_Select\t\t\t\t\t%s\n", prefix, BIT(dword, 30) ? "Transcoder B" : "Transcoder A");
> printf("%s Port_Width_Selection\t\t\t\t[0x%lx] %s\n", prefix, BITS(dword, 21, 19),
> @@ -1841,7 +1865,7 @@ static void dump_hdmi_port_ctrl(int port)
> port_ctrl = disp_reg_base + HDMI_CTL_B + (port - PORT_B) * 0x10;
> }
>
> - dword = INREG(port_ctrl);
> + dword = INREG(igt_global_mmio, port_ctrl);
> printf("%s HDMI_Enable\t\t\t\t\t%u\n", prefix, !!(dword & SDVO_ENABLE));
> printf("%s Transcoder_Select\t\t\t\t%s\n", prefix, BIT(dword, 30) ? "Transcoder B" : "Transcoder A");
> printf("%s HDCP_Port_Select\t\t\t\t%lu\n", prefix, BIT(dword, 5));
> @@ -2029,7 +2053,7 @@ static void dump_ddi_buf_ctl(int port)
> {
> uint32_t dword;
>
> - dword = INREG(DDI_BUF_CTL_A + (port - PORT_A) * 0x100);
> + dword = INREG(igt_global_mmio, DDI_BUF_CTL_A + (port - PORT_A) * 0x100);
> printf("DDI %c Buffer control\n", 'A' + port - PORT_A);
>
> printf("\tDP port width\t\t\t\t\t[0x%lx] %s\n", BITS(dword, 3, 1),
> @@ -2041,7 +2065,8 @@ static void dump_ddi_func_ctl(int pipe)
> {
> uint32_t dword;
>
> - dword = INREG(PIPE_DDI_FUNC_CTL_A + (pipe - PIPE_A) * 0x1000);
> + dword = INREG(igt_global_mmio, PIPE_DDI_FUNC_CTL_A + (pipe - PIPE_A) *
> + 0x1000);
> printf("Pipe %c DDI Function Control\n", 'A' + pipe - PIPE_A);
>
> printf("\tBITS per color\t\t\t\t\t[0x%lx] %s\n", BITS(dword, 22, 20),
> @@ -2058,7 +2083,8 @@ static void dump_aud_connect_list_entry_length(int transcoder)
> uint32_t dword;
> char prefix[MAX_PREFIX_SIZE];
>
> - dword = INREG(aud_reg_base + AUD_TCA_PIN_PIPE_CONN_ENTRY_LNGTH + (transcoder - TRANSCODER_A) * 0x100);
> + dword = INREG(igt_global_mmio, aud_reg_base +
> + AUD_TCA_PIN_PIPE_CONN_ENTRY_LNGTH + (transcoder - TRANSCODER_A) * 0x100);
> sprintf(prefix, "AUD_TC%c_PIN_PIPE_CONN_ENTRY_LNGTH", 'A' + transcoder - TRANSCODER_A);
>
> printf("%s Connect_List_Length\t%lu\n", prefix, BITS(dword, 6, 0));
> @@ -2071,7 +2097,7 @@ static void dump_aud_connect_select_ctrl(void)
> {
> uint32_t dword;
>
> - dword = INREG(aud_reg_base + AUD_PIPE_CONN_SEL_CTRL);
> + dword = INREG(igt_global_mmio, aud_reg_base + AUD_PIPE_CONN_SEL_CTRL);
> printf("AUD_PIPE_CONN_SEL_CTRL Connection_select_Port_B\t%#lx\n", BITS(dword, 7, 0));
> printf("AUD_PIPE_CONN_SEL_CTRL Connection_select_Port_C\t%#lx\n", BITS(dword, 15, 8));
> printf("AUD_PIPE_CONN_SEL_CTRL Connection_select_Port_D\t%#lx\n", BITS(dword, 23, 16));
> @@ -2082,7 +2108,8 @@ static void dump_aud_dip_eld_ctrl_st(int transcoder)
> uint32_t dword;
> int offset = (transcoder - TRANSCODER_A) * 0x100;
>
> - dword = INREG(aud_reg_base + AUD_TCA_DIP_ELD_CTRL_ST + offset);
> + dword = INREG(igt_global_mmio, aud_reg_base + AUD_TCA_DIP_ELD_CTRL_ST +
> + offset);
> printf("Audio DIP and ELD control state for Transcoder %c\n", 'A' + transcoder - TRANSCODER_A);
>
> printf("\tELD_ACK\t\t\t\t\t\t%lu\n", BIT(dword, 4));
> @@ -2102,7 +2129,7 @@ static void dump_aud_hdmi_fifo_status(void)
> {
> uint32_t dword;
>
> - dword = INREG(aud_reg_base + AUD_HDMI_FIFO_STATUS);
> + dword = INREG(igt_global_mmio, aud_reg_base + AUD_HDMI_FIFO_STATUS);
> printf("AUD_HDMI_FIFO_STATUS Function_Reset\t\t\t%lu\n", BIT(dword, 24));
> printf("AUD_HDMI_FIFO_STATUS Conv_1_CDCLK/DOTCLK_FIFO_Overrun\t%lu\n", BIT(dword, 26));
> printf("AUD_HDMI_FIFO_STATUS Conv_1_CDCLK/DOTCLK_FIFO_Underrun\t%lu\n", BIT(dword, 27));
> diff --git a/tools/intel_backlight.c b/tools/intel_backlight.c
> index e4850e88..85d099d7 100644
> --- a/tools/intel_backlight.c
> +++ b/tools/intel_backlight.c
> @@ -42,8 +42,8 @@ int main(int argc, char** argv)
>
> intel_mmio_use_pci_bar(intel_get_pci_device(), -1);
>
> - current = INREG(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
> - max = INREG(BLC_PWM_PCH_CTL2) >> 16;
> + current = INREG(igt_global_mmio, BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
> + max = INREG(igt_global_mmio, BLC_PWM_PCH_CTL2) >> 16;
>
> printf ("current backlight value: %d%%\n", current * 100 / max);
>
> @@ -51,9 +51,9 @@ int main(int argc, char** argv)
> uint32_t v = atoi (argv[1]) * max / 100;
> if (v > max)
> v = max;
> - OUTREG(BLC_PWM_CPU_CTL,
> - (INREG(BLC_PWM_CPU_CTL) &~ BACKLIGHT_DUTY_CYCLE_MASK) | v);
> - (void) INREG(BLC_PWM_CPU_CTL);
> + OUTREG(igt_global_mmio, BLC_PWM_CPU_CTL,
> + (INREG(igt_global_mmio, BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK) | v);
> + (void)INREG(igt_global_mmio, BLC_PWM_CPU_CTL);
> printf ("set backlight to %d%%\n", v * 100 / max);
> }
>
> diff --git a/tools/intel_display_poller.c b/tools/intel_display_poller.c
> index 51f5b9a5..e1094d39 100644
> --- a/tools/intel_display_poller.c
> +++ b/tools/intel_display_poller.c
> @@ -71,22 +71,22 @@ static void sighandler(int x)
>
> static uint16_t read_reg_16(uint32_t reg)
> {
> - return INREG16(vlv_offset + reg);
> + return INREG16(igt_global_mmio, vlv_offset + reg);
> }
>
> static uint32_t read_reg(uint32_t reg)
> {
> - return INREG(vlv_offset + reg);
> + return INREG(igt_global_mmio, vlv_offset + reg);
> }
>
> static void write_reg_16(uint32_t reg, uint16_t val)
> {
> - OUTREG16(vlv_offset + reg, val);
> + OUTREG16(igt_global_mmio, vlv_offset + reg, val);
> }
>
> static void write_reg(uint32_t reg, uint32_t val)
> {
> - OUTREG(vlv_offset + reg, val);
> + OUTREG(igt_global_mmio, vlv_offset + reg, val);
> }
>
> static char pipe_name(int pipe)
> diff --git a/tools/intel_forcewaked.c b/tools/intel_forcewaked.c
> index 02fbf888..e057f5fe 100644
> --- a/tools/intel_forcewaked.c
> +++ b/tools/intel_forcewaked.c
> @@ -59,7 +59,7 @@ help(char *prog) {
> static int
> is_alive(void) {
> /* Read the timestamp, which should *almost* always be !0 */
> - return (intel_register_read(0x2358) != 0);
> + return (intel_register_read(igt_global_mmio, 0x2358) != 0);
> }
>
> int main(int argc, char *argv[])
> diff --git a/tools/intel_gpu_time.c b/tools/intel_gpu_time.c
> index 4ed6430e..d90b816a 100644
> --- a/tools/intel_gpu_time.c
> +++ b/tools/intel_gpu_time.c
> @@ -86,8 +86,10 @@ int main(int argc, char **argv)
> while (!goddo) {
> uint32_t ring_head, ring_tail;
>
> - ring_head = INREG(LP_RING + RING_HEAD) & HEAD_ADDR;
> - ring_tail = INREG(LP_RING + RING_TAIL) & TAIL_ADDR;
> + ring_head = INREG(igt_global_mmio, LP_RING + RING_HEAD) &
> + HEAD_ADDR;
> + ring_tail = INREG(igt_global_mmio, LP_RING + RING_TAIL) &
> + TAIL_ADDR;
>
> if (ring_tail == ring_head)
> ring_idle++;
> diff --git a/tools/intel_infoframes.c b/tools/intel_infoframes.c
> index 2ef5d4fd..689f5faa 100644
> --- a/tools/intel_infoframes.c
> +++ b/tools/intel_infoframes.c
> @@ -337,20 +337,20 @@ static void load_infoframe(Transcoder transcoder, DipInfoFrame *frame,
> uint32_t ctl_val;
> uint32_t i;
>
> - ctl_val = INREG(ctl_reg);
> + ctl_val = INREG(igt_global_mmio, ctl_reg);
>
> ctl_val &= ~DIP_CTL_BUFFER_INDEX;
> ctl_val |= type << 19;
> - OUTREG(ctl_reg, ctl_val);
> - ctl_val = INREG(ctl_reg);
> + OUTREG(igt_global_mmio, ctl_reg, ctl_val);
> + ctl_val = INREG(igt_global_mmio, ctl_reg);
>
> ctl_val &= ~DIP_CTL_ACCESS_ADDR;
> - OUTREG(ctl_reg, ctl_val);
> + OUTREG(igt_global_mmio, ctl_reg, ctl_val);
>
> for (i = 0; i < 16; i++) {
> - ctl_val = INREG(ctl_reg);
> + ctl_val = INREG(igt_global_mmio, ctl_reg);
> assert((ctl_val & DIP_CTL_ACCESS_ADDR) == i);
> - frame->data32[i] = INREG(data_reg);
> + frame->data32[i] = INREG(igt_global_mmio, data_reg);
> }
> }
>
> @@ -385,7 +385,7 @@ static void infoframe_fix_checksum(DipInfoFrame *frame)
> static void dump_port_info(int hdmi_port_index)
> {
> Register port = get_hdmi_port(hdmi_port_index);
> - uint32_t val = INREG(port);
> + uint32_t val = INREG(igt_global_mmio, port);
> Transcoder transcoder;
>
> printf("\nPort %s:\n", hdmi_port_names[hdmi_port_index]);
> @@ -438,7 +438,7 @@ static void dump_avi_info(Transcoder transcoder)
> DipInfoFrame frame;
>
> load_infoframe(transcoder, &frame, DIP_AVI);
> - val = INREG(reg);
> + val = INREG(igt_global_mmio, reg);
>
> printf("AVI InfoFrame:\n");
>
> @@ -537,7 +537,7 @@ static void dump_vendor_info(Transcoder transcoder)
> DipInfoFrame frame;
>
> load_infoframe(transcoder, &frame, DIP_VENDOR);
> - val = INREG(reg);
> + val = INREG(igt_global_mmio, reg);
>
> printf("Vendor InfoFrame:\n");
>
> @@ -572,7 +572,7 @@ static void dump_gamut_info(Transcoder transcoder)
> DipInfoFrame frame;
>
> load_infoframe(transcoder, &frame, DIP_GAMUT);
> - val = INREG(reg);
> + val = INREG(igt_global_mmio, reg);
>
> printf("Gamut InfoFrame:\n");
>
> @@ -600,7 +600,7 @@ static void dump_spd_info(Transcoder transcoder)
> char description[17];
>
> load_infoframe(transcoder, &frame, DIP_SPD);
> - val = INREG(reg);
> + val = INREG(igt_global_mmio, reg);
>
> printf("SPD InfoFrame:\n");
>
> @@ -635,7 +635,7 @@ static void dump_spd_info(Transcoder transcoder)
> static void dump_transcoder_info(Transcoder transcoder)
> {
> Register reg = get_dip_ctl_reg(transcoder);
> - uint32_t val = INREG(reg);
> + uint32_t val = INREG(igt_global_mmio, reg);
>
> if (gen == 4) {
> printf("\nDIP information:\n");
> @@ -698,37 +698,37 @@ static void write_infoframe(Transcoder transcoder, DipType type,
> uint32_t ctl_val;
> unsigned int i;
>
> - ctl_val = INREG(ctl_reg);
> + ctl_val = INREG(igt_global_mmio, ctl_reg);
> ctl_val &= ~DIP_CTL_BUFFER_INDEX;
> ctl_val |= (type << 19);
> ctl_val &= ~DIP_CTL_ACCESS_ADDR;
> - OUTREG(ctl_reg, ctl_val);
> + OUTREG(igt_global_mmio, ctl_reg, ctl_val);
>
> for (i = 0; i < 8; i++) {
> - ctl_val = INREG(ctl_reg);
> + ctl_val = INREG(igt_global_mmio, ctl_reg);
> assert((ctl_val & DIP_CTL_ACCESS_ADDR) == i);
> - OUTREG(data_reg, frame->data32[i]);
> + OUTREG(igt_global_mmio, data_reg, frame->data32[i]);
> }
> }
>
> static void disable_infoframe(Transcoder transcoder, DipType type)
> {
> Register reg = get_dip_ctl_reg(transcoder);
> - uint32_t val = INREG(reg);
> + uint32_t val = INREG(igt_global_mmio, reg);
> if (gen != 4 && type == DIP_AVI)
> val &= ~DIP_CTL_ENABLE;
> val &= ~(1 << (21 + type));
> - OUTREG(reg, val);
> + OUTREG(igt_global_mmio, reg, val);
> }
>
> static void enable_infoframe(Transcoder transcoder, DipType type)
> {
> Register reg = get_dip_ctl_reg(transcoder);
> - uint32_t val = INREG(reg);
> + uint32_t val = INREG(igt_global_mmio, reg);
> if (gen != 4 && type == DIP_AVI)
> val |= DIP_CTL_ENABLE;
> val |= (1 << (21 + type));
> - OUTREG(reg, val);
> + OUTREG(igt_global_mmio, reg, val);
> }
>
> static int parse_infoframe_option_u(const char *name, const char *s,
> @@ -787,7 +787,7 @@ static void change_avi_infoframe(Transcoder transcoder, char *commands)
> char *current = commands;
>
> load_infoframe(transcoder, &frame, DIP_AVI);
> - val = INREG(reg);
> + val = INREG(igt_global_mmio, reg);
>
> while (1) {
> rc = sscanf(current, "%31s%n", option, &read);
> @@ -856,7 +856,7 @@ static void change_avi_infoframe(Transcoder transcoder, char *commands)
>
> val &= ~DIP_CTL_FREQUENCY;
> val |= DIP_CTL_FREQ_EVERY;
> - OUTREG(reg, val);
> + OUTREG(igt_global_mmio, reg, val);
>
> frame.avi.header.type = AVI_INFOFRAME_TYPE;
> frame.avi.header.version = AVI_INFOFRAME_VERSION;
> @@ -888,7 +888,7 @@ static void change_spd_infoframe(Transcoder transcoder, char *commands)
> char *current = commands;
>
> load_infoframe(transcoder, &frame, DIP_SPD);
> - val = INREG(reg);
> + val = INREG(igt_global_mmio, reg);
>
> while (1) {
> rc = sscanf(current, "%15s%n", option, &read);
> @@ -917,7 +917,7 @@ static void change_spd_infoframe(Transcoder transcoder, char *commands)
>
> val &= ~DIP_CTL_FREQUENCY;
> val |= DIP_CTL_FREQ_EVERY_OTHER;
> - OUTREG(reg, val);
> + OUTREG(igt_global_mmio, reg, val);
>
> frame.spd.header.type = SPD_INFOFRAME_TYPE;
> frame.spd.header.version = SPD_INFOFRAME_VERSION;
> @@ -946,7 +946,7 @@ static void change_infoframe_frequency(Transcoder transcoder, DipType type,
> DipFrequency frequency)
> {
> Register reg = get_dip_ctl_reg(transcoder);
> - uint32_t val = INREG(reg);
> + uint32_t val = INREG(igt_global_mmio, reg);
>
> if (type == DIP_AVI && frequency != DIP_FREQ_EVERY_VSYNC) {
> printf("Error: AVI infoframe must be sent every VSync!\n");
> @@ -955,37 +955,37 @@ static void change_infoframe_frequency(Transcoder transcoder, DipType type,
>
> val &= ~DIP_CTL_FREQUENCY;
> val |= (frequency << 16);
> - OUTREG(reg, val);
> + OUTREG(igt_global_mmio, reg, val);
> }
>
> static void disable_dip(Transcoder transcoder)
> {
> Register reg = get_dip_ctl_reg(transcoder);
> - uint32_t val = INREG(reg);
> + uint32_t val = INREG(igt_global_mmio, reg);
> val &= ~DIP_CTL_ENABLE;
> - OUTREG(reg, val);
> + OUTREG(igt_global_mmio, reg, val);
> }
>
> static void enable_dip(Transcoder transcoder)
> {
> Register reg = get_dip_ctl_reg(transcoder);
> - uint32_t val = INREG(reg);
> + uint32_t val = INREG(igt_global_mmio, reg);
> val |= DIP_CTL_ENABLE;
> - OUTREG(reg, val);
> + OUTREG(igt_global_mmio, reg, val);
> }
>
> static void disable_hdmi_port(Register reg)
> {
> - uint32_t val = INREG(reg);
> + uint32_t val = INREG(igt_global_mmio, reg);
> val &= ~HDMI_PORT_ENABLE;
> - OUTREG(reg, val);
> + OUTREG(igt_global_mmio, reg, val);
> }
>
> static void enable_hdmi_port(Register reg)
> {
> - uint32_t val = INREG(reg);
> + uint32_t val = INREG(igt_global_mmio, reg);
> val |= HDMI_PORT_ENABLE;
> - OUTREG(reg, val);
> + OUTREG(igt_global_mmio, reg, val);
> }
>
> static void print_usage(void)
> diff --git a/tools/intel_l3_parity.c b/tools/intel_l3_parity.c
> index d8c997af..014ac9f1 100644
> --- a/tools/intel_l3_parity.c
> +++ b/tools/intel_l3_parity.c
> @@ -211,7 +211,7 @@ int main(int argc, char *argv[])
> * now. Just be aware of this if for some reason a hang is reported
> * when using this tool.
> */
> - dft = intel_register_read(0xb038);
> + dft = intel_register_read(igt_global_mmio, 0xb038);
>
> while (1) {
> int c, option_index = 0;
> @@ -357,10 +357,12 @@ int main(int argc, char *argv[])
> assert(i < 2);
> dft |= i << 1; /* slice */
> dft |= 1 << 0; /* enable */
> - intel_register_write(0xb038, dft);
> + intel_register_write(igt_global_mmio, 0xb038,
> + dft);
> break;
> case 'u':
> - intel_register_write(0xb038, dft & ~(1<<0));
> + intel_register_write(igt_global_mmio, 0xb038,
> + dft & ~(1 << 0));
> break;
> case 'L':
> break;
> diff --git a/tools/intel_lid.c b/tools/intel_lid.c
> index f45756e2..a4132d56 100644
> --- a/tools/intel_lid.c
> +++ b/tools/intel_lid.c
> @@ -122,7 +122,7 @@ int main(int argc, char **argv)
> intel_mmio_use_pci_bar(intel_get_pci_device(), -1);
>
> while (1) {
> - swf14 = INREG(SWF14);
> + swf14 = INREG(igt_global_mmio, SWF14);
>
> printf("Intel LVDS Lid status:\n");
> printf("\tSWF14(0x%x) : %s\n", swf14,
> diff --git a/tools/intel_panel_fitter.c b/tools/intel_panel_fitter.c
> index 137ef61a..26843d7c 100644
> --- a/tools/intel_panel_fitter.c
> +++ b/tools/intel_panel_fitter.c
> @@ -84,12 +84,12 @@ static void read_pipe_info(int intel_pipe, struct pipe_info *info)
> {
> uint32_t conf, vtotal, htotal, src, ctrl1, win_sz;
>
> - conf = INREG(PIPECONF[intel_pipe]);
> - htotal = INREG(HTOTAL[intel_pipe]);
> - vtotal = INREG(VTOTAL[intel_pipe]);
> - src = INREG(PIPESRC[intel_pipe]);
> - ctrl1 = INREG(PF_CTRL1[intel_pipe]);
> - win_sz = INREG(PF_WIN_SZ[intel_pipe]);
> + conf = INREG(igt_global_mmio, PIPECONF[intel_pipe]);
> + htotal = INREG(igt_global_mmio, HTOTAL[intel_pipe]);
> + vtotal = INREG(igt_global_mmio, VTOTAL[intel_pipe]);
> + src = INREG(igt_global_mmio, PIPESRC[intel_pipe]);
> + ctrl1 = INREG(igt_global_mmio, PF_CTRL1[intel_pipe]);
> + win_sz = INREG(igt_global_mmio, PF_WIN_SZ[intel_pipe]);
>
> info->enabled = (conf & PIPECONF_ENABLE) ? true : false;
> info->tot_width = (htotal & HTOTAL_ACTIVE_MASK) + 1;
> @@ -232,24 +232,24 @@ static int change_screen_size(int intel_pipe, int x, int y)
> assert(0);
> }
> }
> - OUTREG(PF_CTRL1[intel_pipe], ctrl1_val);
> + OUTREG(igt_global_mmio, PF_CTRL1[intel_pipe], ctrl1_val);
>
> win_pos_val = pos_x << 16;
> win_pos_val |= pos_y;
> - OUTREG(PF_WIN_POS[intel_pipe], win_pos_val);
> + OUTREG(igt_global_mmio, PF_WIN_POS[intel_pipe], win_pos_val);
>
> win_sz_val = dst_width << 16;
> win_sz_val |= dst_height;
> - OUTREG(PF_WIN_SZ[intel_pipe], win_sz_val);
> + OUTREG(igt_global_mmio, PF_WIN_SZ[intel_pipe], win_sz_val);
>
> return 0;
> }
>
> static int disable_panel_fitter(int intel_pipe)
> {
> - OUTREG(PF_CTRL1[intel_pipe], 0);
> - OUTREG(PF_WIN_POS[intel_pipe], 0);
> - OUTREG(PF_WIN_SZ[intel_pipe], 0);
> + OUTREG(igt_global_mmio, PF_CTRL1[intel_pipe], 0);
> + OUTREG(igt_global_mmio, PF_WIN_POS[intel_pipe], 0);
> + OUTREG(igt_global_mmio, PF_WIN_SZ[intel_pipe], 0);
> return 0;
> }
>
> diff --git a/tools/intel_perf_counters.c b/tools/intel_perf_counters.c
> index 50c4bce6..be573b55 100644
> --- a/tools/intel_perf_counters.c
> +++ b/tools/intel_perf_counters.c
> @@ -486,9 +486,10 @@ main(int argc, char **argv)
> intel_register_access_init(intel_get_pci_device(), 0, fd);
>
> /* Enable performance counters */
> - intel_register_write(OACONTROL,
> - counter_format << OACONTROL_COUNTER_SELECT_SHIFT |
> - PERFORMANCE_COUNTER_ENABLE);
> + intel_register_write(igt_global_mmio, OACONTROL,
> + counter_format <<
> + OACONTROL_COUNTER_SELECT_SHIFT |
> + PERFORMANCE_COUNTER_ENABLE);
> }
>
> totals = calloc(counter_count, sizeof(uint32_t));
> @@ -520,7 +521,7 @@ main(int argc, char **argv)
>
> if (oacontrol) {
> /* Disable performance counters */
> - intel_register_write(OACONTROL, 0);
> + intel_register_write(igt_global_mmio, OACONTROL, 0);
>
> /* Forcewake */
> intel_register_access_fini();
> diff --git a/tools/intel_reg.c b/tools/intel_reg.c
> index 947ec378..debd8c9a 100644
> --- a/tools/intel_reg.c
> +++ b/tools/intel_reg.c
> @@ -364,7 +364,8 @@ static int read_register(struct config *config, struct reg *reg, uint32_t *valp)
> if (reg->engine)
> val = register_srm(config, reg, NULL);
> else
> - val = INREG(reg->mmio_offset + reg->addr);
> + val = INREG(igt_global_mmio,
> + reg->mmio_offset + reg->addr);
> break;
> case PORT_PORTIO_VGA:
> iopl(3);
> @@ -372,7 +373,7 @@ static int read_register(struct config *config, struct reg *reg, uint32_t *valp)
> iopl(0);
> break;
> case PORT_MMIO_VGA:
> - val = INREG8(reg->addr);
> + val = INREG8(igt_global_mmio, reg->addr);
> break;
> case PORT_BUNIT:
> case PORT_PUNIT:
> @@ -389,7 +390,8 @@ static int read_register(struct config *config, struct reg *reg, uint32_t *valp)
> reg->port_desc.name);
> return -1;
> }
> - val = intel_iosf_sb_read(reg->port_desc.port, reg->addr);
> + val = intel_iosf_sb_read(igt_global_mmio, reg->port_desc.port,
> + reg->addr);
> break;
> default:
> fprintf(stderr, "port %d not supported\n", reg->port_desc.port);
> @@ -424,7 +426,8 @@ static int write_register(struct config *config, struct reg *reg, uint32_t val)
> if (reg->engine) {
> register_srm(config, reg, &val);
> } else {
> - OUTREG(reg->mmio_offset + reg->addr, val);
> + OUTREG(igt_global_mmio,
> + reg->mmio_offset + reg->addr, val);
> }
> break;
> case PORT_PORTIO_VGA:
> @@ -443,7 +446,7 @@ static int write_register(struct config *config, struct reg *reg, uint32_t val)
> val, reg->port_desc.name);
> return -1;
> }
> - OUTREG8(reg->addr, val);
> + OUTREG8(igt_global_mmio, reg->addr, val);
> break;
> case PORT_BUNIT:
> case PORT_PUNIT:
> @@ -460,7 +463,8 @@ static int write_register(struct config *config, struct reg *reg, uint32_t val)
> reg->port_desc.name);
> return -1;
> }
> - intel_iosf_sb_write(reg->port_desc.port, reg->addr, val);
> + intel_iosf_sb_write(igt_global_mmio, reg->port_desc.port,
> + reg->addr, val);
> break;
> default:
> fprintf(stderr, "port %d not supported\n", reg->port_desc.port);
> diff --git a/tools/intel_reg_checker.c b/tools/intel_reg_checker.c
> index 92a89ae0..1d40cd82 100644
> --- a/tools/intel_reg_checker.c
> +++ b/tools/intel_reg_checker.c
> @@ -35,7 +35,7 @@ static int gen;
> static uint32_t
> read_and_print_reg(const char *name, uint32_t reg)
> {
> - uint32_t val = INREG(reg);
> + uint32_t val = INREG(igt_global_mmio, reg);
>
> printf("%s (0x%x): 0x%08x\n", name, reg, val);
>
> diff --git a/tools/intel_watermark.c b/tools/intel_watermark.c
> index e71c3d9c..372947de 100644
> --- a/tools/intel_watermark.c
> +++ b/tools/intel_watermark.c
> @@ -38,7 +38,7 @@ static uint32_t devid;
>
> static uint32_t read_reg(uint32_t addr)
> {
> - return INREG(display_base + addr);
> + return INREG(igt_global_mmio, display_base + addr);
> }
>
> struct gmch_wm {
> @@ -650,8 +650,8 @@ static void vlv_wm_dump(void)
>
> ddl3 = read_reg(0x70058);
>
> - intel_punit_read(0x36, &dsp_ss_pm);
> - intel_punit_read(0x139, &ddr_setup2);
> + intel_punit_read(igt_global_mmio, 0x36, &dsp_ss_pm);
> + intel_punit_read(igt_global_mmio, 0x139, &ddr_setup2);
> } else {
> fw7 = read_reg(0x7007c);
> }
> --
> 2.20.1
>
Still long one, but I somehow managed to get to the end.
As I wrote above, please fix all 'maped' to 'mapped'.
Kasia
> _______________________________________________
> igt-dev mailing list
> igt-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/igt-dev
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [igt-dev] [PATCH i-g-t v3 5/5] lib/intel_mmio: remove igt_global_mmio and move pointer to mmio_data structure
2019-04-15 8:59 ` [igt-dev] [PATCH i-g-t v3 5/5] lib/intel_mmio: remove igt_global_mmio and move pointer to mmio_data structure Daniel Mrzyglod
@ 2019-04-17 10:55 ` Katarzyna Dec
0 siblings, 0 replies; 14+ messages in thread
From: Katarzyna Dec @ 2019-04-17 10:55 UTC (permalink / raw)
To: Daniel Mrzyglod; +Cc: igt-dev
On Mon, Apr 15, 2019 at 10:59:37AM +0200, Daniel Mrzyglod wrote:
> this patch remove need for igt_global_mmio from library space.
s/remove/removes
> The reason that it was moved is the idea to support multiple device at once.
Please rephrase ^^ this sentence.
>
> Signed-off-by: Daniel Mrzyglod <daniel.t.mrzyglod@intel.com>
> ---
> benchmarks/gem_latency.c | 5 +-
> benchmarks/gem_wsim.c | 6 +-
> lib/intel_io.h | 79 +++++++++++++--------
> lib/intel_iosf.c | 69 +++++++++---------
> lib/intel_mmio.c | 127 ++++++++++++++++------------------
> tests/i915/gem_exec_latency.c | 7 +-
> tests/i915/gem_exec_parse.c | 14 ++--
> tests/i915/i915_pm_lpsp.c | 7 +-
> tools/intel_audio_dump.c | 7 +-
> tools/intel_backlight.c | 5 +-
> tools/intel_display_poller.c | 7 +-
> tools/intel_forcewaked.c | 14 ++--
> tools/intel_gpu_time.c | 5 +-
> tools/intel_infoframes.c | 7 +-
> tools/intel_l3_parity.c | 16 +++--
> tools/intel_lid.c | 6 +-
> tools/intel_panel_fitter.c | 7 +-
> tools/intel_perf_counters.c | 12 ++--
> tools/intel_reg.c | 27 +++++---
> tools/intel_reg_checker.c | 6 +-
> tools/intel_watermark.c | 44 +++++++-----
> 21 files changed, 281 insertions(+), 196 deletions(-)
>
> diff --git a/benchmarks/gem_latency.c b/benchmarks/gem_latency.c
> index c3fc4bf0..bcaaecef 100644
> --- a/benchmarks/gem_latency.c
> +++ b/benchmarks/gem_latency.c
> @@ -55,6 +55,8 @@
> static int done;
> static int fd;
> static volatile uint32_t *timestamp_reg;
> +void *igt_global_mmio;
> +static struct _mmio_data mmio_data;
>
> #define REG(x) (volatile uint32_t *)((volatile char *)igt_global_mmio + x)
> #define REG_OFFSET(x) ((volatile char *)(x) - (volatile char *)igt_global_mmio)
> @@ -456,7 +458,8 @@ static int run(int seconds,
> if (gen < 6)
> return IGT_EXIT_SKIP; /* Needs BCS timestamp */
>
> - intel_register_access_init(intel_get_pci_device(), false, fd);
> + intel_register_access_init(&mmio_data, intel_get_pci_device(), false, fd);
> + igt_global_mmio = mmio_data.igt_mmio;
>
> if (gen == 6)
> timestamp_reg = REG(RCS_TIMESTAMP);
> diff --git a/benchmarks/gem_wsim.c b/benchmarks/gem_wsim.c
> index afb9644d..86af58cb 100644
> --- a/benchmarks/gem_wsim.c
> +++ b/benchmarks/gem_wsim.c
> @@ -206,6 +206,9 @@ struct workload
> } busy_balancer;
> };
>
> +void *igt_global_mmio;
> +static struct _mmio_data mmio_data;
> +
> static const unsigned int nop_calibration_us = 1000;
> static unsigned long nop_calibration;
>
> @@ -2223,7 +2226,8 @@ static void init_clocks(void)
> uint32_t rcs_start, rcs_end;
> double overhead, t;
>
> - intel_register_access_init(intel_get_pci_device(), false, fd);
> + intel_register_access_init(&mmio_data, intel_get_pci_device(), false, fd);
> + igt_global_mmio = mmio_data.igt_mmio;
>
> if (verbose <= 1)
> return;
> diff --git a/lib/intel_io.h b/lib/intel_io.h
> index fd99bbb7..d98397af 100644
> --- a/lib/intel_io.h
> +++ b/lib/intel_io.h
> @@ -30,17 +30,41 @@
>
> #include <stdint.h>
> #include <pciaccess.h>
> +#include <stdbool.h>
>
> /* register access helpers from intel_mmio.c */
> -extern void *igt_global_mmio;
> -void intel_mmio_use_pci_bar(struct pci_device *pci_dev, int fd);
> -void intel_mmio_use_dump_file(char *file);
> +struct intel_register_range {
> + uint32_t base;
> + uint32_t size;
> + uint32_t flags;
> +};
> +
> +struct intel_register_map {
> + struct intel_register_range *map;
> + uint32_t top;
> + uint32_t alignment_mask;
> +};
> +
> +struct _mmio_data {
> + int inited;
'inited' stands for initial?
> + bool safe;
> + uint32_t i915_devid;
> + struct intel_register_map map;
> + int key;
> + void *igt_mmio;
> +};
> +
> +void intel_mmio_use_pci_bar(struct _mmio_data *mmio_data,
> + struct pci_device *pci_dev, int fd);
> +void intel_mmio_use_dump_file(struct _mmio_data *mmio_data, char *file);
>
> -int intel_register_access_init(struct pci_device *pci_dev, int safe, int fd);
> -void intel_register_access_fini(void);
> -uint32_t intel_register_read(void *igt_mmio, uint32_t reg);
> -void intel_register_write(void *igt_mmio, uint32_t reg, uint32_t val);
> -int intel_register_access_needs_fakewake(void);
> +int intel_register_access_init(struct _mmio_data *mmio_data,
> + struct pci_device *pci_dev, int safe, int fd);
> +void intel_register_access_fini(struct _mmio_data *mmio_data);
> +uint32_t intel_register_read(struct _mmio_data *mmio_data, uint32_t reg);
> +void intel_register_write(struct _mmio_data *mmio_data, uint32_t reg,
> + uint32_t val);
> +int intel_register_access_needs_fakewake(struct _mmio_data *mmio_data);
>
> uint32_t INREG(void *igt_mmio, uint32_t reg);
> uint16_t INREG16(void *igt_mmio, uint32_t reg);
> @@ -50,18 +74,24 @@ void OUTREG16(void *igt_mmio, uint32_t reg, uint16_t val);
> void OUTREG8(void *igt_mmio, uint32_t reg, uint8_t val);
>
> /* sideband access functions from intel_iosf.c */
> -uint32_t intel_dpio_reg_read(void *igt_mmio, uint32_t reg, int phy);
> -void intel_dpio_reg_write(void *igt_mmio, uint32_t reg, uint32_t val, int phy);
> -uint32_t intel_flisdsi_reg_read(void *igt_mmio, uint32_t reg);
> -void intel_flisdsi_reg_write(void *igt_mmio, uint32_t reg, uint32_t val);
> -uint32_t intel_iosf_sb_read(void *igt_mmio, uint32_t port, uint32_t reg);
> -void intel_iosf_sb_write(void *igt_mmio, uint32_t port, uint32_t reg,
> - uint32_t val);
> +uint32_t intel_dpio_reg_read(struct _mmio_data *mmio_data, uint32_t reg,
> + int phy);
> +void intel_dpio_reg_write(struct _mmio_data *mmio_data, uint32_t reg,
> + uint32_t val, int phy);
> +uint32_t intel_flisdsi_reg_read(struct _mmio_data *mmio_data, uint32_t reg);
> +void intel_flisdsi_reg_write(struct _mmio_data *mmio_data, uint32_t reg,
> + uint32_t val);
> +uint32_t intel_iosf_sb_read(struct _mmio_data *mmio_data, uint32_t port,
> + uint32_t reg);
> +void intel_iosf_sb_write(struct _mmio_data *mmio_data, uint32_t port,
> + uint32_t reg, uint32_t val);
>
> -int intel_punit_read(void *igt_mmio, uint32_t addr, uint32_t *val);
> -int intel_punit_write(void *igt_mmio, uint32_t addr, uint32_t val);
> -int intel_nc_read(void *igt_mmio, uint32_t addr, uint32_t *val);
> -int intel_nc_write(void *igt_mmio, uint32_t addr, uint32_t val);
> +int intel_punit_read(struct _mmio_data *mmio_data, uint32_t addr,
> + uint32_t *val);
> +int intel_punit_write(struct _mmio_data *mmio_data, uint32_t addr,
> + uint32_t val);
> +int intel_nc_read(struct _mmio_data *mmio_data, uint32_t addr, uint32_t *val);
> +int intel_nc_write(struct _mmio_data *mmio_data, uint32_t addr, uint32_t val);
>
> /* register maps from intel_reg_map.c */
> #ifndef __GTK_DOC_IGNORE__
> @@ -72,17 +102,8 @@ int intel_nc_write(void *igt_mmio, uint32_t addr, uint32_t val);
> #define INTEL_RANGE_RW (INTEL_RANGE_READ | INTEL_RANGE_WRITE)
> #define INTEL_RANGE_END (1<<31)
>
> -struct intel_register_range {
> - uint32_t base;
> - uint32_t size;
> - uint32_t flags;
> -};
>
> -struct intel_register_map {
> - struct intel_register_range *map;
> - uint32_t top;
> - uint32_t alignment_mask;
> -};
> +//static struct _mmio_data mmio_data;
Is this comment needed here? ^
> struct intel_register_map intel_get_register_map(uint32_t devid);
> struct intel_register_range *intel_get_register_range(struct intel_register_map map, uint32_t offset, uint32_t mode);
> #endif /* __GTK_DOC_IGNORE__ */
> diff --git a/lib/intel_iosf.c b/lib/intel_iosf.c
> index b4a483f2..d541c7dc 100644
> --- a/lib/intel_iosf.c
> +++ b/lib/intel_iosf.c
> @@ -19,8 +19,8 @@
> /* Private register write, double-word addressing, non-posted */
> #define SB_CRWRDA_NP 0x07
>
> -static int vlv_sideband_rw(void *igt_mmio, uint32_t port, uint8_t opcode,
> - uint32_t addr, uint32_t *val)
> +static int vlv_sideband_rw(struct _mmio_data *mmio_data, uint32_t port,
> + uint8_t opcode, uint32_t addr, uint32_t *val)
Could you explain why patch 4 and 5 touch similar lines of code? First you make
one changes, than another?
I had a comment about too long patch in previous round. Bu as you see not
everything can be fixed - now we have patch 4 of 2000 lines and patch 5 of 1500
lines, previously it was 3000 in total.....
Please remember that review comments are not obligatory if you have good reason
to do so :)
> {
> int timeout = 0;
> uint32_t cmd, devfn, be, bar;
> @@ -34,23 +34,24 @@ static int vlv_sideband_rw(void *igt_mmio, uint32_t port, uint8_t opcode,
> (port << IOSF_PORT_SHIFT) | (be << IOSF_BYTE_ENABLES_SHIFT) |
> (bar << IOSF_BAR_SHIFT);
>
> - if (intel_register_read(igt_mmio, VLV_IOSF_DOORBELL_REQ) &
> + if (intel_register_read(mmio_data, VLV_IOSF_DOORBELL_REQ) &
> IOSF_SB_BUSY) {
> igt_warn("warning: pcode (%s) mailbox access failed\n", is_read ? "read" : "write");
> return -EAGAIN;
> }
>
> - intel_register_write(igt_mmio, VLV_IOSF_ADDR, addr);
> + intel_register_write(mmio_data, VLV_IOSF_ADDR, addr);
> if (!is_read)
> - intel_register_write(igt_mmio, VLV_IOSF_DATA, *val);
> + intel_register_write(mmio_data, VLV_IOSF_DATA, *val);
>
> - intel_register_write(igt_mmio, VLV_IOSF_DOORBELL_REQ, cmd);
> + intel_register_write(mmio_data, VLV_IOSF_DOORBELL_REQ, cmd);
>
> do {
> usleep(1);
> timeout++;
> - } while (intel_register_read(igt_mmio, VLV_IOSF_DOORBELL_REQ) &
> - IOSF_SB_BUSY && timeout < TIMEOUT_US);
> + } while (intel_register_read(mmio_data->igt_mmio,
> + VLV_IOSF_DOORBELL_REQ) &
> + IOSF_SB_BUSY && timeout < TIMEOUT_US);
>
> if (timeout >= TIMEOUT_US) {
> igt_warn("timeout waiting for pcode %s (%d) to finish\n", is_read ? "read" : "write", addr);
> @@ -58,8 +59,8 @@ static int vlv_sideband_rw(void *igt_mmio, uint32_t port, uint8_t opcode,
> }
>
> if (is_read)
> - *val = intel_register_read(igt_mmio, VLV_IOSF_DATA);
> - intel_register_write(igt_mmio, VLV_IOSF_DATA, 0);
> + *val = intel_register_read(mmio_data->igt_mmio, VLV_IOSF_DATA);
> + intel_register_write(mmio_data->igt_mmio, VLV_IOSF_DATA, 0);
>
> return 0;
> }
> @@ -75,9 +76,9 @@ static int vlv_sideband_rw(void *igt_mmio, uint32_t port, uint8_t opcode,
> * Returns:
> * 0 when the register access succeeded, negative errno code on failure.
> */
> -int intel_punit_read(void *igt_mmio, uint32_t addr, uint32_t *val)
> +int intel_punit_read(struct _mmio_data *mmio_data, uint32_t addr, uint32_t *val)
> {
> - return vlv_sideband_rw(igt_mmio, IOSF_PORT_PUNIT, SB_CRRDDA_NP, addr,
> + return vlv_sideband_rw(mmio_data, IOSF_PORT_PUNIT, SB_CRRDDA_NP, addr,
> val);
> }
>
> @@ -92,9 +93,9 @@ int intel_punit_read(void *igt_mmio, uint32_t addr, uint32_t *val)
> * Returns:
> * 0 when the register access succeeded, negative errno code on failure.
> */
> -int intel_punit_write(void *igt_mmio, uint32_t addr, uint32_t val)
> +int intel_punit_write(struct _mmio_data *mmio_data, uint32_t addr, uint32_t val)
> {
> - return vlv_sideband_rw(igt_mmio, IOSF_PORT_PUNIT, SB_CRWRDA_NP, addr,
> + return vlv_sideband_rw(mmio_data, IOSF_PORT_PUNIT, SB_CRWRDA_NP, addr,
> &val);
> }
>
> @@ -109,9 +110,10 @@ int intel_punit_write(void *igt_mmio, uint32_t addr, uint32_t val)
> * Returns:
> * 0 when the register access succeeded, negative errno code on failure.
> */
> -int intel_nc_read(void *igt_mmio, uint32_t addr, uint32_t *val)
> +int intel_nc_read(struct _mmio_data *mmio_data, uint32_t addr, uint32_t *val)
> {
> - return vlv_sideband_rw(igt_mmio, IOSF_PORT_NC, SB_CRRDDA_NP, addr, val);
> + return vlv_sideband_rw(mmio_data, IOSF_PORT_NC, SB_CRRDDA_NP, addr,
> + val);
> }
>
> /**
> @@ -125,9 +127,9 @@ int intel_nc_read(void *igt_mmio, uint32_t addr, uint32_t *val)
> * Returns:
> * 0 when the register access succeeded, negative errno code on failure.
> */
> -int intel_nc_write(void *igt_mmio, uint32_t addr, uint32_t val)
> +int intel_nc_write(struct _mmio_data *mmio_data, uint32_t addr, uint32_t val)
> {
> - return vlv_sideband_rw(igt_mmio, IOSF_PORT_NC, SB_CRWRDA_NP, addr,
> + return vlv_sideband_rw(mmio_data, IOSF_PORT_NC, SB_CRWRDA_NP, addr,
> &val);
> }
>
> @@ -142,14 +144,15 @@ int intel_nc_write(void *igt_mmio, uint32_t addr, uint32_t val)
> * Returns:
> * The value read from the register.
> */
> -uint32_t intel_dpio_reg_read(void *igt_mmio, uint32_t reg, int phy)
> +uint32_t intel_dpio_reg_read(struct _mmio_data *mmio_data, uint32_t reg, int phy)
> {
> uint32_t val;
>
> if (phy == 0)
> - vlv_sideband_rw(igt_mmio, IOSF_PORT_DPIO, SB_MRD_NP, reg, &val);
> + vlv_sideband_rw(mmio_data, IOSF_PORT_DPIO, SB_MRD_NP, reg,
> + &val);
> else
> - vlv_sideband_rw(igt_mmio, IOSF_PORT_DPIO_2, SB_MRD_NP, reg,
> + vlv_sideband_rw(mmio_data, IOSF_PORT_DPIO_2, SB_MRD_NP, reg,
> &val);
> return val;
> }
> @@ -163,40 +166,40 @@ uint32_t intel_dpio_reg_read(void *igt_mmio, uint32_t reg, int phy)
> *
> * 32-bit write of the register at @offset through the DPIO sideband port.
> */
> -void intel_dpio_reg_write(void *igt_mmio, uint32_t reg, uint32_t val, int phy)
> +void intel_dpio_reg_write(struct _mmio_data *mmio_data, uint32_t reg, uint32_t val, int phy)
> {
> if (phy == 0)
> - vlv_sideband_rw(igt_mmio, IOSF_PORT_DPIO, SB_MWR_NP, reg, &val);
> + vlv_sideband_rw(mmio_data, IOSF_PORT_DPIO, SB_MWR_NP, reg, &val);
> else
> - vlv_sideband_rw(igt_mmio, IOSF_PORT_DPIO_2, SB_MWR_NP, reg,
> + vlv_sideband_rw(mmio_data, IOSF_PORT_DPIO_2, SB_MWR_NP, reg,
> &val);
> }
>
> -uint32_t intel_flisdsi_reg_read(void *igt_mmio, uint32_t reg)
> +uint32_t intel_flisdsi_reg_read(struct _mmio_data *mmio_data, uint32_t reg)
> {
> uint32_t val = 0;
>
> - vlv_sideband_rw(igt_mmio, IOSF_PORT_FLISDSI, SB_CRRDDA_NP, reg, &val);
> + vlv_sideband_rw(mmio_data, IOSF_PORT_FLISDSI, SB_CRRDDA_NP, reg, &val);
>
> return val;
> }
>
> -void intel_flisdsi_reg_write(void *igt_mmio, uint32_t reg, uint32_t val)
> +void intel_flisdsi_reg_write(struct _mmio_data *mmio_data, uint32_t reg, uint32_t val)
> {
> - vlv_sideband_rw(igt_mmio, IOSF_PORT_FLISDSI, SB_CRWRDA_NP, reg, &val);
> + vlv_sideband_rw(mmio_data, IOSF_PORT_FLISDSI, SB_CRWRDA_NP, reg, &val);
> }
>
> -uint32_t intel_iosf_sb_read(void *igt_mmio, uint32_t port, uint32_t reg)
> +uint32_t intel_iosf_sb_read(struct _mmio_data *mmio_data, uint32_t port, uint32_t reg)
> {
> uint32_t val;
>
> - vlv_sideband_rw(igt_mmio, port, SB_CRRDDA_NP, reg, &val);
> + vlv_sideband_rw(mmio_data, port, SB_CRRDDA_NP, reg, &val);
>
> return val;
> }
>
> -void intel_iosf_sb_write(void *igt_mmio, uint32_t port, uint32_t reg,
> - uint32_t val)
> +void intel_iosf_sb_write(struct _mmio_data *mmio_data, uint32_t port,
> + uint32_t reg, uint32_t val)
> {
> - vlv_sideband_rw(igt_mmio, port, SB_CRWRDA_NP, reg, &val);
> + vlv_sideband_rw(mmio_data, port, SB_CRWRDA_NP, reg, &val);
> }
> diff --git a/lib/intel_mmio.c b/lib/intel_mmio.c
> index 24623fc6..dd1566c0 100644
> --- a/lib/intel_mmio.c
> +++ b/lib/intel_mmio.c
> @@ -66,32 +66,17 @@
>
> #define FAKEKEY 0x2468ace0
>
> -/**
> - * igt_global_mmio:
> - *
> - * Pointer to the register range, initialized using intel_register_access_init()
> - * or intel_mmio_use_dump_file(). It is not recommended to use this directly.
> - */
> -void *igt_global_mmio;
> -
> -static struct _mmio_data {
> - int inited;
> - bool safe;
> - uint32_t i915_devid;
> - struct intel_register_map map;
> - int key;
> -} mmio_data;
> -
> /**
> * intel_mmio_use_dump_file:
> + * @mmio_data: mmio structure for IO operations
> * @file: name of the register dump file to open
> *
> - * Sets up #igt_global_mmio to point at the data contained in @file. This allows
> - * the same code to get reused for dumping and decoding from running hardware as
> - * from register dumps.
> + * Sets also up mmio_data->igt_mmio to point at the data contained
> + * in @file. This allows the same code to get reused for dumping and decoding
> + * from running hardware as from register dumps.
> */
> void
> -intel_mmio_use_dump_file(char *file)
> +intel_mmio_use_dump_file(struct _mmio_data *mmio_data, char *file)
> {
> int fd;
> struct stat st;
> @@ -101,22 +86,23 @@ intel_mmio_use_dump_file(char *file)
> "Couldn't open %s\n", file);
>
> fstat(fd, &st);
> - igt_global_mmio = mmap(NULL, st.st_size, PROT_READ|PROT_WRITE, MAP_PRIVATE, fd, 0);
> - igt_fail_on_f(igt_global_mmio == MAP_FAILED,
> + mmio_data->igt_mmio = mmap(NULL, st.st_size, PROT_READ|PROT_WRITE, MAP_PRIVATE, fd, 0);
> + igt_fail_on_f(mmio_data->igt_mmio == MAP_FAILED,
> "Couldn't mmap %s\n", file);
> close(fd);
> }
>
> /**
> * intel_mmio_use_pci_bar:
> + * @mmio_data: mmio structure for IO operations
> * @pci_dev: intel gracphis pci device
> *
> - * Sets up #igt_global_mmio to point at the mmio bar.
> + * Fill a mmio_data stucture with igt_mmio to point at the mmio bar.
> *
> * @pci_dev can be obtained from intel_get_pci_device().
> */
> void
> -intel_mmio_use_pci_bar(struct pci_device *pci_dev, int fd)
> +intel_mmio_use_pci_bar(struct _mmio_data *mmio_data ,struct pci_device *pci_dev, int fd)
> {
> uint32_t devid, gen;
> int mmio_bar, mmio_size;
> @@ -145,14 +131,14 @@ intel_mmio_use_pci_bar(struct pci_device *pci_dev, int fd)
> pci_dev->regions[mmio_bar].base_addr,
> mmio_size,
> PCI_DEV_MAP_FLAG_WRITABLE,
> - &igt_global_mmio);
> + &mmio_data->igt_mmio);
>
> igt_fail_on_f(error != 0, "Couldn't map MMIO region\n");
> } else {
> /* This method is much more convenient when we have many
> * concurrent PCI devices
> */
> - igt_global_mmio = igt_device_map_pci_bar_region(fd, mmio_bar,
> + mmio_data->igt_mmio = igt_device_map_pci_bar_region(fd, mmio_bar,
> mmio_size);
> }
>
> @@ -167,6 +153,7 @@ release_forcewake_lock(int fd)
>
> /**
> * intel_register_access_init:
> + * @mmio_data: mmio structure for IO operations
> * @pci_dev: intel graphics pci device
> * @safe: use safe register access tables
> *
> @@ -174,77 +161,79 @@ release_forcewake_lock(int fd)
> * handling and also allows register access to be checked with an explicit
> * whitelist.
> *
> - * It also initializes #igt_global_mmio like intel_mmio_use_pci_bar().
> + * It also initializes mmio_data->igt_mmio like intel_mmio_use_pci_bar().
> *
> * @pci_dev can be obtained from intel_get_pci_device().
> */
> int
> -intel_register_access_init(struct pci_device *pci_dev, int safe, int fd)
> +intel_register_access_init(struct _mmio_data *mmio_data, struct pci_device *pci_dev, int safe, int fd)
> {
> int ret;
>
> /* after old API is deprecated, remove this */
> - if (igt_global_mmio == NULL)
> - intel_mmio_use_pci_bar(pci_dev, fd);
> + if (mmio_data->igt_mmio == NULL)
> + intel_mmio_use_pci_bar(mmio_data, pci_dev, fd);
>
> - igt_assert(igt_global_mmio != NULL);
> + igt_assert(mmio_data->igt_mmio != NULL);
>
> - if (mmio_data.inited)
> + if (mmio_data->inited)
> return -1;
>
> - mmio_data.safe = (safe != 0 &&
> + mmio_data->safe = (safe != 0 &&
> intel_gen(pci_dev->device_id) >= 4) ? true : false;
> - mmio_data.i915_devid = pci_dev->device_id;
> - if (mmio_data.safe)
> - mmio_data.map = intel_get_register_map(mmio_data.i915_devid);
> + mmio_data->i915_devid = pci_dev->device_id;
> + if (mmio_data->safe)
> + mmio_data->map = intel_get_register_map(mmio_data->i915_devid);
>
> /* Find where the forcewake lock is. Forcewake doesn't exist
> * gen < 6, but the debugfs should do the right things for us.
> */
> ret = igt_open_forcewake_handle(fd);
> if (ret == -1)
> - mmio_data.key = FAKEKEY;
> + mmio_data->key = FAKEKEY;
> else
> - mmio_data.key = ret;
> + mmio_data->key = ret;
>
> - mmio_data.inited++;
> + mmio_data->inited++;
> return 0;
> }
>
> static int
> -intel_register_access_needs_wake(void)
> +intel_register_access_needs_wake(struct _mmio_data *mmio_data)
> {
> - return mmio_data.key != FAKEKEY;
> + return mmio_data->key != FAKEKEY;
> }
>
> /**
> * intel_register_access_needs_fakewake:
> + * @mmio_data: mmio structure for IO operations
> *
> * Returns:
> * Non-zero when forcewake initialization failed.
> */
> -int intel_register_access_needs_fakewake(void)
> +int intel_register_access_needs_fakewake(struct _mmio_data *mmio_data)
> {
> - return mmio_data.key == FAKEKEY;
> + return mmio_data->key == FAKEKEY;
> }
>
> /**
> * intel_register_access_fini:
> + * @mmio_data: mmio structure for IO operations
> *
> * Clean up the register access helper initialized with
> * intel_register_access_init().
> */
> void
> -intel_register_access_fini(void)
> +intel_register_access_fini(struct _mmio_data *mmio_data)
> {
> - if (mmio_data.key && intel_register_access_needs_wake())
> - release_forcewake_lock(mmio_data.key);
> - mmio_data.inited--;
> + if (mmio_data->key && intel_register_access_needs_wake(mmio_data))
> + release_forcewake_lock(mmio_data->key);
> + mmio_data->inited--;
> }
>
> /**
> * intel_register_read:
> - * @igt_mmio maped memory pointer
> + * @mmio_data: mmio structure for IO operations
> * @reg: register offset
> *
> * 32-bit read of the register at @offset. This function only works when the new
> @@ -257,20 +246,20 @@ intel_register_access_fini(void)
> * The value read from the register.
> */
> uint32_t
> -intel_register_read(void *igt_mmio, uint32_t reg)
> +intel_register_read(struct _mmio_data *mmio_data, uint32_t reg)
> {
> struct intel_register_range *range;
> uint32_t ret;
>
> - igt_assert(mmio_data.inited);
> + igt_assert(mmio_data->inited);
>
> - if (intel_gen(mmio_data.i915_devid) >= 6)
> - igt_assert(mmio_data.key != -1);
> + if (intel_gen(mmio_data->i915_devid) >= 6)
> + igt_assert(mmio_data->key != -1);
>
> - if (!mmio_data.safe)
> + if (!mmio_data->safe)
> goto read_out;
>
> - range = intel_get_register_range(mmio_data.map,
> + range = intel_get_register_range(mmio_data->map,
> reg,
> INTEL_RANGE_READ);
>
> @@ -281,14 +270,14 @@ intel_register_read(void *igt_mmio, uint32_t reg)
> }
>
> read_out:
> - ret = *(volatile uint32_t *)((volatile char *)igt_mmio + reg);
> + ret = *(volatile uint32_t *)((volatile char *)mmio_data->igt_mmio + reg);
> out:
> return ret;
> }
>
> /**
> * intel_register_write:
> - * @igt_mmio maped memory pointer
> + * @mmio_data: mmio structure for IO operations
> * @reg: register offset
> * @val: value to write
> *
> @@ -299,19 +288,19 @@ out:
> * white lists.
> */
> void
> -intel_register_write(void *igt_mmio, uint32_t reg, uint32_t val)
> +intel_register_write(struct _mmio_data *mmio_data, uint32_t reg, uint32_t val)
> {
> struct intel_register_range *range;
>
> - igt_assert(mmio_data.inited);
> + igt_assert(mmio_data->inited);
>
> - if (intel_gen(mmio_data.i915_devid) >= 6)
> - igt_assert(mmio_data.key != -1);
> + if (intel_gen(mmio_data->i915_devid) >= 6)
> + igt_assert(mmio_data->key != -1);
>
> - if (!mmio_data.safe)
> + if (!mmio_data->safe)
> goto write_out;
>
> - range = intel_get_register_range(mmio_data.map,
> + range = intel_get_register_range(mmio_data->map,
> reg,
> INTEL_RANGE_WRITE);
>
> @@ -319,7 +308,7 @@ intel_register_write(void *igt_mmio, uint32_t reg, uint32_t val)
> "Register write blocked for safety ""(*0x%08x = 0x%x)\n", reg, val);
>
> write_out:
> - *(volatile uint32_t *)((volatile char *)igt_mmio + reg) = val;
> + *(volatile uint32_t *)((volatile char *)mmio_data->igt_mmio + reg) = val;
> }
>
>
> @@ -331,7 +320,7 @@ write_out:
> * 32-bit read of the register at offset @reg. This function only works when the
> * new register access helper is initialized with intel_register_access_init().
> *
> - * This function directly accesses the #igt_global_mmio without safety checks.
> + * This function directly accesses the igt_mmio without safety checks.
> *
> * Returns:
> * The value read from the register.
> @@ -349,7 +338,7 @@ uint32_t INREG(void *igt_mmio, uint32_t reg)
> * 16-bit read of the register at offset @reg. This function only works when the
> * new register access helper is initialized with intel_register_access_init().
> *
> - * This function directly accesses the #igt_global_mmio without safety checks.
> + * This function directly accesses the igt_mmio without safety checks.
> *
> * Returns:
> * The value read from the register.
> @@ -367,7 +356,7 @@ uint16_t INREG16(void *igt_mmio, uint32_t reg)
> * 8-bit read of the register at offset @reg. This function only works when the
> * new register access helper is initialized with intel_register_access_init().
> *
> - * This function directly accesses the #igt_global_mmio without safety checks.
> + * This function directly accesses the igt_mmio without safety checks.
> *
> * Returns:
> * The value read from the register.
> @@ -387,7 +376,7 @@ uint8_t INREG8(void *igt_mmio, uint32_t reg)
> * when the new register access helper is initialized with
> * intel_register_access_init().
> *
> - * This function directly accesses the #igt_global_mmio without safety checks.
> + * This function directly accesses the igt_mmio without safety checks.
> */
> void OUTREG(void *igt_mmio, uint32_t reg, uint32_t val)
> {
> @@ -403,7 +392,7 @@ void OUTREG(void *igt_mmio, uint32_t reg, uint32_t val)
> * when the new register access helper is initialized with
> * intel_register_access_init().
> *
> - * This function directly accesses the #igt_global_mmio without safety checks.
> + * This function directly accesses the igt_mmio without safety checks.
> */
> void OUTREG16(void *igt_mmio, uint32_t reg, uint16_t val)
> {
> @@ -420,7 +409,7 @@ void OUTREG16(void *igt_mmio, uint32_t reg, uint16_t val)
> * when the new register access helper is initialized with
> * intel_register_access_init().
> *
> - * This function directly accesses the #igt_global_mmio without safety checks.
> + * This function directly accesses the igt_mmio without safety checks.
> */
> void OUTREG8(void *igt_mmio, uint32_t reg, uint8_t val)
> {
> diff --git a/tests/i915/gem_exec_latency.c b/tests/i915/gem_exec_latency.c
> index 39f441d2..e36361d8 100644
> --- a/tests/i915/gem_exec_latency.c
> +++ b/tests/i915/gem_exec_latency.c
> @@ -62,6 +62,9 @@
> static unsigned int ring_size;
> static double rcs_clock;
>
> +void *igt_global_mmio;
> +static struct _mmio_data mmio_data;
> +
> static void
> poll_ring(int fd, unsigned ring, const char *name)
> {
> @@ -680,7 +683,9 @@ igt_main
> if (ring_size > 1024)
> ring_size = 1024;
>
> - intel_register_access_init(intel_get_pci_device(), false, device);
> + intel_register_access_init(&mmio_data, intel_get_pci_device(), false, device);
> + igt_global_mmio = mmio_data.igt_mmio;
> +
> rcs_clock = clockrate(device, RCS_TIMESTAMP);
> igt_info("RCS timestamp clock: %.0fKHz, %.1fns\n",
> rcs_clock / 1e3, 1e9 / rcs_clock);
> diff --git a/tests/i915/gem_exec_parse.c b/tests/i915/gem_exec_parse.c
> index 423d6ea6..98b05267 100644
> --- a/tests/i915/gem_exec_parse.c
> +++ b/tests/i915/gem_exec_parse.c
> @@ -58,6 +58,9 @@
>
> static int parser_version;
>
> +void *igt_global_mmio;
> +static struct _mmio_data mmio_data;
> +
> static int command_parser_version(int fd)
> {
> int version = -1;
> @@ -284,9 +287,9 @@ test_lri(int fd, uint32_t handle, struct test_lri *test)
> test->name, test->reg, test->test_val,
> expected_errno, expect);
>
> - intel_register_write(igt_global_mmio, test->reg, test->init_val);
> + intel_register_write(&mmio_data, test->reg, test->init_val);
>
> - igt_assert_eq_u32((intel_register_read(igt_global_mmio, test->reg) &
> + igt_assert_eq_u32((intel_register_read(&mmio_data, test->reg) &
> test->read_mask),
> test->init_val);
>
> @@ -296,7 +299,7 @@ test_lri(int fd, uint32_t handle, struct test_lri *test)
> expected_errno);
> gem_sync(fd, handle);
>
> - igt_assert_eq_u32((intel_register_read(igt_global_mmio, test->reg) &
> + igt_assert_eq_u32((intel_register_read(&mmio_data, test->reg) &
> test->read_mask),
> expect);
> }
> @@ -530,7 +533,8 @@ igt_main
> #undef REG
>
> igt_fixture {
> - intel_register_access_init(intel_get_pci_device(), 0, fd);
> + intel_register_access_init(&mmio_data, intel_get_pci_device(), 0, fd);
> + igt_global_mmio = mmio_data.igt_mmio;
> }
>
> for (int i = 0; i < ARRAY_SIZE(lris); i++) {
> @@ -543,7 +547,7 @@ igt_main
> }
>
> igt_fixture {
> - intel_register_access_fini();
> + intel_register_access_fini(&mmio_data);
> }
> }
>
> diff --git a/tests/i915/i915_pm_lpsp.c b/tests/i915/i915_pm_lpsp.c
> index f69c88f6..cbbe6a4b 100644
> --- a/tests/i915/i915_pm_lpsp.c
> +++ b/tests/i915/i915_pm_lpsp.c
> @@ -30,6 +30,8 @@
> #include <fcntl.h>
> #include <unistd.h>
>
> +void *igt_global_mmio;
> +static struct _mmio_data mmio_data;
>
> static bool supports_lpsp(uint32_t devid)
> {
> @@ -210,7 +212,8 @@ igt_main
>
> igt_require(supports_lpsp(devid));
>
> - intel_register_access_init(intel_get_pci_device(), 0, drm_fd);
> + intel_register_access_init(&mmio_data, intel_get_pci_device(), 0, drm_fd);
> + igt_global_mmio = mmio_data.igt_mmio;
>
> kmstest_set_vt_graphics_mode();
> }
> @@ -227,7 +230,7 @@ igt_main
> igt_fixture {
> int i;
>
> - intel_register_access_fini();
> + intel_register_access_fini(&mmio_data);
> for (i = 0; i < drm_res->count_connectors; i++)
> drmModeFreeConnector(drm_connectors[i]);
> drmModeFreeResources(drm_res);
> diff --git a/tools/intel_audio_dump.c b/tools/intel_audio_dump.c
> index 86664478..984c7da4 100644
> --- a/tools/intel_audio_dump.c
> +++ b/tools/intel_audio_dump.c
> @@ -41,6 +41,8 @@ static uint32_t devid;
>
> static int aud_reg_base = 0; /* base address of audio registers */
> static int disp_reg_base = 0; /* base address of display registers */
> +void *igt_global_mmio;
> +static struct _mmio_data mmio_data;
>
> #define IS_HASWELL_PLUS(devid) (IS_HASWELL(devid) || IS_BROADWELL(devid))
>
> @@ -2498,9 +2500,10 @@ int main(int argc, char **argv)
> do_self_tests();
>
> if (argc == 2)
> - intel_mmio_use_dump_file(argv[1]);
> + intel_mmio_use_dump_file(&mmio_data, argv[1]);
> else
> - intel_mmio_use_pci_bar(pci_dev, -1);
> + intel_mmio_use_pci_bar(&mmio_data, pci_dev, -1);
Newline needed here.
> + igt_global_mmio = mmio_data.igt_mmio;
>
> printf("%s audio registers:\n\n", intel_get_device_info(devid)->codename);
> if (IS_VALLEYVIEW(devid)) {
> diff --git a/tools/intel_backlight.c b/tools/intel_backlight.c
> index 85d099d7..4e6ad4bb 100644
> --- a/tools/intel_backlight.c
> +++ b/tools/intel_backlight.c
> @@ -35,12 +35,15 @@
> #include "intel_reg.h"
>
> /* XXX PCH only today */
> +static struct _mmio_data mmio_data;
> +void *igt_global_mmio;
>
> int main(int argc, char** argv)
> {
> uint32_t current, max;
>
> - intel_mmio_use_pci_bar(intel_get_pci_device(), -1);
> + intel_mmio_use_pci_bar(&mmio_data, intel_get_pci_device(), -1);
> + igt_global_mmio = mmio_data.igt_mmio;
>
> current = INREG(igt_global_mmio, BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
> max = INREG(igt_global_mmio, BLC_PWM_PCH_CTL2) >> 16;
> diff --git a/tools/intel_display_poller.c b/tools/intel_display_poller.c
> index e1094d39..af7e40cc 100644
> --- a/tools/intel_display_poller.c
> +++ b/tools/intel_display_poller.c
> @@ -59,6 +59,8 @@ enum test {
>
> static uint32_t vlv_offset;
> static uint16_t pipe_offset[3] = { 0, 0x1000, 0x2000, };
> +void *igt_global_mmio;
> +static struct _mmio_data mmio_data;
>
> #define PIPE_REG(pipe, reg_a) (pipe_offset[(pipe)] + (reg_a))
>
> @@ -1187,7 +1189,8 @@ int main(int argc, char *argv[])
> break;
> }
>
> - intel_register_access_init(intel_get_pci_device(), 0, -1);
> + intel_register_access_init(&mmio_data, intel_get_pci_device(), 0, -1);
> + igt_global_mmio = mmio_data.igt_mmio;
>
> printf("%s?\n", test_name(test, pipe, bit, test_pixelcount));
>
> @@ -1262,7 +1265,7 @@ int main(int argc, char *argv[])
> assert(0);
> }
>
> - intel_register_access_fini();
> + intel_register_access_fini(&mmio_data);
>
> if (quit)
> return 0;
> diff --git a/tools/intel_forcewaked.c b/tools/intel_forcewaked.c
> index e057f5fe..e52db5ed 100644
> --- a/tools/intel_forcewaked.c
> +++ b/tools/intel_forcewaked.c
> @@ -39,6 +39,8 @@
> #include "drmtest.h"
>
> bool daemonized;
> +void *igt_global_mmio;
> +static struct _mmio_data mmio_data;
>
> #define INFO_PRINT(...) \
> do { \
> @@ -59,7 +61,7 @@ help(char *prog) {
> static int
> is_alive(void) {
> /* Read the timestamp, which should *almost* always be !0 */
> - return (intel_register_read(igt_global_mmio, 0x2358) != 0);
> + return (intel_register_read(&mmio_data, 0x2358) != 0);
> }
>
> int main(int argc, char *argv[])
> @@ -80,7 +82,8 @@ int main(int argc, char *argv[])
> INFO_PRINT("started daemon");
> }
>
> - ret = intel_register_access_init(intel_get_pci_device(), 1, -1);
> + ret = intel_register_access_init(&mmio_data, intel_get_pci_device(), 1, -1);
> + igt_global_mmio = mmio_data.igt_mmio;
> if (ret) {
> INFO_PRINT("Couldn't init register access\n");
> exit(1);
> @@ -90,14 +93,15 @@ int main(int argc, char *argv[])
> while(1) {
> if (!is_alive()) {
> INFO_PRINT("gpu reset? restarting daemon\n");
> - intel_register_access_fini();
> - ret = intel_register_access_init(intel_get_pci_device(), 1, -1);
> + intel_register_access_fini(&mmio_data);
> + ret = intel_register_access_init(&mmio_data, intel_get_pci_device(), 1, -1);
> + igt_global_mmio = mmio_data.igt_mmio;
> if (ret)
> INFO_PRINT("Reg access init fail\n");
> }
> sleep(1);
> }
> - intel_register_access_fini();
> + intel_register_access_fini(&mmio_data);
> INFO_PRINT("Forcewake unlock\n");
>
> if (daemonized) {
> diff --git a/tools/intel_gpu_time.c b/tools/intel_gpu_time.c
> index d90b816a..d7acfd2b 100644
> --- a/tools/intel_gpu_time.c
> +++ b/tools/intel_gpu_time.c
> @@ -41,6 +41,8 @@
> #define SAMPLES_PER_SEC 10000
>
> static volatile int goddo;
> +void *igt_global_mmio;
> +static struct _mmio_data mmio_data;
>
> static pid_t spawn(char **argv)
> {
> @@ -67,7 +69,8 @@ int main(int argc, char **argv)
> static struct rusage rusage;
> int status;
>
> - intel_mmio_use_pci_bar(intel_get_pci_device(), -1);
> + intel_mmio_use_pci_bar(&mmio_data, intel_get_pci_device(), -1);
> + igt_global_mmio = mmio_data.igt_mmio;
>
> if (argc == 1) {
> fprintf(stderr, "usage: %s cmd [args...]\n", argv[0]);
> diff --git a/tools/intel_infoframes.c b/tools/intel_infoframes.c
> index 689f5faa..633a5e10 100644
> --- a/tools/intel_infoframes.c
> +++ b/tools/intel_infoframes.c
> @@ -262,6 +262,8 @@ const char *dip_frequency_names[] = {
> "reserved (invalid)"
> };
>
> +void *igt_global_mmio;
> +static struct _mmio_data mmio_data;
> struct pci_device *pci_dev;
> int gen = 0;
>
> @@ -1108,7 +1110,8 @@ int main(int argc, char *argv[])
> " perfectly: the Kernel might undo our changes.\n");
>
> pci_dev = intel_get_pci_device();
> - intel_register_access_init(pci_dev, 0, -1);
> + intel_register_access_init(&mmio_data, pci_dev, 0, -1);
> + igt_global_mmio = mmio_data.igt_mmio;
> intel_check_pch();
>
> if (IS_GEN4(pci_dev->device_id))
> @@ -1256,6 +1259,6 @@ int main(int argc, char *argv[])
> }
>
> out:
> - intel_register_access_fini();
> + intel_register_access_fini(&mmio_data);
> return ret;
> }
> diff --git a/tools/intel_l3_parity.c b/tools/intel_l3_parity.c
> index 014ac9f1..7a461a54 100644
> --- a/tools/intel_l3_parity.c
> +++ b/tools/intel_l3_parity.c
> @@ -44,6 +44,8 @@
> #include "intel_l3_parity.h"
>
> static unsigned int devid;
> +void *igt_global_mmio;
> +static struct _mmio_data mmio_data;
> /* L3 size is always a function of banks. The number of banks cannot be
> * determined by number of slices however */
> static inline int num_banks(void) {
> @@ -189,7 +191,8 @@ int main(int argc, char *argv[])
> if (intel_gen(devid) < 7 || IS_VALLEYVIEW(devid))
> exit(77);
>
> - assert(intel_register_access_init(intel_get_pci_device(), 0, device) == 0);
> + assert(intel_register_access_init(&mmio_data, intel_get_pci_device(), 0, device) == 0);
> + igt_global_mmio = mmio_data.igt_mmio;
>
> dir = igt_sysfs_open(device);
>
> @@ -211,7 +214,7 @@ int main(int argc, char *argv[])
> * now. Just be aware of this if for some reason a hang is reported
> * when using this tool.
> */
> - dft = intel_register_read(igt_global_mmio, 0xb038);
> + dft = intel_register_read(&mmio_data, 0xb038);
>
> while (1) {
> int c, option_index = 0;
> @@ -357,12 +360,11 @@ int main(int argc, char *argv[])
> assert(i < 2);
> dft |= i << 1; /* slice */
> dft |= 1 << 0; /* enable */
> - intel_register_write(igt_global_mmio, 0xb038,
> - dft);
> + intel_register_write(&mmio_data, 0xb038, dft);
> break;
> case 'u':
> - intel_register_write(igt_global_mmio, 0xb038,
> - dft & ~(1 << 0));
> + intel_register_write(&mmio_data, 0xb038, dft &
> + ~(1 << 0));
> break;
> case 'L':
> break;
> @@ -371,7 +373,7 @@ int main(int argc, char *argv[])
> }
> }
>
> - intel_register_access_fini();
> + intel_register_access_fini(&mmio_data);
> if (action == 'l')
> exit(EXIT_SUCCESS);
>
> diff --git a/tools/intel_lid.c b/tools/intel_lid.c
> index a4132d56..c589822b 100644
> --- a/tools/intel_lid.c
> +++ b/tools/intel_lid.c
> @@ -52,6 +52,9 @@ enum lid_status {
> #define ACPI_BUTTON "/proc/acpi/button/"
> #define ACPI_LID "/proc/acpi/button/lid/"
>
> +void *igt_global_mmio;
> +static struct _mmio_data mmio_data;
> +
> static int i830_lvds_acpi_lid_state(void)
> {
> int fd;
> @@ -119,7 +122,8 @@ int main(int argc, char **argv)
> {
> int swf14, acpi_lid;
>
> - intel_mmio_use_pci_bar(intel_get_pci_device(), -1);
> + intel_mmio_use_pci_bar(&mmio_data, intel_get_pci_device(), -1);
> + igt_global_mmio = mmio_data.igt_mmio;
>
> while (1) {
> swf14 = INREG(igt_global_mmio, SWF14);
> diff --git a/tools/intel_panel_fitter.c b/tools/intel_panel_fitter.c
> index 26843d7c..9663d0cc 100644
> --- a/tools/intel_panel_fitter.c
> +++ b/tools/intel_panel_fitter.c
> @@ -35,6 +35,8 @@
> #include "intel_reg.h"
> #include "drmtest.h"
>
> +void *igt_global_mmio;
> +static struct _mmio_data mmio_data;
> int gen;
>
> uint32_t HTOTAL[] = { 0x60000, 0x61000, 0x62000 };
> @@ -280,7 +282,8 @@ int main (int argc, char *argv[])
> "solution that may or may not work. Use it at your own risk.\n");
>
> pci_dev = intel_get_pci_device();
> - intel_register_access_init(pci_dev, 0, -1);
> + intel_register_access_init(&mmio_data, pci_dev, 0, -1);
> + igt_global_mmio = mmio_data.igt_mmio;
> devid = pci_dev->device_id;
>
> if (!HAS_PCH_SPLIT(devid)) {
> @@ -342,6 +345,6 @@ int main (int argc, char *argv[])
> }
>
> out:
> - intel_register_access_fini();
> + intel_register_access_fini(&mmio_data);
> return ret;
> }
> diff --git a/tools/intel_perf_counters.c b/tools/intel_perf_counters.c
> index be573b55..38f71419 100644
> --- a/tools/intel_perf_counters.c
> +++ b/tools/intel_perf_counters.c
> @@ -300,6 +300,8 @@ uint32_t *totals;
> uint32_t *last_counter;
> static drm_intel_bufmgr *bufmgr;
> struct intel_batchbuffer *batch;
> +void *igt_global_mmio;
> +static struct _mmio_data mmio_data;
>
> /* DW0 */
> #define GEN5_MI_REPORT_PERF_COUNT ((0x26 << 23) | (3 - 2))
> @@ -483,10 +485,12 @@ main(int argc, char **argv)
>
> if (oacontrol) {
> /* Forcewake */
> - intel_register_access_init(intel_get_pci_device(), 0, fd);
> + intel_register_access_init(&mmio_data, intel_get_pci_device(),
> + 0, fd);
> + igt_global_mmio = mmio_data.igt_mmio;
>
> /* Enable performance counters */
> - intel_register_write(igt_global_mmio, OACONTROL,
> + intel_register_write(&mmio_data, OACONTROL,
> counter_format <<
> OACONTROL_COUNTER_SELECT_SHIFT |
> PERFORMANCE_COUNTER_ENABLE);
> @@ -521,10 +525,10 @@ main(int argc, char **argv)
>
> if (oacontrol) {
> /* Disable performance counters */
> - intel_register_write(igt_global_mmio, OACONTROL, 0);
> + intel_register_write(&mmio_data, OACONTROL, 0);
>
> /* Forcewake */
> - intel_register_access_fini();
> + intel_register_access_fini(&mmio_data);
> }
>
> free(totals);
> diff --git a/tools/intel_reg.c b/tools/intel_reg.c
> index debd8c9a..3a90589f 100644
> --- a/tools/intel_reg.c
> +++ b/tools/intel_reg.c
> @@ -84,6 +84,9 @@ struct config {
> int verbosity;
> };
>
> +void *igt_global_mmio;
> +static struct _mmio_data mmio_data;
> +
> /* port desc must have been set */
> static int set_reg_by_addr(struct config *config, struct reg *reg,
> uint32_t addr)
> @@ -390,7 +393,7 @@ static int read_register(struct config *config, struct reg *reg, uint32_t *valp)
> reg->port_desc.name);
> return -1;
> }
> - val = intel_iosf_sb_read(igt_global_mmio, reg->port_desc.port,
> + val = intel_iosf_sb_read(&mmio_data, reg->port_desc.port,
> reg->addr);
> break;
> default:
> @@ -558,9 +561,10 @@ static int intel_reg_read(struct config *config, int argc, char *argv[])
> }
>
> if (config->mmiofile)
> - intel_mmio_use_dump_file(config->mmiofile);
> + intel_mmio_use_dump_file(&mmio_data, config->mmiofile);
> else
> - intel_register_access_init(config->pci_dev, 0, -1);
> + intel_register_access_init(&mmio_data, config->pci_dev, 0, -1);
Newline needed here.
> + igt_global_mmio = mmio_data.igt_mmio;
>
> for (i = 1; i < argc; i++) {
> struct reg reg;
> @@ -576,7 +580,7 @@ static int intel_reg_read(struct config *config, int argc, char *argv[])
> }
> }
>
> - intel_register_access_fini();
> + intel_register_access_fini(&mmio_data);
>
> return EXIT_SUCCESS;
> }
> @@ -590,7 +594,8 @@ static int intel_reg_write(struct config *config, int argc, char *argv[])
> return EXIT_FAILURE;
> }
>
> - intel_register_access_init(config->pci_dev, 0, -1);
> + intel_register_access_init(&mmio_data,config->pci_dev, 0, -1);
> + igt_global_mmio = mmio_data.igt_mmio;
>
> for (i = 1; i < argc; i += 2) {
> struct reg reg;
> @@ -615,7 +620,7 @@ static int intel_reg_write(struct config *config, int argc, char *argv[])
> write_register(config, ®, val);
> }
>
> - intel_register_access_fini();
> + intel_register_access_fini(&mmio_data);
>
> return EXIT_SUCCESS;
> }
> @@ -626,9 +631,10 @@ static int intel_reg_dump(struct config *config, int argc, char *argv[])
> int i;
>
> if (config->mmiofile)
> - intel_mmio_use_dump_file(config->mmiofile);
> + intel_mmio_use_dump_file(&mmio_data, config->mmiofile);
> else
> - intel_register_access_init(config->pci_dev, 0, -1);
> + intel_register_access_init(&mmio_data, config->pci_dev, 0, -1);
New line needed here.
> + igt_global_mmio = mmio_data.igt_mmio;
>
> for (i = 0; i < config->regcount; i++) {
> reg = &config->regs[i];
> @@ -640,7 +646,7 @@ static int intel_reg_dump(struct config *config, int argc, char *argv[])
> dump_register(config, &config->regs[i]);
> }
>
> - intel_register_access_fini();
> + intel_register_access_fini(&mmio_data);
>
> return EXIT_SUCCESS;
> }
> @@ -654,7 +660,8 @@ static int intel_reg_snapshot(struct config *config, int argc, char *argv[])
> return EXIT_FAILURE;
> }
>
> - intel_mmio_use_pci_bar(config->pci_dev, -1);
> + intel_mmio_use_pci_bar(&mmio_data, config->pci_dev, -1);
> + igt_global_mmio = mmio_data.igt_mmio;
>
> /* XXX: error handling */
> if (write(1, igt_global_mmio, config->pci_dev->regions[mmio_bar].size) == -1)
> diff --git a/tools/intel_reg_checker.c b/tools/intel_reg_checker.c
> index 1d40cd82..1cc9fa76 100644
> --- a/tools/intel_reg_checker.c
> +++ b/tools/intel_reg_checker.c
> @@ -32,6 +32,9 @@
> static uint32_t devid;
> static int gen;
>
> +static struct _mmio_data mmio_data;
> +void *igt_global_mmio;
> +
> static uint32_t
> read_and_print_reg(const char *name, uint32_t reg)
> {
> @@ -345,7 +348,8 @@ int main(int argc, char** argv)
>
> dev = intel_get_pci_device();
> devid = dev->device_id;
> - intel_mmio_use_pci_bar(dev, -1);
> + intel_mmio_use_pci_bar(&mmio_data, dev, -1);
> + igt_global_mmio = mmio_data.igt_mmio;
>
> if (IS_GEN7(devid))
> gen = 7;
> diff --git a/tools/intel_watermark.c b/tools/intel_watermark.c
> index 372947de..3f267fa6 100644
> --- a/tools/intel_watermark.c
> +++ b/tools/intel_watermark.c
> @@ -35,6 +35,8 @@
>
> static uint32_t display_base;
> static uint32_t devid;
> +void *igt_global_mmio;
> +static struct _mmio_data mmio_data;
>
> static uint32_t read_reg(uint32_t addr)
> {
> @@ -249,7 +251,8 @@ static void skl_wm_dump(void)
> uint32_t plane_ctl[num_pipes][max_planes];
> uint32_t wm_linetime[num_pipes];
>
> - intel_register_access_init(intel_get_pci_device(), 0, -1);
> + intel_register_access_init(&mmio_data, intel_get_pci_device(), 0, -1);
> + igt_global_mmio = mmio_data.igt_mmio;
>
> for (pipe = 0; pipe < num_pipes; pipe++) {
> int num_planes = skl_num_planes(devid, pipe);
> @@ -469,7 +472,8 @@ static void ilk_wm_dump(void)
> int num_pipes = intel_gen(devid) >= 7 ? 3 : 2;
> struct ilk_wm wm = {};
>
> - intel_register_access_init(intel_get_pci_device(), 0, -1);
> + intel_register_access_init(&mmio_data, intel_get_pci_device(), 0, -1);
> + igt_global_mmio = mmio_data.igt_mmio;
>
> for (i = 0; i < num_pipes; i++) {
> dspcntr[i] = read_reg(0x70180 + i * 0x1000);
> @@ -505,7 +509,7 @@ static void ilk_wm_dump(void)
> if (IS_BROADWELL(devid) || IS_HASWELL(devid))
> wm_misc = read_reg(0x45260);
>
> - intel_register_access_fini();
> + intel_register_access_fini(&mmio_data);
>
> for (i = 0; i < num_pipes; i++)
> printf(" WM_PIPE_%c = 0x%08x\n", pipe_name(i), wm_pipe[i]);
> @@ -619,7 +623,8 @@ static void vlv_wm_dump(void)
> uint32_t dsp_ss_pm, ddr_setup2;
> struct gmch_wm wms[MAX_PLANE] = {};
>
> - intel_register_access_init(intel_get_pci_device(), 0, -1);
> + intel_register_access_init(&mmio_data, intel_get_pci_device(), 0, -1);
> + igt_global_mmio = mmio_data.igt_mmio;
>
> dsparb = read_reg(0x70030);
> dsparb2 = read_reg(0x70060);
> @@ -650,13 +655,13 @@ static void vlv_wm_dump(void)
>
> ddl3 = read_reg(0x70058);
>
> - intel_punit_read(igt_global_mmio, 0x36, &dsp_ss_pm);
> - intel_punit_read(igt_global_mmio, 0x139, &ddr_setup2);
> + intel_punit_read(&mmio_data, 0x36, &dsp_ss_pm);
> + intel_punit_read(&mmio_data, 0x139, &ddr_setup2);
> } else {
> fw7 = read_reg(0x7007c);
> }
>
> - intel_register_access_fini();
> + intel_register_access_fini(&mmio_data);
>
> printf(" FW1 = 0x%08x\n", fw1);
> printf(" FW2 = 0x%08x\n", fw2);
> @@ -835,7 +840,8 @@ static void g4x_wm_dump(void)
> uint32_t mi_arb_state;
> struct gmch_wm wms[MAX_PLANE] = {};
>
> - intel_register_access_init(intel_get_pci_device(), 0, -1);
> + intel_register_access_init(&mmio_data, intel_get_pci_device(), 0, -1);
> + igt_global_mmio = mmio_data.igt_mmio;
>
> dspacntr = read_reg(0x70180);
> dspbcntr = read_reg(0x71180);
> @@ -846,7 +852,7 @@ static void g4x_wm_dump(void)
> mi_display_power_down = read_reg(0x20e0);
> mi_arb_state = read_reg(0x20e4);
>
> - intel_register_access_fini();
> + intel_register_access_fini(&mmio_data);
>
> printf(" DSPACNTR = 0x%08x\n", dspacntr);
> printf(" DSPBCNTR = 0x%08x\n", dspbcntr);
> @@ -921,7 +927,8 @@ static void gen4_wm_dump(void)
> uint32_t mi_arb_state;
> struct gmch_wm wms[MAX_PLANE] = {};
>
> - intel_register_access_init(intel_get_pci_device(), 0, -1);
> + intel_register_access_init(&mmio_data, intel_get_pci_device(), 0, -1);
> + igt_global_mmio = mmio_data.igt_mmio;
>
> dsparb = read_reg(0x70030);
> fw1 = read_reg(0x70034);
> @@ -930,7 +937,7 @@ static void gen4_wm_dump(void)
> mi_display_power_down = read_reg(0x20e0);
> mi_arb_state = read_reg(0x20e4);
>
> - intel_register_access_fini();
> + intel_register_access_fini(&mmio_data);
>
> printf(" FW1 = 0x%08x\n", fw1);
> printf(" FW2 = 0x%08x\n", fw2);
> @@ -992,7 +999,8 @@ static void pnv_wm_dump(void)
> uint32_t cbr;
> struct gmch_wm wms[MAX_PLANE] = {};
>
> - intel_register_access_init(intel_get_pci_device(), 0, -1);
> + intel_register_access_init(&mmio_data, intel_get_pci_device(), 0, -1);
> + igt_global_mmio = mmio_data.igt_mmio;
>
> dsparb = read_reg(0x70030);
> fw1 = read_reg(0x70034);
> @@ -1002,7 +1010,7 @@ static void pnv_wm_dump(void)
> mi_display_power_down = read_reg(0x20e0);
> mi_arb_state = read_reg(0x20e4);
>
> - intel_register_access_fini();
> + intel_register_access_fini(&mmio_data);
>
> printf(" DSPARB = 0x%08x\n", dsparb);
> printf(" FW1 = 0x%08x\n", fw1);
> @@ -1082,7 +1090,8 @@ static void gen3_wm_dump(void)
> uint32_t mi_arb_state;
> struct gmch_wm wms[MAX_PLANE] = {};
>
> - intel_register_access_init(intel_get_pci_device(), 0, -1);
> + intel_register_access_init(&mmio_data, intel_get_pci_device(), 0, -1);
> + igt_global_mmio = mmio_data.igt_mmio;
>
> dsparb = read_reg(0x70030);
> instpm = read_reg(0x20c0);
> @@ -1090,7 +1099,7 @@ static void gen3_wm_dump(void)
> fw_blc_self = read_reg(0x20e0);
> mi_arb_state = read_reg(0x20e4);
>
> - intel_register_access_fini();
> + intel_register_access_fini(&mmio_data);
>
> printf(" DSPARB = 0x%08x\n", dsparb);
> printf(" FW_BLC = 0x%016" PRIx64 "\n", fw_blc);
> @@ -1151,7 +1160,8 @@ static void gen2_wm_dump(void)
> uint32_t mi_state;
> struct gmch_wm wms[MAX_PLANE] = {};
>
> - intel_register_access_init(intel_get_pci_device(), 0, -1);
> + intel_register_access_init(&mmio_data, intel_get_pci_device(), 0, -1);
> + igt_global_mmio = mmio_data.igt_mmio;
>
> dsparb = read_reg(0x70030);
> mem_mode = read_reg(0x20cc);
> @@ -1159,7 +1169,7 @@ static void gen2_wm_dump(void)
> fw_blc_self = read_reg(0x20e0);
> mi_state = read_reg(0x20e4);
>
> - intel_register_access_fini();
> + intel_register_access_fini(&mmio_data);
>
> printf(" DSPARB = 0x%08x\n", dsparb);
> printf(" MEM_MODE = 0x%08x\n", mem_mode);
> --
> 2.20.1
>
I made it to the end, finally. I hope that long patches like this one will be an
exception, not a rule :)
Kasia
> _______________________________________________
> igt-dev mailing list
> igt-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/igt-dev
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
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end of thread, other threads:[~2019-04-17 10:55 UTC | newest]
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2019-04-15 8:59 [igt-dev] [PATCH i-g-t v3 0/5] Remove global igt_global_mmio Daniel Mrzyglod
2019-04-15 8:59 ` [igt-dev] [PATCH i-g-t v3 1/5] lib/igt_device: add igt_device_get_pci_addr by fd Daniel Mrzyglod
2019-04-15 13:24 ` Katarzyna Dec
2019-04-15 15:28 ` Mrzyglod, Daniel T
2019-04-15 8:59 ` [igt-dev] [PATCH i-g-t v3 2/5] lib/igt_device: add igt_device_map_pci_bar_region Daniel Mrzyglod
2019-04-15 13:37 ` Katarzyna Dec
2019-04-15 8:59 ` [igt-dev] [PATCH i-g-t v3 3/5] lib/intel_mmio: different functions are used for mapping if fd is known Daniel Mrzyglod
2019-04-15 13:50 ` Katarzyna Dec
2019-04-15 8:59 ` [igt-dev] [PATCH i-g-t v3 4/5] lib/intel_mmio: extend read write registers functions by a pointer for mmaped area Daniel Mrzyglod
2019-04-17 10:20 ` Katarzyna Dec
2019-04-15 8:59 ` [igt-dev] [PATCH i-g-t v3 5/5] lib/intel_mmio: remove igt_global_mmio and move pointer to mmio_data structure Daniel Mrzyglod
2019-04-17 10:55 ` Katarzyna Dec
2019-04-15 10:34 ` [igt-dev] ✓ Fi.CI.BAT: success for Remove global igt_global_mmio (rev3) Patchwork
2019-04-15 11:33 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
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