* [PATCH] drm/i915/icl: Whitelist GEN9_SLICE_COMMON_ECO_CHICKEN1
@ 2019-04-15 11:43 Tvrtko Ursulin
2019-04-15 11:45 ` Chris Wilson
` (5 more replies)
0 siblings, 6 replies; 18+ messages in thread
From: Tvrtko Ursulin @ 2019-04-15 11:43 UTC (permalink / raw)
To: Intel-gfx; +Cc: xiaogang.li, kevin.ma
From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
WaEnableStateCacheRedirectToCS context workaround configures the L3 cache
to benefit 3d workloads but media has different requirements.
Whitelist the register to allow media re-configuring it to their liking.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: kevin.ma@intel.com
Cc: xiaogang.li@intel.com
---
drivers/gpu/drm/i915/intel_workarounds.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c
index ccaf63679435..6458d161204f 100644
--- a/drivers/gpu/drm/i915/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/intel_workarounds.c
@@ -1050,6 +1050,9 @@ static void icl_whitelist_build(struct i915_wa_list *w)
/* WaAllowUMDToModifySamplerMode:icl */
whitelist_reg(w, GEN10_SAMPLER_MODE);
+
+ /* WaEnableStateCacheRedirectToCS:icl */
+ whitelist_reg(w, GEN9_SLICE_COMMON_ECO_CHICKEN1);
}
void intel_engine_init_whitelist(struct intel_engine_cs *engine)
--
2.19.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 18+ messages in thread
* Re: [PATCH] drm/i915/icl: Whitelist GEN9_SLICE_COMMON_ECO_CHICKEN1
2019-04-15 11:43 [PATCH] drm/i915/icl: Whitelist GEN9_SLICE_COMMON_ECO_CHICKEN1 Tvrtko Ursulin
@ 2019-04-15 11:45 ` Chris Wilson
2019-04-15 12:25 ` Tvrtko Ursulin
2019-04-15 12:38 ` ✓ Fi.CI.BAT: success for " Patchwork
` (4 subsequent siblings)
5 siblings, 1 reply; 18+ messages in thread
From: Chris Wilson @ 2019-04-15 11:45 UTC (permalink / raw)
To: Intel-gfx, Tvrtko Ursulin; +Cc: kevin.ma, xiaogang.li
Quoting Tvrtko Ursulin (2019-04-15 12:43:07)
> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>
> WaEnableStateCacheRedirectToCS context workaround configures the L3 cache
> to benefit 3d workloads but media has different requirements.
>
> Whitelist the register to allow media re-configuring it to their liking.
>
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Cc: kevin.ma@intel.com
> Cc: xiaogang.li@intel.com
> ---
> drivers/gpu/drm/i915/intel_workarounds.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c
> index ccaf63679435..6458d161204f 100644
> --- a/drivers/gpu/drm/i915/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/intel_workarounds.c
> @@ -1050,6 +1050,9 @@ static void icl_whitelist_build(struct i915_wa_list *w)
>
> /* WaAllowUMDToModifySamplerMode:icl */
> whitelist_reg(w, GEN10_SAMPLER_MODE);
> +
> + /* WaEnableStateCacheRedirectToCS:icl */
> + whitelist_reg(w, GEN9_SLICE_COMMON_ECO_CHICKEN1);
Have we checked this is context saved?
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH] drm/i915/icl: Whitelist GEN9_SLICE_COMMON_ECO_CHICKEN1
2019-04-15 11:45 ` Chris Wilson
@ 2019-04-15 12:25 ` Tvrtko Ursulin
2019-04-15 16:17 ` Chris Wilson
0 siblings, 1 reply; 18+ messages in thread
From: Tvrtko Ursulin @ 2019-04-15 12:25 UTC (permalink / raw)
To: Chris Wilson, Intel-gfx; +Cc: kevin.ma, xiaogang.li
On 15/04/2019 12:45, Chris Wilson wrote:
> Quoting Tvrtko Ursulin (2019-04-15 12:43:07)
>> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>>
>> WaEnableStateCacheRedirectToCS context workaround configures the L3 cache
>> to benefit 3d workloads but media has different requirements.
>>
>> Whitelist the register to allow media re-configuring it to their liking.
>>
>> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>> Cc: kevin.ma@intel.com
>> Cc: xiaogang.li@intel.com
>> ---
>> drivers/gpu/drm/i915/intel_workarounds.c | 3 +++
>> 1 file changed, 3 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c
>> index ccaf63679435..6458d161204f 100644
>> --- a/drivers/gpu/drm/i915/intel_workarounds.c
>> +++ b/drivers/gpu/drm/i915/intel_workarounds.c
>> @@ -1050,6 +1050,9 @@ static void icl_whitelist_build(struct i915_wa_list *w)
>>
>> /* WaAllowUMDToModifySamplerMode:icl */
>> whitelist_reg(w, GEN10_SAMPLER_MODE);
>> +
>> + /* WaEnableStateCacheRedirectToCS:icl */
>> + whitelist_reg(w, GEN9_SLICE_COMMON_ECO_CHICKEN1);
>
> Have we checked this is context saved?
It is listed as such. But I haven't checked on actual hardware.
Regards,
Tvrtko
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 18+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915/icl: Whitelist GEN9_SLICE_COMMON_ECO_CHICKEN1
2019-04-15 11:43 [PATCH] drm/i915/icl: Whitelist GEN9_SLICE_COMMON_ECO_CHICKEN1 Tvrtko Ursulin
2019-04-15 11:45 ` Chris Wilson
@ 2019-04-15 12:38 ` Patchwork
2019-04-15 14:24 ` ✓ Fi.CI.IGT: " Patchwork
` (3 subsequent siblings)
5 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2019-04-15 12:38 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/icl: Whitelist GEN9_SLICE_COMMON_ECO_CHICKEN1
URL : https://patchwork.freedesktop.org/series/59494/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5934 -> Patchwork_12797
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://patchwork.freedesktop.org/api/1.0/series/59494/revisions/1/mbox/
Known issues
------------
Here are the changes found in Patchwork_12797 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_selftest@live_execlists:
- fi-apl-guc: PASS -> INCOMPLETE [fdo#103927] / [fdo#109720]
* igt@kms_busy@basic-flip-a:
- fi-bsw-n3050: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +1
* igt@kms_chamelium@hdmi-crc-fast:
- fi-bsw-n3050: NOTRUN -> SKIP [fdo#109271] +57
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence:
- fi-glk-dsi: PASS -> FAIL [fdo#103191]
* igt@runner@aborted:
- fi-apl-guc: NOTRUN -> FAIL [fdo#108622] / [fdo#109720]
#### Possible fixes ####
* igt@i915_selftest@live_contexts:
- fi-bdw-gvtdvm: DMESG-FAIL [fdo#110235 ] -> PASS
* igt@i915_selftest@live_hangcheck:
- fi-skl-iommu: INCOMPLETE [fdo#108602] / [fdo#108744] -> PASS
* igt@kms_frontbuffer_tracking@basic:
- fi-byt-clapper: FAIL [fdo#103167] -> PASS
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a:
- fi-byt-clapper: FAIL [fdo#103191] -> PASS
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#108602]: https://bugs.freedesktop.org/show_bug.cgi?id=108602
[fdo#108622]: https://bugs.freedesktop.org/show_bug.cgi?id=108622
[fdo#108744]: https://bugs.freedesktop.org/show_bug.cgi?id=108744
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109720]: https://bugs.freedesktop.org/show_bug.cgi?id=109720
[fdo#110235 ]: https://bugs.freedesktop.org/show_bug.cgi?id=110235
Participating hosts (50 -> 41)
------------------------------
Additional (1): fi-bsw-n3050
Missing (10): fi-kbl-soraka fi-ilk-m540 fi-byt-j1900 fi-byt-squawks fi-icl-u2 fi-bsw-cyan fi-ctg-p8600 fi-icl-u3 fi-bdw-samus fi-skl-6600u
Build changes
-------------
* Linux: CI_DRM_5934 -> Patchwork_12797
CI_DRM_5934: cc5334c0e706ec423c5f1a139cf3da7bd3287db6 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4946: 56bdc68638cec64c6b02cd6b220b52b76059b51a @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12797: 9ab6964e7c603baa59d07b1f9644e48806423a65 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
9ab6964e7c60 drm/i915/icl: Whitelist GEN9_SLICE_COMMON_ECO_CHICKEN1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12797/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 18+ messages in thread
* ✓ Fi.CI.IGT: success for drm/i915/icl: Whitelist GEN9_SLICE_COMMON_ECO_CHICKEN1
2019-04-15 11:43 [PATCH] drm/i915/icl: Whitelist GEN9_SLICE_COMMON_ECO_CHICKEN1 Tvrtko Ursulin
2019-04-15 11:45 ` Chris Wilson
2019-04-15 12:38 ` ✓ Fi.CI.BAT: success for " Patchwork
@ 2019-04-15 14:24 ` Patchwork
2019-04-18 10:06 ` [PATCH v2] " Tvrtko Ursulin
` (2 subsequent siblings)
5 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2019-04-15 14:24 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/icl: Whitelist GEN9_SLICE_COMMON_ECO_CHICKEN1
URL : https://patchwork.freedesktop.org/series/59494/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5934_full -> Patchwork_12797_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Known issues
------------
Here are the changes found in Patchwork_12797_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_parse@basic-allowed:
- shard-iclb: NOTRUN -> SKIP [fdo#109289]
* igt@gem_exec_schedule@independent-bsd1:
- shard-iclb: NOTRUN -> SKIP [fdo#109276] +6
* igt@gem_pread@stolen-uncached:
- shard-iclb: NOTRUN -> SKIP [fdo#109277]
* igt@gem_softpin@noreloc-s3:
- shard-apl: PASS -> DMESG-WARN [fdo#108566] +2
* igt@gem_userptr_blits@coherency-unsync:
- shard-iclb: NOTRUN -> SKIP [fdo#109290]
* igt@i915_query@query-topology-known-pci-ids:
- shard-iclb: NOTRUN -> SKIP [fdo#109303]
* igt@i915_selftest@live_workarounds:
- shard-iclb: PASS -> DMESG-FAIL [fdo#108954]
* igt@kms_atomic_transition@2x-modeset-transitions-nonblocking:
- shard-kbl: NOTRUN -> SKIP [fdo#109271] +21
* igt@kms_busy@extended-pageflip-hang-newfb-render-f:
- shard-kbl: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +3
* igt@kms_chamelium@hdmi-hpd-storm:
- shard-iclb: NOTRUN -> SKIP [fdo#109284] +2
* igt@kms_content_protection@atomic-dpms:
- shard-apl: NOTRUN -> FAIL [fdo#110321] / [fdo#110336]
* igt@kms_cursor_crc@cursor-256x256-suspend:
- shard-kbl: PASS -> DMESG-WARN [fdo#108566]
* igt@kms_cursor_crc@cursor-512x512-random:
- shard-iclb: NOTRUN -> SKIP [fdo#109279]
* igt@kms_cursor_crc@cursor-64x21-offscreen:
- shard-skl: PASS -> FAIL [fdo#103232]
* igt@kms_flip@2x-plain-flip-ts-check:
- shard-apl: NOTRUN -> SKIP [fdo#109271] +37
* igt@kms_flip@2x-plain-flip-ts-check-interruptible:
- shard-iclb: NOTRUN -> SKIP [fdo#109274]
* igt@kms_flip@plain-flip-fb-recreate:
- shard-skl: PASS -> FAIL [fdo#100368]
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt:
- shard-iclb: PASS -> FAIL [fdo#103167] +4
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-pwrite:
- shard-skl: NOTRUN -> SKIP [fdo#109271] +75
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-blt:
- shard-iclb: NOTRUN -> SKIP [fdo#109280] +5
* igt@kms_frontbuffer_tracking@fbc-suspend:
- shard-apl: NOTRUN -> DMESG-WARN [fdo#108566]
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-mmap-cpu:
- shard-iclb: PASS -> FAIL [fdo#109247] +13
* igt@kms_frontbuffer_tracking@psr-suspend:
- shard-skl: PASS -> INCOMPLETE [fdo#104108] / [fdo#106978]
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-f:
- shard-apl: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +2
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-f:
- shard-skl: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +6
* igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min:
- shard-skl: PASS -> FAIL [fdo#108145]
* igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb:
- shard-skl: NOTRUN -> FAIL [fdo#108145] +1
* igt@kms_plane_alpha_blend@pipe-c-alpha-transparant-fb:
- shard-apl: NOTRUN -> FAIL [fdo#108145]
* igt@kms_plane_lowres@pipe-b-tiling-none:
- shard-kbl: PASS -> DMESG-WARN [fdo#110376]
* igt@kms_psr@cursor_blt:
- shard-iclb: PASS -> FAIL [fdo#107383] / [fdo#110215]
* igt@kms_psr@psr2_cursor_plane_move:
- shard-iclb: NOTRUN -> SKIP [fdo#109441]
* igt@kms_rotation_crc@multiplane-rotation-cropping-top:
- shard-kbl: PASS -> FAIL [fdo#109016]
* igt@kms_sysfs_edid_timing:
- shard-iclb: PASS -> FAIL [fdo#100047]
* igt@kms_universal_plane@disable-primary-vs-flip-pipe-d:
- shard-iclb: NOTRUN -> SKIP [fdo#109278] +1
* igt@tools_test@tools_test:
- shard-iclb: PASS -> SKIP [fdo#109352]
* igt@v3d_get_bo_offset@create-get-offsets:
- shard-iclb: NOTRUN -> SKIP [fdo#109315]
#### Possible fixes ####
* igt@gem_exec_suspend@basic-s3:
- shard-kbl: DMESG-WARN [fdo#108566] -> PASS +1
* igt@i915_pm_rpm@i2c:
- shard-iclb: FAIL [fdo#104097] -> PASS
* igt@i915_suspend@fence-restore-tiled2untiled:
- shard-apl: DMESG-WARN [fdo#108566] -> PASS +4
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-glk: FAIL [fdo#102887] / [fdo#105363] -> PASS
* igt@kms_flip@modeset-vs-vblank-race:
- shard-glk: FAIL [fdo#103060] -> PASS
* igt@kms_flip_tiling@flip-to-x-tiled:
- shard-skl: FAIL [fdo#108134] -> PASS
* igt@kms_frontbuffer_tracking@fbc-rgb565-draw-pwrite:
- shard-iclb: FAIL [fdo#103167] -> PASS +6
* igt@kms_frontbuffer_tracking@fbc-suspend:
- shard-skl: FAIL [fdo#108040] -> PASS
* igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-blt:
- shard-iclb: FAIL [fdo#109247] -> PASS +19
* igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-pwrite:
- shard-skl: FAIL [fdo#103167] -> PASS
* igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
- shard-skl: FAIL [fdo#108145] -> PASS
* igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
- shard-skl: FAIL [fdo#110403] -> PASS
* igt@kms_plane_lowres@pipe-a-tiling-y:
- shard-iclb: FAIL [fdo#103166] -> PASS
* igt@kms_psr@psr2_cursor_plane_onoff:
- shard-iclb: SKIP [fdo#109441] -> PASS +2
* igt@kms_psr@sprite_mmap_cpu:
- shard-iclb: FAIL [fdo#107383] / [fdo#110215] -> PASS
#### Warnings ####
* igt@i915_pm_rpm@dpms-non-lpsp:
- shard-skl: INCOMPLETE [fdo#107807] -> SKIP [fdo#109271]
[fdo#100047]: https://bugs.freedesktop.org/show_bug.cgi?id=100047
[fdo#100368]: https://bugs.freedesktop.org/show_bug.cgi?id=100368
[fdo#102887]: https://bugs.freedesktop.org/show_bug.cgi?id=102887
[fdo#103060]: https://bugs.freedesktop.org/show_bug.cgi?id=103060
[fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
[fdo#104097]: https://bugs.freedesktop.org/show_bug.cgi?id=104097
[fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
[fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
[fdo#106978]: https://bugs.freedesktop.org/show_bug.cgi?id=106978
[fdo#107383]: https://bugs.freedesktop.org/show_bug.cgi?id=107383
[fdo#107807]: https://bugs.freedesktop.org/show_bug.cgi?id=107807
[fdo#108040]: https://bugs.freedesktop.org/show_bug.cgi?id=108040
[fdo#108134]: https://bugs.freedesktop.org/show_bug.cgi?id=108134
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
[fdo#108954]: https://bugs.freedesktop.org/show_bug.cgi?id=108954
[fdo#109016]: https://bugs.freedesktop.org/show_bug.cgi?id=109016
[fdo#109247]: https://bugs.freedesktop.org/show_bug.cgi?id=109247
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
[fdo#109277]: https://bugs.freedesktop.org/show_bug.cgi?id=109277
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109290]: https://bugs.freedesktop.org/show_bug.cgi?id=109290
[fdo#109303]: https://bugs.freedesktop.org/show_bug.cgi?id=109303
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#109352]: https://bugs.freedesktop.org/show_bug.cgi?id=109352
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#110215]: https://bugs.freedesktop.org/show_bug.cgi?id=110215
[fdo#110321]: https://bugs.freedesktop.org/show_bug.cgi?id=110321
[fdo#110336]: https://bugs.freedesktop.org/show_bug.cgi?id=110336
[fdo#110376]: https://bugs.freedesktop.org/show_bug.cgi?id=110376
[fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403
Participating hosts (10 -> 9)
------------------------------
Missing (1): shard-hsw
Build changes
-------------
* Linux: CI_DRM_5934 -> Patchwork_12797
CI_DRM_5934: cc5334c0e706ec423c5f1a139cf3da7bd3287db6 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4946: 56bdc68638cec64c6b02cd6b220b52b76059b51a @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12797: 9ab6964e7c603baa59d07b1f9644e48806423a65 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12797/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH] drm/i915/icl: Whitelist GEN9_SLICE_COMMON_ECO_CHICKEN1
2019-04-15 12:25 ` Tvrtko Ursulin
@ 2019-04-15 16:17 ` Chris Wilson
0 siblings, 0 replies; 18+ messages in thread
From: Chris Wilson @ 2019-04-15 16:17 UTC (permalink / raw)
To: Intel-gfx, Tvrtko Ursulin; +Cc: kevin.ma, xiaogang.li
Quoting Tvrtko Ursulin (2019-04-15 13:25:08)
>
> On 15/04/2019 12:45, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2019-04-15 12:43:07)
> >> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> >>
> >> WaEnableStateCacheRedirectToCS context workaround configures the L3 cache
> >> to benefit 3d workloads but media has different requirements.
> >>
> >> Whitelist the register to allow media re-configuring it to their liking.
> >>
> >> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> >> Cc: kevin.ma@intel.com
> >> Cc: xiaogang.li@intel.com
> >> ---
> >> drivers/gpu/drm/i915/intel_workarounds.c | 3 +++
> >> 1 file changed, 3 insertions(+)
> >>
> >> diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c
> >> index ccaf63679435..6458d161204f 100644
> >> --- a/drivers/gpu/drm/i915/intel_workarounds.c
> >> +++ b/drivers/gpu/drm/i915/intel_workarounds.c
> >> @@ -1050,6 +1050,9 @@ static void icl_whitelist_build(struct i915_wa_list *w)
> >>
> >> /* WaAllowUMDToModifySamplerMode:icl */
> >> whitelist_reg(w, GEN10_SAMPLER_MODE);
> >> +
> >> + /* WaEnableStateCacheRedirectToCS:icl */
> >> + whitelist_reg(w, GEN9_SLICE_COMMON_ECO_CHICKEN1);
> >
> > Have we checked this is context saved?
>
> It is listed as such. But I haven't checked on actual hardware.
Just posted a selftest that should allow us to verify the whitelist in
future.
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH v2] drm/i915/icl: Whitelist GEN9_SLICE_COMMON_ECO_CHICKEN1
2019-04-15 11:43 [PATCH] drm/i915/icl: Whitelist GEN9_SLICE_COMMON_ECO_CHICKEN1 Tvrtko Ursulin
` (2 preceding siblings ...)
2019-04-15 14:24 ` ✓ Fi.CI.IGT: " Patchwork
@ 2019-04-18 10:06 ` Tvrtko Ursulin
2019-04-26 8:13 ` Lionel Landwerlin
` (2 more replies)
2019-04-18 11:28 ` ✓ Fi.CI.BAT: success for drm/i915/icl: Whitelist GEN9_SLICE_COMMON_ECO_CHICKEN1 (rev2) Patchwork
2019-04-18 13:12 ` ✓ Fi.CI.IGT: " Patchwork
5 siblings, 3 replies; 18+ messages in thread
From: Tvrtko Ursulin @ 2019-04-18 10:06 UTC (permalink / raw)
To: Intel-gfx; +Cc: xiaogang.li, kevin.ma
From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
WaEnableStateCacheRedirectToCS context workaround configures the L3 cache
to benefit 3d workloads but media has different requirements.
Remove the workaround and whitelist the register to allow any userspace
configure the behaviour to their liking.
v2:
* Remove the workaround apart from adding the whitelist.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: kevin.ma@intel.com
Cc: xiaogang.li@intel.com
---
drivers/gpu/drm/i915/intel_workarounds.c | 7 +++----
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c
index b3cbed1ee1c9..baed186724d2 100644
--- a/drivers/gpu/drm/i915/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/intel_workarounds.c
@@ -556,10 +556,6 @@ static void icl_ctx_workarounds_init(struct intel_engine_cs *engine)
WA_SET_BIT_MASKED(GEN7_ROW_CHICKEN2,
GEN11_TDL_CLOCK_GATING_FIX_DISABLE);
- /* WaEnableStateCacheRedirectToCS:icl */
- WA_SET_BIT_MASKED(GEN9_SLICE_COMMON_ECO_CHICKEN1,
- GEN11_STATE_CACHE_REDIRECT_TO_CS);
-
/* Wa_2006665173:icl (pre-prod) */
if (IS_ICL_REVID(i915, ICL_REVID_A0, ICL_REVID_A0))
WA_SET_BIT_MASKED(GEN11_COMMON_SLICE_CHICKEN3,
@@ -1070,6 +1066,9 @@ static void icl_whitelist_build(struct i915_wa_list *w)
/* WaAllowUMDToModifySamplerMode:icl */
whitelist_reg(w, GEN10_SAMPLER_MODE);
+
+ /* WaEnableStateCacheRedirectToCS:icl */
+ whitelist_reg(w, GEN9_SLICE_COMMON_ECO_CHICKEN1);
}
void intel_engine_init_whitelist(struct intel_engine_cs *engine)
--
2.19.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 18+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915/icl: Whitelist GEN9_SLICE_COMMON_ECO_CHICKEN1 (rev2)
2019-04-15 11:43 [PATCH] drm/i915/icl: Whitelist GEN9_SLICE_COMMON_ECO_CHICKEN1 Tvrtko Ursulin
` (3 preceding siblings ...)
2019-04-18 10:06 ` [PATCH v2] " Tvrtko Ursulin
@ 2019-04-18 11:28 ` Patchwork
2019-04-18 13:12 ` ✓ Fi.CI.IGT: " Patchwork
5 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2019-04-18 11:28 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/icl: Whitelist GEN9_SLICE_COMMON_ECO_CHICKEN1 (rev2)
URL : https://patchwork.freedesktop.org/series/59494/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5952 -> Patchwork_12830
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://patchwork.freedesktop.org/api/1.0/series/59494/revisions/2/mbox/
Known issues
------------
Here are the changes found in Patchwork_12830 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@amdgpu/amd_basic@query-info:
- fi-bsw-kefka: NOTRUN -> SKIP [fdo#109271] +50
* igt@kms_addfb_basic@addfb25-y-tiled-small:
- fi-byt-n2820: NOTRUN -> SKIP [fdo#109271] +51
* igt@kms_busy@basic-flip-c:
- fi-bsw-kefka: NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
- fi-byt-n2820: NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
* igt@kms_chamelium@hdmi-edid-read:
- fi-hsw-peppy: NOTRUN -> SKIP [fdo#109271] +46
* igt@kms_cursor_legacy@basic-flip-before-cursor-varying-size:
- fi-glk-dsi: PASS -> INCOMPLETE [fdo#103359] / [k.org#198133]
* igt@kms_frontbuffer_tracking@basic:
- fi-hsw-peppy: NOTRUN -> DMESG-FAIL [fdo#102614] / [fdo#107814]
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614
[fdo#103359]: https://bugs.freedesktop.org/show_bug.cgi?id=103359
[fdo#107814]: https://bugs.freedesktop.org/show_bug.cgi?id=107814
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109593]: https://bugs.freedesktop.org/show_bug.cgi?id=109593
[k.org#198133]: https://bugzilla.kernel.org/show_bug.cgi?id=198133
Participating hosts (44 -> 42)
------------------------------
Additional (4): fi-hsw-peppy fi-byt-n2820 fi-icl-dsi fi-bsw-kefka
Missing (6): fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-bdw-samus fi-skl-6600u
Build changes
-------------
* Linux: CI_DRM_5952 -> Patchwork_12830
CI_DRM_5952: 65305a057be0e155321a0765a3a24115063f3a32 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4956: 1d921615b0b706f25c856aa0eb096f274380c199 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12830: 3747cda634c3eab450e2246e987959952291aa9f @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
3747cda634c3 drm/i915/icl: Whitelist GEN9_SLICE_COMMON_ECO_CHICKEN1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12830/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 18+ messages in thread
* ✓ Fi.CI.IGT: success for drm/i915/icl: Whitelist GEN9_SLICE_COMMON_ECO_CHICKEN1 (rev2)
2019-04-15 11:43 [PATCH] drm/i915/icl: Whitelist GEN9_SLICE_COMMON_ECO_CHICKEN1 Tvrtko Ursulin
` (4 preceding siblings ...)
2019-04-18 11:28 ` ✓ Fi.CI.BAT: success for drm/i915/icl: Whitelist GEN9_SLICE_COMMON_ECO_CHICKEN1 (rev2) Patchwork
@ 2019-04-18 13:12 ` Patchwork
5 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2019-04-18 13:12 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/icl: Whitelist GEN9_SLICE_COMMON_ECO_CHICKEN1 (rev2)
URL : https://patchwork.freedesktop.org/series/59494/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5952_full -> Patchwork_12830_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Known issues
------------
Here are the changes found in Patchwork_12830_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_isolation@vcs0-s3:
- shard-skl: PASS -> INCOMPLETE [fdo#104108] / [fdo#107773]
* igt@gem_eio@in-flight-suspend:
- shard-iclb: PASS -> INCOMPLETE [fdo#107713]
* igt@gem_mocs_settings@mocs-reset-bsd2:
- shard-snb: NOTRUN -> SKIP [fdo#109271] +34
* igt@gem_workarounds@suspend-resume:
- shard-apl: PASS -> DMESG-WARN [fdo#108566] +1
* igt@i915_pm_rpm@gem-execbuf-stress:
- shard-skl: PASS -> INCOMPLETE [fdo#107803] / [fdo#107807]
* igt@kms_flip@flip-vs-expired-vblank:
- shard-skl: NOTRUN -> FAIL [fdo#105363]
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-skl: PASS -> FAIL [fdo#105363]
* igt@kms_flip_tiling@flip-x-tiled:
- shard-skl: PASS -> FAIL [fdo#108145] / [fdo#108303]
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move:
- shard-iclb: PASS -> FAIL [fdo#103167] +8
* igt@kms_frontbuffer_tracking@fbc-suspend:
- shard-skl: NOTRUN -> INCOMPLETE [fdo#104108]
* igt@kms_lease@cursor_implicit_plane:
- shard-snb: NOTRUN -> FAIL [fdo#110278]
* igt@kms_pipe_crc_basic@hang-read-crc-pipe-f:
- shard-snb: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +4
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-e:
- shard-skl: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +18
* igt@kms_plane_alpha_blend@pipe-a-alpha-7efc:
- shard-skl: NOTRUN -> FAIL [fdo#108145] +4
* igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
- shard-skl: PASS -> FAIL [fdo#108145] / [fdo#110403]
* igt@kms_plane_scaling@pipe-b-scaler-with-pixel-format:
- shard-glk: PASS -> SKIP [fdo#109271] / [fdo#109278]
* igt@kms_psr@psr2_cursor_render:
- shard-iclb: PASS -> SKIP [fdo#109441] +2
* igt@kms_setmode@basic:
- shard-apl: PASS -> FAIL [fdo#99912]
* igt@perf_pmu@busy-accuracy-50-vcs1:
- shard-skl: NOTRUN -> SKIP [fdo#109271] +198
#### Possible fixes ####
* igt@debugfs_test@read_all_entries_display_off:
- shard-skl: INCOMPLETE [fdo#104108] -> PASS
* igt@i915_pm_rpm@dpms-mode-unset-lpsp:
- shard-skl: INCOMPLETE [fdo#107807] -> PASS
* igt@kms_frontbuffer_tracking@basic:
- shard-snb: SKIP [fdo#109271] -> PASS +1
* igt@kms_frontbuffer_tracking@fbc-suspend:
- shard-kbl: DMESG-WARN [fdo#103313] -> PASS
- shard-apl: DMESG-WARN [fdo#108566] -> PASS +5
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-blt:
- shard-iclb: FAIL [fdo#103167] -> PASS +8
* igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
- shard-skl: FAIL [fdo#108145] -> PASS
* igt@kms_plane_scaling@pipe-b-scaler-with-clipping-clamping:
- shard-glk: SKIP [fdo#109271] / [fdo#109278] -> PASS
* igt@kms_psr2_su@frontbuffer:
- shard-iclb: SKIP [fdo#109642] -> PASS
* igt@kms_psr@psr2_dpms:
- shard-iclb: SKIP [fdo#109441] -> PASS +2
* igt@kms_rotation_crc@multiplane-rotation-cropping-bottom:
- shard-kbl: DMESG-FAIL [fdo#105763] -> PASS
* igt@kms_rotation_crc@multiplane-rotation-cropping-top:
- shard-kbl: FAIL [fdo#109016] -> PASS
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103313]: https://bugs.freedesktop.org/show_bug.cgi?id=103313
[fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
[fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
[fdo#105763]: https://bugs.freedesktop.org/show_bug.cgi?id=105763
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107773]: https://bugs.freedesktop.org/show_bug.cgi?id=107773
[fdo#107803]: https://bugs.freedesktop.org/show_bug.cgi?id=107803
[fdo#107807]: https://bugs.freedesktop.org/show_bug.cgi?id=107807
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#108303]: https://bugs.freedesktop.org/show_bug.cgi?id=108303
[fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
[fdo#109016]: https://bugs.freedesktop.org/show_bug.cgi?id=109016
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#110278]: https://bugs.freedesktop.org/show_bug.cgi?id=110278
[fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403
[fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
Participating hosts (10 -> 9)
------------------------------
Missing (1): shard-hsw
Build changes
-------------
* Linux: CI_DRM_5952 -> Patchwork_12830
CI_DRM_5952: 65305a057be0e155321a0765a3a24115063f3a32 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4956: 1d921615b0b706f25c856aa0eb096f274380c199 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12830: 3747cda634c3eab450e2246e987959952291aa9f @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12830/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v2] drm/i915/icl: Whitelist GEN9_SLICE_COMMON_ECO_CHICKEN1
2019-04-18 10:06 ` [PATCH v2] " Tvrtko Ursulin
@ 2019-04-26 8:13 ` Lionel Landwerlin
2019-04-26 8:31 ` Joonas Lahtinen
2019-04-26 17:01 ` Anuj Phogat
2019-04-30 6:53 ` Joonas Lahtinen
2 siblings, 1 reply; 18+ messages in thread
From: Lionel Landwerlin @ 2019-04-26 8:13 UTC (permalink / raw)
To: Tvrtko Ursulin, Intel-gfx; +Cc: xiaogang.li, kevin.ma
On 18/04/2019 18:06, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>
> WaEnableStateCacheRedirectToCS context workaround configures the L3 cache
> to benefit 3d workloads but media has different requirements.
>
> Remove the workaround and whitelist the register to allow any userspace
> configure the behaviour to their liking.
>
> v2:
> * Remove the workaround apart from adding the whitelist.
>
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
> Cc: kevin.ma@intel.com
> Cc: xiaogang.li@intel.com
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Mesa commits :
commit db5b372bb9f5a0dfea86618f8f9832f25d9eaf71 (anv)
commit eaadb62c9ea98f841d7ffc26c14341abdf84d2d6 (i965)
commit d1be67db39463b48369cb71979ed18662b2c157e (iris)
> ---
> drivers/gpu/drm/i915/intel_workarounds.c | 7 +++----
> 1 file changed, 3 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c
> index b3cbed1ee1c9..baed186724d2 100644
> --- a/drivers/gpu/drm/i915/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/intel_workarounds.c
> @@ -556,10 +556,6 @@ static void icl_ctx_workarounds_init(struct intel_engine_cs *engine)
> WA_SET_BIT_MASKED(GEN7_ROW_CHICKEN2,
> GEN11_TDL_CLOCK_GATING_FIX_DISABLE);
>
> - /* WaEnableStateCacheRedirectToCS:icl */
> - WA_SET_BIT_MASKED(GEN9_SLICE_COMMON_ECO_CHICKEN1,
> - GEN11_STATE_CACHE_REDIRECT_TO_CS);
> -
> /* Wa_2006665173:icl (pre-prod) */
> if (IS_ICL_REVID(i915, ICL_REVID_A0, ICL_REVID_A0))
> WA_SET_BIT_MASKED(GEN11_COMMON_SLICE_CHICKEN3,
> @@ -1070,6 +1066,9 @@ static void icl_whitelist_build(struct i915_wa_list *w)
>
> /* WaAllowUMDToModifySamplerMode:icl */
> whitelist_reg(w, GEN10_SAMPLER_MODE);
> +
> + /* WaEnableStateCacheRedirectToCS:icl */
> + whitelist_reg(w, GEN9_SLICE_COMMON_ECO_CHICKEN1);
> }
>
> void intel_engine_init_whitelist(struct intel_engine_cs *engine)
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v2] drm/i915/icl: Whitelist GEN9_SLICE_COMMON_ECO_CHICKEN1
2019-04-26 8:13 ` Lionel Landwerlin
@ 2019-04-26 8:31 ` Joonas Lahtinen
2019-04-26 16:58 ` Anuj Phogat
0 siblings, 1 reply; 18+ messages in thread
From: Joonas Lahtinen @ 2019-04-26 8:31 UTC (permalink / raw)
To: Intel-gfx, Lionel Landwerlin, Tvrtko Ursulin
Cc: Anuj Phogat, kevin.ma, xiaogang.li
+ Anuj
Quoting Lionel Landwerlin (2019-04-26 11:13:58)
> On 18/04/2019 18:06, Tvrtko Ursulin wrote:
> > From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> >
> > WaEnableStateCacheRedirectToCS context workaround configures the L3 cache
> > to benefit 3d workloads but media has different requirements.
> >
> > Remove the workaround and whitelist the register to allow any userspace
> > configure the behaviour to their liking.
> >
> > v2:
> > * Remove the workaround apart from adding the whitelist.
> >
> > Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> > Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
> > Cc: kevin.ma@intel.com
> > Cc: xiaogang.li@intel.com
>
>
> Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
>
>
> Mesa commits :
>
> commit db5b372bb9f5a0dfea86618f8f9832f25d9eaf71 (anv)
>
> commit eaadb62c9ea98f841d7ffc26c14341abdf84d2d6 (i965)
>
> commit d1be67db39463b48369cb71979ed18662b2c157e (iris)
Could somebody confirm that applying this patch does not cause hangs in
older mesa, and the performance drop (if any) is insignificant?
Best Regards,
Joonas
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v2] drm/i915/icl: Whitelist GEN9_SLICE_COMMON_ECO_CHICKEN1
2019-04-26 8:31 ` Joonas Lahtinen
@ 2019-04-26 16:58 ` Anuj Phogat
2019-04-29 5:57 ` Tvrtko Ursulin
0 siblings, 1 reply; 18+ messages in thread
From: Anuj Phogat @ 2019-04-26 16:58 UTC (permalink / raw)
To: Joonas Lahtinen, Intel-gfx, Lionel Landwerlin, Tvrtko Ursulin
Cc: kevin.ma, xiaogang.li
Joonas,
Mesa now applies this WA on ICL and we're not seeing any regressions in CI.
I tested Mesa with and without this patch applied to kernel. I don't see any
performance impact to Manhattan from GfxBench5. I'm little surprised to
see it's not really helping benchmark performance in Mesa. I'll dig bit more
to figure out a possible explanation. I haven't tried any other benchmarks
with this patch.
Thanks
Anuj
On 04/26/2019 01:31 AM, Joonas Lahtinen wrote:
> + Anuj
>
> Quoting Lionel Landwerlin (2019-04-26 11:13:58)
>> On 18/04/2019 18:06, Tvrtko Ursulin wrote:
>>> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>>>
>>> WaEnableStateCacheRedirectToCS context workaround configures the L3 cache
>>> to benefit 3d workloads but media has different requirements.
>>>
>>> Remove the workaround and whitelist the register to allow any userspace
>>> configure the behaviour to their liking.
>>>
>>> v2:
>>> * Remove the workaround apart from adding the whitelist.
>>>
>>> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>>> Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
>>> Cc: kevin.ma@intel.com
>>> Cc: xiaogang.li@intel.com
>>
>> Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
>>
>>
>> Mesa commits :
>>
>> commit db5b372bb9f5a0dfea86618f8f9832f25d9eaf71 (anv)
>>
>> commit eaadb62c9ea98f841d7ffc26c14341abdf84d2d6 (i965)
>>
>> commit d1be67db39463b48369cb71979ed18662b2c157e (iris)
> Could somebody confirm that applying this patch does not cause hangs in
> older mesa, and the performance drop (if any) is insignificant?
>
> Best Regards,
> Joonas
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v2] drm/i915/icl: Whitelist GEN9_SLICE_COMMON_ECO_CHICKEN1
2019-04-18 10:06 ` [PATCH v2] " Tvrtko Ursulin
2019-04-26 8:13 ` Lionel Landwerlin
@ 2019-04-26 17:01 ` Anuj Phogat
2019-04-30 6:53 ` Joonas Lahtinen
2 siblings, 0 replies; 18+ messages in thread
From: Anuj Phogat @ 2019-04-26 17:01 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: Intel GFX, kevin.ma, xiaogang.li
On Thu, Apr 18, 2019 at 3:06 AM Tvrtko Ursulin
<tvrtko.ursulin@linux.intel.com> wrote:
>
> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>
> WaEnableStateCacheRedirectToCS context workaround configures the L3 cache
> to benefit 3d workloads but media has different requirements.
>
> Remove the workaround and whitelist the register to allow any userspace
> configure the behaviour to their liking.
>
> v2:
> * Remove the workaround apart from adding the whitelist.
>
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
> Cc: kevin.ma@intel.com
> Cc: xiaogang.li@intel.com
> ---
> drivers/gpu/drm/i915/intel_workarounds.c | 7 +++----
> 1 file changed, 3 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c
> index b3cbed1ee1c9..baed186724d2 100644
> --- a/drivers/gpu/drm/i915/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/intel_workarounds.c
> @@ -556,10 +556,6 @@ static void icl_ctx_workarounds_init(struct intel_engine_cs *engine)
> WA_SET_BIT_MASKED(GEN7_ROW_CHICKEN2,
> GEN11_TDL_CLOCK_GATING_FIX_DISABLE);
>
> - /* WaEnableStateCacheRedirectToCS:icl */
> - WA_SET_BIT_MASKED(GEN9_SLICE_COMMON_ECO_CHICKEN1,
> - GEN11_STATE_CACHE_REDIRECT_TO_CS);
> -
> /* Wa_2006665173:icl (pre-prod) */
> if (IS_ICL_REVID(i915, ICL_REVID_A0, ICL_REVID_A0))
> WA_SET_BIT_MASKED(GEN11_COMMON_SLICE_CHICKEN3,
> @@ -1070,6 +1066,9 @@ static void icl_whitelist_build(struct i915_wa_list *w)
>
> /* WaAllowUMDToModifySamplerMode:icl */
> whitelist_reg(w, GEN10_SAMPLER_MODE);
> +
> + /* WaEnableStateCacheRedirectToCS:icl */
> + whitelist_reg(w, GEN9_SLICE_COMMON_ECO_CHICKEN1);
> }
>
> void intel_engine_init_whitelist(struct intel_engine_cs *engine)
> --
> 2.19.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Acked-by: Anuj Phogat <anuj.phogat@gmail.com>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v2] drm/i915/icl: Whitelist GEN9_SLICE_COMMON_ECO_CHICKEN1
2019-04-26 16:58 ` Anuj Phogat
@ 2019-04-29 5:57 ` Tvrtko Ursulin
2019-04-29 17:16 ` Anuj Phogat
0 siblings, 1 reply; 18+ messages in thread
From: Tvrtko Ursulin @ 2019-04-29 5:57 UTC (permalink / raw)
To: Anuj Phogat, Joonas Lahtinen, Intel-gfx, Lionel Landwerlin
Cc: kevin.ma, xiaogang.li
On 26/04/2019 17:58, Anuj Phogat wrote:
>
> Joonas,
>
> Mesa now applies this WA on ICL and we're not seeing any regressions in CI.
> I tested Mesa with and without this patch applied to kernel. I don't see
> any
> performance impact to Manhattan from GfxBench5. I'm little surprised to
> see it's not really helping benchmark performance in Mesa. I'll dig bit
> more
> to figure out a possible explanation. I haven't tried any other benchmarks
> with this patch.
I think the concern was, if user is running old Mesa (no WA) on new
kernel (no WA) there wouldn't be any GPU hangs, just theoretical (yet
unmeasured) perf drop?
Regards,
Tvrtko
>
> Thanks
> Anuj
> On 04/26/2019 01:31 AM, Joonas Lahtinen wrote:
>> + Anuj
>>
>> Quoting Lionel Landwerlin (2019-04-26 11:13:58)
>>> On 18/04/2019 18:06, Tvrtko Ursulin wrote:
>>>> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>>>>
>>>> WaEnableStateCacheRedirectToCS context workaround configures the L3
>>>> cache
>>>> to benefit 3d workloads but media has different requirements.
>>>>
>>>> Remove the workaround and whitelist the register to allow any userspace
>>>> configure the behaviour to their liking.
>>>>
>>>> v2:
>>>> * Remove the workaround apart from adding the whitelist.
>>>>
>>>> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>>>> Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
>>>> Cc: kevin.ma@intel.com
>>>> Cc: xiaogang.li@intel.com
>>>
>>> Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
>>>
>>>
>>> Mesa commits :
>>>
>>> commit db5b372bb9f5a0dfea86618f8f9832f25d9eaf71 (anv)
>>>
>>> commit eaadb62c9ea98f841d7ffc26c14341abdf84d2d6 (i965)
>>>
>>> commit d1be67db39463b48369cb71979ed18662b2c157e (iris)
>> Could somebody confirm that applying this patch does not cause hangs in
>> older mesa, and the performance drop (if any) is insignificant?
>>
>> Best Regards,
>> Joonas
>
>
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v2] drm/i915/icl: Whitelist GEN9_SLICE_COMMON_ECO_CHICKEN1
2019-04-29 5:57 ` Tvrtko Ursulin
@ 2019-04-29 17:16 ` Anuj Phogat
2019-04-30 1:25 ` Li, Xiaogang
0 siblings, 1 reply; 18+ messages in thread
From: Anuj Phogat @ 2019-04-29 17:16 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: Intel GFX, xiaogang.li, Anuj Phogat, kevin.ma
On Sun, Apr 28, 2019 at 10:57 PM Tvrtko Ursulin
<tvrtko.ursulin@linux.intel.com> wrote:
>
>
> On 26/04/2019 17:58, Anuj Phogat wrote:
> >
> > Joonas,
> >
> > Mesa now applies this WA on ICL and we're not seeing any regressions in CI.
> > I tested Mesa with and without this patch applied to kernel. I don't see
> > any
> > performance impact to Manhattan from GfxBench5. I'm little surprised to
> > see it's not really helping benchmark performance in Mesa. I'll dig bit
> > more
> > to figure out a possible explanation. I haven't tried any other benchmarks
> > with this patch.
>
> I think the concern was, if user is running old Mesa (no WA) on new
> kernel (no WA) there wouldn't be any GPU hangs, just theoretical (yet
> unmeasured) perf drop?
>
I also tested Manhattan with Mesa (no WA) and Kernel (no WA)
and didn't see a GPU hang or any perf drop. The no change in perf
might be due to currently used L3 configuration in Mesa which doesn't
allocate anything to CS Command buffer section. Mesa now carries
the WA in case we choose to use a different L3 config in future.
> Regards,
>
> Tvrtko
>
> >
> > Thanks
> > Anuj
> > On 04/26/2019 01:31 AM, Joonas Lahtinen wrote:
> >> + Anuj
> >>
> >> Quoting Lionel Landwerlin (2019-04-26 11:13:58)
> >>> On 18/04/2019 18:06, Tvrtko Ursulin wrote:
> >>>> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> >>>>
> >>>> WaEnableStateCacheRedirectToCS context workaround configures the L3
> >>>> cache
> >>>> to benefit 3d workloads but media has different requirements.
> >>>>
> >>>> Remove the workaround and whitelist the register to allow any userspace
> >>>> configure the behaviour to their liking.
> >>>>
> >>>> v2:
> >>>> * Remove the workaround apart from adding the whitelist.
> >>>>
> >>>> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> >>>> Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
> >>>> Cc: kevin.ma@intel.com
> >>>> Cc: xiaogang.li@intel.com
> >>>
> >>> Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
> >>>
> >>>
> >>> Mesa commits :
> >>>
> >>> commit db5b372bb9f5a0dfea86618f8f9832f25d9eaf71 (anv)
> >>>
> >>> commit eaadb62c9ea98f841d7ffc26c14341abdf84d2d6 (i965)
> >>>
> >>> commit d1be67db39463b48369cb71979ed18662b2c157e (iris)
> >> Could somebody confirm that applying this patch does not cause hangs in
> >> older mesa, and the performance drop (if any) is insignificant?
> >>
> >> Best Regards,
> >> Joonas
> >
> >
> >
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v2] drm/i915/icl: Whitelist GEN9_SLICE_COMMON_ECO_CHICKEN1
2019-04-29 17:16 ` Anuj Phogat
@ 2019-04-30 1:25 ` Li, Xiaogang
0 siblings, 0 replies; 18+ messages in thread
From: Li, Xiaogang @ 2019-04-30 1:25 UTC (permalink / raw)
To: Anuj Phogat, Tvrtko Ursulin; +Cc: Intel GFX, Phogat, Anuj, Ma, Kevin
So we can check in this patch right now, right?
-----Original Message-----
From: Anuj Phogat [mailto:anuj.phogat@gmail.com]
Sent: Tuesday, April 30, 2019 1:17 AM
To: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Cc: Phogat, Anuj <anuj.phogat@intel.com>; Joonas Lahtinen <joonas.lahtinen@linux.intel.com>; Intel GFX <Intel-gfx@lists.freedesktop.org>; Landwerlin, Lionel G <lionel.g.landwerlin@intel.com>; Ma, Kevin <kevin.ma@intel.com>; Li, Xiaogang <xiaogang.li@intel.com>
Subject: Re: [Intel-gfx] [PATCH v2] drm/i915/icl: Whitelist GEN9_SLICE_COMMON_ECO_CHICKEN1
On Sun, Apr 28, 2019 at 10:57 PM Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> wrote:
>
>
> On 26/04/2019 17:58, Anuj Phogat wrote:
> >
> > Joonas,
> >
> > Mesa now applies this WA on ICL and we're not seeing any regressions in CI.
> > I tested Mesa with and without this patch applied to kernel. I don't
> > see any performance impact to Manhattan from GfxBench5. I'm little
> > surprised to see it's not really helping benchmark performance in
> > Mesa. I'll dig bit more to figure out a possible explanation. I
> > haven't tried any other benchmarks with this patch.
>
> I think the concern was, if user is running old Mesa (no WA) on new
> kernel (no WA) there wouldn't be any GPU hangs, just theoretical (yet
> unmeasured) perf drop?
>
I also tested Manhattan with Mesa (no WA) and Kernel (no WA) and didn't see a GPU hang or any perf drop. The no change in perf might be due to currently used L3 configuration in Mesa which doesn't allocate anything to CS Command buffer section. Mesa now carries the WA in case we choose to use a different L3 config in future.
> Regards,
>
> Tvrtko
>
> >
> > Thanks
> > Anuj
> > On 04/26/2019 01:31 AM, Joonas Lahtinen wrote:
> >> + Anuj
> >>
> >> Quoting Lionel Landwerlin (2019-04-26 11:13:58)
> >>> On 18/04/2019 18:06, Tvrtko Ursulin wrote:
> >>>> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> >>>>
> >>>> WaEnableStateCacheRedirectToCS context workaround configures the
> >>>> L3 cache to benefit 3d workloads but media has different
> >>>> requirements.
> >>>>
> >>>> Remove the workaround and whitelist the register to allow any
> >>>> userspace configure the behaviour to their liking.
> >>>>
> >>>> v2:
> >>>> * Remove the workaround apart from adding the whitelist.
> >>>>
> >>>> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> >>>> Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
> >>>> Cc: kevin.ma@intel.com
> >>>> Cc: xiaogang.li@intel.com
> >>>
> >>> Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
> >>>
> >>>
> >>> Mesa commits :
> >>>
> >>> commit db5b372bb9f5a0dfea86618f8f9832f25d9eaf71 (anv)
> >>>
> >>> commit eaadb62c9ea98f841d7ffc26c14341abdf84d2d6 (i965)
> >>>
> >>> commit d1be67db39463b48369cb71979ed18662b2c157e (iris)
> >> Could somebody confirm that applying this patch does not cause
> >> hangs in older mesa, and the performance drop (if any) is insignificant?
> >>
> >> Best Regards,
> >> Joonas
> >
> >
> >
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v2] drm/i915/icl: Whitelist GEN9_SLICE_COMMON_ECO_CHICKEN1
2019-04-18 10:06 ` [PATCH v2] " Tvrtko Ursulin
2019-04-26 8:13 ` Lionel Landwerlin
2019-04-26 17:01 ` Anuj Phogat
@ 2019-04-30 6:53 ` Joonas Lahtinen
2019-04-30 6:57 ` Tvrtko Ursulin
2 siblings, 1 reply; 18+ messages in thread
From: Joonas Lahtinen @ 2019-04-30 6:53 UTC (permalink / raw)
To: Intel-gfx, Tvrtko Ursulin; +Cc: kevin.ma, xiaogang.li
Quoting Tvrtko Ursulin (2019-04-18 13:06:34)
> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>
> WaEnableStateCacheRedirectToCS context workaround configures the L3 cache
> to benefit 3d workloads but media has different requirements.
>
> Remove the workaround and whitelist the register to allow any userspace
> configure the behaviour to their liking.
>
> v2:
> * Remove the workaround apart from adding the whitelist.
Please add the information that removal of the workaround doesn't cause
any ill effects with old Mesa and add Fixes:, so this gets picked up to
5.2. No need for stable as Icelake is alpha_support before 5.2
With those changes this is:
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Regards, Joonas
>
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
> Cc: kevin.ma@intel.com
> Cc: xiaogang.li@intel.com
> ---
> drivers/gpu/drm/i915/intel_workarounds.c | 7 +++----
> 1 file changed, 3 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c
> index b3cbed1ee1c9..baed186724d2 100644
> --- a/drivers/gpu/drm/i915/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/intel_workarounds.c
> @@ -556,10 +556,6 @@ static void icl_ctx_workarounds_init(struct intel_engine_cs *engine)
> WA_SET_BIT_MASKED(GEN7_ROW_CHICKEN2,
> GEN11_TDL_CLOCK_GATING_FIX_DISABLE);
>
> - /* WaEnableStateCacheRedirectToCS:icl */
> - WA_SET_BIT_MASKED(GEN9_SLICE_COMMON_ECO_CHICKEN1,
> - GEN11_STATE_CACHE_REDIRECT_TO_CS);
> -
> /* Wa_2006665173:icl (pre-prod) */
> if (IS_ICL_REVID(i915, ICL_REVID_A0, ICL_REVID_A0))
> WA_SET_BIT_MASKED(GEN11_COMMON_SLICE_CHICKEN3,
> @@ -1070,6 +1066,9 @@ static void icl_whitelist_build(struct i915_wa_list *w)
>
> /* WaAllowUMDToModifySamplerMode:icl */
> whitelist_reg(w, GEN10_SAMPLER_MODE);
> +
> + /* WaEnableStateCacheRedirectToCS:icl */
> + whitelist_reg(w, GEN9_SLICE_COMMON_ECO_CHICKEN1);
> }
>
> void intel_engine_init_whitelist(struct intel_engine_cs *engine)
> --
> 2.19.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v2] drm/i915/icl: Whitelist GEN9_SLICE_COMMON_ECO_CHICKEN1
2019-04-30 6:53 ` Joonas Lahtinen
@ 2019-04-30 6:57 ` Tvrtko Ursulin
0 siblings, 0 replies; 18+ messages in thread
From: Tvrtko Ursulin @ 2019-04-30 6:57 UTC (permalink / raw)
To: Joonas Lahtinen, Intel-gfx; +Cc: Anuj Phogat, kevin.ma, xiaogang.li
On 30/04/2019 07:53, Joonas Lahtinen wrote:
> Quoting Tvrtko Ursulin (2019-04-18 13:06:34)
>> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>>
>> WaEnableStateCacheRedirectToCS context workaround configures the L3 cache
>> to benefit 3d workloads but media has different requirements.
>>
>> Remove the workaround and whitelist the register to allow any userspace
>> configure the behaviour to their liking.
>>
>> v2:
>> * Remove the workaround apart from adding the whitelist.
>
> Please add the information that removal of the workaround doesn't cause
> any ill effects with old Mesa and add Fixes:, so this gets picked up to
> 5.2. No need for stable as Icelake is alpha_support before 5.2
>
> With those changes this is:
>
> Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Pushed. Thanks for all the testing on both sides!
Regards,
Tvrtko
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 18+ messages in thread
end of thread, other threads:[~2019-04-30 6:57 UTC | newest]
Thread overview: 18+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-04-15 11:43 [PATCH] drm/i915/icl: Whitelist GEN9_SLICE_COMMON_ECO_CHICKEN1 Tvrtko Ursulin
2019-04-15 11:45 ` Chris Wilson
2019-04-15 12:25 ` Tvrtko Ursulin
2019-04-15 16:17 ` Chris Wilson
2019-04-15 12:38 ` ✓ Fi.CI.BAT: success for " Patchwork
2019-04-15 14:24 ` ✓ Fi.CI.IGT: " Patchwork
2019-04-18 10:06 ` [PATCH v2] " Tvrtko Ursulin
2019-04-26 8:13 ` Lionel Landwerlin
2019-04-26 8:31 ` Joonas Lahtinen
2019-04-26 16:58 ` Anuj Phogat
2019-04-29 5:57 ` Tvrtko Ursulin
2019-04-29 17:16 ` Anuj Phogat
2019-04-30 1:25 ` Li, Xiaogang
2019-04-26 17:01 ` Anuj Phogat
2019-04-30 6:53 ` Joonas Lahtinen
2019-04-30 6:57 ` Tvrtko Ursulin
2019-04-18 11:28 ` ✓ Fi.CI.BAT: success for drm/i915/icl: Whitelist GEN9_SLICE_COMMON_ECO_CHICKEN1 (rev2) Patchwork
2019-04-18 13:12 ` ✓ Fi.CI.IGT: " Patchwork
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