* [igt-dev] [PATCH i-g-t 1/5] lib/igt_fb: Fix the cairo shadow buffer stride
@ 2019-04-18 19:40 Ville Syrjala
2019-04-18 19:40 ` [igt-dev] [PATCH i-g-t 2/5] lib/igt_fb: Fix 32bit integer overflow in the shadow buffer size calculation Ville Syrjala
` (8 more replies)
0 siblings, 9 replies; 16+ messages in thread
From: Ville Syrjala @ 2019-04-18 19:40 UTC (permalink / raw)
To: igt-dev
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
We're currently overallocating the shadow buffer stride by a
factor of 8. This didn't go down so well when I tried to use
a 16kx16k float framebuffer.
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Fixes: b0033d9310c1 ("lib/color_encoding: Prepare support for HDR modes, v2.")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
lib/igt_fb.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/lib/igt_fb.c b/lib/igt_fb.c
index b4d354825b10..f36096804fdd 100644
--- a/lib/igt_fb.c
+++ b/lib/igt_fb.c
@@ -1911,7 +1911,7 @@ static void *igt_fb_create_cairo_shadow_buffer(int fd,
drm_format, LOCAL_DRM_FORMAT_MOD_NONE,
IGT_COLOR_YCBCR_BT709, IGT_COLOR_YCBCR_LIMITED_RANGE);
- shadow->strides[0] = ALIGN(width * shadow->plane_bpp[0], 16);
+ shadow->strides[0] = ALIGN(width * (shadow->plane_bpp[0] / 8), 16);
shadow->size = ALIGN(shadow->strides[0] * height,
sysconf(_SC_PAGESIZE));
ptr = mmap(NULL, shadow->size, PROT_READ | PROT_WRITE,
--
2.21.0
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^ permalink raw reply related [flat|nested] 16+ messages in thread
* [igt-dev] [PATCH i-g-t 2/5] lib/igt_fb: Fix 32bit integer overflow in the shadow buffer size calculation
2019-04-18 19:40 [igt-dev] [PATCH i-g-t 1/5] lib/igt_fb: Fix the cairo shadow buffer stride Ville Syrjala
@ 2019-04-18 19:40 ` Ville Syrjala
2019-04-26 19:14 ` Chris Wilson
2019-04-18 19:40 ` [igt-dev] [PATCH i-g-t 3/5] lib/rendercopy: Add fp16 support for gen4+ Ville Syrjala
` (7 subsequent siblings)
8 siblings, 1 reply; 16+ messages in thread
From: Ville Syrjala @ 2019-04-18 19:40 UTC (permalink / raw)
To: igt-dev
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
16k*16k*16 == 1<<32, so 32bits isn't enough for the result when
we start to have big framebuffers.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
lib/igt_fb.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/lib/igt_fb.c b/lib/igt_fb.c
index f36096804fdd..d4929019971c 100644
--- a/lib/igt_fb.c
+++ b/lib/igt_fb.c
@@ -1912,7 +1912,7 @@ static void *igt_fb_create_cairo_shadow_buffer(int fd,
IGT_COLOR_YCBCR_BT709, IGT_COLOR_YCBCR_LIMITED_RANGE);
shadow->strides[0] = ALIGN(width * (shadow->plane_bpp[0] / 8), 16);
- shadow->size = ALIGN(shadow->strides[0] * height,
+ shadow->size = ALIGN((uint64_t)shadow->strides[0] * height,
sysconf(_SC_PAGESIZE));
ptr = mmap(NULL, shadow->size, PROT_READ | PROT_WRITE,
MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
--
2.21.0
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^ permalink raw reply related [flat|nested] 16+ messages in thread
* [igt-dev] [PATCH i-g-t 3/5] lib/rendercopy: Add fp16 support for gen4+
2019-04-18 19:40 [igt-dev] [PATCH i-g-t 1/5] lib/igt_fb: Fix the cairo shadow buffer stride Ville Syrjala
2019-04-18 19:40 ` [igt-dev] [PATCH i-g-t 2/5] lib/igt_fb: Fix 32bit integer overflow in the shadow buffer size calculation Ville Syrjala
@ 2019-04-18 19:40 ` Ville Syrjala
2019-04-26 19:16 ` Chris Wilson
2019-04-18 19:40 ` [igt-dev] [PATCH i-g-t 4/5] lib/rendercopy: Configure MOCS more consistently Ville Syrjala
` (6 subsequent siblings)
8 siblings, 1 reply; 16+ messages in thread
From: Ville Syrjala @ 2019-04-18 19:40 UTC (permalink / raw)
To: igt-dev
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Allow copying between fp16 surfaces. We'll use the FLOAT
surface format since that's all the display supports currently.
Hopefully the hardware gives us a 1:1 copy, at least if
the input doesn't contain crazy infs/nans etc. We could
choose UNORM instead but that won't work for eventually
exposing fp16+ccs. Although we do need to replace the
simple bpp value with a more specific format type to get
10bpc+ccs working as well.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
lib/rendercopy_gen4.c | 1 +
lib/rendercopy_gen6.c | 1 +
lib/rendercopy_gen7.c | 1 +
lib/rendercopy_gen8.c | 1 +
lib/rendercopy_gen9.c | 1 +
5 files changed, 5 insertions(+)
diff --git a/lib/rendercopy_gen4.c b/lib/rendercopy_gen4.c
index 9111508f3ec9..42de77f9f878 100644
--- a/lib/rendercopy_gen4.c
+++ b/lib/rendercopy_gen4.c
@@ -160,6 +160,7 @@ gen4_bind_buf(struct intel_batchbuffer *batch,
case 8: ss->ss0.surface_format = SURFACEFORMAT_R8_UNORM; break;
case 16: ss->ss0.surface_format = SURFACEFORMAT_R8G8_UNORM; break;
case 32: ss->ss0.surface_format = SURFACEFORMAT_B8G8R8A8_UNORM; break;
+ case 64: ss->ss0.surface_format = SURFACEFORMAT_R16G16B16A16_FLOAT; break;
default: igt_assert(0);
}
diff --git a/lib/rendercopy_gen6.c b/lib/rendercopy_gen6.c
index a6157cfc70f6..b90466d007f9 100644
--- a/lib/rendercopy_gen6.c
+++ b/lib/rendercopy_gen6.c
@@ -97,6 +97,7 @@ gen6_bind_buf(struct intel_batchbuffer *batch, const struct igt_buf *buf,
case 8: ss->ss0.surface_format = SURFACEFORMAT_R8_UNORM; break;
case 16: ss->ss0.surface_format = SURFACEFORMAT_R8G8_UNORM; break;
case 32: ss->ss0.surface_format = SURFACEFORMAT_B8G8R8A8_UNORM; break;
+ case 64: ss->ss0.surface_format = SURFACEFORMAT_R16G16B16A16_FLOAT; break;
default: igt_assert(0);
}
diff --git a/lib/rendercopy_gen7.c b/lib/rendercopy_gen7.c
index 0a5d4a151e0d..949468427b2f 100644
--- a/lib/rendercopy_gen7.c
+++ b/lib/rendercopy_gen7.c
@@ -73,6 +73,7 @@ gen7_bind_buf(struct intel_batchbuffer *batch,
case 8: format = SURFACEFORMAT_R8_UNORM; break;
case 16: format = SURFACEFORMAT_R8G8_UNORM; break;
case 32: format = SURFACEFORMAT_B8G8R8A8_UNORM; break;
+ case 64: format = SURFACEFORMAT_R16G16B16A16_FLOAT; break;
default: igt_assert(0);
}
diff --git a/lib/rendercopy_gen8.c b/lib/rendercopy_gen8.c
index 643b6630d4a3..f7a33947166e 100644
--- a/lib/rendercopy_gen8.c
+++ b/lib/rendercopy_gen8.c
@@ -170,6 +170,7 @@ gen8_bind_buf(struct intel_batchbuffer *batch,
case 8: ss->ss0.surface_format = SURFACEFORMAT_R8_UNORM; break;
case 16: ss->ss0.surface_format = SURFACEFORMAT_R8G8_UNORM; break;
case 32: ss->ss0.surface_format = SURFACEFORMAT_B8G8R8A8_UNORM; break;
+ case 64: ss->ss0.surface_format = SURFACEFORMAT_R16G16B16A16_FLOAT; break;
default: igt_assert(0);
}
ss->ss0.render_cache_read_write = 1;
diff --git a/lib/rendercopy_gen9.c b/lib/rendercopy_gen9.c
index 93e9d150e717..5c6485d750a9 100644
--- a/lib/rendercopy_gen9.c
+++ b/lib/rendercopy_gen9.c
@@ -201,6 +201,7 @@ gen8_bind_buf(struct intel_batchbuffer *batch, const struct igt_buf *buf,
case 8: ss->ss0.surface_format = SURFACEFORMAT_R8_UNORM; break;
case 16: ss->ss0.surface_format = SURFACEFORMAT_R8G8_UNORM; break;
case 32: ss->ss0.surface_format = SURFACEFORMAT_B8G8R8A8_UNORM; break;
+ case 64: ss->ss0.surface_format = SURFACEFORMAT_R16G16B16A16_FLOAT; break;
default: igt_assert(0);
}
ss->ss0.render_cache_read_write = 1;
--
2.21.0
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https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [igt-dev] [PATCH i-g-t 4/5] lib/rendercopy: Configure MOCS more consistently
2019-04-18 19:40 [igt-dev] [PATCH i-g-t 1/5] lib/igt_fb: Fix the cairo shadow buffer stride Ville Syrjala
2019-04-18 19:40 ` [igt-dev] [PATCH i-g-t 2/5] lib/igt_fb: Fix 32bit integer overflow in the shadow buffer size calculation Ville Syrjala
2019-04-18 19:40 ` [igt-dev] [PATCH i-g-t 3/5] lib/rendercopy: Add fp16 support for gen4+ Ville Syrjala
@ 2019-04-18 19:40 ` Ville Syrjala
2019-04-26 19:18 ` Chris Wilson
2019-04-18 19:40 ` [igt-dev] [PATCH i-g-t 5/5] tests/kms_big_fb: Make sure huge fbs work correctly Ville Syrjala
` (5 subsequent siblings)
8 siblings, 1 reply; 16+ messages in thread
From: Ville Syrjala @ 2019-04-18 19:40 UTC (permalink / raw)
To: igt-dev
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Unify the MOCS to be more consistently across the platforms.
Currently gen8+ are specifyig UC whereas earlier platforms
generally use PTE. Let's make everyone more or less specify
L3+PTE.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
lib/gen6_render.h | 9 ++++++++-
lib/gen7_render.h | 11 ++++++++++-
lib/gen8_render.h | 15 +++++++++++++++
lib/rendercopy_gen6.c | 2 ++
lib/rendercopy_gen7.c | 5 ++++-
lib/rendercopy_gen8.c | 7 +++++++
lib/rendercopy_gen9.c | 2 ++
7 files changed, 48 insertions(+), 3 deletions(-)
diff --git a/lib/gen6_render.h b/lib/gen6_render.h
index f45c8ae7b34a..a4c166417634 100644
--- a/lib/gen6_render.h
+++ b/lib/gen6_render.h
@@ -735,6 +735,12 @@
#define GEN6_SCRATCH_SPACE_SIZE_1M 10
#define GEN6_SCRATCH_SPACE_SIZE_2M 11
+#define GEN6_MOCS_GFDT (1 << 2)
+#define GEN6_MOCS_PTE (0 << 0)
+#define GEN6_MOCS_UC (1 << 0)
+#define GEN6_MOCS_LLC (2 << 0)
+#define GEN6_MOCS_LLC_MLC (3 << 0)
+
/* The hardware supports two different modes for border color. The
* default (OpenGL) mode uses floating-point color channels, while the
* legacy mode uses 4 bytes.
@@ -933,7 +939,8 @@ struct gen6_surface_state {
} ss4;
struct {
- uint32_t pad:20;
+ uint32_t pad:16;
+ uint32_t memory_object_control:4;
uint32_t y_offset:4;
uint32_t pad2:1;
uint32_t x_offset:7;
diff --git a/lib/gen7_render.h b/lib/gen7_render.h
index 4bde0d5f13ec..5dfc04d4bc2b 100644
--- a/lib/gen7_render.h
+++ b/lib/gen7_render.h
@@ -186,6 +186,14 @@
#define GEN7_ARF_IP 0xA0
+#define VLV_MOCS_SNOOP (2 << 1)
+#define VLV_MOCS_L3 (1 << 0)
+
+#define IVB_MOCS_GFDT (1 << 2)
+#define IVB_MOCS_PTE (0 << 1)
+#define IVB_MOCS_LLC (1 << 1)
+#define IVB_MOCS_L3 (1 << 0)
+
/* The hardware supports two different modes for border color. The
* default (OpenGL) mode uses floating-point color channels, while the
* legacy mode uses 4 bytes.
@@ -252,7 +260,8 @@ struct gen7_surface_state {
struct {
unsigned int mip_count:4;
unsigned int min_lod:4;
- unsigned int pad1:12;
+ unsigned int pad1:8;
+ unsigned int memory_object_control:4;
unsigned int y_offset:4;
unsigned int pad0:1;
unsigned int x_offset:7;
diff --git a/lib/gen8_render.h b/lib/gen8_render.h
index 7e33bea22d65..31dc01bcf57c 100644
--- a/lib/gen8_render.h
+++ b/lib/gen8_render.h
@@ -67,6 +67,21 @@
/* STATE_BASE_ADDRESS state size in pages*/
#define GEN8_STATE_SIZE_PAGES(x) ((x) << 12)
+#define BDW_MOCS_PTE (0 << 5)
+#define BDW_MOCS_UC (1 << 5)
+#define BDW_MOCS_WT (2 << 5)
+#define BDW_MOCS_WB (3 << 5)
+#define BDW_MOCS_TC_ELLC (0 << 3)
+#define BDW_MOCS_TC_LLC (1 << 3)
+#define BDW_MOCS_TC_LLC_ELLC (2 << 3)
+#define BDW_MOCS_TC_L3_PTE (3 << 3)
+#define BDW_MOCS_AGE(x) ((x) << 0)
+
+#define CHV_MOCS_UC (0 << 5)
+#define CHV_MOCS_WB (3 << 5)
+#define CHV_MOCS_NO_CACHING (0 << 3)
+#define CHV_MOCS_L3 (3 << 3)
+
/* Shamelessly ripped from mesa */
struct gen8_surface_state
{
diff --git a/lib/rendercopy_gen6.c b/lib/rendercopy_gen6.c
index b90466d007f9..83c7d6941bdd 100644
--- a/lib/rendercopy_gen6.c
+++ b/lib/rendercopy_gen6.c
@@ -117,6 +117,8 @@ gen6_bind_buf(struct intel_batchbuffer *batch, const struct igt_buf *buf,
ss->ss3.tiled_surface = buf->tiling != I915_TILING_NONE;
ss->ss3.tile_walk = buf->tiling == I915_TILING_Y;
+ ss->ss5.memory_object_control = GEN6_MOCS_PTE;
+
return intel_batchbuffer_subdata_offset(batch, ss);
}
diff --git a/lib/rendercopy_gen7.c b/lib/rendercopy_gen7.c
index 949468427b2f..a3c8b7f36989 100644
--- a/lib/rendercopy_gen7.c
+++ b/lib/rendercopy_gen7.c
@@ -94,7 +94,10 @@ gen7_bind_buf(struct intel_batchbuffer *batch,
(igt_buf_height(buf) - 1) << GEN7_SURFACE_HEIGHT_SHIFT);
ss[3] = (buf->stride - 1) << GEN7_SURFACE_PITCH_SHIFT;
ss[4] = 0;
- ss[5] = 0;
+ if (IS_VALLEYVIEW(batch->devid))
+ ss[5] = VLV_MOCS_L3 << 16;
+ else
+ ss[5] = (IVB_MOCS_L3 | IVB_MOCS_PTE) << 16;
ss[6] = 0;
ss[7] = 0;
if (IS_HASWELL(batch->devid))
diff --git a/lib/rendercopy_gen8.c b/lib/rendercopy_gen8.c
index f7a33947166e..e22d8501cb55 100644
--- a/lib/rendercopy_gen8.c
+++ b/lib/rendercopy_gen8.c
@@ -16,6 +16,7 @@
#include "drmtest.h"
#include "intel_bufmgr.h"
#include "intel_batchbuffer.h"
+#include "intel_chipset.h"
#include "intel_io.h"
#include "rendercopy.h"
#include "gen8_render.h"
@@ -181,6 +182,12 @@ gen8_bind_buf(struct intel_batchbuffer *batch,
else if (buf->tiling == I915_TILING_Y)
ss->ss0.tiled_mode = 3;
+ if (IS_CHERRYVIEW(batch->devid))
+ ss->ss1.memory_object_control = CHV_MOCS_WB | CHV_MOCS_L3;
+ else
+ ss->ss1.memory_object_control = BDW_MOCS_PTE |
+ BDW_MOCS_TC_L3_PTE | BDW_MOCS_AGE(0);
+
ss->ss8.base_addr = buf->bo->offset64;
ss->ss9.base_addr_hi = buf->bo->offset64 >> 32;
diff --git a/lib/rendercopy_gen9.c b/lib/rendercopy_gen9.c
index 5c6485d750a9..259a3ca24ba5 100644
--- a/lib/rendercopy_gen9.c
+++ b/lib/rendercopy_gen9.c
@@ -212,6 +212,8 @@ gen8_bind_buf(struct intel_batchbuffer *batch, const struct igt_buf *buf,
else if (buf->tiling != I915_TILING_NONE)
ss->ss0.tiled_mode = 3;
+ ss->ss1.memory_object_control = I915_MOCS_PTE << 1;
+
if (buf->tiling == I915_TILING_Yf)
ss->ss5.trmode = 1;
else if (buf->tiling == I915_TILING_Ys)
--
2.21.0
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^ permalink raw reply related [flat|nested] 16+ messages in thread
* [igt-dev] [PATCH i-g-t 5/5] tests/kms_big_fb: Make sure huge fbs work correctly
2019-04-18 19:40 [igt-dev] [PATCH i-g-t 1/5] lib/igt_fb: Fix the cairo shadow buffer stride Ville Syrjala
` (2 preceding siblings ...)
2019-04-18 19:40 ` [igt-dev] [PATCH i-g-t 4/5] lib/rendercopy: Configure MOCS more consistently Ville Syrjala
@ 2019-04-18 19:40 ` Ville Syrjala
2019-04-26 16:50 ` [igt-dev] [PATCH i-g-t v2 " Ville Syrjala
2019-04-18 20:34 ` [igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,1/5] lib/igt_fb: Fix the cairo shadow buffer stride Patchwork
` (4 subsequent siblings)
8 siblings, 1 reply; 16+ messages in thread
From: Ville Syrjala @ 2019-04-18 19:40 UTC (permalink / raw)
To: igt-dev
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Add various tests to excercise huge framebuffers. First some basic
sanity checks that the kernel accepts/rejects good/bad addfb2 ioctls,
and finally actual scanout tests to make sure we scan out the correct
thing when panning around inside large framebuffers.
The implementation is i915 specific for now since I chose to use
rendercopy when generating the framebuffer contents. Using the normal
cairo stuff was just too slow when dealing with 1GiB framebuffers.
It shouldn't be too hard to plug in some other mechanisms if someone
else wants to reuse this test.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
tests/Makefile.sources | 1 +
tests/kms_big_fb.c | 548 +++++++++++++++++++++++++++++++++++++++++
tests/meson.build | 1 +
3 files changed, 550 insertions(+)
create mode 100644 tests/kms_big_fb.c
diff --git a/tests/Makefile.sources b/tests/Makefile.sources
index 7f921f6c5988..2d5c929e32fc 100644
--- a/tests/Makefile.sources
+++ b/tests/Makefile.sources
@@ -27,6 +27,7 @@ TESTS_progs = \
kms_atomic_interruptible \
kms_atomic_transition \
kms_available_modes_crc \
+ kms_big_fb \
kms_busy \
kms_ccs \
kms_color \
diff --git a/tests/kms_big_fb.c b/tests/kms_big_fb.c
new file mode 100644
index 000000000000..eaf2a951d44e
--- /dev/null
+++ b/tests/kms_big_fb.c
@@ -0,0 +1,548 @@
+/*
+ * Copyright © 2019 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#include "igt.h"
+#include <errno.h>
+#include <stdbool.h>
+#include <stdio.h>
+#include <string.h>
+
+IGT_TEST_DESCRIPTION("Test big framebuffers");
+
+typedef struct {
+ int drm_fd;
+ igt_display_t display;
+ enum pipe pipe;
+ igt_output_t *output;
+ igt_plane_t *plane;
+ igt_pipe_crc_t *pipe_crc;
+ struct igt_fb small_fb, big_fb;
+ uint32_t format;
+ uint64_t modifier;
+ int width, height;
+ igt_rotation_t rotation;
+ struct {
+ int max_width, max_height;
+ } ram, kernel;
+ igt_render_copyfunc_t render_copy;
+ drm_intel_bufmgr *bufmgr;
+ struct intel_batchbuffer *batch;
+} data_t;
+
+static void init_buf(data_t *data,
+ struct igt_buf *buf,
+ const struct igt_fb *fb,
+ const char *name)
+{
+ igt_assert_eq(fb->offsets[0], 0);
+
+ buf->bo = gem_handle_to_libdrm_bo(data->bufmgr, data->drm_fd,
+ name, fb->gem_handle);
+ buf->tiling = igt_fb_mod_to_tiling(fb->modifier);
+ buf->stride = fb->strides[0];
+ buf->bpp = fb->plane_bpp[0];
+ buf->size = fb->size;
+}
+
+static void fini_buf(struct igt_buf *buf)
+{
+ drm_intel_bo_unreference(buf->bo);
+}
+
+static void copy_pattern(data_t *data,
+ struct igt_fb *dst_fb, int dx, int dy,
+ struct igt_fb *src_fb, int sx, int sy,
+ int w, int h)
+{
+ struct igt_buf src = {}, dst = {};
+
+ init_buf(data, &src, src_fb, "big fb rendercopy src");
+ init_buf(data, &dst, dst_fb, "big fb rendercopy dst");
+
+ gem_set_domain(data->drm_fd, dst_fb->gem_handle,
+ I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
+ gem_set_domain(data->drm_fd, src_fb->gem_handle,
+ I915_GEM_DOMAIN_GTT, 0);
+
+ data->render_copy(data->batch, NULL, &src, sx, sy, w, h, &dst, dx, dy);
+
+ fini_buf(&dst);
+ fini_buf(&src);
+}
+
+static void generate_pattern(data_t *data,
+ struct igt_fb *fb,
+ int w, int h)
+{
+ struct igt_fb pat_fb;
+
+ igt_create_pattern_fb(data->drm_fd, w, h,
+ data->format, data->modifier,
+ &pat_fb);
+
+ for (int y = 0; y < fb->height; y += h) {
+ for (int x = 0; x < fb->width; x += w) {
+ copy_pattern(data, fb, x, y,
+ &pat_fb, 0, 0,
+ pat_fb.width, pat_fb.height);
+ w++;
+ h++;
+ }
+ }
+
+ igt_remove_fb(data->drm_fd, &pat_fb);
+}
+
+static bool test_plane(data_t *data)
+{
+ igt_plane_t *plane = data->plane;
+ struct igt_fb *small_fb = &data->small_fb;
+ struct igt_fb *big_fb = &data->big_fb;
+ int w = big_fb->width - small_fb->width;
+ int h = big_fb->height - small_fb->height;
+ struct {
+ int x, y;
+ } coords[] = {
+ /* bunch of coordinates pulled out of thin air */
+ { 0, 0, },
+ { w * 4 / 7, h / 5, },
+ { w * 2 / 5, h / 3, },
+ { w / 2, h / 2, },
+ { w / 3, h * 3 / 4, },
+ { w, h, },
+ };
+
+ if (!igt_plane_has_format_mod(plane, data->format, data->modifier))
+ return false;
+
+ igt_plane_set_rotation(plane, data->rotation);
+ igt_plane_set_position(plane, 0, 0);
+
+ for (int i = 0; i < ARRAY_SIZE(coords); i++) {
+ igt_crc_t small_crc, big_crc;
+
+ /*
+ * Make a 1:1 copy of the desired part of the big fb
+ * rather than try to render the same pattern (translated
+ * accordinly) again via cairo. Something in cairo's
+ * rendering pipeline introduces slight differences into
+ * the result if we try that, and so the crc will not match.
+ */
+ copy_pattern(data, small_fb, 0, 0,
+ big_fb, coords[i].x, coords[i].y,
+ small_fb->width, small_fb->height);
+
+ igt_plane_set_fb(plane, small_fb);
+ igt_plane_set_size(plane, data->width, data->height);
+
+ /*
+ * Try to check that the rotation+format+modifier
+ * combo is supported.
+ */
+ if (i == 0 && data->display.is_atomic)
+ igt_require(igt_display_try_commit_atomic(&data->display,
+ DRM_MODE_ATOMIC_TEST_ONLY,
+ NULL) == 0);
+
+ igt_display_commit2(&data->display, data->display.is_atomic ?
+ COMMIT_ATOMIC : COMMIT_UNIVERSAL);
+
+
+ igt_pipe_crc_collect_crc(data->pipe_crc, &small_crc);
+
+ igt_plane_set_fb(plane, big_fb);
+ igt_fb_set_position(big_fb, plane, coords[i].x, coords[i].y);
+ igt_fb_set_size(big_fb, plane, small_fb->width, small_fb->height);
+ igt_plane_set_size(plane, data->width, data->height);
+ igt_display_commit2(&data->display, data->display.is_atomic ?
+ COMMIT_ATOMIC : COMMIT_UNIVERSAL);
+
+ igt_pipe_crc_collect_crc(data->pipe_crc, &big_crc);
+
+ igt_plane_set_fb(plane, NULL);
+
+ igt_assert_crc_equal(&big_crc, &small_crc);
+
+ }
+
+ return true;
+}
+
+static bool test_pipe(data_t *data)
+{
+ drmModeModeInfo *mode;
+ igt_plane_t *primary;
+ int width, height;
+ bool ret = false;
+
+ mode = igt_output_get_mode(data->output);
+
+ data->width = mode->hdisplay;
+ data->height = mode->vdisplay;
+
+ width = mode->hdisplay;
+ height = mode->vdisplay;
+ if (data->rotation == IGT_ROTATION_90 ||
+ data->rotation == IGT_ROTATION_270)
+ igt_swap(width, height);
+
+ igt_create_color_fb(data->drm_fd, width, height,
+ data->format, data->modifier,
+ 0, 1, 0, &data->small_fb);
+
+ igt_output_set_pipe(data->output, data->pipe);
+
+ primary = igt_output_get_plane_type(data->output, DRM_PLANE_TYPE_PRIMARY);
+ igt_plane_set_fb(primary, NULL);
+
+ if (!data->display.is_atomic) {
+ struct igt_fb fb;
+
+ igt_create_fb(data->drm_fd, mode->hdisplay, mode->vdisplay,
+ DRM_FORMAT_XRGB8888, DRM_FORMAT_MOD_LINEAR,
+ &fb);
+
+ /* legacy setcrtc needs an fb */
+ igt_plane_set_fb(primary, &data->small_fb);
+ igt_display_commit2(&data->display, COMMIT_LEGACY);
+
+ igt_plane_set_fb(primary, NULL);
+ igt_display_commit2(&data->display, COMMIT_UNIVERSAL);
+
+ igt_remove_fb(data->drm_fd, &fb);
+ }
+
+ igt_display_commit2(&data->display, data->display.is_atomic ?
+ COMMIT_ATOMIC : COMMIT_UNIVERSAL);
+
+ data->pipe_crc = igt_pipe_crc_new(data->drm_fd, data->pipe,
+ INTEL_PIPE_CRC_SOURCE_AUTO);
+
+ for_each_plane_on_pipe(&data->display, data->pipe, data->plane) {
+ ret = test_plane(data);
+ if (ret)
+ break;
+ }
+
+ igt_pipe_crc_free(data->pipe_crc);
+
+ igt_output_set_pipe(data->output, PIPE_ANY);
+ igt_display_commit2(&data->display, data->display.is_atomic ?
+ COMMIT_ATOMIC : COMMIT_UNIVERSAL);
+
+ igt_remove_fb(data->drm_fd, &data->small_fb);
+
+ return ret;
+}
+
+static void test_scanout(data_t *data)
+{
+ for_each_pipe_with_valid_output(&data->display, data->pipe, data->output) {
+ if (test_pipe(data))
+ return;
+ }
+
+ igt_skip("no valid crtc/connector combinations found\n");
+}
+
+static void prep_fb(data_t *data)
+{
+ if (data->big_fb.fb_id)
+ return;
+
+ igt_create_fb(data->drm_fd,
+ data->ram.max_width,
+ data->ram.max_height,
+ data->format, data->modifier,
+ &data->big_fb);
+
+ generate_pattern(data, &data->big_fb, 640, 480);
+}
+
+static void cleanup_fb(data_t *data)
+{
+ igt_remove_fb(data->drm_fd, &data->big_fb);
+ data->big_fb.fb_id = 0;
+}
+
+static void
+test_size_overflow(data_t *data)
+{
+ uint32_t fb_id;
+ uint32_t bo;
+ uint32_t offsets[4] = {};
+ uint32_t strides[4] = { 256*1024, };
+ int ret;
+
+ /*
+ * Try to hit a specific integer overflow in i915 fb size
+ * calculations. 256k * 16k == 1<<32 which is checked
+ * against the bo size. The check should fail on account
+ * of the bo being smaller, but due to the overflow the
+ * computed fb size is 0 and thus the check never trips.
+ */
+ igt_require(data->kernel.max_width >= 16383 &&
+ data->kernel.max_height >= 16383);
+
+ bo = gem_create(data->drm_fd, (1ULL << 32) - 4096);
+ igt_require(bo);
+
+ ret = __kms_addfb(data->drm_fd, bo,
+ 16383, 16383,
+ DRM_FORMAT_XRGB8888,
+ data->modifier,
+ strides, offsets, 1,
+ DRM_MODE_FB_MODIFIERS, &fb_id);
+
+ igt_assert_neq(ret, 0);
+
+ gem_close(data->drm_fd, bo);
+}
+
+static void
+test_size_offset_overflow(data_t *data)
+{
+ uint32_t fb_id;
+ uint32_t bo;
+ uint32_t offsets[4] = {};
+ uint32_t strides[4] = { 8192, };
+ int ret;
+
+ /*
+ * Try to a specific integer overflow in i915 fb size
+ * calculations. This time it's offsets[1] + the tile
+ * aligned chroma plane size that overflows and
+ * incorrectly passes the bo size check.
+ */
+ igt_require(igt_display_has_format_mod(&data->display,
+ DRM_FORMAT_NV12,
+ data->modifier));
+
+ bo = gem_create(data->drm_fd, (1ULL << 32) - 4096);
+ igt_require(bo);
+
+ offsets[0] = 0;
+ offsets[1] = (1ULL << 32) - 8192 * 4096;
+
+ ret = __kms_addfb(data->drm_fd, bo,
+ 8192, 8188,
+ DRM_FORMAT_NV12,
+ data->modifier,
+ strides, offsets, 1,
+ DRM_MODE_FB_MODIFIERS, &fb_id);
+ igt_assert_neq(ret, 0);
+
+ gem_close(data->drm_fd, bo);
+}
+
+static int rmfb(int fd, uint32_t id)
+{
+ int err;
+
+ err = 0;
+ if (igt_ioctl(fd, DRM_IOCTL_MODE_RMFB, &id))
+ err = -errno;
+
+ errno = 0;
+ return err;
+}
+
+static void
+test_addfb(data_t *data)
+{
+ uint64_t size;
+ uint32_t fb_id;
+ uint32_t bo;
+ uint32_t offsets[4] = {};
+ uint32_t strides[4] = {};
+ int ret;
+
+ igt_calc_fb_size(data->drm_fd,
+ data->kernel.max_width,
+ data->kernel.max_height,
+ DRM_FORMAT_XRGB8888,
+ data->modifier,
+ &size, &strides[0]);
+
+ bo = gem_create(data->drm_fd, size);
+ igt_require(bo);
+
+ ret = __kms_addfb(data->drm_fd, bo,
+ data->kernel.max_width,
+ data->kernel.max_height,
+ DRM_FORMAT_XRGB8888,
+ data->modifier,
+ strides, offsets, 1,
+ DRM_MODE_FB_MODIFIERS, &fb_id);
+ igt_assert_eq(ret, 0);
+
+ rmfb(data->drm_fd, fb_id);
+ gem_close(data->drm_fd, bo);
+}
+
+static data_t data;
+
+static const struct {
+ uint64_t modifier;
+ const char *name;
+} modifiers[] = {
+ { DRM_FORMAT_MOD_LINEAR, "linear", },
+ { I915_FORMAT_MOD_X_TILED, "x-tiled", },
+ { I915_FORMAT_MOD_Y_TILED, "y-tiled", },
+ { I915_FORMAT_MOD_Yf_TILED, "yf-tiled", },
+};
+
+static const struct {
+ uint32_t format;
+ const char *name;
+} formats[] = {
+ /* FIXME igt_fb doesn't support C8 currently */
+ { DRM_FORMAT_C8, "8bpp", },
+ { DRM_FORMAT_RGB565, "16bpp", },
+ { DRM_FORMAT_XRGB8888, "32bpp", },
+ { DRM_FORMAT_XBGR16161616F, "64bpp", },
+};
+
+static const struct {
+ igt_rotation_t rotation;
+ uint16_t angle;
+} rotations[] = {
+ { IGT_ROTATION_0, 0, },
+ { IGT_ROTATION_90, 90, },
+ { IGT_ROTATION_180, 180, },
+ { IGT_ROTATION_270, 270, },
+};
+
+igt_main
+{
+ igt_fixture {
+ drmModeResPtr res;
+ uint32_t devid;
+ uint64_t ram;
+ int i = 0;
+
+ igt_skip_on_simulation();
+
+ data.drm_fd = drm_open_driver_master(DRIVER_INTEL);
+
+ igt_require(is_i915_device(data.drm_fd));
+
+ devid = intel_get_drm_devid(data.drm_fd);
+
+ kmstest_set_vt_graphics_mode();
+
+ igt_require_pipe_crc(data.drm_fd);
+ igt_display_require(&data.display, data.drm_fd);
+
+ res = drmModeGetResources(data.drm_fd);
+ igt_assert(res);
+
+ data.kernel.max_width = res->max_width;
+ data.kernel.max_height = res->max_height;
+
+ drmModeFreeResources(res);
+
+ igt_info("Max driver framebuffer size %dx%d\n",
+ data.kernel.max_width, data.kernel.max_height);
+
+ /* Let's not try to use more than half of the total RAM */
+ ram = intel_get_total_ram_mb();
+
+ data.ram.max_width = data.kernel.max_width;
+ data.ram.max_height = data.kernel.max_height;
+ while (data.ram.max_height * data.ram.max_height * 4 / (1024*1024) > ram) {
+ if (i++ & 1)
+ data.ram.max_width >>= 1;
+ else
+ data.ram.max_height >>= 1;
+ }
+ igt_info("Max usable framebuffer size %dx%d based on amount of RAM (%"PRIu64" MiB)\n",
+ data.ram.max_width, data.ram.max_height, ram);
+
+ data.render_copy = igt_get_render_copyfunc(devid);
+ igt_require(data.render_copy);
+
+ data.bufmgr = drm_intel_bufmgr_gem_init(data.drm_fd, 4096);
+ data.batch = intel_batchbuffer_alloc(data.bufmgr, devid);
+ }
+
+ /*
+ * Skip linear as it doesn't hit the overflow we want
+ * on account of the tile height being effectively one,
+ * and thus the kenrnel rounding up to the next tile
+ * height won't do anything.
+ */
+ for (int i = 1; i < ARRAY_SIZE(modifiers); i++) {
+ igt_subtest_f("%s-addfb-size-overflow",
+ modifiers[i].name) {
+ data.modifier = modifiers[i].modifier;
+ test_size_overflow(&data);
+ }
+ }
+
+ for (int i = 1; i < ARRAY_SIZE(modifiers); i++) {
+ igt_subtest_f("%s-addfb-size-offset-overflow",
+ modifiers[i].name) {
+ data.modifier = modifiers[i].modifier;
+ test_size_offset_overflow(&data);
+ }
+ }
+
+ for (int i = 0; i < ARRAY_SIZE(modifiers); i++) {
+ igt_subtest_f("%s-addfb", modifiers[i].name) {
+ data.modifier = modifiers[i].modifier;
+
+ test_addfb(&data);
+ }
+ }
+
+ for (int i = 0; i < ARRAY_SIZE(modifiers); i++) {
+ data.modifier = modifiers[i].modifier;
+
+ for (int j = 0; j < ARRAY_SIZE(formats); j++) {
+ data.format = formats[j].format;
+
+ for (int k = 0; k < ARRAY_SIZE(rotations); k++) {
+ data.rotation = rotations[k].rotation;
+
+ igt_subtest_f("%s-%s-rotate-%d", modifiers[i].name,
+ formats[j].name, rotations[k].angle) {
+ igt_require(igt_fb_supported_format(data.format));
+ igt_require(igt_display_has_format_mod(&data.display, data.format, data.modifier));
+ prep_fb(&data);
+ test_scanout(&data);
+ }
+ }
+
+ igt_fixture
+ cleanup_fb(&data);
+ }
+ }
+
+ igt_fixture {
+ igt_display_fini(&data.display);
+
+ intel_batchbuffer_free(data.batch);
+ drm_intel_bufmgr_destroy(data.bufmgr);
+ }
+}
diff --git a/tests/meson.build b/tests/meson.build
index e3c8b07fe28e..3d519578b93d 100644
--- a/tests/meson.build
+++ b/tests/meson.build
@@ -14,6 +14,7 @@ test_progs = [
'kms_atomic_interruptible',
'kms_atomic_transition',
'kms_available_modes_crc',
+ 'kms_big_fb',
'kms_busy',
'kms_ccs',
'kms_color',
--
2.21.0
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,1/5] lib/igt_fb: Fix the cairo shadow buffer stride
2019-04-18 19:40 [igt-dev] [PATCH i-g-t 1/5] lib/igt_fb: Fix the cairo shadow buffer stride Ville Syrjala
` (3 preceding siblings ...)
2019-04-18 19:40 ` [igt-dev] [PATCH i-g-t 5/5] tests/kms_big_fb: Make sure huge fbs work correctly Ville Syrjala
@ 2019-04-18 20:34 ` Patchwork
2019-04-18 22:46 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork
` (3 subsequent siblings)
8 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2019-04-18 20:34 UTC (permalink / raw)
To: Ville Syrjala; +Cc: igt-dev
== Series Details ==
Series: series starting with [i-g-t,1/5] lib/igt_fb: Fix the cairo shadow buffer stride
URL : https://patchwork.freedesktop.org/series/59732/
State : success
== Summary ==
CI Bug Log - changes from IGT_4959 -> IGTPW_2897
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://patchwork.freedesktop.org/api/1.0/series/59732/revisions/1/mbox/
Known issues
------------
Here are the changes found in IGTPW_2897 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@amdgpu/amd_basic@cs-gfx:
- fi-skl-6700k2: NOTRUN -> SKIP [fdo#109271] +41
* igt@amdgpu/amd_basic@cs-sdma:
- fi-skl-6770hq: NOTRUN -> SKIP [fdo#109271] +37
- fi-cfl-8109u: NOTRUN -> SKIP [fdo#109271] +37
* igt@amdgpu/amd_basic@query-info:
- fi-bsw-kefka: NOTRUN -> SKIP [fdo#109271] +50
* igt@amdgpu/amd_basic@userptr:
- fi-whl-u: NOTRUN -> SKIP [fdo#109271] +41
* igt@amdgpu/amd_cs_nop@fork-gfx0:
- fi-icl-u2: NOTRUN -> SKIP [fdo#109315] +17
* igt@amdgpu/amd_cs_nop@sync-fork-compute0:
- fi-icl-u3: NOTRUN -> SKIP [fdo#109315] +17
* igt@gem_exec_basic@basic-bsd2:
- fi-icl-u3: NOTRUN -> SKIP [fdo#109276] +7
* igt@gem_exec_basic@gtt-bsd1:
- fi-bxt-j4205: NOTRUN -> SKIP [fdo#109271] +47
* igt@gem_exec_basic@gtt-bsd2:
- fi-byt-clapper: NOTRUN -> SKIP [fdo#109271] +52
* igt@gem_exec_basic@readonly-bsd:
- fi-pnv-d510: NOTRUN -> SKIP [fdo#109271] +71
* igt@gem_exec_basic@readonly-bsd1:
- fi-snb-2520m: NOTRUN -> SKIP [fdo#109271] +52
- fi-icl-u2: NOTRUN -> SKIP [fdo#109276] +7
* igt@gem_exec_parse@basic-allowed:
- fi-icl-u2: NOTRUN -> SKIP [fdo#109289] +1
* igt@gem_exec_parse@basic-rejected:
- fi-icl-u3: NOTRUN -> SKIP [fdo#109289] +1
* igt@gem_exec_store@basic-bsd2:
- fi-hsw-4770: NOTRUN -> SKIP [fdo#109271] +41
* igt@gem_mmap_gtt@basic-write-cpu-read-gtt:
- fi-apl-guc: NOTRUN -> SKIP [fdo#109271] +48
* igt@i915_selftest@live_evict:
- fi-bsw-kefka: NOTRUN -> DMESG-WARN [fdo#107709]
* igt@kms_busy@basic-flip-c:
- fi-bsw-kefka: NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
- fi-pnv-d510: NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
- fi-snb-2520m: NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
- fi-blb-e6850: NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
- fi-byt-clapper: NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
* igt@kms_chamelium@dp-hpd-fast:
- fi-icl-u2: NOTRUN -> SKIP [fdo#109316] +2
* igt@kms_chamelium@hdmi-crc-fast:
- fi-icl-u3: NOTRUN -> SKIP [fdo#109284] +8
* igt@kms_chamelium@hdmi-edid-read:
- fi-blb-e6850: NOTRUN -> SKIP [fdo#109271] +43
* igt@kms_chamelium@vga-edid-read:
- fi-icl-u2: NOTRUN -> SKIP [fdo#109309] +1
* igt@kms_force_connector_basic@force-edid:
- fi-icl-u3: NOTRUN -> SKIP [fdo#109285] +3
* igt@kms_force_connector_basic@prune-stale-modes:
- fi-icl-u2: NOTRUN -> SKIP [fdo#109285] +3
* igt@kms_frontbuffer_tracking@basic:
- fi-glk-dsi: NOTRUN -> FAIL [fdo#103167]
- fi-byt-clapper: NOTRUN -> FAIL [fdo#103167]
* igt@kms_pipe_crc_basic@hang-read-crc-pipe-a:
- fi-byt-clapper: NOTRUN -> FAIL [fdo#103191] +1
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
- fi-whl-u: NOTRUN -> FAIL [fdo#103375] +1
- fi-kbl-7567u: PASS -> DMESG-WARN [fdo#108566]
* igt@kms_psr@cursor_plane_move:
- fi-whl-u: NOTRUN -> FAIL [fdo#107383] +3
* igt@kms_psr@primary_page_flip:
- fi-glk-dsi: NOTRUN -> SKIP [fdo#109271] +47
* igt@runner@aborted:
- fi-bsw-kefka: NOTRUN -> FAIL [fdo#107709] / [fdo#110446]
#### Possible fixes ####
* igt@gem_exec_suspend@basic-s4-devices:
- fi-blb-e6850: INCOMPLETE [fdo#107718] -> PASS
* igt@i915_selftest@live_contexts:
- fi-bdw-gvtdvm: DMESG-FAIL [fdo#110235 ] -> PASS
* igt@i915_selftest@live_hangcheck:
- fi-skl-iommu: INCOMPLETE [fdo#108602] / [fdo#108744] -> PASS
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
[fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
[fdo#107383]: https://bugs.freedesktop.org/show_bug.cgi?id=107383
[fdo#107709]: https://bugs.freedesktop.org/show_bug.cgi?id=107709
[fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
[fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
[fdo#108602]: https://bugs.freedesktop.org/show_bug.cgi?id=108602
[fdo#108744]: https://bugs.freedesktop.org/show_bug.cgi?id=108744
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109309]: https://bugs.freedesktop.org/show_bug.cgi?id=109309
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#109316]: https://bugs.freedesktop.org/show_bug.cgi?id=109316
[fdo#110235 ]: https://bugs.freedesktop.org/show_bug.cgi?id=110235
[fdo#110446]: https://bugs.freedesktop.org/show_bug.cgi?id=110446
Participating hosts (34 -> 41)
------------------------------
Additional (14): fi-skl-6770hq fi-glk-dsi fi-icl-u2 fi-apl-guc fi-snb-2520m fi-hsw-4770 fi-whl-u fi-bxt-j4205 fi-cfl-8109u fi-icl-u3 fi-pnv-d510 fi-bsw-kefka fi-byt-clapper fi-skl-6700k2
Missing (7): fi-ilk-m540 fi-byt-j1900 fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-skl-lmem fi-bdw-samus
Build changes
-------------
* IGT: IGT_4959 -> IGTPW_2897
CI_DRM_5954: a77e0dc060fcd1a2a09412067097685c5101589c @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_2897: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2897/
IGT_4959: 504367d33b787de2ba8e007a5b620cfd6f0b3074 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
== Testlist changes ==
+igt@kms_big_fb@linear-8bpp-rotate-0
+igt@kms_big_fb@linear-8bpp-rotate-90
+igt@kms_big_fb@linear-8bpp-rotate-180
+igt@kms_big_fb@linear-8bpp-rotate-270
+igt@kms_big_fb@linear-16bpp-rotate-0
+igt@kms_big_fb@linear-16bpp-rotate-90
+igt@kms_big_fb@linear-16bpp-rotate-180
+igt@kms_big_fb@linear-16bpp-rotate-270
+igt@kms_big_fb@linear-32bpp-rotate-0
+igt@kms_big_fb@linear-32bpp-rotate-90
+igt@kms_big_fb@linear-32bpp-rotate-180
+igt@kms_big_fb@linear-32bpp-rotate-270
+igt@kms_big_fb@linear-64bpp-rotate-0
+igt@kms_big_fb@linear-64bpp-rotate-90
+igt@kms_big_fb@linear-64bpp-rotate-180
+igt@kms_big_fb@linear-64bpp-rotate-270
+igt@kms_big_fb@linear-addfb
+igt@kms_big_fb@x-tiled-8bpp-rotate-0
+igt@kms_big_fb@x-tiled-8bpp-rotate-90
+igt@kms_big_fb@x-tiled-8bpp-rotate-180
+igt@kms_big_fb@x-tiled-8bpp-rotate-270
+igt@kms_big_fb@x-tiled-16bpp-rotate-0
+igt@kms_big_fb@x-tiled-16bpp-rotate-90
+igt@kms_big_fb@x-tiled-16bpp-rotate-180
+igt@kms_big_fb@x-tiled-16bpp-rotate-270
+igt@kms_big_fb@x-tiled-32bpp-rotate-0
+igt@kms_big_fb@x-tiled-32bpp-rotate-90
+igt@kms_big_fb@x-tiled-32bpp-rotate-180
+igt@kms_big_fb@x-tiled-32bpp-rotate-270
+igt@kms_big_fb@x-tiled-64bpp-rotate-0
+igt@kms_big_fb@x-tiled-64bpp-rotate-90
+igt@kms_big_fb@x-tiled-64bpp-rotate-180
+igt@kms_big_fb@x-tiled-64bpp-rotate-270
+igt@kms_big_fb@x-tiled-addfb
+igt@kms_big_fb@x-tiled-addfb-size-offset-overflow
+igt@kms_big_fb@x-tiled-addfb-size-overflow
+igt@kms_big_fb@yf-tiled-8bpp-rotate-0
+igt@kms_big_fb@yf-tiled-8bpp-rotate-90
+igt@kms_big_fb@yf-tiled-8bpp-rotate-180
+igt@kms_big_fb@yf-tiled-8bpp-rotate-270
+igt@kms_big_fb@yf-tiled-16bpp-rotate-0
+igt@kms_big_fb@yf-tiled-16bpp-rotate-90
+igt@kms_big_fb@yf-tiled-16bpp-rotate-180
+igt@kms_big_fb@yf-tiled-16bpp-rotate-270
+igt@kms_big_fb@yf-tiled-32bpp-rotate-0
+igt@kms_big_fb@yf-tiled-32bpp-rotate-90
+igt@kms_big_fb@yf-tiled-32bpp-rotate-180
+igt@kms_big_fb@yf-tiled-32bpp-rotate-270
+igt@kms_big_fb@yf-tiled-64bpp-rotate-0
+igt@kms_big_fb@yf-tiled-64bpp-rotate-90
+igt@kms_big_fb@yf-tiled-64bpp-rotate-180
+igt@kms_big_fb@yf-tiled-64bpp-rotate-270
+igt@kms_big_fb@yf-tiled-addfb
+igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow
+igt@kms_big_fb@yf-tiled-addfb-size-overflow
+igt@kms_big_fb@y-tiled-8bpp-rotate-0
+igt@kms_big_fb@y-tiled-8bpp-rotate-90
+igt@kms_big_fb@y-tiled-8bpp-rotate-180
+igt@kms_big_fb@y-tiled-8bpp-rotate-270
+igt@kms_big_fb@y-tiled-16bpp-rotate-0
+igt@kms_big_fb@y-tiled-16bpp-rotate-90
+igt@kms_big_fb@y-tiled-16bpp-rotate-180
+igt@kms_big_fb@y-tiled-16bpp-rotate-270
+igt@kms_big_fb@y-tiled-32bpp-rotate-0
+igt@kms_big_fb@y-tiled-32bpp-rotate-90
+igt@kms_big_fb@y-tiled-32bpp-rotate-180
+igt@kms_big_fb@y-tiled-32bpp-rotate-270
+igt@kms_big_fb@y-tiled-64bpp-rotate-0
+igt@kms_big_fb@y-tiled-64bpp-rotate-90
+igt@kms_big_fb@y-tiled-64bpp-rotate-180
+igt@kms_big_fb@y-tiled-64bpp-rotate-270
+igt@kms_big_fb@y-tiled-addfb
+igt@kms_big_fb@y-tiled-addfb-size-offset-overflow
+igt@kms_big_fb@y-tiled-addfb-size-overflow
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2897/
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 16+ messages in thread
* [igt-dev] ✗ Fi.CI.IGT: failure for series starting with [i-g-t,1/5] lib/igt_fb: Fix the cairo shadow buffer stride
2019-04-18 19:40 [igt-dev] [PATCH i-g-t 1/5] lib/igt_fb: Fix the cairo shadow buffer stride Ville Syrjala
` (4 preceding siblings ...)
2019-04-18 20:34 ` [igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,1/5] lib/igt_fb: Fix the cairo shadow buffer stride Patchwork
@ 2019-04-18 22:46 ` Patchwork
2019-04-26 17:59 ` [igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,1/5] lib/igt_fb: Fix the cairo shadow buffer stride (rev2) Patchwork
` (2 subsequent siblings)
8 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2019-04-18 22:46 UTC (permalink / raw)
To: Ville Syrjala; +Cc: igt-dev
== Series Details ==
Series: series starting with [i-g-t,1/5] lib/igt_fb: Fix the cairo shadow buffer stride
URL : https://patchwork.freedesktop.org/series/59732/
State : failure
== Summary ==
CI Bug Log - changes from IGT_4959_full -> IGTPW_2897_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with IGTPW_2897_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in IGTPW_2897_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://patchwork.freedesktop.org/api/1.0/series/59732/revisions/1/mbox/
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in IGTPW_2897_full:
### IGT changes ###
#### Possible regressions ####
* {igt@kms_big_fb@x-tiled-32bpp-rotate-90} (NEW):
- shard-iclb: NOTRUN -> SKIP +30
* {igt@kms_big_fb@y-tiled-64bpp-rotate-0} (NEW):
- shard-iclb: NOTRUN -> FAIL +11
* igt@kms_big_fb@y-tiled-addfb (NEW):
- shard-snb: NOTRUN -> FAIL +1
* {igt@kms_big_fb@yf-tiled-addfb} (NEW):
- shard-hsw: NOTRUN -> FAIL +1
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@audio@hdmi-integrity}:
- shard-kbl: FAIL -> TIMEOUT
* {igt@audio@hdmi-integrity-after-suspend}:
- shard-hsw: NOTRUN -> FAIL
New tests
---------
New tests have been introduced between IGT_4959_full and IGTPW_2897_full:
### New IGT tests (74) ###
* igt@kms_big_fb@linear-16bpp-rotate-0:
- Statuses : 6 pass(s)
- Exec time: [1.38, 2.21] s
* igt@kms_big_fb@linear-16bpp-rotate-180:
- Statuses : 6 pass(s)
- Exec time: [1.36, 1.87] s
* igt@kms_big_fb@linear-16bpp-rotate-270:
- Statuses : 5 skip(s)
- Exec time: [0.15, 0.51] s
* igt@kms_big_fb@linear-16bpp-rotate-90:
- Statuses : 6 skip(s)
- Exec time: [0.15, 0.56] s
* igt@kms_big_fb@linear-32bpp-rotate-0:
- Statuses : 6 pass(s)
- Exec time: [1.39, 2.51] s
* igt@kms_big_fb@linear-32bpp-rotate-180:
- Statuses : 5 pass(s)
- Exec time: [1.44, 2.03] s
* igt@kms_big_fb@linear-32bpp-rotate-270:
- Statuses : 6 skip(s)
- Exec time: [0.29, 0.80] s
* igt@kms_big_fb@linear-32bpp-rotate-90:
- Statuses : 6 skip(s)
- Exec time: [0.23, 0.72] s
* igt@kms_big_fb@linear-64bpp-rotate-0:
- Statuses : 1 fail(s) 4 skip(s)
- Exec time: [0.0, 0.01] s
* igt@kms_big_fb@linear-64bpp-rotate-180:
- Statuses : 1 fail(s) 5 skip(s)
- Exec time: [0.0, 0.01] s
* igt@kms_big_fb@linear-64bpp-rotate-270:
- Statuses : 1 fail(s) 5 skip(s)
- Exec time: [0.0, 1.22] s
* igt@kms_big_fb@linear-64bpp-rotate-90:
- Statuses : 1 fail(s) 5 skip(s)
- Exec time: [0.0, 0.11] s
* igt@kms_big_fb@linear-8bpp-rotate-0:
- Statuses : 5 skip(s)
- Exec time: [0.0] s
* igt@kms_big_fb@linear-8bpp-rotate-180:
- Statuses : 6 skip(s)
- Exec time: [0.0] s
* igt@kms_big_fb@linear-8bpp-rotate-270:
- Statuses : 6 skip(s)
- Exec time: [0.0] s
* igt@kms_big_fb@linear-8bpp-rotate-90:
- Statuses : 6 skip(s)
- Exec time: [0.0] s
* igt@kms_big_fb@linear-addfb:
- Statuses : 4 pass(s)
- Exec time: [0.0] s
* igt@kms_big_fb@x-tiled-16bpp-rotate-0:
- Statuses : 6 pass(s)
- Exec time: [1.37, 1.83] s
* igt@kms_big_fb@x-tiled-16bpp-rotate-180:
- Statuses : 6 pass(s)
- Exec time: [1.36, 1.81] s
* igt@kms_big_fb@x-tiled-16bpp-rotate-270:
- Statuses : 6 skip(s)
- Exec time: [0.13, 0.48] s
* igt@kms_big_fb@x-tiled-16bpp-rotate-90:
- Statuses : 6 skip(s)
- Exec time: [0.13, 0.53] s
* igt@kms_big_fb@x-tiled-32bpp-rotate-0:
- Statuses : 6 pass(s)
- Exec time: [1.42, 1.98] s
* igt@kms_big_fb@x-tiled-32bpp-rotate-180:
- Statuses : 5 pass(s)
- Exec time: [1.44, 2.12] s
* igt@kms_big_fb@x-tiled-32bpp-rotate-270:
- Statuses : 6 skip(s)
- Exec time: [0.20, 0.66] s
* igt@kms_big_fb@x-tiled-32bpp-rotate-90:
- Statuses : 6 skip(s)
- Exec time: [0.20, 0.67] s
* igt@kms_big_fb@x-tiled-64bpp-rotate-0:
- Statuses : 1 fail(s) 4 skip(s)
- Exec time: [0.0, 0.11] s
* igt@kms_big_fb@x-tiled-64bpp-rotate-180:
- Statuses : 1 fail(s) 4 skip(s)
- Exec time: [0.0, 0.08] s
* igt@kms_big_fb@x-tiled-64bpp-rotate-270:
- Statuses : 1 fail(s) 5 skip(s)
- Exec time: [0.0, 0.09] s
* igt@kms_big_fb@x-tiled-64bpp-rotate-90:
- Statuses : 1 fail(s) 5 skip(s)
- Exec time: [0.0, 0.16] s
* igt@kms_big_fb@x-tiled-8bpp-rotate-0:
- Statuses : 6 skip(s)
- Exec time: [0.0] s
* igt@kms_big_fb@x-tiled-8bpp-rotate-180:
- Statuses : 6 skip(s)
- Exec time: [0.0] s
* igt@kms_big_fb@x-tiled-8bpp-rotate-270:
- Statuses : 6 skip(s)
- Exec time: [0.0] s
* igt@kms_big_fb@x-tiled-8bpp-rotate-90:
- Statuses : 5 skip(s)
- Exec time: [0.0] s
* igt@kms_big_fb@x-tiled-addfb:
- Statuses : 6 pass(s)
- Exec time: [0.0] s
* igt@kms_big_fb@x-tiled-addfb-size-offset-overflow:
- Statuses : 3 pass(s) 3 skip(s)
- Exec time: [0.0] s
* igt@kms_big_fb@x-tiled-addfb-size-overflow:
- Statuses : 6 skip(s)
- Exec time: [0.0] s
* igt@kms_big_fb@y-tiled-16bpp-rotate-0:
- Statuses : 4 pass(s) 2 skip(s)
- Exec time: [0.0, 1.81] s
* igt@kms_big_fb@y-tiled-16bpp-rotate-180:
- Statuses : 4 pass(s) 2 skip(s)
- Exec time: [0.0, 2.12] s
* igt@kms_big_fb@y-tiled-16bpp-rotate-270:
- Statuses : 1 pass(s) 5 skip(s)
- Exec time: [0.0, 1.77] s
* igt@kms_big_fb@y-tiled-16bpp-rotate-90:
- Statuses : 1 pass(s) 4 skip(s)
- Exec time: [0.0, 1.60] s
* igt@kms_big_fb@y-tiled-32bpp-rotate-0:
- Statuses : 4 pass(s) 2 skip(s)
- Exec time: [0.0, 3.87] s
* igt@kms_big_fb@y-tiled-32bpp-rotate-180:
- Statuses : 3 pass(s) 2 skip(s)
- Exec time: [0.0, 1.96] s
* igt@kms_big_fb@y-tiled-32bpp-rotate-270:
- Statuses : 4 pass(s) 2 skip(s)
- Exec time: [0.0, 2.07] s
* igt@kms_big_fb@y-tiled-32bpp-rotate-90:
- Statuses : 4 pass(s) 2 skip(s)
- Exec time: [0.0, 2.06] s
* igt@kms_big_fb@y-tiled-64bpp-rotate-0:
- Statuses : 1 fail(s) 4 skip(s)
- Exec time: [0.0, 0.12] s
* igt@kms_big_fb@y-tiled-64bpp-rotate-180:
- Statuses : 1 fail(s) 5 skip(s)
- Exec time: [0.0, 0.01] s
* igt@kms_big_fb@y-tiled-64bpp-rotate-270:
- Statuses : 1 fail(s) 4 skip(s)
- Exec time: [0.0, 1.01] s
* igt@kms_big_fb@y-tiled-64bpp-rotate-90:
- Statuses : 1 fail(s) 3 skip(s)
- Exec time: [0.0, 0.12] s
* igt@kms_big_fb@y-tiled-8bpp-rotate-0:
- Statuses : 6 skip(s)
- Exec time: [0.0] s
* igt@kms_big_fb@y-tiled-8bpp-rotate-180:
- Statuses : 6 skip(s)
- Exec time: [0.0] s
* igt@kms_big_fb@y-tiled-8bpp-rotate-270:
- Statuses : 5 skip(s)
- Exec time: [0.0] s
* igt@kms_big_fb@y-tiled-8bpp-rotate-90:
- Statuses : 6 skip(s)
- Exec time: [0.0] s
* igt@kms_big_fb@y-tiled-addfb:
- Statuses : 2 fail(s) 3 pass(s)
- Exec time: [0.0, 0.15] s
* igt@kms_big_fb@y-tiled-addfb-size-offset-overflow:
- Statuses : 3 pass(s) 3 skip(s)
- Exec time: [0.0] s
* igt@kms_big_fb@y-tiled-addfb-size-overflow:
- Statuses : 5 skip(s)
- Exec time: [0.0] s
* igt@kms_big_fb@yf-tiled-16bpp-rotate-0:
- Statuses : 3 pass(s) 2 skip(s)
- Exec time: [0.0, 1.83] s
* igt@kms_big_fb@yf-tiled-16bpp-rotate-180:
- Statuses : 4 pass(s) 2 skip(s)
- Exec time: [0.0, 3.29] s
* igt@kms_big_fb@yf-tiled-16bpp-rotate-270:
- Statuses : 1 pass(s) 5 skip(s)
- Exec time: [0.0, 1.67] s
* igt@kms_big_fb@yf-tiled-16bpp-rotate-90:
- Statuses : 1 pass(s) 5 skip(s)
- Exec time: [0.0, 1.64] s
* igt@kms_big_fb@yf-tiled-32bpp-rotate-0:
- Statuses : 3 pass(s) 2 skip(s)
- Exec time: [0.0, 2.01] s
* igt@kms_big_fb@yf-tiled-32bpp-rotate-180:
- Statuses : 4 pass(s) 2 skip(s)
- Exec time: [0.0, 2.49] s
* igt@kms_big_fb@yf-tiled-32bpp-rotate-270:
- Statuses : 4 pass(s) 2 skip(s)
- Exec time: [0.0, 3.48] s
* igt@kms_big_fb@yf-tiled-32bpp-rotate-90:
- Statuses : 4 pass(s) 2 skip(s)
- Exec time: [0.0, 2.04] s
* igt@kms_big_fb@yf-tiled-64bpp-rotate-0:
- Statuses : 6 skip(s)
- Exec time: [0.0] s
* igt@kms_big_fb@yf-tiled-64bpp-rotate-180:
- Statuses : 5 skip(s)
- Exec time: [0.0] s
* igt@kms_big_fb@yf-tiled-64bpp-rotate-270:
- Statuses : 5 skip(s)
- Exec time: [0.0] s
* igt@kms_big_fb@yf-tiled-64bpp-rotate-90:
- Statuses : 6 skip(s)
- Exec time: [0.0] s
* igt@kms_big_fb@yf-tiled-8bpp-rotate-0:
- Statuses : 5 skip(s)
- Exec time: [0.0] s
* igt@kms_big_fb@yf-tiled-8bpp-rotate-180:
- Statuses : 6 skip(s)
- Exec time: [0.0] s
* igt@kms_big_fb@yf-tiled-8bpp-rotate-270:
- Statuses : 6 skip(s)
- Exec time: [0.0] s
* igt@kms_big_fb@yf-tiled-8bpp-rotate-90:
- Statuses : 6 skip(s)
- Exec time: [0.0] s
* igt@kms_big_fb@yf-tiled-addfb:
- Statuses : 2 fail(s) 4 pass(s)
- Exec time: [0.0, 0.01] s
* igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow:
- Statuses : 3 pass(s) 3 skip(s)
- Exec time: [0.0, 0.00] s
* igt@kms_big_fb@yf-tiled-addfb-size-overflow:
- Statuses : 6 skip(s)
- Exec time: [0.0] s
Known issues
------------
Here are the changes found in IGTPW_2897_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@core_auth@unauth-vs-render:
- shard-glk: NOTRUN -> FAIL [fdo#110467]
* igt@gem_ctx_isolation@vecs0-s3:
- shard-kbl: PASS -> DMESG-WARN [fdo#108566]
* igt@gem_exec_schedule@out-order-vebox:
- shard-hsw: NOTRUN -> SKIP [fdo#109271] +100
* igt@gem_exec_schedule@preempt-self-bsd2:
- shard-iclb: NOTRUN -> SKIP [fdo#109276] +3
* {igt@kms_big_fb@linear-16bpp-rotate-90} (NEW):
- shard-apl: NOTRUN -> SKIP [fdo#109271] +47
* {igt@kms_big_fb@y-tiled-16bpp-rotate-270} (NEW):
- shard-glk: NOTRUN -> SKIP [fdo#109271] +59
* {igt@kms_big_fb@yf-tiled-64bpp-rotate-90} (NEW):
- shard-kbl: NOTRUN -> SKIP [fdo#109271] +62
* igt@kms_busy@extended-modeset-hang-newfb-render-f:
- shard-snb: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +12
* igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-f:
- shard-glk: NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
* igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-e:
- shard-kbl: NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
* igt@kms_chamelium@hdmi-crc-fast:
- shard-iclb: NOTRUN -> SKIP [fdo#109284] +2
* igt@kms_cursor_crc@cursor-256x85-onscreen:
- shard-glk: NOTRUN -> FAIL [fdo#103232]
* igt@kms_cursor_crc@cursor-64x21-onscreen:
- shard-apl: PASS -> FAIL [fdo#103232]
* igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions:
- shard-iclb: NOTRUN -> SKIP [fdo#109274]
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-onoff:
- shard-iclb: NOTRUN -> SKIP [fdo#109280] +5
* igt@kms_frontbuffer_tracking@fbcpsr-1p-pri-indfb-multidraw:
- shard-iclb: PASS -> FAIL [fdo#103167] +7
* igt@kms_pipe_b_c_ivb@enable-pipe-c-while-b-has-3-lanes:
- shard-iclb: NOTRUN -> SKIP [fdo#109289]
* igt@kms_pipe_crc_basic@read-crc-pipe-e:
- shard-iclb: NOTRUN -> SKIP [fdo#109278] +2
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
- shard-apl: PASS -> DMESG-WARN [fdo#108566] +5
* igt@kms_plane_alpha_blend@pipe-a-alpha-basic:
- shard-glk: NOTRUN -> FAIL [fdo#108145]
* igt@kms_plane_alpha_blend@pipe-a-coverage-vs-premult-vs-constant:
- shard-hsw: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +5
* igt@kms_plane_lowres@pipe-a-tiling-y:
- shard-iclb: PASS -> FAIL [fdo#103166]
* igt@kms_plane_scaling@pipe-a-scaler-with-rotation:
- shard-glk: PASS -> SKIP [fdo#109271] / [fdo#109278]
* igt@kms_psr@psr2_basic:
- shard-iclb: PASS -> SKIP [fdo#109441] +2
* igt@kms_psr@psr2_cursor_render:
- shard-iclb: NOTRUN -> SKIP [fdo#109441] +1
* igt@kms_setmode@basic:
- shard-apl: PASS -> FAIL [fdo#99912]
* igt@perf_pmu@busy-check-all-vecs0:
- shard-snb: NOTRUN -> SKIP [fdo#109271] +118
* igt@prime_vgem@fence-write-hang:
- shard-iclb: NOTRUN -> SKIP [fdo#109295]
* igt@tools_test@sysfs_l3_parity:
- shard-iclb: NOTRUN -> SKIP [fdo#109307]
#### Possible fixes ####
* igt@gem_eio@in-flight-suspend:
- shard-glk: FAIL [fdo#105957] -> PASS
* igt@gem_tiled_swapping@non-threaded:
- shard-iclb: FAIL [fdo#108686] -> PASS
- shard-hsw: INCOMPLETE [fdo#103540] -> PASS
* igt@i915_pm_rpm@i2c:
- shard-iclb: FAIL [fdo#104097] -> PASS
* igt@kms_cursor_crc@cursor-256x256-suspend:
- shard-kbl: DMESG-WARN [fdo#108566] -> PASS +1
* igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic:
- shard-hsw: FAIL [fdo#105767] -> PASS
* igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic:
- shard-glk: FAIL [fdo#106509] / [fdo#107409] -> PASS
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt:
- shard-iclb: FAIL [fdo#103167] -> PASS +6
* igt@kms_plane@pixel-format-pipe-b-planes-source-clamping:
- shard-glk: SKIP [fdo#109271] -> PASS +1
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes:
- shard-apl: DMESG-WARN [fdo#108566] -> PASS +2
* igt@kms_plane_lowres@pipe-a-tiling-x:
- shard-iclb: FAIL [fdo#103166] -> PASS
* igt@kms_plane_scaling@pipe-c-scaler-with-rotation:
- shard-glk: SKIP [fdo#109271] / [fdo#109278] -> PASS
* igt@kms_psr2_su@page_flip:
- shard-iclb: SKIP [fdo#109642] -> PASS
* igt@kms_psr@psr2_primary_blt:
- shard-iclb: SKIP [fdo#109441] -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
[fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
[fdo#104097]: https://bugs.freedesktop.org/show_bug.cgi?id=104097
[fdo#105767]: https://bugs.freedesktop.org/show_bug.cgi?id=105767
[fdo#105957]: https://bugs.freedesktop.org/show_bug.cgi?id=105957
[fdo#106509]: https://bugs.freedesktop.org/show_bug.cgi?id=106509
[fdo#107409]: https://bugs.freedesktop.org/show_bug.cgi?id=107409
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
[fdo#108686]: https://bugs.freedesktop.org/show_bug.cgi?id=108686
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[fdo#109307]: https://bugs.freedesktop.org/show_bug.cgi?id=109307
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#110467]: https://bugs.freedesktop.org/show_bug.cgi?id=110467
[fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
Participating hosts (7 -> 6)
------------------------------
Missing (1): shard-skl
Build changes
-------------
* IGT: IGT_4959 -> IGTPW_2897
CI_DRM_5954: a77e0dc060fcd1a2a09412067097685c5101589c @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_2897: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2897/
IGT_4959: 504367d33b787de2ba8e007a5b620cfd6f0b3074 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2897/
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 16+ messages in thread
* [igt-dev] [PATCH i-g-t v2 5/5] tests/kms_big_fb: Make sure huge fbs work correctly
2019-04-18 19:40 ` [igt-dev] [PATCH i-g-t 5/5] tests/kms_big_fb: Make sure huge fbs work correctly Ville Syrjala
@ 2019-04-26 16:50 ` Ville Syrjala
0 siblings, 0 replies; 16+ messages in thread
From: Ville Syrjala @ 2019-04-26 16:50 UTC (permalink / raw)
To: igt-dev
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Add various tests to excercise huge framebuffers. First some basic
sanity checks that the kernel accepts/rejects good/bad addfb2 ioctls,
and finally actual scanout tests to make sure we scan out the correct
thing when panning around inside large framebuffers.
The implementation is i915 specific for now since I chose to use
rendercopy when generating the framebuffer contents. Using the normal
cairo stuff was just too slow when dealing with 1GiB framebuffers.
It shouldn't be too hard to plug in some other mechanisms if someone
else wants to reuse this test.
v2: Add igt_require(format+mod) for the addfb/overflow tests
Unset plane fb after TEST_ONLY fail
Limit max fb to at most 1/2 RAM or GPU address space
Tweak coords to avoid fails with 64bpp linear with 4k screen
Make coords even for 90/270 rotated 16bpp
Store bpp as uint8_t instead of wasting an entire char*
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
tests/Makefile.sources | 1 +
tests/kms_big_fb.c | 598 +++++++++++++++++++++++++++++++++++++++++
tests/meson.build | 1 +
3 files changed, 600 insertions(+)
create mode 100644 tests/kms_big_fb.c
diff --git a/tests/Makefile.sources b/tests/Makefile.sources
index 7f921f6c5988..2d5c929e32fc 100644
--- a/tests/Makefile.sources
+++ b/tests/Makefile.sources
@@ -27,6 +27,7 @@ TESTS_progs = \
kms_atomic_interruptible \
kms_atomic_transition \
kms_available_modes_crc \
+ kms_big_fb \
kms_busy \
kms_ccs \
kms_color \
diff --git a/tests/kms_big_fb.c b/tests/kms_big_fb.c
new file mode 100644
index 000000000000..dc5467ad2414
--- /dev/null
+++ b/tests/kms_big_fb.c
@@ -0,0 +1,598 @@
+/*
+ * Copyright © 2019 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#include "igt.h"
+#include <errno.h>
+#include <stdbool.h>
+#include <stdio.h>
+#include <string.h>
+
+IGT_TEST_DESCRIPTION("Test big framebuffers");
+
+typedef struct {
+ int drm_fd;
+ igt_display_t display;
+ enum pipe pipe;
+ igt_output_t *output;
+ igt_plane_t *plane;
+ igt_pipe_crc_t *pipe_crc;
+ struct igt_fb small_fb, big_fb;
+ uint32_t format;
+ uint64_t modifier;
+ int width, height;
+ igt_rotation_t rotation;
+ int max_fb_width, max_fb_height;
+ uint64_t ram_size, aper_size;
+ igt_render_copyfunc_t render_copy;
+ drm_intel_bufmgr *bufmgr;
+ struct intel_batchbuffer *batch;
+} data_t;
+
+static void init_buf(data_t *data,
+ struct igt_buf *buf,
+ const struct igt_fb *fb,
+ const char *name)
+{
+ igt_assert_eq(fb->offsets[0], 0);
+
+ buf->bo = gem_handle_to_libdrm_bo(data->bufmgr, data->drm_fd,
+ name, fb->gem_handle);
+ buf->tiling = igt_fb_mod_to_tiling(fb->modifier);
+ buf->stride = fb->strides[0];
+ buf->bpp = fb->plane_bpp[0];
+ buf->size = fb->size;
+}
+
+static void fini_buf(struct igt_buf *buf)
+{
+ drm_intel_bo_unreference(buf->bo);
+}
+
+static void copy_pattern(data_t *data,
+ struct igt_fb *dst_fb, int dx, int dy,
+ struct igt_fb *src_fb, int sx, int sy,
+ int w, int h)
+{
+ struct igt_buf src = {}, dst = {};
+
+ init_buf(data, &src, src_fb, "big fb rendercopy src");
+ init_buf(data, &dst, dst_fb, "big fb rendercopy dst");
+
+ gem_set_domain(data->drm_fd, dst_fb->gem_handle,
+ I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
+ gem_set_domain(data->drm_fd, src_fb->gem_handle,
+ I915_GEM_DOMAIN_GTT, 0);
+
+ data->render_copy(data->batch, NULL, &src, sx, sy, w, h, &dst, dx, dy);
+
+ fini_buf(&dst);
+ fini_buf(&src);
+}
+
+static void generate_pattern(data_t *data,
+ struct igt_fb *fb,
+ int w, int h)
+{
+ struct igt_fb pat_fb;
+
+ igt_create_pattern_fb(data->drm_fd, w, h,
+ data->format, data->modifier,
+ &pat_fb);
+
+ for (int y = 0; y < fb->height; y += h) {
+ for (int x = 0; x < fb->width; x += w) {
+ copy_pattern(data, fb, x, y,
+ &pat_fb, 0, 0,
+ pat_fb.width, pat_fb.height);
+ w++;
+ h++;
+ }
+ }
+
+ igt_remove_fb(data->drm_fd, &pat_fb);
+}
+
+static void max_fb_size(data_t *data, int *width, int *height,
+ uint32_t format, uint64_t modifier)
+{
+ unsigned int stride;
+ uint64_t size;
+ int i = 0;
+
+ *width = data->max_fb_width;
+ *height = data->max_fb_height;
+
+ igt_calc_fb_size(data->drm_fd, *width, *height,
+ format, modifier, &size, &stride);
+
+ /*
+ * Limit the big fb size to at most half the RAM bor half
+ * the aperture size. Could go a bit higher I suppose since
+ * we shouldn't need more than one big fb at a time.
+ */
+ while (size > data->ram_size / 2 || size > data->aper_size / 2) {
+ if (i++ & 1)
+ *width >>= 1;
+ else
+ *height >>= 1;
+
+ igt_calc_fb_size(data->drm_fd, *width, *height,
+ format, modifier, &size, &stride);
+ }
+
+ igt_info("Max usable framebuffer size for format "IGT_FORMAT_FMT" / modifier 0x%"PRIx64": %dx%d\n",
+ IGT_FORMAT_ARGS(format), modifier,
+ *width, *height);
+}
+
+static bool test_plane(data_t *data)
+{
+ igt_plane_t *plane = data->plane;
+ struct igt_fb *small_fb = &data->small_fb;
+ struct igt_fb *big_fb = &data->big_fb;
+ int w = big_fb->width - small_fb->width;
+ int h = big_fb->height - small_fb->height;
+ struct {
+ int x, y;
+ } coords[] = {
+ /* bunch of coordinates pulled out of thin air */
+ { 0, 0, },
+ { w * 4 / 7, h / 5, },
+ { w * 3 / 7, h / 3, },
+ { w / 2, h / 2, },
+ { w / 3, h * 3 / 4, },
+ { w, h, },
+ };
+
+ if (!igt_plane_has_format_mod(plane, data->format, data->modifier))
+ return false;
+
+ igt_plane_set_rotation(plane, data->rotation);
+ igt_plane_set_position(plane, 0, 0);
+
+ for (int i = 0; i < ARRAY_SIZE(coords); i++) {
+ igt_crc_t small_crc, big_crc;
+ int x = coords[i].x;
+ int y = coords[i].y;
+
+ /* Hardware limitation */
+ if (data->format == DRM_FORMAT_RGB565 &&
+ (data->rotation == IGT_ROTATION_90 ||
+ data->rotation == IGT_ROTATION_270)) {
+ x &= ~1;
+ y &= ~1;
+ }
+
+ /*
+ * Make a 1:1 copy of the desired part of the big fb
+ * rather than try to render the same pattern (translated
+ * accordinly) again via cairo. Something in cairo's
+ * rendering pipeline introduces slight differences into
+ * the result if we try that, and so the crc will not match.
+ */
+ copy_pattern(data, small_fb, 0, 0, big_fb, x, y,
+ small_fb->width, small_fb->height);
+
+ igt_plane_set_fb(plane, small_fb);
+ igt_plane_set_size(plane, data->width, data->height);
+
+ /*
+ * Try to check that the rotation+format+modifier
+ * combo is supported.
+ */
+ if (i == 0 && data->display.is_atomic &&
+ igt_display_try_commit_atomic(&data->display,
+ DRM_MODE_ATOMIC_TEST_ONLY,
+ NULL) != 0) {
+ igt_plane_set_rotation(plane, IGT_ROTATION_0);
+ igt_plane_set_fb(plane, NULL);
+ igt_skip("unsupported plane configuration\n");
+ }
+
+ igt_display_commit2(&data->display, data->display.is_atomic ?
+ COMMIT_ATOMIC : COMMIT_UNIVERSAL);
+
+
+ igt_pipe_crc_collect_crc(data->pipe_crc, &small_crc);
+
+ igt_plane_set_fb(plane, big_fb);
+ igt_fb_set_position(big_fb, plane, x, y);
+ igt_fb_set_size(big_fb, plane, small_fb->width, small_fb->height);
+ igt_plane_set_size(plane, data->width, data->height);
+ igt_display_commit2(&data->display, data->display.is_atomic ?
+ COMMIT_ATOMIC : COMMIT_UNIVERSAL);
+
+ igt_pipe_crc_collect_crc(data->pipe_crc, &big_crc);
+
+ igt_plane_set_fb(plane, NULL);
+
+ igt_assert_crc_equal(&big_crc, &small_crc);
+
+ }
+
+ return true;
+}
+
+static bool test_pipe(data_t *data)
+{
+ drmModeModeInfo *mode;
+ igt_plane_t *primary;
+ int width, height;
+ bool ret = false;
+
+ mode = igt_output_get_mode(data->output);
+
+ data->width = mode->hdisplay;
+ data->height = mode->vdisplay;
+
+ width = mode->hdisplay;
+ height = mode->vdisplay;
+ if (data->rotation == IGT_ROTATION_90 ||
+ data->rotation == IGT_ROTATION_270)
+ igt_swap(width, height);
+
+ igt_create_color_fb(data->drm_fd, width, height,
+ data->format, data->modifier,
+ 0, 1, 0, &data->small_fb);
+
+ igt_output_set_pipe(data->output, data->pipe);
+
+ primary = igt_output_get_plane_type(data->output, DRM_PLANE_TYPE_PRIMARY);
+ igt_plane_set_fb(primary, NULL);
+
+ if (!data->display.is_atomic) {
+ struct igt_fb fb;
+
+ igt_create_fb(data->drm_fd, mode->hdisplay, mode->vdisplay,
+ DRM_FORMAT_XRGB8888, DRM_FORMAT_MOD_LINEAR,
+ &fb);
+
+ /* legacy setcrtc needs an fb */
+ igt_plane_set_fb(primary, &data->small_fb);
+ igt_display_commit2(&data->display, COMMIT_LEGACY);
+
+ igt_plane_set_fb(primary, NULL);
+ igt_display_commit2(&data->display, COMMIT_UNIVERSAL);
+
+ igt_remove_fb(data->drm_fd, &fb);
+ }
+
+ igt_display_commit2(&data->display, data->display.is_atomic ?
+ COMMIT_ATOMIC : COMMIT_UNIVERSAL);
+
+ data->pipe_crc = igt_pipe_crc_new(data->drm_fd, data->pipe,
+ INTEL_PIPE_CRC_SOURCE_AUTO);
+
+ for_each_plane_on_pipe(&data->display, data->pipe, data->plane) {
+ ret = test_plane(data);
+ if (ret)
+ break;
+ }
+
+ igt_pipe_crc_free(data->pipe_crc);
+
+ igt_output_set_pipe(data->output, PIPE_ANY);
+ igt_display_commit2(&data->display, data->display.is_atomic ?
+ COMMIT_ATOMIC : COMMIT_UNIVERSAL);
+
+ igt_remove_fb(data->drm_fd, &data->small_fb);
+
+ return ret;
+}
+
+static void test_scanout(data_t *data)
+{
+ for_each_pipe_with_valid_output(&data->display, data->pipe, data->output) {
+ if (test_pipe(data))
+ return;
+ }
+
+ igt_skip("no valid crtc/connector combinations found\n");
+}
+
+static void prep_fb(data_t *data)
+{
+ int width, height;
+
+ if (data->big_fb.fb_id)
+ return;
+
+ max_fb_size(data, &width, &height,
+ data->format, data->modifier);
+
+ igt_create_fb(data->drm_fd, width, height,
+ data->format, data->modifier,
+ &data->big_fb);
+
+ generate_pattern(data, &data->big_fb, 640, 480);
+}
+
+static void cleanup_fb(data_t *data)
+{
+ igt_remove_fb(data->drm_fd, &data->big_fb);
+ data->big_fb.fb_id = 0;
+}
+
+static void
+test_size_overflow(data_t *data)
+{
+ uint32_t fb_id;
+ uint32_t bo;
+ uint32_t offsets[4] = {};
+ uint32_t strides[4] = { 256*1024, };
+ int ret;
+
+ igt_require(igt_display_has_format_mod(&data->display,
+ DRM_FORMAT_XRGB8888,
+ data->modifier));
+
+ /*
+ * Try to hit a specific integer overflow in i915 fb size
+ * calculations. 256k * 16k == 1<<32 which is checked
+ * against the bo size. The check should fail on account
+ * of the bo being smaller, but due to the overflow the
+ * computed fb size is 0 and thus the check never trips.
+ */
+ igt_require(data->max_fb_width >= 16383 &&
+ data->max_fb_height >= 16383);
+
+ bo = gem_create(data->drm_fd, (1ULL << 32) - 4096);
+ igt_require(bo);
+
+ ret = __kms_addfb(data->drm_fd, bo,
+ 16383, 16383,
+ DRM_FORMAT_XRGB8888,
+ data->modifier,
+ strides, offsets, 1,
+ DRM_MODE_FB_MODIFIERS, &fb_id);
+
+ igt_assert_neq(ret, 0);
+
+ gem_close(data->drm_fd, bo);
+}
+
+static void
+test_size_offset_overflow(data_t *data)
+{
+ uint32_t fb_id;
+ uint32_t bo;
+ uint32_t offsets[4] = {};
+ uint32_t strides[4] = { 8192, };
+ int ret;
+
+ igt_require(igt_display_has_format_mod(&data->display,
+ DRM_FORMAT_NV12,
+ data->modifier));
+
+ /*
+ * Try to a specific integer overflow in i915 fb size
+ * calculations. This time it's offsets[1] + the tile
+ * aligned chroma plane size that overflows and
+ * incorrectly passes the bo size check.
+ */
+ igt_require(igt_display_has_format_mod(&data->display,
+ DRM_FORMAT_NV12,
+ data->modifier));
+
+ bo = gem_create(data->drm_fd, (1ULL << 32) - 4096);
+ igt_require(bo);
+
+ offsets[0] = 0;
+ offsets[1] = (1ULL << 32) - 8192 * 4096;
+
+ ret = __kms_addfb(data->drm_fd, bo,
+ 8192, 8188,
+ DRM_FORMAT_NV12,
+ data->modifier,
+ strides, offsets, 1,
+ DRM_MODE_FB_MODIFIERS, &fb_id);
+ igt_assert_neq(ret, 0);
+
+ gem_close(data->drm_fd, bo);
+}
+
+static int rmfb(int fd, uint32_t id)
+{
+ int err;
+
+ err = 0;
+ if (igt_ioctl(fd, DRM_IOCTL_MODE_RMFB, &id))
+ err = -errno;
+
+ errno = 0;
+ return err;
+}
+
+static void
+test_addfb(data_t *data)
+{
+ uint64_t size;
+ uint32_t fb_id;
+ uint32_t bo;
+ uint32_t offsets[4] = {};
+ uint32_t strides[4] = {};
+ int ret;
+
+ igt_require(igt_display_has_format_mod(&data->display,
+ DRM_FORMAT_XRGB8888,
+ data->modifier));
+
+ igt_calc_fb_size(data->drm_fd,
+ data->max_fb_width,
+ data->max_fb_height,
+ DRM_FORMAT_XRGB8888,
+ data->modifier,
+ &size, &strides[0]);
+
+ bo = gem_create(data->drm_fd, size);
+ igt_require(bo);
+
+ ret = __kms_addfb(data->drm_fd, bo,
+ data->max_fb_width,
+ data->max_fb_height,
+ DRM_FORMAT_XRGB8888,
+ data->modifier,
+ strides, offsets, 1,
+ DRM_MODE_FB_MODIFIERS, &fb_id);
+ igt_assert_eq(ret, 0);
+
+ rmfb(data->drm_fd, fb_id);
+ gem_close(data->drm_fd, bo);
+}
+
+static data_t data;
+
+static const struct {
+ uint64_t modifier;
+ const char *name;
+} modifiers[] = {
+ { DRM_FORMAT_MOD_LINEAR, "linear", },
+ { I915_FORMAT_MOD_X_TILED, "x-tiled", },
+ { I915_FORMAT_MOD_Y_TILED, "y-tiled", },
+ { I915_FORMAT_MOD_Yf_TILED, "yf-tiled", },
+};
+
+static const struct {
+ uint32_t format;
+ uint8_t bpp;
+} formats[] = {
+ /* FIXME igt_fb doesn't support C8 currently */
+ { DRM_FORMAT_C8, 8, },
+ { DRM_FORMAT_RGB565, 16, },
+ { DRM_FORMAT_XRGB8888, 32, },
+ { DRM_FORMAT_XBGR16161616F, 64, },
+};
+
+static const struct {
+ igt_rotation_t rotation;
+ uint16_t angle;
+} rotations[] = {
+ { IGT_ROTATION_0, 0, },
+ { IGT_ROTATION_90, 90, },
+ { IGT_ROTATION_180, 180, },
+ { IGT_ROTATION_270, 270, },
+};
+
+igt_main
+{
+ igt_fixture {
+ drmModeResPtr res;
+ uint32_t devid;
+
+ igt_skip_on_simulation();
+
+ data.drm_fd = drm_open_driver_master(DRIVER_INTEL);
+
+ igt_require(is_i915_device(data.drm_fd));
+
+ devid = intel_get_drm_devid(data.drm_fd);
+
+ kmstest_set_vt_graphics_mode();
+
+ igt_require_pipe_crc(data.drm_fd);
+ igt_display_require(&data.display, data.drm_fd);
+
+ res = drmModeGetResources(data.drm_fd);
+ igt_assert(res);
+
+ data.max_fb_width = res->max_width;
+ data.max_fb_height = res->max_height;
+
+ drmModeFreeResources(res);
+
+ igt_info("Max driver framebuffer size %dx%d\n",
+ data.max_fb_width, data.max_fb_height);
+
+ data.ram_size = intel_get_total_ram_mb() << 20;
+ data.aper_size = gem_aperture_size(data.drm_fd);
+
+ igt_info("RAM: %"PRIu64" MiB, GPU address space: %"PRId64" MiB\n",
+ data.ram_size >> 20, data.aper_size >> 20);
+
+ data.render_copy = igt_get_render_copyfunc(devid);
+ igt_require(data.render_copy);
+
+ data.bufmgr = drm_intel_bufmgr_gem_init(data.drm_fd, 4096);
+ data.batch = intel_batchbuffer_alloc(data.bufmgr, devid);
+ }
+
+ /*
+ * Skip linear as it doesn't hit the overflow we want
+ * on account of the tile height being effectively one,
+ * and thus the kenrnel rounding up to the next tile
+ * height won't do anything.
+ */
+ for (int i = 1; i < ARRAY_SIZE(modifiers); i++) {
+ igt_subtest_f("%s-addfb-size-overflow",
+ modifiers[i].name) {
+ data.modifier = modifiers[i].modifier;
+ test_size_overflow(&data);
+ }
+ }
+
+ for (int i = 1; i < ARRAY_SIZE(modifiers); i++) {
+ igt_subtest_f("%s-addfb-size-offset-overflow",
+ modifiers[i].name) {
+ data.modifier = modifiers[i].modifier;
+ test_size_offset_overflow(&data);
+ }
+ }
+
+ for (int i = 0; i < ARRAY_SIZE(modifiers); i++) {
+ igt_subtest_f("%s-addfb", modifiers[i].name) {
+ data.modifier = modifiers[i].modifier;
+
+ test_addfb(&data);
+ }
+ }
+
+ for (int i = 0; i < ARRAY_SIZE(modifiers); i++) {
+ data.modifier = modifiers[i].modifier;
+
+ for (int j = 0; j < ARRAY_SIZE(formats); j++) {
+ data.format = formats[j].format;
+
+ for (int k = 0; k < ARRAY_SIZE(rotations); k++) {
+ data.rotation = rotations[k].rotation;
+
+ igt_subtest_f("%s-%dbpp-rotate-%d", modifiers[i].name,
+ formats[j].bpp, rotations[k].angle) {
+ igt_require(igt_fb_supported_format(data.format));
+ igt_require(igt_display_has_format_mod(&data.display, data.format, data.modifier));
+ prep_fb(&data);
+ test_scanout(&data);
+ }
+ }
+
+ igt_fixture
+ cleanup_fb(&data);
+ }
+ }
+
+ igt_fixture {
+ igt_display_fini(&data.display);
+
+ intel_batchbuffer_free(data.batch);
+ drm_intel_bufmgr_destroy(data.bufmgr);
+ }
+}
diff --git a/tests/meson.build b/tests/meson.build
index 711979b4a1c2..ad8444875302 100644
--- a/tests/meson.build
+++ b/tests/meson.build
@@ -14,6 +14,7 @@ test_progs = [
'kms_atomic_interruptible',
'kms_atomic_transition',
'kms_available_modes_crc',
+ 'kms_big_fb',
'kms_busy',
'kms_ccs',
'kms_color',
--
2.21.0
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,1/5] lib/igt_fb: Fix the cairo shadow buffer stride (rev2)
2019-04-18 19:40 [igt-dev] [PATCH i-g-t 1/5] lib/igt_fb: Fix the cairo shadow buffer stride Ville Syrjala
` (5 preceding siblings ...)
2019-04-18 22:46 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork
@ 2019-04-26 17:59 ` Patchwork
2019-04-26 19:14 ` [igt-dev] [PATCH i-g-t 1/5] lib/igt_fb: Fix the cairo shadow buffer stride Chris Wilson
2019-04-26 23:41 ` [igt-dev] ✗ Fi.CI.IGT: failure for series starting with [i-g-t,1/5] lib/igt_fb: Fix the cairo shadow buffer stride (rev2) Patchwork
8 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2019-04-26 17:59 UTC (permalink / raw)
To: Ville Syrjala; +Cc: igt-dev
== Series Details ==
Series: series starting with [i-g-t,1/5] lib/igt_fb: Fix the cairo shadow buffer stride (rev2)
URL : https://patchwork.freedesktop.org/series/59732/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6006 -> IGTPW_2930
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://patchwork.freedesktop.org/api/1.0/series/59732/revisions/2/mbox/
Known issues
------------
Here are the changes found in IGTPW_2930 that come from known issues:
### IGT changes ###
#### Possible fixes ####
* igt@gem_basic@create-fd-close:
- fi-skl-6700k2: [INCOMPLETE][1] -> [PASS][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6006/fi-skl-6700k2/igt@gem_basic@create-fd-close.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2930/fi-skl-6700k2/igt@gem_basic@create-fd-close.html
Participating hosts (25 -> 31)
------------------------------
Additional (16): fi-skl-gvtdvm fi-hsw-peppy fi-skl-6770hq fi-icl-u2 fi-skl-6260u fi-snb-2520m fi-ilk-650 fi-kbl-7500u fi-whl-u fi-ivb-3770 fi-icl-u3 fi-cfl-8109u fi-skl-iommu fi-skl-lmem fi-icl-dsi fi-skl-6600u
Missing (10): fi-kbl-soraka fi-ilk-m540 fi-bxt-dsi fi-byt-squawks fi-byt-clapper fi-kbl-x1275 fi-icl-y fi-byt-n2820 fi-bsw-kefka fi-snb-2600
Build changes
-------------
* IGT: IGT_4968 -> IGTPW_2930
CI_DRM_6006: f2b80d9616c3ced3d5e04bba276c4e57265faabb @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_2930: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2930/
IGT_4968: caed251990f35bfe45368f803980071a73e36315 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
== Testlist changes ==
+igt@kms_big_fb@linear-8bpp-rotate-0
+igt@kms_big_fb@linear-8bpp-rotate-90
+igt@kms_big_fb@linear-8bpp-rotate-180
+igt@kms_big_fb@linear-8bpp-rotate-270
+igt@kms_big_fb@linear-16bpp-rotate-0
+igt@kms_big_fb@linear-16bpp-rotate-90
+igt@kms_big_fb@linear-16bpp-rotate-180
+igt@kms_big_fb@linear-16bpp-rotate-270
+igt@kms_big_fb@linear-32bpp-rotate-0
+igt@kms_big_fb@linear-32bpp-rotate-90
+igt@kms_big_fb@linear-32bpp-rotate-180
+igt@kms_big_fb@linear-32bpp-rotate-270
+igt@kms_big_fb@linear-64bpp-rotate-0
+igt@kms_big_fb@linear-64bpp-rotate-90
+igt@kms_big_fb@linear-64bpp-rotate-180
+igt@kms_big_fb@linear-64bpp-rotate-270
+igt@kms_big_fb@linear-addfb
+igt@kms_big_fb@x-tiled-8bpp-rotate-0
+igt@kms_big_fb@x-tiled-8bpp-rotate-90
+igt@kms_big_fb@x-tiled-8bpp-rotate-180
+igt@kms_big_fb@x-tiled-8bpp-rotate-270
+igt@kms_big_fb@x-tiled-16bpp-rotate-0
+igt@kms_big_fb@x-tiled-16bpp-rotate-90
+igt@kms_big_fb@x-tiled-16bpp-rotate-180
+igt@kms_big_fb@x-tiled-16bpp-rotate-270
+igt@kms_big_fb@x-tiled-32bpp-rotate-0
+igt@kms_big_fb@x-tiled-32bpp-rotate-90
+igt@kms_big_fb@x-tiled-32bpp-rotate-180
+igt@kms_big_fb@x-tiled-32bpp-rotate-270
+igt@kms_big_fb@x-tiled-64bpp-rotate-0
+igt@kms_big_fb@x-tiled-64bpp-rotate-90
+igt@kms_big_fb@x-tiled-64bpp-rotate-180
+igt@kms_big_fb@x-tiled-64bpp-rotate-270
+igt@kms_big_fb@x-tiled-addfb
+igt@kms_big_fb@x-tiled-addfb-size-offset-overflow
+igt@kms_big_fb@x-tiled-addfb-size-overflow
+igt@kms_big_fb@yf-tiled-8bpp-rotate-0
+igt@kms_big_fb@yf-tiled-8bpp-rotate-90
+igt@kms_big_fb@yf-tiled-8bpp-rotate-180
+igt@kms_big_fb@yf-tiled-8bpp-rotate-270
+igt@kms_big_fb@yf-tiled-16bpp-rotate-0
+igt@kms_big_fb@yf-tiled-16bpp-rotate-90
+igt@kms_big_fb@yf-tiled-16bpp-rotate-180
+igt@kms_big_fb@yf-tiled-16bpp-rotate-270
+igt@kms_big_fb@yf-tiled-32bpp-rotate-0
+igt@kms_big_fb@yf-tiled-32bpp-rotate-90
+igt@kms_big_fb@yf-tiled-32bpp-rotate-180
+igt@kms_big_fb@yf-tiled-32bpp-rotate-270
+igt@kms_big_fb@yf-tiled-64bpp-rotate-0
+igt@kms_big_fb@yf-tiled-64bpp-rotate-90
+igt@kms_big_fb@yf-tiled-64bpp-rotate-180
+igt@kms_big_fb@yf-tiled-64bpp-rotate-270
+igt@kms_big_fb@yf-tiled-addfb
+igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow
+igt@kms_big_fb@yf-tiled-addfb-size-overflow
+igt@kms_big_fb@y-tiled-8bpp-rotate-0
+igt@kms_big_fb@y-tiled-8bpp-rotate-90
+igt@kms_big_fb@y-tiled-8bpp-rotate-180
+igt@kms_big_fb@y-tiled-8bpp-rotate-270
+igt@kms_big_fb@y-tiled-16bpp-rotate-0
+igt@kms_big_fb@y-tiled-16bpp-rotate-90
+igt@kms_big_fb@y-tiled-16bpp-rotate-180
+igt@kms_big_fb@y-tiled-16bpp-rotate-270
+igt@kms_big_fb@y-tiled-32bpp-rotate-0
+igt@kms_big_fb@y-tiled-32bpp-rotate-90
+igt@kms_big_fb@y-tiled-32bpp-rotate-180
+igt@kms_big_fb@y-tiled-32bpp-rotate-270
+igt@kms_big_fb@y-tiled-64bpp-rotate-0
+igt@kms_big_fb@y-tiled-64bpp-rotate-90
+igt@kms_big_fb@y-tiled-64bpp-rotate-180
+igt@kms_big_fb@y-tiled-64bpp-rotate-270
+igt@kms_big_fb@y-tiled-addfb
+igt@kms_big_fb@y-tiled-addfb-size-offset-overflow
+igt@kms_big_fb@y-tiled-addfb-size-overflow
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2930/
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 1/5] lib/igt_fb: Fix the cairo shadow buffer stride
2019-04-18 19:40 [igt-dev] [PATCH i-g-t 1/5] lib/igt_fb: Fix the cairo shadow buffer stride Ville Syrjala
` (6 preceding siblings ...)
2019-04-26 17:59 ` [igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,1/5] lib/igt_fb: Fix the cairo shadow buffer stride (rev2) Patchwork
@ 2019-04-26 19:14 ` Chris Wilson
2019-04-26 23:41 ` [igt-dev] ✗ Fi.CI.IGT: failure for series starting with [i-g-t,1/5] lib/igt_fb: Fix the cairo shadow buffer stride (rev2) Patchwork
8 siblings, 0 replies; 16+ messages in thread
From: Chris Wilson @ 2019-04-26 19:14 UTC (permalink / raw)
To: Ville Syrjala, igt-dev
Quoting Ville Syrjala (2019-04-18 20:40:39)
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> We're currently overallocating the shadow buffer stride by a
> factor of 8. This didn't go down so well when I tried to use
> a 16kx16k float framebuffer.
>
> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> Fixes: b0033d9310c1 ("lib/color_encoding: Prepare support for HDR modes, v2.")
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 2/5] lib/igt_fb: Fix 32bit integer overflow in the shadow buffer size calculation
2019-04-18 19:40 ` [igt-dev] [PATCH i-g-t 2/5] lib/igt_fb: Fix 32bit integer overflow in the shadow buffer size calculation Ville Syrjala
@ 2019-04-26 19:14 ` Chris Wilson
0 siblings, 0 replies; 16+ messages in thread
From: Chris Wilson @ 2019-04-26 19:14 UTC (permalink / raw)
To: Ville Syrjala, igt-dev
Quoting Ville Syrjala (2019-04-18 20:40:40)
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> 16k*16k*16 == 1<<32, so 32bits isn't enough for the result when
> we start to have big framebuffers.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 3/5] lib/rendercopy: Add fp16 support for gen4+
2019-04-18 19:40 ` [igt-dev] [PATCH i-g-t 3/5] lib/rendercopy: Add fp16 support for gen4+ Ville Syrjala
@ 2019-04-26 19:16 ` Chris Wilson
0 siblings, 0 replies; 16+ messages in thread
From: Chris Wilson @ 2019-04-26 19:16 UTC (permalink / raw)
To: Ville Syrjala, igt-dev
Quoting Ville Syrjala (2019-04-18 20:40:41)
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Allow copying between fp16 surfaces. We'll use the FLOAT
> surface format since that's all the display supports currently.
> Hopefully the hardware gives us a 1:1 copy, at least if
> the input doesn't contain crazy infs/nans etc. We could
> choose UNORM instead but that won't work for eventually
> exposing fp16+ccs. Although we do need to replace the
> simple bpp value with a more specific format type to get
> 10bpc+ccs working as well.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Mesa has it listed as always available as a render target,
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 4/5] lib/rendercopy: Configure MOCS more consistently
2019-04-18 19:40 ` [igt-dev] [PATCH i-g-t 4/5] lib/rendercopy: Configure MOCS more consistently Ville Syrjala
@ 2019-04-26 19:18 ` Chris Wilson
2019-04-26 19:27 ` Ville Syrjälä
0 siblings, 1 reply; 16+ messages in thread
From: Chris Wilson @ 2019-04-26 19:18 UTC (permalink / raw)
To: Ville Syrjala, igt-dev
Quoting Ville Syrjala (2019-04-18 20:40:42)
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Unify the MOCS to be more consistently across the platforms.
> Currently gen8+ are specifyig UC whereas earlier platforms
> generally use PTE. Let's make everyone more or less specify
> L3+PTE.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> lib/gen6_render.h | 9 ++++++++-
> lib/gen7_render.h | 11 ++++++++++-
> lib/gen8_render.h | 15 +++++++++++++++
> lib/rendercopy_gen6.c | 2 ++
> lib/rendercopy_gen7.c | 5 ++++-
> lib/rendercopy_gen8.c | 7 +++++++
> lib/rendercopy_gen9.c | 2 ++
> 7 files changed, 48 insertions(+), 3 deletions(-)
>
> diff --git a/lib/gen6_render.h b/lib/gen6_render.h
> index f45c8ae7b34a..a4c166417634 100644
> --- a/lib/gen6_render.h
> +++ b/lib/gen6_render.h
> @@ -735,6 +735,12 @@
> #define GEN6_SCRATCH_SPACE_SIZE_1M 10
> #define GEN6_SCRATCH_SPACE_SIZE_2M 11
>
> +#define GEN6_MOCS_GFDT (1 << 2)
> +#define GEN6_MOCS_PTE (0 << 0)
> +#define GEN6_MOCS_UC (1 << 0)
> +#define GEN6_MOCS_LLC (2 << 0)
> +#define GEN6_MOCS_LLC_MLC (3 << 0)
> +
> /* The hardware supports two different modes for border color. The
> * default (OpenGL) mode uses floating-point color channels, while the
> * legacy mode uses 4 bytes.
> @@ -933,7 +939,8 @@ struct gen6_surface_state {
> } ss4;
>
> struct {
> - uint32_t pad:20;
> + uint32_t pad:16;
> + uint32_t memory_object_control:4;
> uint32_t y_offset:4;
> uint32_t pad2:1;
> uint32_t x_offset:7;
> diff --git a/lib/gen7_render.h b/lib/gen7_render.h
> index 4bde0d5f13ec..5dfc04d4bc2b 100644
> --- a/lib/gen7_render.h
> +++ b/lib/gen7_render.h
> @@ -186,6 +186,14 @@
>
> #define GEN7_ARF_IP 0xA0
>
> +#define VLV_MOCS_SNOOP (2 << 1)
> +#define VLV_MOCS_L3 (1 << 0)
> +
> +#define IVB_MOCS_GFDT (1 << 2)
> +#define IVB_MOCS_PTE (0 << 1)
> +#define IVB_MOCS_LLC (1 << 1)
> +#define IVB_MOCS_L3 (1 << 0)
> +
> /* The hardware supports two different modes for border color. The
> * default (OpenGL) mode uses floating-point color channels, while the
> * legacy mode uses 4 bytes.
> @@ -252,7 +260,8 @@ struct gen7_surface_state {
> struct {
> unsigned int mip_count:4;
> unsigned int min_lod:4;
> - unsigned int pad1:12;
> + unsigned int pad1:8;
> + unsigned int memory_object_control:4;
> unsigned int y_offset:4;
> unsigned int pad0:1;
> unsigned int x_offset:7;
> diff --git a/lib/gen8_render.h b/lib/gen8_render.h
> index 7e33bea22d65..31dc01bcf57c 100644
> --- a/lib/gen8_render.h
> +++ b/lib/gen8_render.h
> @@ -67,6 +67,21 @@
> /* STATE_BASE_ADDRESS state size in pages*/
> #define GEN8_STATE_SIZE_PAGES(x) ((x) << 12)
>
> +#define BDW_MOCS_PTE (0 << 5)
> +#define BDW_MOCS_UC (1 << 5)
> +#define BDW_MOCS_WT (2 << 5)
> +#define BDW_MOCS_WB (3 << 5)
> +#define BDW_MOCS_TC_ELLC (0 << 3)
> +#define BDW_MOCS_TC_LLC (1 << 3)
> +#define BDW_MOCS_TC_LLC_ELLC (2 << 3)
> +#define BDW_MOCS_TC_L3_PTE (3 << 3)
> +#define BDW_MOCS_AGE(x) ((x) << 0)
> +
> +#define CHV_MOCS_UC (0 << 5)
> +#define CHV_MOCS_WB (3 << 5)
> +#define CHV_MOCS_NO_CACHING (0 << 3)
> +#define CHV_MOCS_L3 (3 << 3)
> +
> /* Shamelessly ripped from mesa */
> struct gen8_surface_state
> {
> diff --git a/lib/rendercopy_gen6.c b/lib/rendercopy_gen6.c
> index b90466d007f9..83c7d6941bdd 100644
> --- a/lib/rendercopy_gen6.c
> +++ b/lib/rendercopy_gen6.c
> @@ -117,6 +117,8 @@ gen6_bind_buf(struct intel_batchbuffer *batch, const struct igt_buf *buf,
> ss->ss3.tiled_surface = buf->tiling != I915_TILING_NONE;
> ss->ss3.tile_walk = buf->tiling == I915_TILING_Y;
>
> + ss->ss5.memory_object_control = GEN6_MOCS_PTE;
> +
> return intel_batchbuffer_subdata_offset(batch, ss);
> }
>
> diff --git a/lib/rendercopy_gen7.c b/lib/rendercopy_gen7.c
> index 949468427b2f..a3c8b7f36989 100644
> --- a/lib/rendercopy_gen7.c
> +++ b/lib/rendercopy_gen7.c
> @@ -94,7 +94,10 @@ gen7_bind_buf(struct intel_batchbuffer *batch,
> (igt_buf_height(buf) - 1) << GEN7_SURFACE_HEIGHT_SHIFT);
> ss[3] = (buf->stride - 1) << GEN7_SURFACE_PITCH_SHIFT;
> ss[4] = 0;
> - ss[5] = 0;
> + if (IS_VALLEYVIEW(batch->devid))
> + ss[5] = VLV_MOCS_L3 << 16;
> + else
> + ss[5] = (IVB_MOCS_L3 | IVB_MOCS_PTE) << 16;
> ss[6] = 0;
> ss[7] = 0;
> if (IS_HASWELL(batch->devid))
> diff --git a/lib/rendercopy_gen8.c b/lib/rendercopy_gen8.c
> index f7a33947166e..e22d8501cb55 100644
> --- a/lib/rendercopy_gen8.c
> +++ b/lib/rendercopy_gen8.c
> @@ -16,6 +16,7 @@
> #include "drmtest.h"
> #include "intel_bufmgr.h"
> #include "intel_batchbuffer.h"
> +#include "intel_chipset.h"
> #include "intel_io.h"
> #include "rendercopy.h"
> #include "gen8_render.h"
> @@ -181,6 +182,12 @@ gen8_bind_buf(struct intel_batchbuffer *batch,
> else if (buf->tiling == I915_TILING_Y)
> ss->ss0.tiled_mode = 3;
>
> + if (IS_CHERRYVIEW(batch->devid))
> + ss->ss1.memory_object_control = CHV_MOCS_WB | CHV_MOCS_L3;
> + else
> + ss->ss1.memory_object_control = BDW_MOCS_PTE |
> + BDW_MOCS_TC_L3_PTE | BDW_MOCS_AGE(0);
> +
> ss->ss8.base_addr = buf->bo->offset64;
> ss->ss9.base_addr_hi = buf->bo->offset64 >> 32;
>
> diff --git a/lib/rendercopy_gen9.c b/lib/rendercopy_gen9.c
> index 5c6485d750a9..259a3ca24ba5 100644
> --- a/lib/rendercopy_gen9.c
> +++ b/lib/rendercopy_gen9.c
> @@ -212,6 +212,8 @@ gen8_bind_buf(struct intel_batchbuffer *batch, const struct igt_buf *buf,
> else if (buf->tiling != I915_TILING_NONE)
> ss->ss0.tiled_mode = 3;
>
> + ss->ss1.memory_object_control = I915_MOCS_PTE << 1;
> +
> if (buf->tiling == I915_TILING_Yf)
> ss->ss5.trmode = 1;
> else if (buf->tiling == I915_TILING_Ys)
I never understood chv and its not-snooping snooping, but it looks
consistent nevertheless,
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 4/5] lib/rendercopy: Configure MOCS more consistently
2019-04-26 19:18 ` Chris Wilson
@ 2019-04-26 19:27 ` Ville Syrjälä
0 siblings, 0 replies; 16+ messages in thread
From: Ville Syrjälä @ 2019-04-26 19:27 UTC (permalink / raw)
To: Chris Wilson; +Cc: igt-dev
On Fri, Apr 26, 2019 at 08:18:31PM +0100, Chris Wilson wrote:
> Quoting Ville Syrjala (2019-04-18 20:40:42)
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Unify the MOCS to be more consistently across the platforms.
> > Currently gen8+ are specifyig UC whereas earlier platforms
> > generally use PTE. Let's make everyone more or less specify
> > L3+PTE.
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> > lib/gen6_render.h | 9 ++++++++-
> > lib/gen7_render.h | 11 ++++++++++-
> > lib/gen8_render.h | 15 +++++++++++++++
> > lib/rendercopy_gen6.c | 2 ++
> > lib/rendercopy_gen7.c | 5 ++++-
> > lib/rendercopy_gen8.c | 7 +++++++
> > lib/rendercopy_gen9.c | 2 ++
> > 7 files changed, 48 insertions(+), 3 deletions(-)
> >
> > diff --git a/lib/gen6_render.h b/lib/gen6_render.h
> > index f45c8ae7b34a..a4c166417634 100644
> > --- a/lib/gen6_render.h
> > +++ b/lib/gen6_render.h
> > @@ -735,6 +735,12 @@
> > #define GEN6_SCRATCH_SPACE_SIZE_1M 10
> > #define GEN6_SCRATCH_SPACE_SIZE_2M 11
> >
> > +#define GEN6_MOCS_GFDT (1 << 2)
> > +#define GEN6_MOCS_PTE (0 << 0)
> > +#define GEN6_MOCS_UC (1 << 0)
> > +#define GEN6_MOCS_LLC (2 << 0)
> > +#define GEN6_MOCS_LLC_MLC (3 << 0)
> > +
> > /* The hardware supports two different modes for border color. The
> > * default (OpenGL) mode uses floating-point color channels, while the
> > * legacy mode uses 4 bytes.
> > @@ -933,7 +939,8 @@ struct gen6_surface_state {
> > } ss4;
> >
> > struct {
> > - uint32_t pad:20;
> > + uint32_t pad:16;
> > + uint32_t memory_object_control:4;
> > uint32_t y_offset:4;
> > uint32_t pad2:1;
> > uint32_t x_offset:7;
> > diff --git a/lib/gen7_render.h b/lib/gen7_render.h
> > index 4bde0d5f13ec..5dfc04d4bc2b 100644
> > --- a/lib/gen7_render.h
> > +++ b/lib/gen7_render.h
> > @@ -186,6 +186,14 @@
> >
> > #define GEN7_ARF_IP 0xA0
> >
> > +#define VLV_MOCS_SNOOP (2 << 1)
> > +#define VLV_MOCS_L3 (1 << 0)
> > +
> > +#define IVB_MOCS_GFDT (1 << 2)
> > +#define IVB_MOCS_PTE (0 << 1)
> > +#define IVB_MOCS_LLC (1 << 1)
> > +#define IVB_MOCS_L3 (1 << 0)
> > +
> > /* The hardware supports two different modes for border color. The
> > * default (OpenGL) mode uses floating-point color channels, while the
> > * legacy mode uses 4 bytes.
> > @@ -252,7 +260,8 @@ struct gen7_surface_state {
> > struct {
> > unsigned int mip_count:4;
> > unsigned int min_lod:4;
> > - unsigned int pad1:12;
> > + unsigned int pad1:8;
> > + unsigned int memory_object_control:4;
> > unsigned int y_offset:4;
> > unsigned int pad0:1;
> > unsigned int x_offset:7;
> > diff --git a/lib/gen8_render.h b/lib/gen8_render.h
> > index 7e33bea22d65..31dc01bcf57c 100644
> > --- a/lib/gen8_render.h
> > +++ b/lib/gen8_render.h
> > @@ -67,6 +67,21 @@
> > /* STATE_BASE_ADDRESS state size in pages*/
> > #define GEN8_STATE_SIZE_PAGES(x) ((x) << 12)
> >
> > +#define BDW_MOCS_PTE (0 << 5)
> > +#define BDW_MOCS_UC (1 << 5)
> > +#define BDW_MOCS_WT (2 << 5)
> > +#define BDW_MOCS_WB (3 << 5)
> > +#define BDW_MOCS_TC_ELLC (0 << 3)
> > +#define BDW_MOCS_TC_LLC (1 << 3)
> > +#define BDW_MOCS_TC_LLC_ELLC (2 << 3)
> > +#define BDW_MOCS_TC_L3_PTE (3 << 3)
> > +#define BDW_MOCS_AGE(x) ((x) << 0)
> > +
> > +#define CHV_MOCS_UC (0 << 5)
> > +#define CHV_MOCS_WB (3 << 5)
> > +#define CHV_MOCS_NO_CACHING (0 << 3)
> > +#define CHV_MOCS_L3 (3 << 3)
> > +
> > /* Shamelessly ripped from mesa */
> > struct gen8_surface_state
> > {
> > diff --git a/lib/rendercopy_gen6.c b/lib/rendercopy_gen6.c
> > index b90466d007f9..83c7d6941bdd 100644
> > --- a/lib/rendercopy_gen6.c
> > +++ b/lib/rendercopy_gen6.c
> > @@ -117,6 +117,8 @@ gen6_bind_buf(struct intel_batchbuffer *batch, const struct igt_buf *buf,
> > ss->ss3.tiled_surface = buf->tiling != I915_TILING_NONE;
> > ss->ss3.tile_walk = buf->tiling == I915_TILING_Y;
> >
> > + ss->ss5.memory_object_control = GEN6_MOCS_PTE;
> > +
> > return intel_batchbuffer_subdata_offset(batch, ss);
> > }
> >
> > diff --git a/lib/rendercopy_gen7.c b/lib/rendercopy_gen7.c
> > index 949468427b2f..a3c8b7f36989 100644
> > --- a/lib/rendercopy_gen7.c
> > +++ b/lib/rendercopy_gen7.c
> > @@ -94,7 +94,10 @@ gen7_bind_buf(struct intel_batchbuffer *batch,
> > (igt_buf_height(buf) - 1) << GEN7_SURFACE_HEIGHT_SHIFT);
> > ss[3] = (buf->stride - 1) << GEN7_SURFACE_PITCH_SHIFT;
> > ss[4] = 0;
> > - ss[5] = 0;
> > + if (IS_VALLEYVIEW(batch->devid))
> > + ss[5] = VLV_MOCS_L3 << 16;
> > + else
> > + ss[5] = (IVB_MOCS_L3 | IVB_MOCS_PTE) << 16;
> > ss[6] = 0;
> > ss[7] = 0;
> > if (IS_HASWELL(batch->devid))
> > diff --git a/lib/rendercopy_gen8.c b/lib/rendercopy_gen8.c
> > index f7a33947166e..e22d8501cb55 100644
> > --- a/lib/rendercopy_gen8.c
> > +++ b/lib/rendercopy_gen8.c
> > @@ -16,6 +16,7 @@
> > #include "drmtest.h"
> > #include "intel_bufmgr.h"
> > #include "intel_batchbuffer.h"
> > +#include "intel_chipset.h"
> > #include "intel_io.h"
> > #include "rendercopy.h"
> > #include "gen8_render.h"
> > @@ -181,6 +182,12 @@ gen8_bind_buf(struct intel_batchbuffer *batch,
> > else if (buf->tiling == I915_TILING_Y)
> > ss->ss0.tiled_mode = 3;
> >
> > + if (IS_CHERRYVIEW(batch->devid))
> > + ss->ss1.memory_object_control = CHV_MOCS_WB | CHV_MOCS_L3;
> > + else
> > + ss->ss1.memory_object_control = BDW_MOCS_PTE |
> > + BDW_MOCS_TC_L3_PTE | BDW_MOCS_AGE(0);
> > +
> > ss->ss8.base_addr = buf->bo->offset64;
> > ss->ss9.base_addr_hi = buf->bo->offset64 >> 32;
> >
> > diff --git a/lib/rendercopy_gen9.c b/lib/rendercopy_gen9.c
> > index 5c6485d750a9..259a3ca24ba5 100644
> > --- a/lib/rendercopy_gen9.c
> > +++ b/lib/rendercopy_gen9.c
> > @@ -212,6 +212,8 @@ gen8_bind_buf(struct intel_batchbuffer *batch, const struct igt_buf *buf,
> > else if (buf->tiling != I915_TILING_NONE)
> > ss->ss0.tiled_mode = 3;
> >
> > + ss->ss1.memory_object_control = I915_MOCS_PTE << 1;
> > +
> > if (buf->tiling == I915_TILING_Yf)
> > ss->ss5.trmode = 1;
> > else if (buf->tiling == I915_TILING_Ys)
>
> I never understood chv and its not-snooping snooping, but it looks
> consistent nevertheless,
IIRC my conclusion was that on chv the snoop bit always comes from the
PTE, and MOCS only controls L3.
--
Ville Syrjälä
Intel
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 16+ messages in thread
* [igt-dev] ✗ Fi.CI.IGT: failure for series starting with [i-g-t,1/5] lib/igt_fb: Fix the cairo shadow buffer stride (rev2)
2019-04-18 19:40 [igt-dev] [PATCH i-g-t 1/5] lib/igt_fb: Fix the cairo shadow buffer stride Ville Syrjala
` (7 preceding siblings ...)
2019-04-26 19:14 ` [igt-dev] [PATCH i-g-t 1/5] lib/igt_fb: Fix the cairo shadow buffer stride Chris Wilson
@ 2019-04-26 23:41 ` Patchwork
2019-04-29 10:24 ` Ville Syrjälä
8 siblings, 1 reply; 16+ messages in thread
From: Patchwork @ 2019-04-26 23:41 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: igt-dev
== Series Details ==
Series: series starting with [i-g-t,1/5] lib/igt_fb: Fix the cairo shadow buffer stride (rev2)
URL : https://patchwork.freedesktop.org/series/59732/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6006_full -> IGTPW_2930_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with IGTPW_2930_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in IGTPW_2930_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://patchwork.freedesktop.org/api/1.0/series/59732/revisions/2/mbox/
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in IGTPW_2930_full:
### IGT changes ###
#### Possible regressions ####
* {igt@kms_big_fb@x-tiled-32bpp-rotate-90} (NEW):
- shard-iclb: NOTRUN -> [SKIP][1] +30 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2930/shard-iclb6/igt@kms_big_fb@x-tiled-32bpp-rotate-90.html
* {igt@kms_big_fb@y-tiled-64bpp-rotate-0} (NEW):
- shard-iclb: NOTRUN -> [FAIL][2] +11 similar issues
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2930/shard-iclb8/igt@kms_big_fb@y-tiled-64bpp-rotate-0.html
New tests
---------
New tests have been introduced between CI_DRM_6006_full and IGTPW_2930_full:
### New IGT tests (74) ###
* igt@kms_big_fb@linear-16bpp-rotate-0:
- Statuses : 6 pass(s)
- Exec time: [1.23, 2.06] s
* igt@kms_big_fb@linear-16bpp-rotate-180:
- Statuses : 5 pass(s)
- Exec time: [1.46, 3.51] s
* igt@kms_big_fb@linear-16bpp-rotate-270:
- Statuses : 6 skip(s)
- Exec time: [0.14, 0.56] s
* igt@kms_big_fb@linear-16bpp-rotate-90:
- Statuses : 6 skip(s)
- Exec time: [0.14, 0.56] s
* igt@kms_big_fb@linear-32bpp-rotate-0:
- Statuses : 6 pass(s)
- Exec time: [1.29, 2.03] s
* igt@kms_big_fb@linear-32bpp-rotate-180:
- Statuses : 6 pass(s)
- Exec time: [1.30, 2.03] s
* igt@kms_big_fb@linear-32bpp-rotate-270:
- Statuses : 6 skip(s)
- Exec time: [0.22, 0.71] s
* igt@kms_big_fb@linear-32bpp-rotate-90:
- Statuses : 6 skip(s)
- Exec time: [0.30, 1.20] s
* igt@kms_big_fb@linear-64bpp-rotate-0:
- Statuses : 1 fail(s) 4 skip(s)
- Exec time: [0.0, 0.00] s
* igt@kms_big_fb@linear-64bpp-rotate-180:
- Statuses : 1 fail(s) 5 skip(s)
- Exec time: [0.0, 0.09] s
* igt@kms_big_fb@linear-64bpp-rotate-270:
- Statuses : 1 fail(s) 4 skip(s)
- Exec time: [0.0, 0.14] s
* igt@kms_big_fb@linear-64bpp-rotate-90:
- Statuses : 1 fail(s) 4 skip(s)
- Exec time: [0.0, 0.09] s
* igt@kms_big_fb@linear-8bpp-rotate-0:
- Statuses : 6 skip(s)
- Exec time: [0.0] s
* igt@kms_big_fb@linear-8bpp-rotate-180:
- Statuses : 6 skip(s)
- Exec time: [0.0] s
* igt@kms_big_fb@linear-8bpp-rotate-270:
- Statuses : 5 skip(s)
- Exec time: [0.0] s
* igt@kms_big_fb@linear-8bpp-rotate-90:
- Statuses : 5 skip(s)
- Exec time: [0.0] s
* igt@kms_big_fb@linear-addfb:
- Statuses : 5 pass(s)
- Exec time: [0.0] s
* igt@kms_big_fb@x-tiled-16bpp-rotate-0:
- Statuses : 5 pass(s)
- Exec time: [1.38, 1.83] s
* igt@kms_big_fb@x-tiled-16bpp-rotate-180:
- Statuses : 6 pass(s)
- Exec time: [1.35, 1.80] s
* igt@kms_big_fb@x-tiled-16bpp-rotate-270:
- Statuses : 6 skip(s)
- Exec time: [0.13, 0.48] s
* igt@kms_big_fb@x-tiled-16bpp-rotate-90:
- Statuses : 6 skip(s)
- Exec time: [0.13, 0.63] s
* igt@kms_big_fb@x-tiled-32bpp-rotate-0:
- Statuses : 6 pass(s)
- Exec time: [1.29, 1.97] s
* igt@kms_big_fb@x-tiled-32bpp-rotate-180:
- Statuses : 6 pass(s)
- Exec time: [1.43, 1.99] s
* igt@kms_big_fb@x-tiled-32bpp-rotate-270:
- Statuses : 6 skip(s)
- Exec time: [0.20, 0.68] s
* igt@kms_big_fb@x-tiled-32bpp-rotate-90:
- Statuses : 6 skip(s)
- Exec time: [0.21, 0.66] s
* igt@kms_big_fb@x-tiled-64bpp-rotate-0:
- Statuses : 1 fail(s) 5 skip(s)
- Exec time: [0.0, 0.13] s
* igt@kms_big_fb@x-tiled-64bpp-rotate-180:
- Statuses : 1 fail(s) 5 skip(s)
- Exec time: [0.0, 0.01] s
* igt@kms_big_fb@x-tiled-64bpp-rotate-270:
- Statuses : 1 fail(s) 5 skip(s)
- Exec time: [0.0, 0.01] s
* igt@kms_big_fb@x-tiled-64bpp-rotate-90:
- Statuses : 1 fail(s) 5 skip(s)
- Exec time: [0.0, 0.01] s
* igt@kms_big_fb@x-tiled-8bpp-rotate-0:
- Statuses : 5 skip(s)
- Exec time: [0.0] s
* igt@kms_big_fb@x-tiled-8bpp-rotate-180:
- Statuses : 5 skip(s)
- Exec time: [0.0] s
* igt@kms_big_fb@x-tiled-8bpp-rotate-270:
- Statuses : 6 skip(s)
- Exec time: [0.0] s
* igt@kms_big_fb@x-tiled-8bpp-rotate-90:
- Statuses : 6 skip(s)
- Exec time: [0.0] s
* igt@kms_big_fb@x-tiled-addfb:
- Statuses : 6 pass(s)
- Exec time: [0.0] s
* igt@kms_big_fb@x-tiled-addfb-size-offset-overflow:
- Statuses : 3 pass(s) 3 skip(s)
- Exec time: [0.0] s
* igt@kms_big_fb@x-tiled-addfb-size-overflow:
- Statuses : 5 skip(s)
- Exec time: [0.0] s
* igt@kms_big_fb@y-tiled-16bpp-rotate-0:
- Statuses : 3 pass(s) 2 skip(s)
- Exec time: [0.0, 1.82] s
* igt@kms_big_fb@y-tiled-16bpp-rotate-180:
- Statuses : 4 pass(s) 2 skip(s)
- Exec time: [0.0, 1.84] s
* igt@kms_big_fb@y-tiled-16bpp-rotate-270:
- Statuses : 1 pass(s) 5 skip(s)
- Exec time: [0.0, 1.65] s
* igt@kms_big_fb@y-tiled-16bpp-rotate-90:
- Statuses : 1 pass(s) 5 skip(s)
- Exec time: [0.0, 1.50] s
* igt@kms_big_fb@y-tiled-32bpp-rotate-0:
- Statuses : 4 pass(s) 2 skip(s)
- Exec time: [0.0, 2.41] s
* igt@kms_big_fb@y-tiled-32bpp-rotate-180:
- Statuses : 3 pass(s) 2 skip(s)
- Exec time: [0.0, 2.00] s
* igt@kms_big_fb@y-tiled-32bpp-rotate-270:
- Statuses : 4 pass(s) 2 skip(s)
- Exec time: [0.0, 2.05] s
* igt@kms_big_fb@y-tiled-32bpp-rotate-90:
- Statuses : 4 pass(s) 2 skip(s)
- Exec time: [0.0, 2.04] s
* igt@kms_big_fb@y-tiled-64bpp-rotate-0:
- Statuses : 1 fail(s) 5 skip(s)
- Exec time: [0.0, 0.13] s
* igt@kms_big_fb@y-tiled-64bpp-rotate-180:
- Statuses : 1 fail(s) 5 skip(s)
- Exec time: [0.0, 0.01] s
* igt@kms_big_fb@y-tiled-64bpp-rotate-270:
- Statuses : 1 fail(s) 5 skip(s)
- Exec time: [0.0, 0.10] s
* igt@kms_big_fb@y-tiled-64bpp-rotate-90:
- Statuses : 1 fail(s) 4 skip(s)
- Exec time: [0.0, 0.09] s
* igt@kms_big_fb@y-tiled-8bpp-rotate-0:
- Statuses : 6 skip(s)
- Exec time: [0.0] s
* igt@kms_big_fb@y-tiled-8bpp-rotate-180:
- Statuses : 5 skip(s)
- Exec time: [0.0] s
* igt@kms_big_fb@y-tiled-8bpp-rotate-270:
- Statuses : 6 skip(s)
- Exec time: [0.0] s
* igt@kms_big_fb@y-tiled-8bpp-rotate-90:
- Statuses : 6 skip(s)
- Exec time: [0.0] s
* igt@kms_big_fb@y-tiled-addfb:
- Statuses : 4 pass(s) 2 skip(s)
- Exec time: [0.0] s
* igt@kms_big_fb@y-tiled-addfb-size-offset-overflow:
- Statuses : 3 pass(s) 3 skip(s)
- Exec time: [0.0] s
* igt@kms_big_fb@y-tiled-addfb-size-overflow:
- Statuses : 6 skip(s)
- Exec time: [0.0] s
* igt@kms_big_fb@yf-tiled-16bpp-rotate-0:
- Statuses : 4 pass(s) 2 skip(s)
- Exec time: [0.0, 1.79] s
* igt@kms_big_fb@yf-tiled-16bpp-rotate-180:
- Statuses : 4 pass(s) 2 skip(s)
- Exec time: [0.0, 1.90] s
* igt@kms_big_fb@yf-tiled-16bpp-rotate-270:
- Statuses : 1 pass(s) 4 skip(s)
- Exec time: [0.0, 1.66] s
* igt@kms_big_fb@yf-tiled-16bpp-rotate-90:
- Statuses : 1 pass(s) 4 skip(s)
- Exec time: [0.0, 1.64] s
* igt@kms_big_fb@yf-tiled-32bpp-rotate-0:
- Statuses : 4 pass(s) 2 skip(s)
- Exec time: [0.0, 2.00] s
* igt@kms_big_fb@yf-tiled-32bpp-rotate-180:
- Statuses : 4 pass(s) 2 skip(s)
- Exec time: [0.0, 1.99] s
* igt@kms_big_fb@yf-tiled-32bpp-rotate-270:
- Statuses : 4 pass(s) 2 skip(s)
- Exec time: [0.0, 2.04] s
* igt@kms_big_fb@yf-tiled-32bpp-rotate-90:
- Statuses : 4 pass(s) 2 skip(s)
- Exec time: [0.0, 2.06] s
* igt@kms_big_fb@yf-tiled-64bpp-rotate-0:
- Statuses : 6 skip(s)
- Exec time: [0.0] s
* igt@kms_big_fb@yf-tiled-64bpp-rotate-180:
- Statuses : 6 skip(s)
- Exec time: [0.0] s
* igt@kms_big_fb@yf-tiled-64bpp-rotate-270:
- Statuses : 6 skip(s)
- Exec time: [0.0] s
* igt@kms_big_fb@yf-tiled-64bpp-rotate-90:
- Statuses : 6 skip(s)
- Exec time: [0.0] s
* igt@kms_big_fb@yf-tiled-8bpp-rotate-0:
- Statuses : 6 skip(s)
- Exec time: [0.0] s
* igt@kms_big_fb@yf-tiled-8bpp-rotate-180:
- Statuses : 6 skip(s)
- Exec time: [0.0] s
* igt@kms_big_fb@yf-tiled-8bpp-rotate-270:
- Statuses : 5 skip(s)
- Exec time: [0.0] s
* igt@kms_big_fb@yf-tiled-8bpp-rotate-90:
- Statuses : 6 skip(s)
- Exec time: [0.0] s
* igt@kms_big_fb@yf-tiled-addfb:
- Statuses : 4 pass(s) 2 skip(s)
- Exec time: [0.0, 0.00] s
* igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow:
- Statuses : 2 pass(s) 3 skip(s)
- Exec time: [0.0, 0.00] s
* igt@kms_big_fb@yf-tiled-addfb-size-overflow:
- Statuses : 5 skip(s)
- Exec time: [0.0] s
Known issues
------------
Here are the changes found in IGTPW_2930_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_reuse@contexts:
- shard-hsw: [PASS][3] -> [INCOMPLETE][4] ([fdo#103540])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6006/shard-hsw5/igt@gem_exec_reuse@contexts.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2930/shard-hsw1/igt@gem_exec_reuse@contexts.html
* igt@gem_tiled_swapping@non-threaded:
- shard-hsw: [PASS][5] -> [FAIL][6] ([fdo#108686])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6006/shard-hsw6/igt@gem_tiled_swapping@non-threaded.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2930/shard-hsw8/igt@gem_tiled_swapping@non-threaded.html
* igt@i915_pm_rc6_residency@rc6-accuracy:
- shard-kbl: [PASS][7] -> [SKIP][8] ([fdo#109271])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6006/shard-kbl3/igt@i915_pm_rc6_residency@rc6-accuracy.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2930/shard-kbl2/igt@i915_pm_rc6_residency@rc6-accuracy.html
* igt@i915_suspend@debugfs-reader:
- shard-apl: [PASS][9] -> [DMESG-WARN][10] ([fdo#108566]) +6 similar issues
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6006/shard-apl1/igt@i915_suspend@debugfs-reader.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2930/shard-apl5/igt@i915_suspend@debugfs-reader.html
* igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions:
- shard-hsw: [PASS][11] -> [FAIL][12] ([fdo#103355])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6006/shard-hsw1/igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2930/shard-hsw6/igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions.html
* igt@kms_dp_dsc@basic-dsc-enable-edp:
- shard-iclb: [PASS][13] -> [SKIP][14] ([fdo#109349])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6006/shard-iclb2/igt@kms_dp_dsc@basic-dsc-enable-edp.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2930/shard-iclb6/igt@kms_dp_dsc@basic-dsc-enable-edp.html
* igt@kms_flip_tiling@flip-yf-tiled:
- shard-glk: [PASS][15] -> [INCOMPLETE][16] ([fdo#103359] / [k.org#198133])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6006/shard-glk1/igt@kms_flip_tiling@flip-yf-tiled.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2930/shard-glk4/igt@kms_flip_tiling@flip-yf-tiled.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render:
- shard-iclb: [PASS][17] -> [FAIL][18] ([fdo#103167]) +5 similar issues
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6006/shard-iclb4/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2930/shard-iclb2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render.html
* igt@kms_plane@pixel-format-pipe-b-planes:
- shard-glk: [PASS][19] -> [SKIP][20] ([fdo#109271])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6006/shard-glk9/igt@kms_plane@pixel-format-pipe-b-planes.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2930/shard-glk1/igt@kms_plane@pixel-format-pipe-b-planes.html
* igt@kms_plane_scaling@pipe-a-scaler-with-pixel-format:
- shard-glk: [PASS][21] -> [SKIP][22] ([fdo#109271] / [fdo#109278]) +1 similar issue
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6006/shard-glk9/igt@kms_plane_scaling@pipe-a-scaler-with-pixel-format.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2930/shard-glk5/igt@kms_plane_scaling@pipe-a-scaler-with-pixel-format.html
* igt@kms_psr@psr2_no_drrs:
- shard-iclb: [PASS][23] -> [SKIP][24] ([fdo#109441]) +1 similar issue
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6006/shard-iclb2/igt@kms_psr@psr2_no_drrs.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2930/shard-iclb8/igt@kms_psr@psr2_no_drrs.html
#### Possible fixes ####
* igt@gem_ringfill@basic-default-interruptible:
- shard-kbl: [INCOMPLETE][25] ([fdo#103665]) -> [PASS][26]
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6006/shard-kbl7/igt@gem_ringfill@basic-default-interruptible.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2930/shard-kbl2/igt@gem_ringfill@basic-default-interruptible.html
* igt@i915_pm_rc6_residency@rc6-accuracy:
- shard-snb: [SKIP][27] ([fdo#109271]) -> [PASS][28]
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6006/shard-snb1/igt@i915_pm_rc6_residency@rc6-accuracy.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2930/shard-snb2/igt@i915_pm_rc6_residency@rc6-accuracy.html
* igt@kms_cursor_crc@cursor-alpha-opaque:
- shard-kbl: [FAIL][29] ([fdo#109350]) -> [PASS][30]
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6006/shard-kbl4/igt@kms_cursor_crc@cursor-alpha-opaque.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2930/shard-kbl4/igt@kms_cursor_crc@cursor-alpha-opaque.html
- shard-apl: [FAIL][31] ([fdo#109350]) -> [PASS][32]
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6006/shard-apl8/igt@kms_cursor_crc@cursor-alpha-opaque.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2930/shard-apl2/igt@kms_cursor_crc@cursor-alpha-opaque.html
* igt@kms_cursor_legacy@cursor-vs-flip-toggle:
- shard-hsw: [FAIL][33] ([fdo#103355]) -> [PASS][34] +1 similar issue
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6006/shard-hsw6/igt@kms_cursor_legacy@cursor-vs-flip-toggle.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2930/shard-hsw6/igt@kms_cursor_legacy@cursor-vs-flip-toggle.html
* igt@kms_flip@flip-vs-expired-vblank:
- shard-glk: [FAIL][35] ([fdo#105363]) -> [PASS][36]
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6006/shard-glk9/igt@kms_flip@flip-vs-expired-vblank.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2930/shard-glk9/igt@kms_flip@flip-vs-expired-vblank.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-gtt:
- shard-iclb: [FAIL][37] ([fdo#103167]) -> [PASS][38] +7 similar issues
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6006/shard-iclb2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-gtt.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2930/shard-iclb5/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-gtt.html
* igt@kms_plane@pixel-format-pipe-c-planes:
- shard-glk: [SKIP][39] ([fdo#109271]) -> [PASS][40]
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6006/shard-glk2/igt@kms_plane@pixel-format-pipe-c-planes.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2930/shard-glk9/igt@kms_plane@pixel-format-pipe-c-planes.html
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes:
- shard-apl: [DMESG-WARN][41] ([fdo#108566]) -> [PASS][42] +4 similar issues
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6006/shard-apl7/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2930/shard-apl8/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html
* igt@kms_plane_lowres@pipe-a-tiling-x:
- shard-iclb: [FAIL][43] ([fdo#103166]) -> [PASS][44]
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6006/shard-iclb5/igt@kms_plane_lowres@pipe-a-tiling-x.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2930/shard-iclb1/igt@kms_plane_lowres@pipe-a-tiling-x.html
* igt@kms_plane_scaling@pipe-b-scaler-with-pixel-format:
- shard-glk: [SKIP][45] ([fdo#109271] / [fdo#109278]) -> [PASS][46]
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6006/shard-glk1/igt@kms_plane_scaling@pipe-b-scaler-with-pixel-format.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2930/shard-glk9/igt@kms_plane_scaling@pipe-b-scaler-with-pixel-format.html
* igt@kms_psr2_su@frontbuffer:
- shard-iclb: [SKIP][47] ([fdo#109642]) -> [PASS][48]
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6006/shard-iclb7/igt@kms_psr2_su@frontbuffer.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2930/shard-iclb2/igt@kms_psr2_su@frontbuffer.html
* igt@kms_psr@psr2_cursor_plane_onoff:
- shard-iclb: [SKIP][49] ([fdo#109441]) -> [PASS][50] +2 similar issues
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6006/shard-iclb4/igt@kms_psr@psr2_cursor_plane_onoff.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2930/shard-iclb2/igt@kms_psr@psr2_cursor_plane_onoff.html
* igt@kms_rotation_crc@multiplane-rotation-cropping-top:
- shard-kbl: [FAIL][51] ([fdo#109016]) -> [PASS][52]
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6006/shard-kbl4/igt@kms_rotation_crc@multiplane-rotation-cropping-top.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2930/shard-kbl1/igt@kms_rotation_crc@multiplane-rotation-cropping-top.html
* igt@kms_setmode@basic:
- shard-apl: [FAIL][53] ([fdo#99912]) -> [PASS][54]
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6006/shard-apl8/igt@kms_setmode@basic.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2930/shard-apl7/igt@kms_setmode@basic.html
- shard-kbl: [FAIL][55] ([fdo#99912]) -> [PASS][56]
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6006/shard-kbl7/igt@kms_setmode@basic.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2930/shard-kbl3/igt@kms_setmode@basic.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103355]: https://bugs.freedesktop.org/show_bug.cgi?id=103355
[fdo#103359]: https://bugs.freedesktop.org/show_bug.cgi?id=103359
[fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
[fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
[fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
[fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
[fdo#108686]: https://bugs.freedesktop.org/show_bug.cgi?id=108686
[fdo#109016]: https://bugs.freedesktop.org/show_bug.cgi?id=109016
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109349]: https://bugs.freedesktop.org/show_bug.cgi?id=109349
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2930/
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [igt-dev] ✗ Fi.CI.IGT: failure for series starting with [i-g-t,1/5] lib/igt_fb: Fix the cairo shadow buffer stride (rev2)
2019-04-26 23:41 ` [igt-dev] ✗ Fi.CI.IGT: failure for series starting with [i-g-t,1/5] lib/igt_fb: Fix the cairo shadow buffer stride (rev2) Patchwork
@ 2019-04-29 10:24 ` Ville Syrjälä
0 siblings, 0 replies; 16+ messages in thread
From: Ville Syrjälä @ 2019-04-29 10:24 UTC (permalink / raw)
To: igt-dev
On Fri, Apr 26, 2019 at 11:41:25PM -0000, Patchwork wrote:
> == Series Details ==
>
> Series: series starting with [i-g-t,1/5] lib/igt_fb: Fix the cairo shadow buffer stride (rev2)
> URL : https://patchwork.freedesktop.org/series/59732/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_6006_full -> IGTPW_2930_full
> ====================================================
>
> Summary
> -------
>
> **FAILURE**
>
> Serious unknown changes coming with IGTPW_2930_full absolutely need to be
> verified manually.
>
> If you think the reported changes have nothing to do with the changes
> introduced in IGTPW_2930_full, please notify your bug team to allow them
> to document this new failure mode, which will reduce false positives in CI.
>
> External URL: https://patchwork.freedesktop.org/api/1.0/series/59732/revisions/2/mbox/
>
> Possible new issues
> -------------------
>
> Here are the unknown changes that may have been introduced in IGTPW_2930_full:
>
> ### IGT changes ###
>
> #### Possible regressions ####
>
> * {igt@kms_big_fb@x-tiled-32bpp-rotate-90} (NEW):
> - shard-iclb: NOTRUN -> [SKIP][1] +30 similar issues
> [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2930/shard-iclb6/igt@kms_big_fb@x-tiled-32bpp-rotate-90.html
>
> * {igt@kms_big_fb@y-tiled-64bpp-rotate-0} (NEW):
> - shard-iclb: NOTRUN -> [FAIL][2] +11 similar issues
> [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2930/shard-iclb8/igt@kms_big_fb@y-tiled-64bpp-rotate-0.html
<7> [127.401427] [drm:intel_framebuffer_init [i915]] tiled pitch (65536) must be at most 32768
Expected failure mode until remapping is introduced.
--
Ville Syrjälä
Intel
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 16+ messages in thread
end of thread, other threads:[~2019-04-29 10:24 UTC | newest]
Thread overview: 16+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-04-18 19:40 [igt-dev] [PATCH i-g-t 1/5] lib/igt_fb: Fix the cairo shadow buffer stride Ville Syrjala
2019-04-18 19:40 ` [igt-dev] [PATCH i-g-t 2/5] lib/igt_fb: Fix 32bit integer overflow in the shadow buffer size calculation Ville Syrjala
2019-04-26 19:14 ` Chris Wilson
2019-04-18 19:40 ` [igt-dev] [PATCH i-g-t 3/5] lib/rendercopy: Add fp16 support for gen4+ Ville Syrjala
2019-04-26 19:16 ` Chris Wilson
2019-04-18 19:40 ` [igt-dev] [PATCH i-g-t 4/5] lib/rendercopy: Configure MOCS more consistently Ville Syrjala
2019-04-26 19:18 ` Chris Wilson
2019-04-26 19:27 ` Ville Syrjälä
2019-04-18 19:40 ` [igt-dev] [PATCH i-g-t 5/5] tests/kms_big_fb: Make sure huge fbs work correctly Ville Syrjala
2019-04-26 16:50 ` [igt-dev] [PATCH i-g-t v2 " Ville Syrjala
2019-04-18 20:34 ` [igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,1/5] lib/igt_fb: Fix the cairo shadow buffer stride Patchwork
2019-04-18 22:46 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork
2019-04-26 17:59 ` [igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,1/5] lib/igt_fb: Fix the cairo shadow buffer stride (rev2) Patchwork
2019-04-26 19:14 ` [igt-dev] [PATCH i-g-t 1/5] lib/igt_fb: Fix the cairo shadow buffer stride Chris Wilson
2019-04-26 23:41 ` [igt-dev] ✗ Fi.CI.IGT: failure for series starting with [i-g-t,1/5] lib/igt_fb: Fix the cairo shadow buffer stride (rev2) Patchwork
2019-04-29 10:24 ` Ville Syrjälä
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