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From: Lokesh Vutla <lokeshvutla@ti.com>
To: Marc Zyngier <marc.zyngier@arm.com>,
	Santosh Shilimkar <ssantosh@kernel.org>,
	Rob Herring <robh+dt@kernel.org>, Nishanth Menon <nm@ti.com>,
	<tglx@linutronix.de>, <jason@lakedaemon.net>
Cc: Linux ARM Mailing List <linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, Tero Kristo <t-kristo@ti.com>,
	Sekhar Nori <nsekhar@ti.com>, Tony Lindgren <tony@atomide.com>,
	<linus.walleij@linaro.org>,
	Peter Ujfalusi <peter.ujfalusi@ti.com>,
	Grygorii Strashko <grygorii.strashko@ti.com>,
	Lokesh Vutla <lokeshvutla@ti.com>,
	Device Tree Mailing List <devicetree@vger.kernel.org>
Subject: [PATCH v7 08/14] dt-bindings: irqchip: Introduce TISCI Interrupt router bindings
Date: Sat, 20 Apr 2019 15:39:44 +0530	[thread overview]
Message-ID: <20190420100950.7997-9-lokeshvutla@ti.com> (raw)
In-Reply-To: <20190420100950.7997-1-lokeshvutla@ti.com>

Add the DT binding documentation for Interrupt router driver.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
Changes since v6:
- None.

New firmware is bound to release this month end. When released, Ill repost
with interrupt cells as 2. 

 .../interrupt-controller/ti,sci-intr.txt      | 84 +++++++++++++++++++
 MAINTAINERS                                   |  1 +
 2 files changed, 85 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.txt

diff --git a/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.txt b/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.txt
new file mode 100644
index 000000000000..952a74609367
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.txt
@@ -0,0 +1,84 @@
+Texas Instruments K3 Interrupt Router
+=====================================
+
+The Interrupt Router (INTR) module provides a mechanism to mux M
+interrupt inputs to N interrupt outputs, where all M inputs are selectable
+to be driven per N output. An Interrupt Router can either handle edge triggered
+or level triggered interrupts and that is fixed in hardware.
+
+                                 Interrupt Router
+                             +----------------------+
+                             |  Inputs     Outputs  |
+        +-------+            | +------+    +-----+  |
+        | GPIO  |----------->| | irq0 |    |  0  |  |       Host IRQ
+        +-------+            | +------+    +-----+  |      controller
+                             |    .           .     |      +-------+
+        +-------+            |    .           .     |----->|  IRQ  |
+        | INTA  |----------->|    .           .     |      +-------+
+        +-------+            |    .        +-----+  |
+                             | +------+    |  N  |  |
+                             | | irqM |    +-----+  |
+                             | +------+             |
+                             |                      |
+                             +----------------------+
+
+There is one register per output (MUXCNTL_N) that controls the selection.
+Configuration of these MUXCNTL_N registers is done by a system controller
+(like the Device Memory and Security Controller on K3 AM654 SoC). System
+controller will keep track of the used and unused registers within the Router.
+Driver should request the system controller to get the range of GIC IRQs
+assigned to the requesting hosts. It is the drivers responsibility to keep
+track of Host IRQs.
+
+Communication between the host processor running an OS and the system
+controller happens through a protocol called TI System Control Interface
+(TISCI protocol). For more details refer:
+Documentation/devicetree/bindings/arm/keystone/ti,sci.txt
+
+TISCI Interrupt Router Node:
+----------------------------
+Required Properties:
+- compatible:		Must be "ti,sci-intr".
+- ti,intr-trigger-type:	Should be one of the following:
+			1: If intr supports edge triggered interrupts.
+			4: If intr supports level triggered interrupts.
+- interrupt-controller:	Identifies the node as an interrupt controller
+- #interrupt-cells:	Specifies the number of cells needed to encode an
+			interrupt source. The value should be 3.
+			First cell should contain the TISCI device ID of source
+			Second cell should contain the interrupt source offset
+			within the device.
+			Third cell should be 1 if the irq is coming from the
+			interrupt aggregator else 0.
+- ti,sci:		Phandle to TI-SCI compatible System controller node.
+- ti,sci-dst-id:	TISCI device ID of the destination IRQ controller.
+- ti,sci-rm-range-girq:	Array of TISCI subtype ids representing the host irqs
+			assigned to this interrupt router. Each subtype id
+			corresponds to a range of host irqs.
+
+For more details on TISCI IRQ resource management refer:
+http://downloads.ti.com/tisci/esd/latest/2_tisci_msgs/rm/rm_irq.html
+
+Example:
+--------
+The following example demonstrates both interrupt router node and the consumer
+node(main gpio) on the AM654 SoC:
+
+main_intr: interrupt-controller0 {
+	compatible = "ti,sci-intr";
+	ti,intr-trigger-type = <1>;
+	interrupt-controller;
+	interrupt-parent = <&gic500>;
+	#interrupt-cells = <3>;
+	ti,sci = <&dmsc>;
+	ti,sci-dst-id = <56>;
+	ti,sci-rm-range-girq = <0x1>;
+};
+
+main_gpio0: gpio@600000 {
+	...
+	interrupt-parent = <&main_intr>;
+	interrupts = <57 256 0>, <57 257 0>, <57 258 0>,
+		     <57 259 0>, <57 260 0>, <57 261 0>;
+	...
+};
diff --git a/MAINTAINERS b/MAINTAINERS
index 3671fdea5010..b40762656a6d 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -15349,6 +15349,7 @@ F:	Documentation/devicetree/bindings/reset/ti,sci-reset.txt
 F:	Documentation/devicetree/bindings/clock/ti,sci-clk.txt
 F:	drivers/clk/keystone/sci-clk.c
 F:	drivers/reset/reset-ti-sci.c
+F:	Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.txt
 
 Texas Instruments ASoC drivers
 M:	Peter Ujfalusi <peter.ujfalusi@ti.com>
-- 
2.21.0


WARNING: multiple messages have this Message-ID (diff)
From: Lokesh Vutla <lokeshvutla@ti.com>
To: Marc Zyngier <marc.zyngier@arm.com>,
	Santosh Shilimkar <ssantosh@kernel.org>,
	Rob Herring <robh+dt@kernel.org>, Nishanth Menon <nm@ti.com>,
	tglx@linutronix.de, jason@lakedaemon.net
Cc: Linux ARM Mailing List <linux-arm-kernel@lists.infradead.org>,
	linux-kernel@vger.kernel.org, Tero Kristo <t-kristo@ti.com>,
	Sekhar Nori <nsekhar@ti.com>, Tony Lindgren <tony@atomide.com>,
	linus.walleij@linaro.org, Peter Ujfalusi <peter.ujfalusi@ti.com>,
	Grygorii Strashko <grygorii.strashko@ti.com>,
	Lokesh Vutla <lokeshvutla@ti.com>,
	Device Tree Mailing List <devicetree@vger.kernel.org>
Subject: [PATCH v7 08/14] dt-bindings: irqchip: Introduce TISCI Interrupt router bindings
Date: Sat, 20 Apr 2019 15:39:44 +0530	[thread overview]
Message-ID: <20190420100950.7997-9-lokeshvutla@ti.com> (raw)
In-Reply-To: <20190420100950.7997-1-lokeshvutla@ti.com>

Add the DT binding documentation for Interrupt router driver.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
Changes since v6:
- None.

New firmware is bound to release this month end. When released, Ill repost
with interrupt cells as 2. 

 .../interrupt-controller/ti,sci-intr.txt      | 84 +++++++++++++++++++
 MAINTAINERS                                   |  1 +
 2 files changed, 85 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.txt

diff --git a/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.txt b/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.txt
new file mode 100644
index 000000000000..952a74609367
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.txt
@@ -0,0 +1,84 @@
+Texas Instruments K3 Interrupt Router
+=====================================
+
+The Interrupt Router (INTR) module provides a mechanism to mux M
+interrupt inputs to N interrupt outputs, where all M inputs are selectable
+to be driven per N output. An Interrupt Router can either handle edge triggered
+or level triggered interrupts and that is fixed in hardware.
+
+                                 Interrupt Router
+                             +----------------------+
+                             |  Inputs     Outputs  |
+        +-------+            | +------+    +-----+  |
+        | GPIO  |----------->| | irq0 |    |  0  |  |       Host IRQ
+        +-------+            | +------+    +-----+  |      controller
+                             |    .           .     |      +-------+
+        +-------+            |    .           .     |----->|  IRQ  |
+        | INTA  |----------->|    .           .     |      +-------+
+        +-------+            |    .        +-----+  |
+                             | +------+    |  N  |  |
+                             | | irqM |    +-----+  |
+                             | +------+             |
+                             |                      |
+                             +----------------------+
+
+There is one register per output (MUXCNTL_N) that controls the selection.
+Configuration of these MUXCNTL_N registers is done by a system controller
+(like the Device Memory and Security Controller on K3 AM654 SoC). System
+controller will keep track of the used and unused registers within the Router.
+Driver should request the system controller to get the range of GIC IRQs
+assigned to the requesting hosts. It is the drivers responsibility to keep
+track of Host IRQs.
+
+Communication between the host processor running an OS and the system
+controller happens through a protocol called TI System Control Interface
+(TISCI protocol). For more details refer:
+Documentation/devicetree/bindings/arm/keystone/ti,sci.txt
+
+TISCI Interrupt Router Node:
+----------------------------
+Required Properties:
+- compatible:		Must be "ti,sci-intr".
+- ti,intr-trigger-type:	Should be one of the following:
+			1: If intr supports edge triggered interrupts.
+			4: If intr supports level triggered interrupts.
+- interrupt-controller:	Identifies the node as an interrupt controller
+- #interrupt-cells:	Specifies the number of cells needed to encode an
+			interrupt source. The value should be 3.
+			First cell should contain the TISCI device ID of source
+			Second cell should contain the interrupt source offset
+			within the device.
+			Third cell should be 1 if the irq is coming from the
+			interrupt aggregator else 0.
+- ti,sci:		Phandle to TI-SCI compatible System controller node.
+- ti,sci-dst-id:	TISCI device ID of the destination IRQ controller.
+- ti,sci-rm-range-girq:	Array of TISCI subtype ids representing the host irqs
+			assigned to this interrupt router. Each subtype id
+			corresponds to a range of host irqs.
+
+For more details on TISCI IRQ resource management refer:
+http://downloads.ti.com/tisci/esd/latest/2_tisci_msgs/rm/rm_irq.html
+
+Example:
+--------
+The following example demonstrates both interrupt router node and the consumer
+node(main gpio) on the AM654 SoC:
+
+main_intr: interrupt-controller0 {
+	compatible = "ti,sci-intr";
+	ti,intr-trigger-type = <1>;
+	interrupt-controller;
+	interrupt-parent = <&gic500>;
+	#interrupt-cells = <3>;
+	ti,sci = <&dmsc>;
+	ti,sci-dst-id = <56>;
+	ti,sci-rm-range-girq = <0x1>;
+};
+
+main_gpio0: gpio@600000 {
+	...
+	interrupt-parent = <&main_intr>;
+	interrupts = <57 256 0>, <57 257 0>, <57 258 0>,
+		     <57 259 0>, <57 260 0>, <57 261 0>;
+	...
+};
diff --git a/MAINTAINERS b/MAINTAINERS
index 3671fdea5010..b40762656a6d 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -15349,6 +15349,7 @@ F:	Documentation/devicetree/bindings/reset/ti,sci-reset.txt
 F:	Documentation/devicetree/bindings/clock/ti,sci-clk.txt
 F:	drivers/clk/keystone/sci-clk.c
 F:	drivers/reset/reset-ti-sci.c
+F:	Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.txt
 
 Texas Instruments ASoC drivers
 M:	Peter Ujfalusi <peter.ujfalusi@ti.com>
-- 
2.21.0

WARNING: multiple messages have this Message-ID (diff)
From: Lokesh Vutla <lokeshvutla@ti.com>
To: Marc Zyngier <marc.zyngier@arm.com>,
	Santosh Shilimkar <ssantosh@kernel.org>,
	Rob Herring <robh+dt@kernel.org>, Nishanth Menon <nm@ti.com>,
	<tglx@linutronix.de>, <jason@lakedaemon.net>
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>,
	Grygorii Strashko <grygorii.strashko@ti.com>,
	Device Tree Mailing List <devicetree@vger.kernel.org>,
	Tony Lindgren <tony@atomide.com>,
	linus.walleij@linaro.org, Sekhar Nori <nsekhar@ti.com>,
	linux-kernel@vger.kernel.org, Tero Kristo <t-kristo@ti.com>,
	Lokesh Vutla <lokeshvutla@ti.com>,
	Linux ARM Mailing List <linux-arm-kernel@lists.infradead.org>
Subject: [PATCH v7 08/14] dt-bindings: irqchip: Introduce TISCI Interrupt router bindings
Date: Sat, 20 Apr 2019 15:39:44 +0530	[thread overview]
Message-ID: <20190420100950.7997-9-lokeshvutla@ti.com> (raw)
In-Reply-To: <20190420100950.7997-1-lokeshvutla@ti.com>

Add the DT binding documentation for Interrupt router driver.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
Changes since v6:
- None.

New firmware is bound to release this month end. When released, Ill repost
with interrupt cells as 2. 

 .../interrupt-controller/ti,sci-intr.txt      | 84 +++++++++++++++++++
 MAINTAINERS                                   |  1 +
 2 files changed, 85 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.txt

diff --git a/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.txt b/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.txt
new file mode 100644
index 000000000000..952a74609367
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.txt
@@ -0,0 +1,84 @@
+Texas Instruments K3 Interrupt Router
+=====================================
+
+The Interrupt Router (INTR) module provides a mechanism to mux M
+interrupt inputs to N interrupt outputs, where all M inputs are selectable
+to be driven per N output. An Interrupt Router can either handle edge triggered
+or level triggered interrupts and that is fixed in hardware.
+
+                                 Interrupt Router
+                             +----------------------+
+                             |  Inputs     Outputs  |
+        +-------+            | +------+    +-----+  |
+        | GPIO  |----------->| | irq0 |    |  0  |  |       Host IRQ
+        +-------+            | +------+    +-----+  |      controller
+                             |    .           .     |      +-------+
+        +-------+            |    .           .     |----->|  IRQ  |
+        | INTA  |----------->|    .           .     |      +-------+
+        +-------+            |    .        +-----+  |
+                             | +------+    |  N  |  |
+                             | | irqM |    +-----+  |
+                             | +------+             |
+                             |                      |
+                             +----------------------+
+
+There is one register per output (MUXCNTL_N) that controls the selection.
+Configuration of these MUXCNTL_N registers is done by a system controller
+(like the Device Memory and Security Controller on K3 AM654 SoC). System
+controller will keep track of the used and unused registers within the Router.
+Driver should request the system controller to get the range of GIC IRQs
+assigned to the requesting hosts. It is the drivers responsibility to keep
+track of Host IRQs.
+
+Communication between the host processor running an OS and the system
+controller happens through a protocol called TI System Control Interface
+(TISCI protocol). For more details refer:
+Documentation/devicetree/bindings/arm/keystone/ti,sci.txt
+
+TISCI Interrupt Router Node:
+----------------------------
+Required Properties:
+- compatible:		Must be "ti,sci-intr".
+- ti,intr-trigger-type:	Should be one of the following:
+			1: If intr supports edge triggered interrupts.
+			4: If intr supports level triggered interrupts.
+- interrupt-controller:	Identifies the node as an interrupt controller
+- #interrupt-cells:	Specifies the number of cells needed to encode an
+			interrupt source. The value should be 3.
+			First cell should contain the TISCI device ID of source
+			Second cell should contain the interrupt source offset
+			within the device.
+			Third cell should be 1 if the irq is coming from the
+			interrupt aggregator else 0.
+- ti,sci:		Phandle to TI-SCI compatible System controller node.
+- ti,sci-dst-id:	TISCI device ID of the destination IRQ controller.
+- ti,sci-rm-range-girq:	Array of TISCI subtype ids representing the host irqs
+			assigned to this interrupt router. Each subtype id
+			corresponds to a range of host irqs.
+
+For more details on TISCI IRQ resource management refer:
+http://downloads.ti.com/tisci/esd/latest/2_tisci_msgs/rm/rm_irq.html
+
+Example:
+--------
+The following example demonstrates both interrupt router node and the consumer
+node(main gpio) on the AM654 SoC:
+
+main_intr: interrupt-controller0 {
+	compatible = "ti,sci-intr";
+	ti,intr-trigger-type = <1>;
+	interrupt-controller;
+	interrupt-parent = <&gic500>;
+	#interrupt-cells = <3>;
+	ti,sci = <&dmsc>;
+	ti,sci-dst-id = <56>;
+	ti,sci-rm-range-girq = <0x1>;
+};
+
+main_gpio0: gpio@600000 {
+	...
+	interrupt-parent = <&main_intr>;
+	interrupts = <57 256 0>, <57 257 0>, <57 258 0>,
+		     <57 259 0>, <57 260 0>, <57 261 0>;
+	...
+};
diff --git a/MAINTAINERS b/MAINTAINERS
index 3671fdea5010..b40762656a6d 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -15349,6 +15349,7 @@ F:	Documentation/devicetree/bindings/reset/ti,sci-reset.txt
 F:	Documentation/devicetree/bindings/clock/ti,sci-clk.txt
 F:	drivers/clk/keystone/sci-clk.c
 F:	drivers/reset/reset-ti-sci.c
+F:	Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.txt
 
 Texas Instruments ASoC drivers
 M:	Peter Ujfalusi <peter.ujfalusi@ti.com>
-- 
2.21.0


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2019-04-20 10:11 UTC|newest]

Thread overview: 62+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-04-20 10:09 [PATCH v7 00/14] Add support for TISCI Interrupt controller drivers Lokesh Vutla
2019-04-20 10:09 ` Lokesh Vutla
2019-04-20 10:09 ` Lokesh Vutla
2019-04-20 10:09 ` [PATCH v7 01/14] firmware: ti_sci: Add support to get TISCI handle using of_phandle Lokesh Vutla
2019-04-20 10:09   ` Lokesh Vutla
2019-04-20 10:09   ` Lokesh Vutla
2019-04-20 10:09 ` [PATCH v7 02/14] firmware: ti_sci: Add support for RM core ops Lokesh Vutla
2019-04-20 10:09   ` Lokesh Vutla
2019-04-20 10:09   ` Lokesh Vutla
2019-04-20 10:09 ` [PATCH v7 03/14] firmware: ti_sci: Add support for IRQ management Lokesh Vutla
2019-04-20 10:09   ` Lokesh Vutla
2019-04-20 10:09   ` Lokesh Vutla
2019-04-20 10:09 ` [PATCH v7 04/14] firmware: ti_sci: Add RM mapping table for am654 Lokesh Vutla
2019-04-20 10:09   ` Lokesh Vutla
2019-04-20 10:09   ` Lokesh Vutla
2019-04-20 10:09 ` [PATCH v7 05/14] firmware: ti_sci: Add helper apis to manage resources Lokesh Vutla
2019-04-20 10:09   ` Lokesh Vutla
2019-04-20 10:09   ` Lokesh Vutla
2019-04-20 10:09 ` [PATCH v7 06/14] genirq: Introduce irq_chip_{request,release}_resource_parent() apis Lokesh Vutla
2019-04-20 10:09   ` [PATCH v7 06/14] genirq: Introduce irq_chip_{request, release}_resource_parent() apis Lokesh Vutla
2019-04-20 10:09   ` [PATCH v7 06/14] genirq: Introduce irq_chip_{request,release}_resource_parent() apis Lokesh Vutla
2019-04-20 10:09 ` [PATCH v7 07/14] gpio: thunderx: Use the default parent apis for {request,release}_resources Lokesh Vutla
2019-04-20 10:09   ` [PATCH v7 07/14] gpio: thunderx: Use the default parent apis for {request, release}_resources Lokesh Vutla
2019-04-20 10:09   ` [PATCH v7 07/14] gpio: thunderx: Use the default parent apis for {request,release}_resources Lokesh Vutla
2019-04-23 11:18   ` Linus Walleij
2019-04-23 11:18     ` [PATCH v7 07/14] gpio: thunderx: Use the default parent apis for {request, release}_resources Linus Walleij
2019-04-20 10:09 ` Lokesh Vutla [this message]
2019-04-20 10:09   ` [PATCH v7 08/14] dt-bindings: irqchip: Introduce TISCI Interrupt router bindings Lokesh Vutla
2019-04-20 10:09   ` Lokesh Vutla
2019-04-20 10:09 ` [PATCH v7 09/14] irqchip: ti-sci-intr: Add support for Interrupt Router driver Lokesh Vutla
2019-04-20 10:09   ` Lokesh Vutla
2019-04-20 10:09   ` Lokesh Vutla
2019-04-20 10:09 ` [PATCH v7 10/14] dt-bindings: irqchip: Introduce TISCI Interrupt Aggregator bindings Lokesh Vutla
2019-04-20 10:09   ` Lokesh Vutla
2019-04-20 10:09   ` Lokesh Vutla
2019-04-20 10:09 ` [PATCH v7 11/14] irqchip: ti-sci-inta: Add support for Interrupt Aggregator driver Lokesh Vutla
2019-04-20 10:09   ` Lokesh Vutla
2019-04-20 10:09   ` Lokesh Vutla
2019-04-23 10:00   ` Lokesh Vutla
2019-04-23 10:00     ` Lokesh Vutla
2019-04-23 10:00     ` Lokesh Vutla
2019-04-29  8:47     ` Marc Zyngier
2019-04-29  8:47       ` Marc Zyngier
2019-04-29  8:59       ` Lokesh Vutla
2019-04-29  8:59         ` Lokesh Vutla
2019-04-29  8:59         ` Lokesh Vutla
2019-04-29 10:13         ` Marc Zyngier
2019-04-29 10:13           ` Marc Zyngier
2019-04-29 13:11   ` Marc Zyngier
2019-04-29 13:11     ` Marc Zyngier
2019-04-30  6:01     ` Lokesh Vutla
2019-04-30  6:01       ` Lokesh Vutla
2019-04-30  6:01       ` Lokesh Vutla
2019-04-20 10:09 ` [PATCH v7 12/14] soc: ti: Add MSI domain bus support for Interrupt Aggregator Lokesh Vutla
2019-04-20 10:09   ` Lokesh Vutla
2019-04-20 10:09   ` Lokesh Vutla
2019-04-20 10:09 ` [PATCH v7 13/14] irqchip: ti-sci-inta: Add msi domain support Lokesh Vutla
2019-04-20 10:09   ` Lokesh Vutla
2019-04-20 10:09   ` Lokesh Vutla
2019-04-20 10:09 ` [PATCH v7 14/14] arm64: arch_k3: Enable interrupt controller drivers Lokesh Vutla
2019-04-20 10:09   ` Lokesh Vutla
2019-04-20 10:09   ` Lokesh Vutla

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