* [PATCH] drm/i915: Configurable GT idle frequency @ 2019-04-15 23:05 Bob Paauwe 2019-04-15 23:32 ` ✗ Fi.CI.SPARSE: warning for " Patchwork ` (4 more replies) 0 siblings, 5 replies; 9+ messages in thread From: Bob Paauwe @ 2019-04-15 23:05 UTC (permalink / raw) To: intel-gfx There are real-time use cases where having deterministic CPU processes can be more important than GPU power/performance. Parking the GPU at a specific freqency by setting idle, min and max prohibits the normal dynamic GPU frequency switching which can introduce significant PCI-E latency. This adds the ability to configure the GPU "idle" frequecy using the same method that already exists for minimum and maximum frequencies. In addition, parking the idle frequency may reduce spool up latencies on GPU workloads. Signed-off-by: Bob Paauwe <bob.j.paauwe@intel.com> --- drivers/gpu/drm/i915/i915_sysfs.c | 60 +++++++++++++++++++++++++++++++ 1 file changed, 60 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c index 41313005af42..62612c23d514 100644 --- a/drivers/gpu/drm/i915/i915_sysfs.c +++ b/drivers/gpu/drm/i915/i915_sysfs.c @@ -454,11 +454,69 @@ static ssize_t gt_min_freq_mhz_store(struct device *kdev, return ret ?: count; } +static ssize_t gt_idle_freq_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf) +{ + struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev); + + return snprintf(buf, PAGE_SIZE, "%d\n", + intel_gpu_freq(dev_priv, + dev_priv->gt_pm.rps.idle_freq)); +} + +static ssize_t gt_idle_freq_mhz_store(struct device *kdev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev); + struct intel_rps *rps = &dev_priv->gt_pm.rps; + intel_wakeref_t wakeref; + u32 val; + ssize_t ret; + + ret = kstrtou32(buf, 0, &val); + if (ret) + return ret; + + wakeref = intel_runtime_pm_get(dev_priv); + + mutex_lock(&dev_priv->pcu_lock); + + val = intel_freq_opcode(dev_priv, val); + + if (val < rps->min_freq || + val > rps->max_freq || + val > rps->max_freq_softlimit) { + mutex_unlock(&dev_priv->pcu_lock); + intel_runtime_pm_put(dev_priv, wakeref); + return -EINVAL; + } + + rps->idle_freq = val; + + val = clamp_t(int, rps->cur_freq, + rps->idle_freq, + rps->max_freq_softlimit); + + /* + * If the current freq is at the old idle freq we should + * ajust it to the new idle. Calling *_set_rps will also + * update the interrupt limits and PMINTRMSK if ncessary. + */ + ret = intel_set_rps(dev_priv, val); + + mutex_unlock(&dev_priv->pcu_lock); + + intel_runtime_pm_put(dev_priv, wakeref); + + return ret ?: count; +} + static DEVICE_ATTR_RO(gt_act_freq_mhz); static DEVICE_ATTR_RO(gt_cur_freq_mhz); static DEVICE_ATTR_RW(gt_boost_freq_mhz); static DEVICE_ATTR_RW(gt_max_freq_mhz); static DEVICE_ATTR_RW(gt_min_freq_mhz); +static DEVICE_ATTR_RW(gt_idle_freq_mhz); static DEVICE_ATTR_RO(vlv_rpe_freq_mhz); @@ -492,6 +550,7 @@ static const struct attribute * const gen6_attrs[] = { &dev_attr_gt_boost_freq_mhz.attr, &dev_attr_gt_max_freq_mhz.attr, &dev_attr_gt_min_freq_mhz.attr, + &dev_attr_gt_idle_freq_mhz.attr, &dev_attr_gt_RP0_freq_mhz.attr, &dev_attr_gt_RP1_freq_mhz.attr, &dev_attr_gt_RPn_freq_mhz.attr, @@ -504,6 +563,7 @@ static const struct attribute * const vlv_attrs[] = { &dev_attr_gt_boost_freq_mhz.attr, &dev_attr_gt_max_freq_mhz.attr, &dev_attr_gt_min_freq_mhz.attr, + &dev_attr_gt_idle_freq_mhz.attr, &dev_attr_gt_RP0_freq_mhz.attr, &dev_attr_gt_RP1_freq_mhz.attr, &dev_attr_gt_RPn_freq_mhz.attr, -- 2.19.2 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 9+ messages in thread
* ✗ Fi.CI.SPARSE: warning for drm/i915: Configurable GT idle frequency 2019-04-15 23:05 [PATCH] drm/i915: Configurable GT idle frequency Bob Paauwe @ 2019-04-15 23:32 ` Patchwork 2019-04-16 0:17 ` ✓ Fi.CI.BAT: success " Patchwork ` (3 subsequent siblings) 4 siblings, 0 replies; 9+ messages in thread From: Patchwork @ 2019-04-15 23:32 UTC (permalink / raw) To: Bob Paauwe; +Cc: intel-gfx == Series Details == Series: drm/i915: Configurable GT idle frequency URL : https://patchwork.freedesktop.org/series/59535/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915: Configurable GT idle frequency +drivers/gpu/drm/i915/i915_sysfs.c:496:15: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_sysfs.c:496:15: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_sysfs.c:496:15: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_sysfs.c:496:15: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_sysfs.c:496:15: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_sysfs.c:496:15: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_sysfs.c:496:15: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_sysfs.c:496:15: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_sysfs.c:496:15: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_sysfs.c:496:15: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_sysfs.c:496:15: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_sysfs.c:496:15: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_sysfs.c:496:15: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_sysfs.c:496:15: warning: expression using sizeof(void) _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915: Configurable GT idle frequency 2019-04-15 23:05 [PATCH] drm/i915: Configurable GT idle frequency Bob Paauwe 2019-04-15 23:32 ` ✗ Fi.CI.SPARSE: warning for " Patchwork @ 2019-04-16 0:17 ` Patchwork 2019-04-16 0:33 ` [PATCH] " Vanshidhar Konda ` (2 subsequent siblings) 4 siblings, 0 replies; 9+ messages in thread From: Patchwork @ 2019-04-16 0:17 UTC (permalink / raw) To: Bob Paauwe; +Cc: intel-gfx == Series Details == Series: drm/i915: Configurable GT idle frequency URL : https://patchwork.freedesktop.org/series/59535/ State : success == Summary == CI Bug Log - changes from CI_DRM_5936 -> Patchwork_12810 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/59535/revisions/1/mbox/ Known issues ------------ Here are the changes found in Patchwork_12810 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@amdgpu/amd_cs_nop@fork-compute0: - fi-icl-y: NOTRUN -> SKIP [fdo#109315] +17 * igt@gem_exec_basic@basic-bsd2: - fi-icl-y: NOTRUN -> SKIP [fdo#109276] +7 * igt@gem_exec_parse@basic-rejected: - fi-icl-y: NOTRUN -> SKIP [fdo#109289] +1 * igt@gem_exec_store@basic-bsd2: - fi-hsw-4770: NOTRUN -> SKIP [fdo#109271] +41 * igt@kms_addfb_basic@addfb25-y-tiled-small: - fi-byt-n2820: NOTRUN -> SKIP [fdo#109271] +51 * igt@kms_busy@basic-flip-c: - fi-byt-n2820: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] * igt@kms_chamelium@dp-crc-fast: - fi-icl-y: NOTRUN -> SKIP [fdo#109284] +8 * igt@kms_chamelium@hdmi-edid-read: - fi-hsw-peppy: NOTRUN -> SKIP [fdo#109271] +46 * igt@kms_force_connector_basic@force-load-detect: - fi-icl-y: NOTRUN -> SKIP [fdo#109285] +3 * igt@kms_frontbuffer_tracking@basic: - fi-hsw-peppy: NOTRUN -> DMESG-FAIL [fdo#102614] / [fdo#107814] * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: - fi-blb-e6850: PASS -> INCOMPLETE [fdo#107718] * igt@kms_psr@primary_mmap_gtt: - fi-icl-y: NOTRUN -> SKIP [fdo#110189] +3 * igt@kms_psr@primary_page_flip: - fi-skl-lmem: NOTRUN -> SKIP [fdo#109271] +37 * igt@prime_vgem@basic-fence-flip: - fi-icl-y: NOTRUN -> SKIP [fdo#109294] #### Possible fixes #### * igt@i915_selftest@live_contexts: - fi-bdw-gvtdvm: DMESG-FAIL [fdo#110235 ] -> PASS [fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614 [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718 [fdo#107814]: https://bugs.freedesktop.org/show_bug.cgi?id=107814 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276 [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278 [fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284 [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285 [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289 [fdo#109294]: https://bugs.freedesktop.org/show_bug.cgi?id=109294 [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315 [fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189 [fdo#110235 ]: https://bugs.freedesktop.org/show_bug.cgi?id=110235 Participating hosts (43 -> 42) ------------------------------ Additional (5): fi-hsw-peppy fi-hsw-4770 fi-icl-y fi-skl-lmem fi-byt-n2820 Missing (6): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-bsw-cyan fi-ctg-p8600 fi-bdw-samus Build changes ------------- * Linux: CI_DRM_5936 -> Patchwork_12810 CI_DRM_5936: 0ad14bd30d830a1a355040b29bfafbe6623d84f0 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4948: cf27a37b867bf31dccbe5f1b3bd84a2e606544f0 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_12810: 9bdb967c67706f81da81783011437ef62e563ed7 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 9bdb967c6770 drm/i915: Configurable GT idle frequency == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12810/ _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH] drm/i915: Configurable GT idle frequency 2019-04-15 23:05 [PATCH] drm/i915: Configurable GT idle frequency Bob Paauwe 2019-04-15 23:32 ` ✗ Fi.CI.SPARSE: warning for " Patchwork 2019-04-16 0:17 ` ✓ Fi.CI.BAT: success " Patchwork @ 2019-04-16 0:33 ` Vanshidhar Konda 2019-04-16 15:30 ` Bob Paauwe 2019-04-16 2:09 ` ✓ Fi.CI.IGT: success for " Patchwork 2019-04-16 15:56 ` [PATCH] " Chris Wilson 4 siblings, 1 reply; 9+ messages in thread From: Vanshidhar Konda @ 2019-04-16 0:33 UTC (permalink / raw) To: Bob Paauwe; +Cc: intel-gfx On Mon, Apr 15, 2019 at 04:05:26PM -0700, Bob Paauwe wrote: >There are real-time use cases where having deterministic CPU processes >can be more important than GPU power/performance. Parking the GPU at a >specific freqency by setting idle, min and max prohibits the normal >dynamic GPU frequency switching which can introduce significant PCI-E >latency. This adds the ability to configure the GPU "idle" frequecy >using the same method that already exists for minimum and maximum >frequencies. > >In addition, parking the idle frequency may reduce spool up latencies >on GPU workloads. > >Signed-off-by: Bob Paauwe <bob.j.paauwe@intel.com> >--- > drivers/gpu/drm/i915/i915_sysfs.c | 60 +++++++++++++++++++++++++++++++ > 1 file changed, 60 insertions(+) > >diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c >index 41313005af42..62612c23d514 100644 >--- a/drivers/gpu/drm/i915/i915_sysfs.c >+++ b/drivers/gpu/drm/i915/i915_sysfs.c >@@ -454,11 +454,69 @@ static ssize_t gt_min_freq_mhz_store(struct device *kdev, > return ret ?: count; > } > >+static ssize_t gt_idle_freq_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf) >+{ >+ struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev); >+ >+ return snprintf(buf, PAGE_SIZE, "%d\n", >+ intel_gpu_freq(dev_priv, >+ dev_priv->gt_pm.rps.idle_freq)); >+} >+ >+static ssize_t gt_idle_freq_mhz_store(struct device *kdev, >+ struct device_attribute *attr, >+ const char *buf, size_t count) >+{ >+ struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev); >+ struct intel_rps *rps = &dev_priv->gt_pm.rps; >+ intel_wakeref_t wakeref; >+ u32 val; val can probably just be u8. max_freq, min_freq, etc. are only u8 in struct intel_rps *rps. >+ ssize_t ret; >+ >+ ret = kstrtou32(buf, 0, &val); >+ if (ret) >+ return ret; >+ >+ wakeref = intel_runtime_pm_get(dev_priv); >+ >+ mutex_lock(&dev_priv->pcu_lock); >+ >+ val = intel_freq_opcode(dev_priv, val); >+ >+ if (val < rps->min_freq || >+ val > rps->max_freq || >+ val > rps->max_freq_softlimit) { >+ mutex_unlock(&dev_priv->pcu_lock); >+ intel_runtime_pm_put(dev_priv, wakeref); >+ return -EINVAL; >+ } >+ >+ rps->idle_freq = val; >+ >+ val = clamp_t(int, rps->cur_freq, >+ rps->idle_freq, >+ rps->max_freq_softlimit); This should probably be clamped to u8 instead of int. Vanshi >+ >+ /* >+ * If the current freq is at the old idle freq we should >+ * ajust it to the new idle. Calling *_set_rps will also >+ * update the interrupt limits and PMINTRMSK if ncessary. >+ */ >+ ret = intel_set_rps(dev_priv, val); >+ >+ mutex_unlock(&dev_priv->pcu_lock); >+ >+ intel_runtime_pm_put(dev_priv, wakeref); >+ >+ return ret ?: count; >+} >+ > static DEVICE_ATTR_RO(gt_act_freq_mhz); > static DEVICE_ATTR_RO(gt_cur_freq_mhz); > static DEVICE_ATTR_RW(gt_boost_freq_mhz); > static DEVICE_ATTR_RW(gt_max_freq_mhz); > static DEVICE_ATTR_RW(gt_min_freq_mhz); >+static DEVICE_ATTR_RW(gt_idle_freq_mhz); > > static DEVICE_ATTR_RO(vlv_rpe_freq_mhz); > >@@ -492,6 +550,7 @@ static const struct attribute * const gen6_attrs[] = { > &dev_attr_gt_boost_freq_mhz.attr, > &dev_attr_gt_max_freq_mhz.attr, > &dev_attr_gt_min_freq_mhz.attr, >+ &dev_attr_gt_idle_freq_mhz.attr, > &dev_attr_gt_RP0_freq_mhz.attr, > &dev_attr_gt_RP1_freq_mhz.attr, > &dev_attr_gt_RPn_freq_mhz.attr, >@@ -504,6 +563,7 @@ static const struct attribute * const vlv_attrs[] = { > &dev_attr_gt_boost_freq_mhz.attr, > &dev_attr_gt_max_freq_mhz.attr, > &dev_attr_gt_min_freq_mhz.attr, >+ &dev_attr_gt_idle_freq_mhz.attr, > &dev_attr_gt_RP0_freq_mhz.attr, > &dev_attr_gt_RP1_freq_mhz.attr, > &dev_attr_gt_RPn_freq_mhz.attr, >-- >2.19.2 > >_______________________________________________ >Intel-gfx mailing list >Intel-gfx@lists.freedesktop.org >https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH] drm/i915: Configurable GT idle frequency 2019-04-16 0:33 ` [PATCH] " Vanshidhar Konda @ 2019-04-16 15:30 ` Bob Paauwe 2019-04-16 15:48 ` Vanshidhar Konda 0 siblings, 1 reply; 9+ messages in thread From: Bob Paauwe @ 2019-04-16 15:30 UTC (permalink / raw) To: Vanshidhar Konda; +Cc: intel-gfx On Mon, 15 Apr 2019 17:33:30 -0700 Vanshidhar Konda <vanshidhar.r.konda@intel.com> wrote: > On Mon, Apr 15, 2019 at 04:05:26PM -0700, Bob Paauwe wrote: > >There are real-time use cases where having deterministic CPU processes > >can be more important than GPU power/performance. Parking the GPU at a > >specific freqency by setting idle, min and max prohibits the normal > >dynamic GPU frequency switching which can introduce significant PCI-E > >latency. This adds the ability to configure the GPU "idle" frequecy > >using the same method that already exists for minimum and maximum > >frequencies. > > > >In addition, parking the idle frequency may reduce spool up latencies > >on GPU workloads. > > > >Signed-off-by: Bob Paauwe <bob.j.paauwe@intel.com> > >--- > > drivers/gpu/drm/i915/i915_sysfs.c | 60 +++++++++++++++++++++++++++++++ > > 1 file changed, 60 insertions(+) > > > >diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c > >index 41313005af42..62612c23d514 100644 > >--- a/drivers/gpu/drm/i915/i915_sysfs.c > >+++ b/drivers/gpu/drm/i915/i915_sysfs.c > >@@ -454,11 +454,69 @@ static ssize_t gt_min_freq_mhz_store(struct device *kdev, > > return ret ?: count; > > } > > > >+static ssize_t gt_idle_freq_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf) > >+{ > >+ struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev); > >+ > >+ return snprintf(buf, PAGE_SIZE, "%d\n", > >+ intel_gpu_freq(dev_priv, > >+ dev_priv->gt_pm.rps.idle_freq)); > >+} > >+ > >+static ssize_t gt_idle_freq_mhz_store(struct device *kdev, > >+ struct device_attribute *attr, > >+ const char *buf, size_t count) > >+{ > >+ struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev); > >+ struct intel_rps *rps = &dev_priv->gt_pm.rps; > >+ intel_wakeref_t wakeref; > >+ u32 val; > > val can probably just be u8. max_freq, min_freq, etc. are only u8 in > struct intel_rps *rps. Using u32 is consistent with all the other _store functions in the file and changing it would also mean changing the kstrtou32 call below. I'd rather this function stay consistent with the min/max/boost frequency functions. Changing to u8 would be a separate change and should be applied to all the similar functions. > > >+ ssize_t ret; > >+ > >+ ret = kstrtou32(buf, 0, &val); > >+ if (ret) > >+ return ret; > >+ > >+ wakeref = intel_runtime_pm_get(dev_priv); > >+ > >+ mutex_lock(&dev_priv->pcu_lock); > >+ > >+ val = intel_freq_opcode(dev_priv, val); > >+ > >+ if (val < rps->min_freq || > >+ val > rps->max_freq || > >+ val > rps->max_freq_softlimit) { > >+ mutex_unlock(&dev_priv->pcu_lock); > >+ intel_runtime_pm_put(dev_priv, wakeref); > >+ return -EINVAL; > >+ } > >+ > >+ rps->idle_freq = val; > >+ > >+ val = clamp_t(int, rps->cur_freq, > >+ rps->idle_freq, > >+ rps->max_freq_softlimit); > > This should probably be clamped to u8 instead of int. Similar to above, this is consistent with the other similar functions. > > Vanshi > > >+ > >+ /* > >+ * If the current freq is at the old idle freq we should > >+ * ajust it to the new idle. Calling *_set_rps will also > >+ * update the interrupt limits and PMINTRMSK if ncessary. > >+ */ > >+ ret = intel_set_rps(dev_priv, val); > >+ > >+ mutex_unlock(&dev_priv->pcu_lock); > >+ > >+ intel_runtime_pm_put(dev_priv, wakeref); > >+ > >+ return ret ?: count; > >+} > >+ > > static DEVICE_ATTR_RO(gt_act_freq_mhz); > > static DEVICE_ATTR_RO(gt_cur_freq_mhz); > > static DEVICE_ATTR_RW(gt_boost_freq_mhz); > > static DEVICE_ATTR_RW(gt_max_freq_mhz); > > static DEVICE_ATTR_RW(gt_min_freq_mhz); > >+static DEVICE_ATTR_RW(gt_idle_freq_mhz); > > > > static DEVICE_ATTR_RO(vlv_rpe_freq_mhz); > > > >@@ -492,6 +550,7 @@ static const struct attribute * const gen6_attrs[] = { > > &dev_attr_gt_boost_freq_mhz.attr, > > &dev_attr_gt_max_freq_mhz.attr, > > &dev_attr_gt_min_freq_mhz.attr, > >+ &dev_attr_gt_idle_freq_mhz.attr, > > &dev_attr_gt_RP0_freq_mhz.attr, > > &dev_attr_gt_RP1_freq_mhz.attr, > > &dev_attr_gt_RPn_freq_mhz.attr, > >@@ -504,6 +563,7 @@ static const struct attribute * const vlv_attrs[] = { > > &dev_attr_gt_boost_freq_mhz.attr, > > &dev_attr_gt_max_freq_mhz.attr, > > &dev_attr_gt_min_freq_mhz.attr, > >+ &dev_attr_gt_idle_freq_mhz.attr, > > &dev_attr_gt_RP0_freq_mhz.attr, > > &dev_attr_gt_RP1_freq_mhz.attr, > > &dev_attr_gt_RPn_freq_mhz.attr, > >-- > >2.19.2 > > > >_______________________________________________ > >Intel-gfx mailing list > >Intel-gfx@lists.freedesktop.org > >https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- -- Bob Paauwe Bob.J.Paauwe@intel.com IOTG / PED Software Organization Intel Corp. Folsom, CA (916) 356-6193 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH] drm/i915: Configurable GT idle frequency 2019-04-16 15:30 ` Bob Paauwe @ 2019-04-16 15:48 ` Vanshidhar Konda 0 siblings, 0 replies; 9+ messages in thread From: Vanshidhar Konda @ 2019-04-16 15:48 UTC (permalink / raw) To: Bob Paauwe; +Cc: intel-gfx On Tue, Apr 16, 2019 at 08:30:22AM -0700, Bob Paauwe wrote: >On Mon, 15 Apr 2019 17:33:30 -0700 >Vanshidhar Konda <vanshidhar.r.konda@intel.com> wrote: > >> On Mon, Apr 15, 2019 at 04:05:26PM -0700, Bob Paauwe wrote: >> >There are real-time use cases where having deterministic CPU processes >> >can be more important than GPU power/performance. Parking the GPU at a >> >specific freqency by setting idle, min and max prohibits the normal >> >dynamic GPU frequency switching which can introduce significant PCI-E >> >latency. This adds the ability to configure the GPU "idle" frequecy >> >using the same method that already exists for minimum and maximum >> >frequencies. >> > >> >In addition, parking the idle frequency may reduce spool up latencies >> >on GPU workloads. >> > >> >Signed-off-by: Bob Paauwe <bob.j.paauwe@intel.com> >> >--- >> > drivers/gpu/drm/i915/i915_sysfs.c | 60 +++++++++++++++++++++++++++++++ >> > 1 file changed, 60 insertions(+) >> > >> >diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c >> >index 41313005af42..62612c23d514 100644 >> >--- a/drivers/gpu/drm/i915/i915_sysfs.c >> >+++ b/drivers/gpu/drm/i915/i915_sysfs.c >> >@@ -454,11 +454,69 @@ static ssize_t gt_min_freq_mhz_store(struct device *kdev, >> > return ret ?: count; >> > } >> > >> >+static ssize_t gt_idle_freq_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf) >> >+{ >> >+ struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev); >> >+ >> >+ return snprintf(buf, PAGE_SIZE, "%d\n", >> >+ intel_gpu_freq(dev_priv, >> >+ dev_priv->gt_pm.rps.idle_freq)); >> >+} >> >+ >> >+static ssize_t gt_idle_freq_mhz_store(struct device *kdev, >> >+ struct device_attribute *attr, >> >+ const char *buf, size_t count) >> >+{ >> >+ struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev); >> >+ struct intel_rps *rps = &dev_priv->gt_pm.rps; >> >+ intel_wakeref_t wakeref; >> >+ u32 val; >> >> val can probably just be u8. max_freq, min_freq, etc. are only u8 in >> struct intel_rps *rps. > >Using u32 is consistent with all the other _store functions in the file >and changing it would also mean changing the kstrtou32 call below. I'd >rather this function stay consistent with the min/max/boost frequency >functions. Changing to u8 would be a separate change and should be >applied to all the similar functions. > Thanks for pointing that out. I recently joined the team, so not sure if you would like someone else to review as well. Reviewed-by: Vanshidhar Konda <vanshidhar.r.konda@intel.com> >> >> >+ ssize_t ret; >> >+ >> >+ ret = kstrtou32(buf, 0, &val); >> >+ if (ret) >> >+ return ret; >> >+ >> >+ wakeref = intel_runtime_pm_get(dev_priv); >> >+ >> >+ mutex_lock(&dev_priv->pcu_lock); >> >+ >> >+ val = intel_freq_opcode(dev_priv, val); >> >+ >> >+ if (val < rps->min_freq || >> >+ val > rps->max_freq || >> >+ val > rps->max_freq_softlimit) { >> >+ mutex_unlock(&dev_priv->pcu_lock); >> >+ intel_runtime_pm_put(dev_priv, wakeref); >> >+ return -EINVAL; >> >+ } >> >+ >> >+ rps->idle_freq = val; >> >+ >> >+ val = clamp_t(int, rps->cur_freq, >> >+ rps->idle_freq, >> >+ rps->max_freq_softlimit); >> >> This should probably be clamped to u8 instead of int. > >Similar to above, this is consistent with the other similar functions. > >> >> Vanshi >> >> >+ >> >+ /* >> >+ * If the current freq is at the old idle freq we should >> >+ * ajust it to the new idle. Calling *_set_rps will also >> >+ * update the interrupt limits and PMINTRMSK if ncessary. >> >+ */ >> >+ ret = intel_set_rps(dev_priv, val); >> >+ >> >+ mutex_unlock(&dev_priv->pcu_lock); >> >+ >> >+ intel_runtime_pm_put(dev_priv, wakeref); >> >+ >> >+ return ret ?: count; >> >+} >> >+ >> > static DEVICE_ATTR_RO(gt_act_freq_mhz); >> > static DEVICE_ATTR_RO(gt_cur_freq_mhz); >> > static DEVICE_ATTR_RW(gt_boost_freq_mhz); >> > static DEVICE_ATTR_RW(gt_max_freq_mhz); >> > static DEVICE_ATTR_RW(gt_min_freq_mhz); >> >+static DEVICE_ATTR_RW(gt_idle_freq_mhz); >> > >> > static DEVICE_ATTR_RO(vlv_rpe_freq_mhz); >> > >> >@@ -492,6 +550,7 @@ static const struct attribute * const gen6_attrs[] = { >> > &dev_attr_gt_boost_freq_mhz.attr, >> > &dev_attr_gt_max_freq_mhz.attr, >> > &dev_attr_gt_min_freq_mhz.attr, >> >+ &dev_attr_gt_idle_freq_mhz.attr, >> > &dev_attr_gt_RP0_freq_mhz.attr, >> > &dev_attr_gt_RP1_freq_mhz.attr, >> > &dev_attr_gt_RPn_freq_mhz.attr, >> >@@ -504,6 +563,7 @@ static const struct attribute * const vlv_attrs[] = { >> > &dev_attr_gt_boost_freq_mhz.attr, >> > &dev_attr_gt_max_freq_mhz.attr, >> > &dev_attr_gt_min_freq_mhz.attr, >> >+ &dev_attr_gt_idle_freq_mhz.attr, >> > &dev_attr_gt_RP0_freq_mhz.attr, >> > &dev_attr_gt_RP1_freq_mhz.attr, >> > &dev_attr_gt_RPn_freq_mhz.attr, >> >-- >> >2.19.2 >> > >> >_______________________________________________ >> >Intel-gfx mailing list >> >Intel-gfx@lists.freedesktop.org >> >https://lists.freedesktop.org/mailman/listinfo/intel-gfx > > > >-- >-- >Bob Paauwe >Bob.J.Paauwe@intel.com >IOTG / PED Software Organization >Intel Corp. Folsom, CA >(916) 356-6193 > _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* ✓ Fi.CI.IGT: success for drm/i915: Configurable GT idle frequency 2019-04-15 23:05 [PATCH] drm/i915: Configurable GT idle frequency Bob Paauwe ` (2 preceding siblings ...) 2019-04-16 0:33 ` [PATCH] " Vanshidhar Konda @ 2019-04-16 2:09 ` Patchwork 2019-04-16 15:56 ` [PATCH] " Chris Wilson 4 siblings, 0 replies; 9+ messages in thread From: Patchwork @ 2019-04-16 2:09 UTC (permalink / raw) To: Bob Paauwe; +Cc: intel-gfx == Series Details == Series: drm/i915: Configurable GT idle frequency URL : https://patchwork.freedesktop.org/series/59535/ State : success == Summary == CI Bug Log - changes from CI_DRM_5936_full -> Patchwork_12810_full ==================================================== Summary ------- **SUCCESS** No regressions found. Known issues ------------ Here are the changes found in Patchwork_12810_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_ctx_isolation@vcs0-s3: - shard-skl: PASS -> INCOMPLETE [fdo#104108] / [fdo#107773] * igt@gem_tiled_swapping@non-threaded: - shard-iclb: PASS -> DMESG-WARN [fdo#108686] * igt@gem_workarounds@suspend-resume: - shard-apl: PASS -> DMESG-WARN [fdo#108566] +2 * igt@i915_pm_rpm@system-suspend: - shard-skl: PASS -> INCOMPLETE [fdo#104108] / [fdo#107807] * igt@kms_atomic_transition@3x-modeset-transitions: - shard-skl: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +15 * igt@kms_atomic_transition@plane-all-transition-nonblocking: - shard-snb: PASS -> SKIP [fdo#109271] +1 * igt@kms_busy@basic-modeset-e: - shard-apl: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +4 * igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-f: - shard-kbl: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +2 * igt@kms_content_protection@atomic: - shard-apl: NOTRUN -> FAIL [fdo#110321] / [fdo#110336] * igt@kms_content_protection@legacy: - shard-kbl: NOTRUN -> FAIL [fdo#110321] / [fdo#110336] * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-blt: - shard-kbl: NOTRUN -> SKIP [fdo#109271] +23 * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-blt: - shard-skl: NOTRUN -> SKIP [fdo#109271] +152 * igt@kms_frontbuffer_tracking@fbc-suspend: - shard-kbl: PASS -> DMESG-WARN [fdo#108566] +2 * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-gtt: - shard-iclb: PASS -> FAIL [fdo#109247] +14 * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-blt: - shard-iclb: PASS -> FAIL [fdo#103167] +5 * igt@kms_lease@atomic_implicit_crtc: - shard-skl: NOTRUN -> FAIL [fdo#110279] * igt@kms_lease@cursor_implicit_plane: - shard-apl: NOTRUN -> FAIL [fdo#110278] * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: - shard-apl: NOTRUN -> DMESG-WARN [fdo#108566] * igt@kms_plane@pixel-format-pipe-c-planes: - shard-glk: PASS -> SKIP [fdo#109271] * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes: - shard-skl: PASS -> INCOMPLETE [fdo#104108] * igt@kms_plane_alpha_blend@pipe-a-alpha-transparant-fb: - shard-kbl: NOTRUN -> FAIL [fdo#108145] * igt@kms_plane_alpha_blend@pipe-b-alpha-basic: - shard-apl: NOTRUN -> FAIL [fdo#108145] +2 - shard-skl: NOTRUN -> FAIL [fdo#108145] +2 * igt@kms_psr@psr2_primary_mmap_gtt: - shard-iclb: PASS -> SKIP [fdo#109441] +2 * igt@kms_rotation_crc@multiplane-rotation-cropping-bottom: - shard-kbl: PASS -> DMESG-FAIL [fdo#105763] * igt@kms_setmode@basic: - shard-apl: NOTRUN -> FAIL [fdo#99912] - shard-kbl: PASS -> FAIL [fdo#99912] * igt@kms_sysfs_edid_timing: - shard-apl: NOTRUN -> FAIL [fdo#100047] * igt@perf_pmu@rc6: - shard-kbl: PASS -> SKIP [fdo#109271] * igt@prime_nv_api@i915_nv_reimport_twice_check_flink_name: - shard-apl: NOTRUN -> SKIP [fdo#109271] +101 #### Possible fixes #### * igt@i915_pm_rpm@dpms-non-lpsp: - shard-apl: DMESG-WARN [fdo#110376] -> PASS * igt@i915_pm_rpm@system-suspend-modeset: - shard-kbl: INCOMPLETE [fdo#103665] / [fdo#107807] -> PASS * igt@kms_cursor_crc@cursor-64x64-suspend: - shard-skl: INCOMPLETE [fdo#104108] / [fdo#107773] -> PASS * igt@kms_flip@flip-vs-expired-vblank: - shard-glk: FAIL [fdo#102887] -> PASS * igt@kms_flip@flip-vs-expired-vblank-interruptible: - shard-kbl: FAIL [fdo#102887] / [fdo#105363] -> PASS - shard-glk: FAIL [fdo#102887] / [fdo#105363] -> PASS * igt@kms_flip@flip-vs-suspend: - shard-skl: INCOMPLETE [fdo#107773] / [fdo#109507] -> PASS * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-pwrite: - shard-iclb: FAIL [fdo#109247] -> PASS +12 * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-msflip-blt: - shard-iclb: FAIL [fdo#103167] -> PASS +6 * igt@kms_plane@pixel-format-pipe-b-planes: - shard-glk: SKIP [fdo#109271] -> PASS * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes: - shard-apl: DMESG-WARN [fdo#108566] -> PASS +2 * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc: - shard-skl: FAIL [fdo#110403] -> PASS +1 * igt@kms_psr@psr2_cursor_plane_onoff: - shard-iclb: SKIP [fdo#109441] -> PASS +1 * igt@kms_psr@sprite_mmap_cpu: - shard-iclb: FAIL [fdo#107383] / [fdo#110215] -> PASS +2 [fdo#100047]: https://bugs.freedesktop.org/show_bug.cgi?id=100047 [fdo#102887]: https://bugs.freedesktop.org/show_bug.cgi?id=102887 [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167 [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665 [fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108 [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363 [fdo#105763]: https://bugs.freedesktop.org/show_bug.cgi?id=105763 [fdo#107383]: https://bugs.freedesktop.org/show_bug.cgi?id=107383 [fdo#107773]: https://bugs.freedesktop.org/show_bug.cgi?id=107773 [fdo#107807]: https://bugs.freedesktop.org/show_bug.cgi?id=107807 [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145 [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566 [fdo#108686]: https://bugs.freedesktop.org/show_bug.cgi?id=108686 [fdo#109247]: https://bugs.freedesktop.org/show_bug.cgi?id=109247 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278 [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441 [fdo#109507]: https://bugs.freedesktop.org/show_bug.cgi?id=109507 [fdo#110215]: https://bugs.freedesktop.org/show_bug.cgi?id=110215 [fdo#110278]: https://bugs.freedesktop.org/show_bug.cgi?id=110278 [fdo#110279]: https://bugs.freedesktop.org/show_bug.cgi?id=110279 [fdo#110321]: https://bugs.freedesktop.org/show_bug.cgi?id=110321 [fdo#110336]: https://bugs.freedesktop.org/show_bug.cgi?id=110336 [fdo#110376]: https://bugs.freedesktop.org/show_bug.cgi?id=110376 [fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403 [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912 Participating hosts (10 -> 9) ------------------------------ Missing (1): shard-hsw Build changes ------------- * Linux: CI_DRM_5936 -> Patchwork_12810 CI_DRM_5936: 0ad14bd30d830a1a355040b29bfafbe6623d84f0 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4948: cf27a37b867bf31dccbe5f1b3bd84a2e606544f0 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_12810: 9bdb967c67706f81da81783011437ef62e563ed7 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12810/ _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH] drm/i915: Configurable GT idle frequency 2019-04-15 23:05 [PATCH] drm/i915: Configurable GT idle frequency Bob Paauwe ` (3 preceding siblings ...) 2019-04-16 2:09 ` ✓ Fi.CI.IGT: success for " Patchwork @ 2019-04-16 15:56 ` Chris Wilson 2019-04-23 18:05 ` Bob Paauwe 4 siblings, 1 reply; 9+ messages in thread From: Chris Wilson @ 2019-04-16 15:56 UTC (permalink / raw) To: Bob Paauwe, intel-gfx Quoting Bob Paauwe (2019-04-16 00:05:26) > There are real-time use cases where having deterministic CPU processes > can be more important than GPU power/performance. Parking the GPU at a > specific freqency by setting idle, min and max prohibits the normal > dynamic GPU frequency switching which can introduce significant PCI-E > latency. This adds the ability to configure the GPU "idle" frequecy > using the same method that already exists for minimum and maximum > frequencies. What exactly is the problem? We never use idle frequency while active, always restarting at max(cur, rpe). So for the simple minded among us, where is the igt demonstrating the issue? -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH] drm/i915: Configurable GT idle frequency 2019-04-16 15:56 ` [PATCH] " Chris Wilson @ 2019-04-23 18:05 ` Bob Paauwe 0 siblings, 0 replies; 9+ messages in thread From: Bob Paauwe @ 2019-04-23 18:05 UTC (permalink / raw) To: Chris Wilson; +Cc: intel-gfx On Tue, 16 Apr 2019 16:56:26 +0100 Chris Wilson <chris@chris-wilson.co.uk> wrote: > Quoting Bob Paauwe (2019-04-16 00:05:26) > > There are real-time use cases where having deterministic CPU processes > > can be more important than GPU power/performance. Parking the GPU at a > > specific freqency by setting idle, min and max prohibits the normal > > dynamic GPU frequency switching which can introduce significant PCI-E > > latency. This adds the ability to configure the GPU "idle" frequecy > > using the same method that already exists for minimum and maximum > > frequencies. > > What exactly is the problem? We never use idle frequency while active, > always restarting at max(cur, rpe). So for the simple minded among us, > where is the igt demonstrating the issue? > -Chris To follow up and close this. When I requested more details on the use case and data for this request, I was informed that a different solution is being pursued and this patch is no longer needed. Thanks for the reviews and comments. Bob -- -- Bob Paauwe Bob.J.Paauwe@intel.com IOTG / PED Software Organization Intel Corp. Folsom, CA (916) 356-6193 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2019-04-23 18:05 UTC | newest] Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2019-04-15 23:05 [PATCH] drm/i915: Configurable GT idle frequency Bob Paauwe 2019-04-15 23:32 ` ✗ Fi.CI.SPARSE: warning for " Patchwork 2019-04-16 0:17 ` ✓ Fi.CI.BAT: success " Patchwork 2019-04-16 0:33 ` [PATCH] " Vanshidhar Konda 2019-04-16 15:30 ` Bob Paauwe 2019-04-16 15:48 ` Vanshidhar Konda 2019-04-16 2:09 ` ✓ Fi.CI.IGT: success for " Patchwork 2019-04-16 15:56 ` [PATCH] " Chris Wilson 2019-04-23 18:05 ` Bob Paauwe
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