* [PATCH i-g-t 1/3] lib/igt_dummyload: Introduce igt_spin_reset
@ 2019-04-23 14:00 Mika Kuoppala
2019-04-23 14:00 ` [PATCH i-g-t 2/3] lib/igt_dummyload: Clarify batch mapping Mika Kuoppala
` (4 more replies)
0 siblings, 5 replies; 9+ messages in thread
From: Mika Kuoppala @ 2019-04-23 14:00 UTC (permalink / raw)
To: intel-gfx
Libify resetting a spin for reuse.
v2: use also in perf_pmu
v3: s/cmd_spin/cmd_precondition
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
lib/igt_dummyload.c | 20 ++++++++++++++++++++
lib/igt_dummyload.h | 2 ++
tests/i915/gem_exec_latency.c | 19 ++++---------------
tests/i915/gem_sync.c | 34 ++++++++++++++--------------------
tests/perf_pmu.c | 10 +---------
5 files changed, 41 insertions(+), 44 deletions(-)
diff --git a/lib/igt_dummyload.c b/lib/igt_dummyload.c
index 1d57a53c..12465024 100644
--- a/lib/igt_dummyload.c
+++ b/lib/igt_dummyload.c
@@ -260,6 +260,8 @@ emit_recursive_batch(igt_spin_t *spin,
obj[SCRATCH].flags = EXEC_OBJECT_PINNED;
obj[BATCH].flags = EXEC_OBJECT_PINNED;
+ spin->cmd_precondition = *spin->batch;
+
return fence_fd;
}
@@ -366,6 +368,24 @@ void igt_spin_set_timeout(igt_spin_t *spin, int64_t ns)
spin->timer = timer;
}
+/**
+ * igt_spin_reset:
+ * @spin: spin state from igt_spin_new()
+ *
+ * Reset the state of spin, allowing its reuse.
+ */
+void igt_spin_reset(igt_spin_t *spin)
+{
+ if (!spin)
+ return;
+
+ if (igt_spin_has_poll(spin))
+ spin->poll[SPIN_POLL_START_IDX] = 0;
+
+ *spin->batch = spin->cmd_precondition;
+ __sync_synchronize();
+}
+
/**
* igt_spin_end:
* @spin: spin state from igt_spin_new()
diff --git a/lib/igt_dummyload.h b/lib/igt_dummyload.h
index d6482089..34537f27 100644
--- a/lib/igt_dummyload.h
+++ b/lib/igt_dummyload.h
@@ -37,6 +37,7 @@ typedef struct igt_spin {
timer_t timer;
struct igt_list link;
uint32_t *batch;
+ uint32_t cmd_precondition;
int out_fence;
struct drm_i915_gem_exec_object2 obj[2];
struct drm_i915_gem_execbuffer2 execbuf;
@@ -68,6 +69,7 @@ igt_spin_factory(int fd, const struct igt_spin_factory *opts);
igt_spin_factory(fd, &((struct igt_spin_factory){__VA_ARGS__}))
void igt_spin_set_timeout(igt_spin_t *spin, int64_t ns);
+void igt_spin_reset(igt_spin_t *spin);
void igt_spin_end(igt_spin_t *spin);
void igt_spin_free(int fd, igt_spin_t *spin);
diff --git a/tests/i915/gem_exec_latency.c b/tests/i915/gem_exec_latency.c
index 6b7dfbc0..2cfb78bf 100644
--- a/tests/i915/gem_exec_latency.c
+++ b/tests/i915/gem_exec_latency.c
@@ -73,19 +73,17 @@ poll_ring(int fd, unsigned ring, const char *name)
unsigned long cycles;
igt_spin_t *spin[2];
uint64_t elapsed;
- uint32_t cmd;
gem_require_ring(fd, ring);
igt_require(gem_can_store_dword(fd, ring));
spin[0] = __igt_spin_factory(fd, &opts);
igt_assert(igt_spin_has_poll(spin[0]));
- cmd = *spin[0]->batch;
spin[1] = __igt_spin_factory(fd, &opts);
igt_assert(igt_spin_has_poll(spin[1]));
- igt_assert(cmd == *spin[1]->batch);
+ igt_assert(*spin[0]->batch == *spin[1]->batch);
igt_spin_end(spin[0]);
igt_spin_busywait_until_started(spin[1]);
@@ -96,8 +94,8 @@ poll_ring(int fd, unsigned ring, const char *name)
while ((elapsed = igt_nsec_elapsed(&tv)) < 2ull << 30) {
const unsigned int idx = cycles++ & 1;
- *spin[idx]->batch = cmd;
- spin[idx]->poll[SPIN_POLL_START_IDX] = 0;
+ igt_spin_reset(spin[idx]);
+
gem_execbuf(fd, &spin[idx]->execbuf);
igt_spin_end(spin[!idx]);
@@ -414,15 +412,6 @@ static void latency_from_ring(int fd,
}
}
-static void __rearm_spin(igt_spin_t *spin)
-{
- const uint32_t mi_arb_chk = 0x5 << 23;
-
- *spin->batch = mi_arb_chk;
- spin->poll[SPIN_POLL_START_IDX] = 0;
- __sync_synchronize();
-}
-
static void
__submit_spin(int fd, igt_spin_t *spin, unsigned int flags)
{
@@ -557,7 +546,7 @@ rthog_latency_on_ring(int fd, unsigned int engine, const char *name, unsigned in
if (nengine > 1)
usleep(10*nengine);
- __rearm_spin(spin);
+ igt_spin_reset(spin);
igt_nsec_elapsed(&ts);
__submit_spin(fd, spin, engine);
diff --git a/tests/i915/gem_sync.c b/tests/i915/gem_sync.c
index f17ecd0b..8c5aaa14 100644
--- a/tests/i915/gem_sync.c
+++ b/tests/i915/gem_sync.c
@@ -209,7 +209,6 @@ wakeup_ring(int fd, unsigned ring, int timeout, int wlen)
struct drm_i915_gem_execbuffer2 execbuf;
double end, this, elapsed, now, baseline;
unsigned long cycles;
- uint32_t cmd;
igt_spin_t *spin;
memset(&object, 0, sizeof(object));
@@ -226,7 +225,6 @@ wakeup_ring(int fd, unsigned ring, int timeout, int wlen)
.flags = (IGT_SPIN_POLL_RUN |
IGT_SPIN_FAST));
igt_assert(igt_spin_has_poll(spin));
- cmd = *spin->batch;
gem_execbuf(fd, &execbuf);
@@ -238,8 +236,8 @@ wakeup_ring(int fd, unsigned ring, int timeout, int wlen)
elapsed = 0;
cycles = 0;
do {
- *spin->batch = cmd;
- spin->poll[SPIN_POLL_START_IDX] = 0;
+ igt_spin_reset(spin);
+
gem_execbuf(fd, &spin->execbuf);
igt_spin_busywait_until_started(spin);
@@ -262,8 +260,8 @@ wakeup_ring(int fd, unsigned ring, int timeout, int wlen)
elapsed = 0;
cycles = 0;
do {
- *spin->batch = cmd;
- spin->poll[SPIN_POLL_START_IDX] = 0;
+ igt_spin_reset(spin);
+
gem_execbuf(fd, &spin->execbuf);
igt_spin_busywait_until_started(spin);
@@ -321,17 +319,14 @@ static void active_ring(int fd, unsigned ring, int timeout)
double start, end, elapsed;
unsigned long cycles;
igt_spin_t *spin[2];
- uint32_t cmd;
spin[0] = __igt_spin_new(fd,
.engine = ring,
.flags = IGT_SPIN_FAST);
- cmd = *spin[0]->batch;
spin[1] = __igt_spin_new(fd,
.engine = ring,
.flags = IGT_SPIN_FAST);
- igt_assert(*spin[1]->batch == cmd);
start = gettime();
end = start + timeout;
@@ -343,7 +338,8 @@ static void active_ring(int fd, unsigned ring, int timeout)
igt_spin_end(s);
gem_sync(fd, s->handle);
- *s->batch = cmd;
+ igt_spin_reset(s);
+
gem_execbuf(fd, &s->execbuf);
}
cycles += 1024;
@@ -393,7 +389,6 @@ active_wakeup_ring(int fd, unsigned ring, int timeout, int wlen)
double end, this, elapsed, now, baseline;
unsigned long cycles;
igt_spin_t *spin[2];
- uint32_t cmd;
memset(&object, 0, sizeof(object));
object.handle = gem_create(fd, 4096);
@@ -409,7 +404,6 @@ active_wakeup_ring(int fd, unsigned ring, int timeout, int wlen)
.flags = (IGT_SPIN_POLL_RUN |
IGT_SPIN_FAST));
igt_assert(igt_spin_has_poll(spin[0]));
- cmd = *spin[0]->batch;
spin[1] = __igt_spin_new(fd,
.engine = execbuf.flags,
@@ -423,8 +417,8 @@ active_wakeup_ring(int fd, unsigned ring, int timeout, int wlen)
gem_sync(fd, object.handle);
for (int warmup = 0; warmup <= 1; warmup++) {
- *spin[0]->batch = cmd;
- spin[0]->poll[SPIN_POLL_START_IDX] = 0;
+ igt_spin_reset(spin[0]);
+
gem_execbuf(fd, &spin[0]->execbuf);
end = gettime() + timeout/10.;
@@ -433,8 +427,8 @@ active_wakeup_ring(int fd, unsigned ring, int timeout, int wlen)
do {
igt_spin_busywait_until_started(spin[0]);
- *spin[1]->batch = cmd;
- spin[1]->poll[SPIN_POLL_START_IDX] = 0;
+ igt_spin_reset(spin[1]);
+
gem_execbuf(fd, &spin[1]->execbuf);
this = gettime();
@@ -454,8 +448,8 @@ active_wakeup_ring(int fd, unsigned ring, int timeout, int wlen)
names[child % num_engines] ? " b" : "B",
cycles, elapsed*1e6/cycles);
- *spin[0]->batch = cmd;
- spin[0]->poll[SPIN_POLL_START_IDX] = 0;
+ igt_spin_reset(spin[0]);
+
gem_execbuf(fd, &spin[0]->execbuf);
end = gettime() + timeout;
@@ -467,8 +461,8 @@ active_wakeup_ring(int fd, unsigned ring, int timeout, int wlen)
for (int n = 0; n < wlen; n++)
gem_execbuf(fd, &execbuf);
- *spin[1]->batch = cmd;
- spin[1]->poll[SPIN_POLL_START_IDX] = 0;
+ igt_spin_reset(spin[1]);
+
gem_execbuf(fd, &spin[1]->execbuf);
this = gettime();
diff --git a/tests/perf_pmu.c b/tests/perf_pmu.c
index a8ad86ce..e719a292 100644
--- a/tests/perf_pmu.c
+++ b/tests/perf_pmu.c
@@ -1501,14 +1501,6 @@ test_enable_race(int gem_fd, const struct intel_execution_engine2 *e)
gem_quiescent_gpu(gem_fd);
}
-static void __rearm_spin(igt_spin_t *spin)
-{
- const uint32_t mi_arb_chk = 0x5 << 23;
-
- *spin->batch = mi_arb_chk;
- __sync_synchronize();
-}
-
#define __assert_within(x, ref, tol_up, tol_down) \
igt_assert_f((double)(x) <= ((double)(ref) + (tol_up)) && \
(double)(x) >= ((double)(ref) - (tol_down)), \
@@ -1596,7 +1588,7 @@ accuracy(int gem_fd, const struct intel_execution_engine2 *e,
nanosleep(&_ts, NULL);
/* Restart the spinbatch. */
- __rearm_spin(spin);
+ igt_spin_reset(spin);
__submit_spin(gem_fd, spin, e, 0);
/* PWM busy sleep. */
--
2.17.1
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH i-g-t 2/3] lib/igt_dummyload: Clarify batch mapping
2019-04-23 14:00 [PATCH i-g-t 1/3] lib/igt_dummyload: Introduce igt_spin_reset Mika Kuoppala
@ 2019-04-23 14:00 ` Mika Kuoppala
2019-04-23 14:12 ` Chris Wilson
2019-04-23 14:00 ` [PATCH i-g-t 3/3] lib/igt_dummyload: Send batch as first Mika Kuoppala
` (3 subsequent siblings)
4 siblings, 1 reply; 9+ messages in thread
From: Mika Kuoppala @ 2019-04-23 14:00 UTC (permalink / raw)
To: intel-gfx
Use spin->condition to mark the spot we have
saved for manipulating the looping condition.
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
lib/igt_dummyload.c | 66 ++++++++++++++++++++---------------
lib/igt_dummyload.h | 4 ++-
tests/i915/gem_exec_latency.c | 2 --
3 files changed, 40 insertions(+), 32 deletions(-)
diff --git a/lib/igt_dummyload.c b/lib/igt_dummyload.c
index 12465024..8b0a2a17 100644
--- a/lib/igt_dummyload.c
+++ b/lib/igt_dummyload.c
@@ -62,6 +62,8 @@
#define MI_ARB_CHK (0x5 << 23)
static const int BATCH_SIZE = 4096;
+static const int LOOP_START_OFFSET = 64;
+
static IGT_LIST(spin_list);
static pthread_mutex_t list_lock = PTHREAD_MUTEX_INITIALIZER;
@@ -78,7 +80,7 @@ emit_recursive_batch(igt_spin_t *spin,
unsigned int engines[16];
unsigned int nengine;
int fence_fd = -1;
- uint32_t *batch, *batch_start;
+ uint32_t *cs, *batch;
int i;
nengine = 0;
@@ -108,11 +110,12 @@ emit_recursive_batch(igt_spin_t *spin,
0, BATCH_SIZE, PROT_WRITE);
if (!batch)
batch = gem_mmap__gtt(fd, obj[BATCH].handle,
- BATCH_SIZE, PROT_WRITE);
+ BATCH_SIZE, PROT_WRITE);
+
gem_set_domain(fd, obj[BATCH].handle,
- I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
+ I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
execbuf->buffer_count++;
- batch_start = batch;
+ cs = batch;
if (opts->dependency) {
igt_assert(!(opts->flags & IGT_SPIN_POLL_RUN));
@@ -160,31 +163,34 @@ emit_recursive_batch(igt_spin_t *spin,
r->offset = sizeof(uint32_t) * 1;
r->delta = sizeof(uint32_t) * SPIN_POLL_START_IDX;
- *batch++ = MI_STORE_DWORD_IMM | (gen < 6 ? 1 << 22 : 0);
+ *cs++ = MI_STORE_DWORD_IMM | (gen < 6 ? 1 << 22 : 0);
if (gen >= 8) {
- *batch++ = r->presumed_offset + r->delta;
- *batch++ = 0;
+ *cs++ = r->presumed_offset + r->delta;
+ *cs++ = 0;
} else if (gen >= 4) {
- *batch++ = 0;
- *batch++ = r->presumed_offset + r->delta;
+ *cs++ = 0;
+ *cs++ = r->presumed_offset + r->delta;
r->offset += sizeof(uint32_t);
} else {
- batch[-1]--;
- *batch++ = r->presumed_offset + r->delta;
+ cs[-1]--;
+ *cs++ = r->presumed_offset + r->delta;
}
- *batch++ = 1;
+ *cs++ = 1;
execbuf->buffer_count++;
}
- spin->batch = batch = batch_start + 64 / sizeof(*batch);
spin->handle = obj[BATCH].handle;
+ igt_assert_lt(cs - batch, LOOP_START_OFFSET / sizeof(*cs));
+ spin->condition = batch + LOOP_START_OFFSET / sizeof(*cs);
+ cs = spin->condition;
+
/* Allow ourselves to be preempted */
if (!(opts->flags & IGT_SPIN_NO_PREEMPTION))
- *batch++ = MI_ARB_CHK;
+ *cs++ = MI_ARB_CHK;
/* Pad with a few nops so that we do not completely hog the system.
*
@@ -198,27 +204,27 @@ emit_recursive_batch(igt_spin_t *spin,
* trouble. See https://bugs.freedesktop.org/show_bug.cgi?id=102262
*/
if (!(opts->flags & IGT_SPIN_FAST))
- batch += 1000;
+ cs += 1000;
/* recurse */
r = &relocs[obj[BATCH].relocation_count++];
r->target_handle = obj[BATCH].handle;
- r->offset = (batch + 1 - batch_start) * sizeof(*batch);
+ r->offset = (cs + 1 - batch) * sizeof(*cs);
r->read_domains = I915_GEM_DOMAIN_COMMAND;
- r->delta = 64;
+ r->delta = LOOP_START_OFFSET;
if (gen >= 8) {
- *batch++ = MI_BATCH_BUFFER_START | 1 << 8 | 1;
- *batch++ = r->delta;
- *batch++ = 0;
+ *cs++ = MI_BATCH_BUFFER_START | 1 << 8 | 1;
+ *cs++ = r->delta;
+ *cs++ = 0;
} else if (gen >= 6) {
- *batch++ = MI_BATCH_BUFFER_START | 1 << 8;
- *batch++ = r->delta;
+ *cs++ = MI_BATCH_BUFFER_START | 1 << 8;
+ *cs++ = r->delta;
} else {
- *batch++ = MI_BATCH_BUFFER_START | 2 << 6;
+ *cs++ = MI_BATCH_BUFFER_START | 2 << 6;
if (gen < 4)
r->delta |= 1;
- *batch = r->delta;
- batch++;
+ *cs = r->delta;
+ cs++;
}
obj[BATCH].relocs_ptr = to_user_pointer(relocs);
@@ -252,6 +258,8 @@ emit_recursive_batch(igt_spin_t *spin,
}
}
+ igt_assert_lt(cs - batch, BATCH_SIZE / sizeof(*cs));
+
/* Make it easier for callers to resubmit. */
obj[BATCH].relocation_count = 0;
@@ -260,7 +268,7 @@ emit_recursive_batch(igt_spin_t *spin,
obj[SCRATCH].flags = EXEC_OBJECT_PINNED;
obj[BATCH].flags = EXEC_OBJECT_PINNED;
- spin->cmd_precondition = *spin->batch;
+ spin->cmd_precondition = *spin->condition;
return fence_fd;
}
@@ -382,7 +390,7 @@ void igt_spin_reset(igt_spin_t *spin)
if (igt_spin_has_poll(spin))
spin->poll[SPIN_POLL_START_IDX] = 0;
- *spin->batch = spin->cmd_precondition;
+ *spin->condition = spin->cmd_precondition;
__sync_synchronize();
}
@@ -397,7 +405,7 @@ void igt_spin_end(igt_spin_t *spin)
if (!spin)
return;
- *spin->batch = MI_BATCH_BUFFER_END;
+ *spin->condition = MI_BATCH_BUFFER_END;
__sync_synchronize();
}
@@ -422,7 +430,7 @@ void igt_spin_free(int fd, igt_spin_t *spin)
timer_delete(spin->timer);
igt_spin_end(spin);
- gem_munmap((void *)((unsigned long)spin->batch & (~4095UL)),
+ gem_munmap((void *)((unsigned long)spin->condition & (~4095UL)),
BATCH_SIZE);
if (spin->poll) {
diff --git a/lib/igt_dummyload.h b/lib/igt_dummyload.h
index 34537f27..61a9f2fc 100644
--- a/lib/igt_dummyload.h
+++ b/lib/igt_dummyload.h
@@ -36,8 +36,10 @@ typedef struct igt_spin {
unsigned int handle;
timer_t timer;
struct igt_list link;
- uint32_t *batch;
+
+ uint32_t *condition;
uint32_t cmd_precondition;
+
int out_fence;
struct drm_i915_gem_exec_object2 obj[2];
struct drm_i915_gem_execbuffer2 execbuf;
diff --git a/tests/i915/gem_exec_latency.c b/tests/i915/gem_exec_latency.c
index 2cfb78bf..e56d6278 100644
--- a/tests/i915/gem_exec_latency.c
+++ b/tests/i915/gem_exec_latency.c
@@ -83,8 +83,6 @@ poll_ring(int fd, unsigned ring, const char *name)
spin[1] = __igt_spin_factory(fd, &opts);
igt_assert(igt_spin_has_poll(spin[1]));
- igt_assert(*spin[0]->batch == *spin[1]->batch);
-
igt_spin_end(spin[0]);
igt_spin_busywait_until_started(spin[1]);
--
2.17.1
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH i-g-t 3/3] lib/igt_dummyload: Send batch as first
2019-04-23 14:00 [PATCH i-g-t 1/3] lib/igt_dummyload: Introduce igt_spin_reset Mika Kuoppala
2019-04-23 14:00 ` [PATCH i-g-t 2/3] lib/igt_dummyload: Clarify batch mapping Mika Kuoppala
@ 2019-04-23 14:00 ` Mika Kuoppala
2019-04-23 14:58 ` Chris Wilson
2019-04-23 14:10 ` [PATCH i-g-t 1/3] lib/igt_dummyload: Introduce igt_spin_reset Chris Wilson
` (2 subsequent siblings)
4 siblings, 1 reply; 9+ messages in thread
From: Mika Kuoppala @ 2019-04-23 14:00 UTC (permalink / raw)
To: intel-gfx
To simplify emitting the recursive batch, make batch
always the first object on the execbuf list.
v2: set handles early, poll_ptr indecency (Chris)
v3: allow dep with poll
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
lib/igt_dummyload.c | 124 ++++++++++++++++----------------
lib/igt_dummyload.h | 8 ++-
tests/i915/gem_concurrent_all.c | 3 +-
tests/i915/gem_exec_schedule.c | 14 ++--
tests/i915/gem_softpin.c | 2 +-
tests/i915/gem_spin_batch.c | 16 ++---
tests/i915/i915_hangman.c | 2 +-
7 files changed, 86 insertions(+), 83 deletions(-)
diff --git a/lib/igt_dummyload.c b/lib/igt_dummyload.c
index 8b0a2a17..dbcc3711 100644
--- a/lib/igt_dummyload.c
+++ b/lib/igt_dummyload.c
@@ -62,6 +62,7 @@
#define MI_ARB_CHK (0x5 << 23)
static const int BATCH_SIZE = 4096;
+static const int POLL_SIZE = 4096;
static const int LOOP_START_OFFSET = 64;
static IGT_LIST(spin_list);
@@ -71,16 +72,19 @@ static int
emit_recursive_batch(igt_spin_t *spin,
int fd, const struct igt_spin_factory *opts)
{
-#define SCRATCH 0
-#define BATCH 1
const int gen = intel_gen(intel_get_drm_devid(fd));
- struct drm_i915_gem_relocation_entry relocs[2], *r;
+ struct drm_i915_gem_exec_object2 * const batch =
+ &spin->_obj[SPIN_OBJ_BATCH];
+ struct drm_i915_gem_exec_object2 * const poll =
+ &spin->_obj[SPIN_OBJ_POLL];
+ struct drm_i915_gem_exec_object2 * const dep =
+ &spin->_obj[SPIN_OBJ_DEP];
+ struct drm_i915_gem_relocation_entry relocs[3], *r;
struct drm_i915_gem_execbuffer2 *execbuf;
- struct drm_i915_gem_exec_object2 *obj;
unsigned int engines[16];
unsigned int nengine;
int fence_fd = -1;
- uint32_t *cs, *batch;
+ uint32_t *cs, *batch_start;
int i;
nengine = 0;
@@ -101,65 +105,49 @@ emit_recursive_batch(igt_spin_t *spin,
memset(&spin->execbuf, 0, sizeof(spin->execbuf));
execbuf = &spin->execbuf;
- memset(spin->obj, 0, sizeof(spin->obj));
- obj = spin->obj;
+ memset(spin->_obj, 0, sizeof(spin->_obj));
memset(relocs, 0, sizeof(relocs));
- obj[BATCH].handle = gem_create(fd, BATCH_SIZE);
- batch = __gem_mmap__wc(fd, obj[BATCH].handle,
- 0, BATCH_SIZE, PROT_WRITE);
- if (!batch)
- batch = gem_mmap__gtt(fd, obj[BATCH].handle,
- BATCH_SIZE, PROT_WRITE);
+ batch->handle = gem_create(fd, BATCH_SIZE);
+ spin->handle = batch->handle;
- gem_set_domain(fd, obj[BATCH].handle,
+ batch_start = __gem_mmap__wc(fd, batch->handle,
+ 0, BATCH_SIZE, PROT_WRITE);
+ if (!batch_start)
+ batch_start = gem_mmap__gtt(fd, batch->handle,
+ BATCH_SIZE, PROT_WRITE);
+ gem_set_domain(fd, batch->handle,
I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
execbuf->buffer_count++;
- cs = batch;
+ cs = batch_start;
- if (opts->dependency) {
- igt_assert(!(opts->flags & IGT_SPIN_POLL_RUN));
-
- r = &relocs[obj[BATCH].relocation_count++];
-
- /* dummy write to dependency */
- obj[SCRATCH].handle = opts->dependency;
- r->presumed_offset = 0;
- r->target_handle = obj[SCRATCH].handle;
- r->offset = sizeof(uint32_t) * 1020;
- r->delta = 0;
- r->read_domains = I915_GEM_DOMAIN_RENDER;
- r->write_domain = I915_GEM_DOMAIN_RENDER;
-
- execbuf->buffer_count++;
- } else if (opts->flags & IGT_SPIN_POLL_RUN) {
- r = &relocs[obj[BATCH].relocation_count++];
+ poll->handle = gem_create(fd, POLL_SIZE);
+ spin->poll_handle = poll->handle;
+ execbuf->buffer_count++;
- igt_assert(!opts->dependency);
+ if (opts->flags & IGT_SPIN_POLL_RUN) {
+ r = &relocs[batch->relocation_count++];
if (gen == 4 || gen == 5) {
execbuf->flags |= I915_EXEC_SECURE;
igt_require(__igt_device_set_master(fd) == 0);
}
- spin->poll_handle = gem_create(fd, 4096);
- obj[SCRATCH].handle = spin->poll_handle;
-
- if (__gem_set_caching(fd, spin->poll_handle,
+ if (__gem_set_caching(fd, poll->handle,
I915_CACHING_CACHED) == 0)
- spin->poll = gem_mmap__cpu(fd, spin->poll_handle,
- 0, 4096,
+ spin->poll = gem_mmap__cpu(fd, poll->handle,
+ 0, POLL_SIZE,
PROT_READ | PROT_WRITE);
else
- spin->poll = gem_mmap__wc(fd, spin->poll_handle,
- 0, 4096,
+ spin->poll = gem_mmap__wc(fd, poll->handle,
+ 0, POLL_SIZE,
PROT_READ | PROT_WRITE);
igt_assert_eq(spin->poll[SPIN_POLL_START_IDX], 0);
/* batch is first */
- r->presumed_offset = 4096;
- r->target_handle = obj[SCRATCH].handle;
+ r->presumed_offset = BATCH_SIZE;
+ r->target_handle = poll->handle;
r->offset = sizeof(uint32_t) * 1;
r->delta = sizeof(uint32_t) * SPIN_POLL_START_IDX;
@@ -178,14 +166,25 @@ emit_recursive_batch(igt_spin_t *spin,
}
*cs++ = 1;
+ }
+
+ if (opts->dependency) {
+ r = &relocs[batch->relocation_count++];
+
+ /* dummy write to dependency */
+ dep->handle = opts->dependency;
+ r->presumed_offset = BATCH_SIZE + POLL_SIZE;
+ r->target_handle = dep->handle;
+ r->offset = sizeof(uint32_t) * 1020;
+ r->delta = 0;
+ r->read_domains = I915_GEM_DOMAIN_RENDER;
+ r->write_domain = I915_GEM_DOMAIN_RENDER;
execbuf->buffer_count++;
}
- spin->handle = obj[BATCH].handle;
-
- igt_assert_lt(cs - batch, LOOP_START_OFFSET / sizeof(*cs));
- spin->condition = batch + LOOP_START_OFFSET / sizeof(*cs);
+ igt_assert_lt(cs - batch_start, LOOP_START_OFFSET / sizeof(*cs));
+ spin->condition = batch_start + LOOP_START_OFFSET / sizeof(*cs);
cs = spin->condition;
/* Allow ourselves to be preempted */
@@ -207,9 +206,9 @@ emit_recursive_batch(igt_spin_t *spin,
cs += 1000;
/* recurse */
- r = &relocs[obj[BATCH].relocation_count++];
- r->target_handle = obj[BATCH].handle;
- r->offset = (cs + 1 - batch) * sizeof(*cs);
+ r = &relocs[batch->relocation_count++];
+ r->target_handle = batch->handle;
+ r->offset = (cs + 1 - batch_start) * sizeof(*cs);
r->read_domains = I915_GEM_DOMAIN_COMMAND;
r->delta = LOOP_START_OFFSET;
if (gen >= 8) {
@@ -226,10 +225,10 @@ emit_recursive_batch(igt_spin_t *spin,
*cs = r->delta;
cs++;
}
- obj[BATCH].relocs_ptr = to_user_pointer(relocs);
+ batch->relocs_ptr = to_user_pointer(relocs);
- execbuf->buffers_ptr = to_user_pointer(obj +
- (2 - execbuf->buffer_count));
+ execbuf->buffers_ptr = to_user_pointer(spin->_obj);
+ execbuf->flags |= I915_EXEC_BATCH_FIRST;
execbuf->rsvd1 = opts->ctx;
if (opts->flags & IGT_SPIN_FENCE_OUT)
@@ -258,15 +257,13 @@ emit_recursive_batch(igt_spin_t *spin,
}
}
- igt_assert_lt(cs - batch, BATCH_SIZE / sizeof(*cs));
-
- /* Make it easier for callers to resubmit. */
+ igt_assert_lt(cs - batch_start, BATCH_SIZE / sizeof(*cs));
- obj[BATCH].relocation_count = 0;
- obj[BATCH].relocs_ptr = 0;
-
- obj[SCRATCH].flags = EXEC_OBJECT_PINNED;
- obj[BATCH].flags = EXEC_OBJECT_PINNED;
+ for (i = 0; i < execbuf->buffer_count; i++) {
+ spin->_obj[i].relocation_count = 0;
+ spin->_obj[i].relocs_ptr = 0;
+ spin->_obj[i].flags = EXEC_OBJECT_PINNED;
+ }
spin->cmd_precondition = *spin->condition;
@@ -433,11 +430,10 @@ void igt_spin_free(int fd, igt_spin_t *spin)
gem_munmap((void *)((unsigned long)spin->condition & (~4095UL)),
BATCH_SIZE);
- if (spin->poll) {
+ if (spin->poll)
gem_munmap(spin->poll, 4096);
- gem_close(fd, spin->poll_handle);
- }
+ gem_close(fd, spin->poll_handle);
gem_close(fd, spin->handle);
if (spin->out_fence >= 0)
diff --git a/lib/igt_dummyload.h b/lib/igt_dummyload.h
index 61a9f2fc..3306a2fc 100644
--- a/lib/igt_dummyload.h
+++ b/lib/igt_dummyload.h
@@ -34,6 +34,7 @@
typedef struct igt_spin {
unsigned int handle;
+
timer_t timer;
struct igt_list link;
@@ -41,8 +42,13 @@ typedef struct igt_spin {
uint32_t cmd_precondition;
int out_fence;
- struct drm_i915_gem_exec_object2 obj[2];
+
+ struct drm_i915_gem_exec_object2 _obj[3];
+#define SPIN_OBJ_BATCH 0
+#define SPIN_OBJ_POLL 1
+#define SPIN_OBJ_DEP 2
struct drm_i915_gem_execbuffer2 execbuf;
+
uint32_t poll_handle;
uint32_t *poll;
#define SPIN_POLL_START_IDX 0
diff --git a/tests/i915/gem_concurrent_all.c b/tests/i915/gem_concurrent_all.c
index 3ddaab82..b5377191 100644
--- a/tests/i915/gem_concurrent_all.c
+++ b/tests/i915/gem_concurrent_all.c
@@ -957,7 +957,8 @@ static igt_hang_t all_hang(void)
if (engine == I915_EXEC_RENDER)
continue;
- eb.flags = engine;
+ eb.flags &= ~(I915_EXEC_RING_MASK | I915_EXEC_BSD_MASK);
+ eb.flags |= engine;
__gem_execbuf(fd, &eb);
}
diff --git a/tests/i915/gem_exec_schedule.c b/tests/i915/gem_exec_schedule.c
index 9a079528..4f1243d9 100644
--- a/tests/i915/gem_exec_schedule.c
+++ b/tests/i915/gem_exec_schedule.c
@@ -223,11 +223,11 @@ static void independent(int fd, unsigned int engine)
if (spin == NULL) {
spin = __igt_spin_new(fd, .engine = other);
} else {
- struct drm_i915_gem_execbuffer2 eb = {
- .buffer_count = 1,
- .buffers_ptr = to_user_pointer(&spin->obj[1]),
- .flags = other,
- };
+ struct drm_i915_gem_execbuffer2 eb = spin->execbuf;
+
+ eb.flags &= ~(I915_EXEC_RING_MASK | I915_EXEC_BSD_MASK);
+ eb.flags |= other;
+
gem_execbuf(fd, &eb);
}
@@ -619,8 +619,8 @@ static igt_spin_t *__noise(int fd, uint32_t ctx, int prio, igt_spin_t *spin)
.engine = other);
} else {
struct drm_i915_gem_execbuffer2 eb = {
- .buffer_count = 1,
- .buffers_ptr = to_user_pointer(&spin->obj[1]),
+ .buffer_count = spin->execbuf.buffer_count,
+ .buffers_ptr = to_user_pointer(&spin->_obj[SPIN_OBJ_BATCH]),
.rsvd1 = ctx,
.flags = other,
};
diff --git a/tests/i915/gem_softpin.c b/tests/i915/gem_softpin.c
index 336008b8..6c938d5a 100644
--- a/tests/i915/gem_softpin.c
+++ b/tests/i915/gem_softpin.c
@@ -360,7 +360,7 @@ static void test_evict_hang(int fd)
execbuf.buffer_count = 1;
hang = igt_hang_ctx(fd, 0, 0, 0);
- expected = hang.spin->obj[1].offset;
+ expected = hang.spin->_obj[SPIN_OBJ_BATCH].offset;
/* Replace the hung batch with ourselves, forcing an eviction */
object.offset = expected;
diff --git a/tests/i915/gem_spin_batch.c b/tests/i915/gem_spin_batch.c
index a92672b8..a8af8d1e 100644
--- a/tests/i915/gem_spin_batch.c
+++ b/tests/i915/gem_spin_batch.c
@@ -77,28 +77,28 @@ static void spin_resubmit(int fd, unsigned int engine, unsigned int flags)
igt_spin_t *spin = __igt_spin_new(fd, .ctx = ctx0, .engine = engine);
unsigned int other;
- struct drm_i915_gem_execbuffer2 eb = {
- .buffer_count = 1,
- .buffers_ptr = to_user_pointer(&spin->obj[1]),
- .rsvd1 = ctx1,
- };
+ struct drm_i915_gem_execbuffer2 eb = spin->execbuf;
+
+ eb.rsvd1 = ctx1;
if (flags & RESUBMIT_ALL_ENGINES) {
for_each_physical_engine(fd, other) {
if (other == engine)
continue;
- eb.flags = other;
+ eb.flags &= ~(I915_EXEC_RING_MASK | I915_EXEC_BSD_MASK);
+ eb.flags |= other;
gem_execbuf(fd, &eb);
}
} else {
- eb.flags = engine;
+ eb.flags &= ~(I915_EXEC_RING_MASK | I915_EXEC_BSD_MASK);
+ eb.flags |= engine;
gem_execbuf(fd, &eb);
}
igt_spin_end(spin);
- gem_sync(fd, spin->obj[1].handle);
+ gem_sync(fd, spin->handle);
igt_spin_free(fd, spin);
diff --git a/tests/i915/i915_hangman.c b/tests/i915/i915_hangman.c
index 9a1d5889..519f3654 100644
--- a/tests/i915/i915_hangman.c
+++ b/tests/i915/i915_hangman.c
@@ -209,7 +209,7 @@ static void test_error_state_capture(unsigned ring_id,
clear_error_state();
hang = igt_hang_ctx(device, 0, ring_id, HANG_ALLOW_CAPTURE);
- offset = hang.spin->obj[1].offset;
+ offset = hang.spin->_obj[SPIN_OBJ_BATCH].offset;
batch = gem_mmap__cpu(device, hang.spin->handle, 0, 4096, PROT_READ);
gem_set_domain(device, hang.spin->handle, I915_GEM_DOMAIN_CPU, 0);
--
2.17.1
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^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH i-g-t 1/3] lib/igt_dummyload: Introduce igt_spin_reset
2019-04-23 14:00 [PATCH i-g-t 1/3] lib/igt_dummyload: Introduce igt_spin_reset Mika Kuoppala
2019-04-23 14:00 ` [PATCH i-g-t 2/3] lib/igt_dummyload: Clarify batch mapping Mika Kuoppala
2019-04-23 14:00 ` [PATCH i-g-t 3/3] lib/igt_dummyload: Send batch as first Mika Kuoppala
@ 2019-04-23 14:10 ` Chris Wilson
2019-04-23 14:15 ` Mika Kuoppala
2019-04-23 15:32 ` ✓ Fi.CI.BAT: success for series starting with [1/3] lib/igt_dummyload: Introduce igt_spin_reset (rev2) Patchwork
2019-04-23 19:25 ` ✓ Fi.CI.IGT: " Patchwork
4 siblings, 1 reply; 9+ messages in thread
From: Chris Wilson @ 2019-04-23 14:10 UTC (permalink / raw)
To: Mika Kuoppala, intel-gfx
Quoting Mika Kuoppala (2019-04-23 15:00:36)
> Libify resetting a spin for reuse.
>
> v2: use also in perf_pmu
> v3: s/cmd_spin/cmd_precondition
>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> ---
> lib/igt_dummyload.c | 20 ++++++++++++++++++++
> lib/igt_dummyload.h | 2 ++
> tests/i915/gem_exec_latency.c | 19 ++++---------------
> tests/i915/gem_sync.c | 34 ++++++++++++++--------------------
> tests/perf_pmu.c | 10 +---------
> 5 files changed, 41 insertions(+), 44 deletions(-)
>
> diff --git a/lib/igt_dummyload.c b/lib/igt_dummyload.c
> index 1d57a53c..12465024 100644
> --- a/lib/igt_dummyload.c
> +++ b/lib/igt_dummyload.c
> @@ -260,6 +260,8 @@ emit_recursive_batch(igt_spin_t *spin,
> obj[SCRATCH].flags = EXEC_OBJECT_PINNED;
> obj[BATCH].flags = EXEC_OBJECT_PINNED;
>
> + spin->cmd_precondition = *spin->batch;
> +
> return fence_fd;
> }
>
> @@ -366,6 +368,24 @@ void igt_spin_set_timeout(igt_spin_t *spin, int64_t ns)
> spin->timer = timer;
> }
>
> +/**
> + * igt_spin_reset:
> + * @spin: spin state from igt_spin_new()
> + *
> + * Reset the state of spin, allowing its reuse.
> + */
> +void igt_spin_reset(igt_spin_t *spin)
> +{
> + if (!spin)
> + return;
Do we need to be defensive here? Being kind for cleanup, yes, but this
is runtime and users should have a valid spinner.
Other than that nit,
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH i-g-t 2/3] lib/igt_dummyload: Clarify batch mapping
2019-04-23 14:00 ` [PATCH i-g-t 2/3] lib/igt_dummyload: Clarify batch mapping Mika Kuoppala
@ 2019-04-23 14:12 ` Chris Wilson
0 siblings, 0 replies; 9+ messages in thread
From: Chris Wilson @ 2019-04-23 14:12 UTC (permalink / raw)
To: Mika Kuoppala, intel-gfx
Quoting Mika Kuoppala (2019-04-23 15:00:37)
> Use spin->condition to mark the spot we have
> saved for manipulating the looping condition.
... to make the batch variable available for later reuse as a pointer to
the object instead.
Tell use why! Then tell us how you went about to accomplish that goal
and what problems had to be resolved en route.
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
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^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH i-g-t 1/3] lib/igt_dummyload: Introduce igt_spin_reset
2019-04-23 14:10 ` [PATCH i-g-t 1/3] lib/igt_dummyload: Introduce igt_spin_reset Chris Wilson
@ 2019-04-23 14:15 ` Mika Kuoppala
0 siblings, 0 replies; 9+ messages in thread
From: Mika Kuoppala @ 2019-04-23 14:15 UTC (permalink / raw)
To: intel-gfx
Libify resetting a spin for reuse.
v2: use also in perf_pmu
v3: s/cmd_spin/cmd_precondition
v4: remove early return for !spin (Chris)
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
---
lib/igt_dummyload.c | 17 +++++++++++++++++
lib/igt_dummyload.h | 2 ++
tests/i915/gem_exec_latency.c | 19 ++++---------------
tests/i915/gem_sync.c | 34 ++++++++++++++--------------------
tests/perf_pmu.c | 10 +---------
5 files changed, 38 insertions(+), 44 deletions(-)
diff --git a/lib/igt_dummyload.c b/lib/igt_dummyload.c
index 1d57a53c..65957ed1 100644
--- a/lib/igt_dummyload.c
+++ b/lib/igt_dummyload.c
@@ -260,6 +260,8 @@ emit_recursive_batch(igt_spin_t *spin,
obj[SCRATCH].flags = EXEC_OBJECT_PINNED;
obj[BATCH].flags = EXEC_OBJECT_PINNED;
+ spin->cmd_precondition = *spin->batch;
+
return fence_fd;
}
@@ -366,6 +368,21 @@ void igt_spin_set_timeout(igt_spin_t *spin, int64_t ns)
spin->timer = timer;
}
+/**
+ * igt_spin_reset:
+ * @spin: spin state from igt_spin_new()
+ *
+ * Reset the state of spin, allowing its reuse.
+ */
+void igt_spin_reset(igt_spin_t *spin)
+{
+ if (igt_spin_has_poll(spin))
+ spin->poll[SPIN_POLL_START_IDX] = 0;
+
+ *spin->batch = spin->cmd_precondition;
+ __sync_synchronize();
+}
+
/**
* igt_spin_end:
* @spin: spin state from igt_spin_new()
diff --git a/lib/igt_dummyload.h b/lib/igt_dummyload.h
index d6482089..34537f27 100644
--- a/lib/igt_dummyload.h
+++ b/lib/igt_dummyload.h
@@ -37,6 +37,7 @@ typedef struct igt_spin {
timer_t timer;
struct igt_list link;
uint32_t *batch;
+ uint32_t cmd_precondition;
int out_fence;
struct drm_i915_gem_exec_object2 obj[2];
struct drm_i915_gem_execbuffer2 execbuf;
@@ -68,6 +69,7 @@ igt_spin_factory(int fd, const struct igt_spin_factory *opts);
igt_spin_factory(fd, &((struct igt_spin_factory){__VA_ARGS__}))
void igt_spin_set_timeout(igt_spin_t *spin, int64_t ns);
+void igt_spin_reset(igt_spin_t *spin);
void igt_spin_end(igt_spin_t *spin);
void igt_spin_free(int fd, igt_spin_t *spin);
diff --git a/tests/i915/gem_exec_latency.c b/tests/i915/gem_exec_latency.c
index 6b7dfbc0..2cfb78bf 100644
--- a/tests/i915/gem_exec_latency.c
+++ b/tests/i915/gem_exec_latency.c
@@ -73,19 +73,17 @@ poll_ring(int fd, unsigned ring, const char *name)
unsigned long cycles;
igt_spin_t *spin[2];
uint64_t elapsed;
- uint32_t cmd;
gem_require_ring(fd, ring);
igt_require(gem_can_store_dword(fd, ring));
spin[0] = __igt_spin_factory(fd, &opts);
igt_assert(igt_spin_has_poll(spin[0]));
- cmd = *spin[0]->batch;
spin[1] = __igt_spin_factory(fd, &opts);
igt_assert(igt_spin_has_poll(spin[1]));
- igt_assert(cmd == *spin[1]->batch);
+ igt_assert(*spin[0]->batch == *spin[1]->batch);
igt_spin_end(spin[0]);
igt_spin_busywait_until_started(spin[1]);
@@ -96,8 +94,8 @@ poll_ring(int fd, unsigned ring, const char *name)
while ((elapsed = igt_nsec_elapsed(&tv)) < 2ull << 30) {
const unsigned int idx = cycles++ & 1;
- *spin[idx]->batch = cmd;
- spin[idx]->poll[SPIN_POLL_START_IDX] = 0;
+ igt_spin_reset(spin[idx]);
+
gem_execbuf(fd, &spin[idx]->execbuf);
igt_spin_end(spin[!idx]);
@@ -414,15 +412,6 @@ static void latency_from_ring(int fd,
}
}
-static void __rearm_spin(igt_spin_t *spin)
-{
- const uint32_t mi_arb_chk = 0x5 << 23;
-
- *spin->batch = mi_arb_chk;
- spin->poll[SPIN_POLL_START_IDX] = 0;
- __sync_synchronize();
-}
-
static void
__submit_spin(int fd, igt_spin_t *spin, unsigned int flags)
{
@@ -557,7 +546,7 @@ rthog_latency_on_ring(int fd, unsigned int engine, const char *name, unsigned in
if (nengine > 1)
usleep(10*nengine);
- __rearm_spin(spin);
+ igt_spin_reset(spin);
igt_nsec_elapsed(&ts);
__submit_spin(fd, spin, engine);
diff --git a/tests/i915/gem_sync.c b/tests/i915/gem_sync.c
index f17ecd0b..8c5aaa14 100644
--- a/tests/i915/gem_sync.c
+++ b/tests/i915/gem_sync.c
@@ -209,7 +209,6 @@ wakeup_ring(int fd, unsigned ring, int timeout, int wlen)
struct drm_i915_gem_execbuffer2 execbuf;
double end, this, elapsed, now, baseline;
unsigned long cycles;
- uint32_t cmd;
igt_spin_t *spin;
memset(&object, 0, sizeof(object));
@@ -226,7 +225,6 @@ wakeup_ring(int fd, unsigned ring, int timeout, int wlen)
.flags = (IGT_SPIN_POLL_RUN |
IGT_SPIN_FAST));
igt_assert(igt_spin_has_poll(spin));
- cmd = *spin->batch;
gem_execbuf(fd, &execbuf);
@@ -238,8 +236,8 @@ wakeup_ring(int fd, unsigned ring, int timeout, int wlen)
elapsed = 0;
cycles = 0;
do {
- *spin->batch = cmd;
- spin->poll[SPIN_POLL_START_IDX] = 0;
+ igt_spin_reset(spin);
+
gem_execbuf(fd, &spin->execbuf);
igt_spin_busywait_until_started(spin);
@@ -262,8 +260,8 @@ wakeup_ring(int fd, unsigned ring, int timeout, int wlen)
elapsed = 0;
cycles = 0;
do {
- *spin->batch = cmd;
- spin->poll[SPIN_POLL_START_IDX] = 0;
+ igt_spin_reset(spin);
+
gem_execbuf(fd, &spin->execbuf);
igt_spin_busywait_until_started(spin);
@@ -321,17 +319,14 @@ static void active_ring(int fd, unsigned ring, int timeout)
double start, end, elapsed;
unsigned long cycles;
igt_spin_t *spin[2];
- uint32_t cmd;
spin[0] = __igt_spin_new(fd,
.engine = ring,
.flags = IGT_SPIN_FAST);
- cmd = *spin[0]->batch;
spin[1] = __igt_spin_new(fd,
.engine = ring,
.flags = IGT_SPIN_FAST);
- igt_assert(*spin[1]->batch == cmd);
start = gettime();
end = start + timeout;
@@ -343,7 +338,8 @@ static void active_ring(int fd, unsigned ring, int timeout)
igt_spin_end(s);
gem_sync(fd, s->handle);
- *s->batch = cmd;
+ igt_spin_reset(s);
+
gem_execbuf(fd, &s->execbuf);
}
cycles += 1024;
@@ -393,7 +389,6 @@ active_wakeup_ring(int fd, unsigned ring, int timeout, int wlen)
double end, this, elapsed, now, baseline;
unsigned long cycles;
igt_spin_t *spin[2];
- uint32_t cmd;
memset(&object, 0, sizeof(object));
object.handle = gem_create(fd, 4096);
@@ -409,7 +404,6 @@ active_wakeup_ring(int fd, unsigned ring, int timeout, int wlen)
.flags = (IGT_SPIN_POLL_RUN |
IGT_SPIN_FAST));
igt_assert(igt_spin_has_poll(spin[0]));
- cmd = *spin[0]->batch;
spin[1] = __igt_spin_new(fd,
.engine = execbuf.flags,
@@ -423,8 +417,8 @@ active_wakeup_ring(int fd, unsigned ring, int timeout, int wlen)
gem_sync(fd, object.handle);
for (int warmup = 0; warmup <= 1; warmup++) {
- *spin[0]->batch = cmd;
- spin[0]->poll[SPIN_POLL_START_IDX] = 0;
+ igt_spin_reset(spin[0]);
+
gem_execbuf(fd, &spin[0]->execbuf);
end = gettime() + timeout/10.;
@@ -433,8 +427,8 @@ active_wakeup_ring(int fd, unsigned ring, int timeout, int wlen)
do {
igt_spin_busywait_until_started(spin[0]);
- *spin[1]->batch = cmd;
- spin[1]->poll[SPIN_POLL_START_IDX] = 0;
+ igt_spin_reset(spin[1]);
+
gem_execbuf(fd, &spin[1]->execbuf);
this = gettime();
@@ -454,8 +448,8 @@ active_wakeup_ring(int fd, unsigned ring, int timeout, int wlen)
names[child % num_engines] ? " b" : "B",
cycles, elapsed*1e6/cycles);
- *spin[0]->batch = cmd;
- spin[0]->poll[SPIN_POLL_START_IDX] = 0;
+ igt_spin_reset(spin[0]);
+
gem_execbuf(fd, &spin[0]->execbuf);
end = gettime() + timeout;
@@ -467,8 +461,8 @@ active_wakeup_ring(int fd, unsigned ring, int timeout, int wlen)
for (int n = 0; n < wlen; n++)
gem_execbuf(fd, &execbuf);
- *spin[1]->batch = cmd;
- spin[1]->poll[SPIN_POLL_START_IDX] = 0;
+ igt_spin_reset(spin[1]);
+
gem_execbuf(fd, &spin[1]->execbuf);
this = gettime();
diff --git a/tests/perf_pmu.c b/tests/perf_pmu.c
index a8ad86ce..e719a292 100644
--- a/tests/perf_pmu.c
+++ b/tests/perf_pmu.c
@@ -1501,14 +1501,6 @@ test_enable_race(int gem_fd, const struct intel_execution_engine2 *e)
gem_quiescent_gpu(gem_fd);
}
-static void __rearm_spin(igt_spin_t *spin)
-{
- const uint32_t mi_arb_chk = 0x5 << 23;
-
- *spin->batch = mi_arb_chk;
- __sync_synchronize();
-}
-
#define __assert_within(x, ref, tol_up, tol_down) \
igt_assert_f((double)(x) <= ((double)(ref) + (tol_up)) && \
(double)(x) >= ((double)(ref) - (tol_down)), \
@@ -1596,7 +1588,7 @@ accuracy(int gem_fd, const struct intel_execution_engine2 *e,
nanosleep(&_ts, NULL);
/* Restart the spinbatch. */
- __rearm_spin(spin);
+ igt_spin_reset(spin);
__submit_spin(gem_fd, spin, e, 0);
/* PWM busy sleep. */
--
2.17.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH i-g-t 3/3] lib/igt_dummyload: Send batch as first
2019-04-23 14:00 ` [PATCH i-g-t 3/3] lib/igt_dummyload: Send batch as first Mika Kuoppala
@ 2019-04-23 14:58 ` Chris Wilson
0 siblings, 0 replies; 9+ messages in thread
From: Chris Wilson @ 2019-04-23 14:58 UTC (permalink / raw)
To: Mika Kuoppala, intel-gfx
Quoting Mika Kuoppala (2019-04-23 15:00:38)
> @@ -41,8 +42,13 @@ typedef struct igt_spin {
> uint32_t cmd_precondition;
>
> int out_fence;
> - struct drm_i915_gem_exec_object2 obj[2];
> +
> + struct drm_i915_gem_exec_object2 _obj[3];
> +#define SPIN_OBJ_BATCH 0
> +#define SPIN_OBJ_POLL 1
> +#define SPIN_OBJ_DEP 2
I don't see the purpose in _obj[] if we keep on using it directly. Can
you please split this into a separate patch (the introduction of the
named indices and conversion of callers, but keep spin->obj[]).
If you have reason later to hide spin->obj[], by all means do introduce
spin->__obj[] with the helpers to hide it.
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* ✓ Fi.CI.BAT: success for series starting with [1/3] lib/igt_dummyload: Introduce igt_spin_reset (rev2)
2019-04-23 14:00 [PATCH i-g-t 1/3] lib/igt_dummyload: Introduce igt_spin_reset Mika Kuoppala
` (2 preceding siblings ...)
2019-04-23 14:10 ` [PATCH i-g-t 1/3] lib/igt_dummyload: Introduce igt_spin_reset Chris Wilson
@ 2019-04-23 15:32 ` Patchwork
2019-04-23 19:25 ` ✓ Fi.CI.IGT: " Patchwork
4 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2019-04-23 15:32 UTC (permalink / raw)
To: Mika Kuoppala; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/3] lib/igt_dummyload: Introduce igt_spin_reset (rev2)
URL : https://patchwork.freedesktop.org/series/59830/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5971 -> IGTPW_2906
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://patchwork.freedesktop.org/api/1.0/series/59830/revisions/2/mbox/
Known issues
------------
Here are the changes found in IGTPW_2906 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_selftest@live_contexts:
- fi-skl-gvtdvm: [PASS][1] -> [DMESG-FAIL][2] ([fdo#110235 ])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5971/fi-skl-gvtdvm/igt@i915_selftest@live_contexts.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2906/fi-skl-gvtdvm/igt@i915_selftest@live_contexts.html
* igt@i915_selftest@live_execlists:
- fi-apl-guc: [PASS][3] -> [INCOMPLETE][4] ([fdo#103927] / [fdo#109720])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5971/fi-apl-guc/igt@i915_selftest@live_execlists.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2906/fi-apl-guc/igt@i915_selftest@live_execlists.html
* igt@runner@aborted:
- fi-apl-guc: NOTRUN -> [FAIL][5] ([fdo#108622] / [fdo#109720])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2906/fi-apl-guc/igt@runner@aborted.html
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#108622]: https://bugs.freedesktop.org/show_bug.cgi?id=108622
[fdo#109720]: https://bugs.freedesktop.org/show_bug.cgi?id=109720
[fdo#110235 ]: https://bugs.freedesktop.org/show_bug.cgi?id=110235
Participating hosts (50 -> 39)
------------------------------
Missing (11): fi-ilk-m540 fi-hsw-4200u fi-skl-guc fi-byt-squawks fi-bsw-cyan fi-bwr-2160 fi-kbl-7500u fi-ctg-p8600 fi-pnv-d510 fi-icl-y fi-bdw-samus
Build changes
-------------
* IGT: IGT_4959 -> IGTPW_2906
CI_DRM_5971: e91b848a66e8672c48ea65d082b260f13f2c86b9 @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_2906: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2906/
IGT_4959: 504367d33b787de2ba8e007a5b620cfd6f0b3074 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2906/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* ✓ Fi.CI.IGT: success for series starting with [1/3] lib/igt_dummyload: Introduce igt_spin_reset (rev2)
2019-04-23 14:00 [PATCH i-g-t 1/3] lib/igt_dummyload: Introduce igt_spin_reset Mika Kuoppala
` (3 preceding siblings ...)
2019-04-23 15:32 ` ✓ Fi.CI.BAT: success for series starting with [1/3] lib/igt_dummyload: Introduce igt_spin_reset (rev2) Patchwork
@ 2019-04-23 19:25 ` Patchwork
4 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2019-04-23 19:25 UTC (permalink / raw)
To: Mika Kuoppala; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/3] lib/igt_dummyload: Introduce igt_spin_reset (rev2)
URL : https://patchwork.freedesktop.org/series/59830/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5971_full -> IGTPW_2906_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://patchwork.freedesktop.org/api/1.0/series/59830/revisions/2/mbox/
Known issues
------------
Here are the changes found in IGTPW_2906_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_tiled_swapping@non-threaded:
- shard-hsw: [PASS][1] -> [FAIL][2] ([fdo#108686])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5971/shard-hsw1/igt@gem_tiled_swapping@non-threaded.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2906/shard-hsw8/igt@gem_tiled_swapping@non-threaded.html
* igt@i915_suspend@debugfs-reader:
- shard-apl: [PASS][3] -> [DMESG-WARN][4] ([fdo#108566]) +5 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5971/shard-apl3/igt@i915_suspend@debugfs-reader.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2906/shard-apl1/igt@i915_suspend@debugfs-reader.html
* igt@kms_cursor_crc@cursor-256x256-dpms:
- shard-apl: [PASS][5] -> [FAIL][6] ([fdo#103232])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5971/shard-apl1/igt@kms_cursor_crc@cursor-256x256-dpms.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2906/shard-apl7/igt@kms_cursor_crc@cursor-256x256-dpms.html
- shard-kbl: [PASS][7] -> [FAIL][8] ([fdo#103232])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5971/shard-kbl1/igt@kms_cursor_crc@cursor-256x256-dpms.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2906/shard-kbl7/igt@kms_cursor_crc@cursor-256x256-dpms.html
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
- shard-glk: [PASS][9] -> [FAIL][10] ([fdo#105363]) +1 similar issue
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5971/shard-glk6/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2906/shard-glk8/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html
* igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite:
- shard-iclb: [PASS][11] -> [FAIL][12] ([fdo#103167]) +3 similar issues
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5971/shard-iclb7/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2906/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-onoff:
- shard-apl: [PASS][13] -> [FAIL][14] ([fdo#103167])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5971/shard-apl8/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-onoff.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2906/shard-apl2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-onoff.html
- shard-kbl: [PASS][15] -> [FAIL][16] ([fdo#103167])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5971/shard-kbl4/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-onoff.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2906/shard-kbl3/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-onoff.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-mmap-gtt:
- shard-glk: [PASS][17] -> [FAIL][18] ([fdo#103167]) +1 similar issue
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5971/shard-glk2/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-mmap-gtt.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2906/shard-glk7/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-indfb-plflip-blt:
- shard-hsw: NOTRUN -> [SKIP][19] ([fdo#109271]) +6 similar issues
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2906/shard-hsw7/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-indfb-plflip-blt.html
* igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
- shard-hsw: NOTRUN -> [SKIP][20] ([fdo#109271] / [fdo#109278]) +1 similar issue
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2906/shard-hsw7/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
* igt@kms_plane_lowres@pipe-a-tiling-y:
- shard-iclb: [PASS][21] -> [FAIL][22] ([fdo#103166])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5971/shard-iclb1/igt@kms_plane_lowres@pipe-a-tiling-y.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2906/shard-iclb5/igt@kms_plane_lowres@pipe-a-tiling-y.html
* igt@kms_plane_scaling@pipe-a-scaler-with-clipping-clamping:
- shard-glk: [PASS][23] -> [SKIP][24] ([fdo#109271] / [fdo#109278]) +1 similar issue
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5971/shard-glk9/igt@kms_plane_scaling@pipe-a-scaler-with-clipping-clamping.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2906/shard-glk1/igt@kms_plane_scaling@pipe-a-scaler-with-clipping-clamping.html
* igt@kms_psr2_su@page_flip:
- shard-iclb: [PASS][25] -> [SKIP][26] ([fdo#109642])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5971/shard-iclb2/igt@kms_psr2_su@page_flip.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2906/shard-iclb4/igt@kms_psr2_su@page_flip.html
* igt@kms_psr@no_drrs:
- shard-iclb: [PASS][27] -> [FAIL][28] ([fdo#108341])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5971/shard-iclb8/igt@kms_psr@no_drrs.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2906/shard-iclb1/igt@kms_psr@no_drrs.html
* igt@kms_sysfs_edid_timing:
- shard-iclb: [PASS][29] -> [FAIL][30] ([fdo#100047])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5971/shard-iclb8/igt@kms_sysfs_edid_timing.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2906/shard-iclb2/igt@kms_sysfs_edid_timing.html
* igt@kms_vblank@pipe-c-ts-continuation-suspend:
- shard-kbl: [PASS][31] -> [DMESG-WARN][32] ([fdo#108566]) +1 similar issue
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5971/shard-kbl2/igt@kms_vblank@pipe-c-ts-continuation-suspend.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2906/shard-kbl5/igt@kms_vblank@pipe-c-ts-continuation-suspend.html
* igt@perf_pmu@rc6-runtime-pm:
- shard-glk: [PASS][33] -> [FAIL][34] ([fdo#105010])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5971/shard-glk7/igt@perf_pmu@rc6-runtime-pm.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2906/shard-glk8/igt@perf_pmu@rc6-runtime-pm.html
- shard-apl: [PASS][35] -> [FAIL][36] ([fdo#105010])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5971/shard-apl6/igt@perf_pmu@rc6-runtime-pm.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2906/shard-apl2/igt@perf_pmu@rc6-runtime-pm.html
- shard-kbl: [PASS][37] -> [FAIL][38] ([fdo#105010])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5971/shard-kbl3/igt@perf_pmu@rc6-runtime-pm.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2906/shard-kbl1/igt@perf_pmu@rc6-runtime-pm.html
#### Possible fixes ####
* igt@gem_tiled_swapping@non-threaded:
- shard-iclb: [FAIL][39] ([fdo#108686]) -> [PASS][40]
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5971/shard-iclb1/igt@gem_tiled_swapping@non-threaded.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2906/shard-iclb6/igt@gem_tiled_swapping@non-threaded.html
* igt@gem_workarounds@suspend-resume:
- shard-apl: [DMESG-WARN][41] ([fdo#108566]) -> [PASS][42] +4 similar issues
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5971/shard-apl7/igt@gem_workarounds@suspend-resume.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2906/shard-apl2/igt@gem_workarounds@suspend-resume.html
* igt@i915_pm_rpm@i2c:
- shard-iclb: [FAIL][43] ([fdo#104097]) -> [PASS][44]
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5971/shard-iclb8/igt@i915_pm_rpm@i2c.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2906/shard-iclb7/igt@i915_pm_rpm@i2c.html
* igt@kms_dp_dsc@basic-dsc-enable-edp:
- shard-iclb: [SKIP][45] ([fdo#109349]) -> [PASS][46]
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5971/shard-iclb5/igt@kms_dp_dsc@basic-dsc-enable-edp.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2906/shard-iclb2/igt@kms_dp_dsc@basic-dsc-enable-edp.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-hsw: [INCOMPLETE][47] ([fdo#103540]) -> [PASS][48]
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5971/shard-hsw2/igt@kms_flip@flip-vs-suspend-interruptible.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2906/shard-hsw5/igt@kms_flip@flip-vs-suspend-interruptible.html
* igt@kms_frontbuffer_tracking@fbc-1p-rte:
- shard-iclb: [FAIL][49] ([fdo#103167] / [fdo#110378]) -> [PASS][50]
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5971/shard-iclb1/igt@kms_frontbuffer_tracking@fbc-1p-rte.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2906/shard-iclb1/igt@kms_frontbuffer_tracking@fbc-1p-rte.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-pwrite:
- shard-glk: [FAIL][51] ([fdo#103167]) -> [PASS][52]
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5971/shard-glk8/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-pwrite.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2906/shard-glk1/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-pwrite:
- shard-iclb: [FAIL][53] ([fdo#103167]) -> [PASS][54] +2 similar issues
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5971/shard-iclb6/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-pwrite.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2906/shard-iclb1/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-pwrite.html
* igt@kms_plane@pixel-format-pipe-c-planes-source-clamping:
- shard-glk: [SKIP][55] ([fdo#109271]) -> [PASS][56]
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5971/shard-glk8/igt@kms_plane@pixel-format-pipe-c-planes-source-clamping.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2906/shard-glk9/igt@kms_plane@pixel-format-pipe-c-planes-source-clamping.html
* igt@kms_plane_lowres@pipe-a-tiling-x:
- shard-iclb: [FAIL][57] ([fdo#103166]) -> [PASS][58]
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5971/shard-iclb4/igt@kms_plane_lowres@pipe-a-tiling-x.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2906/shard-iclb8/igt@kms_plane_lowres@pipe-a-tiling-x.html
* igt@kms_psr@psr2_sprite_plane_move:
- shard-iclb: [SKIP][59] ([fdo#109441]) -> [PASS][60] +2 similar issues
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5971/shard-iclb7/igt@kms_psr@psr2_sprite_plane_move.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2906/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#100047]: https://bugs.freedesktop.org/show_bug.cgi?id=100047
[fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
[fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
[fdo#104097]: https://bugs.freedesktop.org/show_bug.cgi?id=104097
[fdo#105010]: https://bugs.freedesktop.org/show_bug.cgi?id=105010
[fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
[fdo#108341]: https://bugs.freedesktop.org/show_bug.cgi?id=108341
[fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
[fdo#108686]: https://bugs.freedesktop.org/show_bug.cgi?id=108686
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109349]: https://bugs.freedesktop.org/show_bug.cgi?id=109349
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#110378]: https://bugs.freedesktop.org/show_bug.cgi?id=110378
Participating hosts (10 -> 6)
------------------------------
Missing (4): pig-skl-6260u shard-skl pig-hsw-4770r pig-glk-j5005
Build changes
-------------
* IGT: IGT_4959 -> IGTPW_2906
* Piglit: piglit_4509 -> None
CI_DRM_5971: e91b848a66e8672c48ea65d082b260f13f2c86b9 @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_2906: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2906/
IGT_4959: 504367d33b787de2ba8e007a5b620cfd6f0b3074 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2906/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2019-04-23 19:25 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-04-23 14:00 [PATCH i-g-t 1/3] lib/igt_dummyload: Introduce igt_spin_reset Mika Kuoppala
2019-04-23 14:00 ` [PATCH i-g-t 2/3] lib/igt_dummyload: Clarify batch mapping Mika Kuoppala
2019-04-23 14:12 ` Chris Wilson
2019-04-23 14:00 ` [PATCH i-g-t 3/3] lib/igt_dummyload: Send batch as first Mika Kuoppala
2019-04-23 14:58 ` Chris Wilson
2019-04-23 14:10 ` [PATCH i-g-t 1/3] lib/igt_dummyload: Introduce igt_spin_reset Chris Wilson
2019-04-23 14:15 ` Mika Kuoppala
2019-04-23 15:32 ` ✓ Fi.CI.BAT: success for series starting with [1/3] lib/igt_dummyload: Introduce igt_spin_reset (rev2) Patchwork
2019-04-23 19:25 ` ✓ Fi.CI.IGT: " Patchwork
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