[PATCH 1/2] drm/i915: Fix fastset vs. pfit on/off on HSW EDP transcoder

[PATCH 1/2] drm/i915: Fix fastset vs. pfit on/off on HSW EDP transcoder

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

On HSW the pipe A panel fitter lives inside the display power well,
and the input MUX for the EDP transcoder needs to be configured
appropriately to route the data through the power well as needed.
Changing the MUX setting is not allowed while the pipe is active,
so we need to force a full modeset whenever we need to change it.

Currently we may end up doing a fastset which won't change the
MUX settings, but it will drop the power well reference, and that
kills the pipe.

Cc: stable@vger.kernel.org
Cc: Hans de Goede <hdegoede@redhat.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Fixes: d19f958db23c ("drm/i915: Enable fastset for non-boot modesets.")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_display.c  |  9 +++++++++
 drivers/gpu/drm/i915/intel_pipe_crc.c | 13 ++++++++++---
 2 files changed, 19 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index c67f165b466c..691c9a929164 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -12133,6 +12133,7 @@ intel_pipe_config_compare(struct drm_i915_private *dev_priv,
 			  struct intel_crtc_state *pipe_config,
 			  bool adjust)
 {
+	struct intel_crtc *crtc = to_intel_crtc(current_config->base.crtc);
 	bool ret = true;
 	bool fixup_inherited = adjust &&
 		(current_config->base.mode.private_flags & I915_MODE_FLAG_INHERITED) &&
@@ -12354,6 +12355,14 @@ intel_pipe_config_compare(struct drm_i915_private *dev_priv,
 		PIPE_CONF_CHECK_X(gmch_pfit.pgm_ratios);
 	PIPE_CONF_CHECK_X(gmch_pfit.lvds_border_bits);
 
+	/*
+	 * Changing the EDP transcoder input mux
+	 * (A_ONOFF vs. A_ON) requires a full modeset.
+	 */
+	if (IS_HASWELL(dev_priv) && crtc->pipe == PIPE_A &&
+	    current_config->cpu_transcoder == TRANSCODER_EDP)
+		PIPE_CONF_CHECK_BOOL(pch_pfit.enabled);
+
 	if (!adjust) {
 		PIPE_CONF_CHECK_I(pipe_src_w);
 		PIPE_CONF_CHECK_I(pipe_src_h);
diff --git a/drivers/gpu/drm/i915/intel_pipe_crc.c b/drivers/gpu/drm/i915/intel_pipe_crc.c
index e94b5b1bc1b7..e7c7be4911c1 100644
--- a/drivers/gpu/drm/i915/intel_pipe_crc.c
+++ b/drivers/gpu/drm/i915/intel_pipe_crc.c
@@ -311,10 +311,17 @@ intel_crtc_crc_setup_workarounds(struct intel_crtc *crtc, bool enable)
 	pipe_config->base.mode_changed = pipe_config->has_psr;
 	pipe_config->crc_enabled = enable;
 
-	if (IS_HASWELL(dev_priv) && crtc->pipe == PIPE_A) {
+	if (IS_HASWELL(dev_priv) &&
+	    pipe_config->base.active && crtc->pipe == PIPE_A &&
+	    pipe_config->cpu_transcoder == TRANSCODER_EDP) {
+		bool old_need_power_well = pipe_config->pch_pfit.enabled ||
+			pipe_config->pch_pfit.force_thru;
+		bool new_need_power_well = pipe_config->pch_pfit.enabled ||
+			enable;
+
 		pipe_config->pch_pfit.force_thru = enable;
-		if (pipe_config->cpu_transcoder == TRANSCODER_EDP &&
-		    pipe_config->pch_pfit.enabled != enable)
+
+		if (old_need_power_well != new_need_power_well)
 			pipe_config->base.connectors_changed = true;
 	}
 
-- 
2.21.0

[PATCH 2/2] drm/i915: Add readout and state check for pch_pfit.force_thru

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Convert the HSW pch_pfit.force_thru to a proper state variable
with readout and accompanying pipe conf check. Makes the logic
a bit more straightforward, and hopefully prevents some
breakage in the future.

'force_thru' is probably not the best name for this, but I
didn't manage to come up with anything better either, so I
left it alone.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_ddi.c      | 12 ++++++++----
 drivers/gpu/drm/i915/intel_display.c  | 18 ++++++++++--------
 drivers/gpu/drm/i915/intel_pipe_crc.c | 13 ++-----------
 3 files changed, 20 insertions(+), 23 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index f181c26f62fd..68641e3a009e 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -1772,9 +1772,7 @@ void intel_ddi_enable_transcoder_func(const struct intel_crtc_state *crtc_state)
 			 * eDP when not using the panel fitter, and when not
 			 * using motion blur mitigation (which we don't
 			 * support). */
-			if (IS_HASWELL(dev_priv) &&
-			    (crtc_state->pch_pfit.enabled ||
-			     crtc_state->pch_pfit.force_thru))
+			if (crtc_state->pch_pfit.force_thru)
 				temp |= TRANS_DDI_EDP_INPUT_A_ONOFF;
 			else
 				temp |= TRANS_DDI_EDP_INPUT_A_ON;
@@ -3844,6 +3842,7 @@ static int intel_ddi_compute_config(struct intel_encoder *encoder,
 				    struct intel_crtc_state *pipe_config,
 				    struct drm_connector_state *conn_state)
 {
+	struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc);
 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 	enum port port = encoder->port;
 	int ret;
@@ -3858,6 +3857,12 @@ static int intel_ddi_compute_config(struct intel_encoder *encoder,
 	if (ret)
 		return ret;
 
+	if (IS_HASWELL(dev_priv) && crtc->pipe == PIPE_A &&
+	    pipe_config->cpu_transcoder == TRANSCODER_EDP)
+		pipe_config->pch_pfit.force_thru =
+			pipe_config->pch_pfit.enabled ||
+			pipe_config->crc_enabled;
+
 	if (IS_GEN9_LP(dev_priv))
 		pipe_config->lane_lat_optim_mask =
 			bxt_ddi_phy_calc_lane_lat_optim_mask(pipe_config->lane_count);
@@ -3865,7 +3870,6 @@ static int intel_ddi_compute_config(struct intel_encoder *encoder,
 	intel_ddi_compute_min_voltage_level(dev_priv, pipe_config);
 
 	return 0;
-
 }
 
 static void intel_ddi_encoder_suspend(struct intel_encoder *encoder)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 691c9a929164..c70964e80678 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -9848,6 +9848,7 @@ static bool hsw_get_transcoder_state(struct intel_crtc *crtc,
 	for_each_set_bit(panel_transcoder,
 			 &panel_transcoder_mask,
 			 ARRAY_SIZE(INTEL_INFO(dev_priv)->trans_offsets)) {
+		bool force_thru = false;
 		enum pipe trans_pipe;
 
 		tmp = I915_READ(TRANS_DDI_FUNC_CTL(panel_transcoder));
@@ -9869,6 +9870,8 @@ static bool hsw_get_transcoder_state(struct intel_crtc *crtc,
 			     transcoder_name(panel_transcoder));
 			/* fall through */
 		case TRANS_DDI_EDP_INPUT_A_ONOFF:
+			force_thru = true;
+			/* fall through */
 		case TRANS_DDI_EDP_INPUT_A_ON:
 			trans_pipe = PIPE_A;
 			break;
@@ -9880,8 +9883,10 @@ static bool hsw_get_transcoder_state(struct intel_crtc *crtc,
 			break;
 		}
 
-		if (trans_pipe == crtc->pipe)
+		if (trans_pipe == crtc->pipe) {
 			pipe_config->cpu_transcoder = panel_transcoder;
+			pipe_config->pch_pfit.force_thru = force_thru;
+		}
 	}
 
 	/*
@@ -11716,10 +11721,11 @@ static void intel_dump_pipe_config(struct intel_crtc *crtc,
 			      pipe_config->gmch_pfit.pgm_ratios,
 			      pipe_config->gmch_pfit.lvds_border_bits);
 	else
-		DRM_DEBUG_KMS("pch pfit: pos: 0x%08x, size: 0x%08x, %s\n",
+		DRM_DEBUG_KMS("pch pfit: pos: 0x%08x, size: 0x%08x, %s, force thru: %s\n",
 			      pipe_config->pch_pfit.pos,
 			      pipe_config->pch_pfit.size,
-		              enableddisabled(pipe_config->pch_pfit.enabled));
+			      enableddisabled(pipe_config->pch_pfit.enabled),
+			      yesno(pipe_config->pch_pfit.force_thru));
 
 	DRM_DEBUG_KMS("ips: %i, double wide: %i\n",
 		      pipe_config->ips_enabled, pipe_config->double_wide);
@@ -11841,7 +11847,6 @@ clear_intel_crtc_state(struct intel_crtc_state *crtc_state)
 	saved_state->scaler_state = crtc_state->scaler_state;
 	saved_state->shared_dpll = crtc_state->shared_dpll;
 	saved_state->dpll_hw_state = crtc_state->dpll_hw_state;
-	saved_state->pch_pfit.force_thru = crtc_state->pch_pfit.force_thru;
 	saved_state->crc_enabled = crtc_state->crc_enabled;
 	if (IS_G4X(dev_priv) ||
 	    IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
@@ -12133,7 +12138,6 @@ intel_pipe_config_compare(struct drm_i915_private *dev_priv,
 			  struct intel_crtc_state *pipe_config,
 			  bool adjust)
 {
-	struct intel_crtc *crtc = to_intel_crtc(current_config->base.crtc);
 	bool ret = true;
 	bool fixup_inherited = adjust &&
 		(current_config->base.mode.private_flags & I915_MODE_FLAG_INHERITED) &&
@@ -12359,9 +12363,7 @@ intel_pipe_config_compare(struct drm_i915_private *dev_priv,
 	 * Changing the EDP transcoder input mux
 	 * (A_ONOFF vs. A_ON) requires a full modeset.
 	 */
-	if (IS_HASWELL(dev_priv) && crtc->pipe == PIPE_A &&
-	    current_config->cpu_transcoder == TRANSCODER_EDP)
-		PIPE_CONF_CHECK_BOOL(pch_pfit.enabled);
+	PIPE_CONF_CHECK_BOOL(pch_pfit.force_thru);
 
 	if (!adjust) {
 		PIPE_CONF_CHECK_I(pipe_src_w);
diff --git a/drivers/gpu/drm/i915/intel_pipe_crc.c b/drivers/gpu/drm/i915/intel_pipe_crc.c
index e7c7be4911c1..dce94827cda9 100644
--- a/drivers/gpu/drm/i915/intel_pipe_crc.c
+++ b/drivers/gpu/drm/i915/intel_pipe_crc.c
@@ -313,17 +313,8 @@ intel_crtc_crc_setup_workarounds(struct intel_crtc *crtc, bool enable)
 
 	if (IS_HASWELL(dev_priv) &&
 	    pipe_config->base.active && crtc->pipe == PIPE_A &&
-	    pipe_config->cpu_transcoder == TRANSCODER_EDP) {
-		bool old_need_power_well = pipe_config->pch_pfit.enabled ||
-			pipe_config->pch_pfit.force_thru;
-		bool new_need_power_well = pipe_config->pch_pfit.enabled ||
-			enable;
-
-		pipe_config->pch_pfit.force_thru = enable;
-
-		if (old_need_power_well != new_need_power_well)
-			pipe_config->base.connectors_changed = true;
-	}
+	    pipe_config->cpu_transcoder == TRANSCODER_EDP)
+		pipe_config->base.mode_changed = true;
 
 	ret = drm_atomic_commit(state);
 
-- 
2.21.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Fix fastset vs. pfit on/off on HSW EDP transcoder

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm/i915: Fix fastset vs. pfit on/off on HSW EDP transcoder
URL   : https://patchwork.freedesktop.org/series/59950/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6000 -> Patchwork_12876
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/59950/revisions/1/mbox/

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_12876:

### IGT changes ###

#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@kms_chamelium@dp-hpd-fast:
    - {fi-icl-u2}:        NOTRUN -> [FAIL][1] +3 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12876/fi-icl-u2/igt@kms_chamelium@dp-hpd-fast.html

  
Known issues
------------

  Here are the changes found in Patchwork_12876 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_selftest@live_hangcheck:
    - fi-icl-y:           [PASS][2] -> [INCOMPLETE][3] ([fdo#107713] / [fdo#108569])
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/fi-icl-y/igt@i915_selftest@live_hangcheck.html
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12876/fi-icl-y/igt@i915_selftest@live_hangcheck.html

  
#### Possible fixes ####

  * igt@i915_selftest@live_contexts:
    - fi-bdw-gvtdvm:      [DMESG-FAIL][4] ([fdo#110235 ]) -> [PASS][5]
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/fi-bdw-gvtdvm/igt@i915_selftest@live_contexts.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12876/fi-bdw-gvtdvm/igt@i915_selftest@live_contexts.html

  
#### Warnings ####

  * igt@i915_pm_rpm@basic-pci-d3-state:
    - fi-kbl-guc:         [INCOMPLETE][6] ([fdo#107807]) -> [SKIP][7] ([fdo#109271])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/fi-kbl-guc/igt@i915_pm_rpm@basic-pci-d3-state.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12876/fi-kbl-guc/igt@i915_pm_rpm@basic-pci-d3-state.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#107807]: https://bugs.freedesktop.org/show_bug.cgi?id=107807
  [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#110235 ]: https://bugs.freedesktop.org/show_bug.cgi?id=110235 


Participating hosts (32 -> 37)
------------------------------

  Additional (12): fi-skl-6770hq fi-icl-u2 fi-cfl-guc fi-apl-guc fi-bxt-j4205 fi-ivb-3770 fi-icl-u3 fi-cfl-8109u fi-blb-e6850 fi-byt-n2820 fi-icl-dsi fi-kbl-r 
  Missing    (7): fi-kbl-soraka fi-ilk-m540 fi-bsw-n3050 fi-bsw-cyan fi-bwr-2160 fi-snb-2520m fi-ctg-p8600 


Build changes
-------------

  * Linux: CI_DRM_6000 -> Patchwork_12876

  CI_DRM_6000: a0c3fff52846356f63dd210cddf81e5bb01e7aa0 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4966: a75429544f5721316b04a36551c57573e0c79486 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_12876: 49ffaeff2b1d6b8377887e23c7763bb15d51283b @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

49ffaeff2b1d drm/i915: Add readout and state check for pch_pfit.force_thru
aea81b20ac88 drm/i915: Fix fastset vs. pfit on/off on HSW EDP transcoder

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12876/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✗ Fi.CI.IGT: failure for series starting with [1/2] drm/i915: Fix fastset vs. pfit on/off on HSW EDP transcoder

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm/i915: Fix fastset vs. pfit on/off on HSW EDP transcoder
URL   : https://patchwork.freedesktop.org/series/59950/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_6000_full -> Patchwork_12876_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_12876_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_12876_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_12876_full:

### IGT changes ###

#### Possible regressions ####

  * igt@i915_selftest@mock_requests:
    - shard-skl:          [PASS][1] -> [INCOMPLETE][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-skl4/igt@i915_selftest@mock_requests.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12876/shard-skl6/igt@i915_selftest@mock_requests.html

  
Known issues
------------

  Here are the changes found in Patchwork_12876_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_eio@unwedge-stress:
    - shard-snb:          [PASS][3] -> [FAIL][4] ([fdo#109661])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-snb5/igt@gem_eio@unwedge-stress.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12876/shard-snb1/igt@gem_eio@unwedge-stress.html

  * igt@gem_workarounds@suspend-resume:
    - shard-apl:          [PASS][5] -> [DMESG-WARN][6] ([fdo#108566]) +3 similar issues
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-apl2/igt@gem_workarounds@suspend-resume.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12876/shard-apl5/igt@gem_workarounds@suspend-resume.html

  * igt@i915_suspend@sysfs-reader:
    - shard-skl:          [PASS][7] -> [INCOMPLETE][8] ([fdo#104108] / [fdo#107773]) +1 similar issue
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-skl8/igt@i915_suspend@sysfs-reader.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12876/shard-skl2/igt@i915_suspend@sysfs-reader.html

  * igt@kms_cursor_crc@cursor-64x64-dpms:
    - shard-skl:          [PASS][9] -> [FAIL][10] ([fdo#103232])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-skl8/igt@kms_cursor_crc@cursor-64x64-dpms.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12876/shard-skl6/igt@kms_cursor_crc@cursor-64x64-dpms.html

  * igt@kms_flip@flip-vs-expired-vblank:
    - shard-glk:          [PASS][11] -> [FAIL][12] ([fdo#102887])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-glk6/igt@kms_flip@flip-vs-expired-vblank.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12876/shard-glk4/igt@kms_flip@flip-vs-expired-vblank.html

  * igt@kms_frontbuffer_tracking@fbc-rgb565-draw-pwrite:
    - shard-iclb:         [PASS][13] -> [FAIL][14] ([fdo#103167]) +6 similar issues
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-pwrite.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12876/shard-iclb5/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-pwrite.html

  * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
    - shard-skl:          [PASS][15] -> [FAIL][16] ([fdo#108145] / [fdo#110403])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-skl8/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12876/shard-skl6/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html

  * igt@kms_psr2_su@frontbuffer:
    - shard-iclb:         [PASS][17] -> [SKIP][18] ([fdo#109642])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-iclb2/igt@kms_psr2_su@frontbuffer.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12876/shard-iclb3/igt@kms_psr2_su@frontbuffer.html

  * igt@kms_psr@psr2_sprite_blt:
    - shard-iclb:         [PASS][19] -> [SKIP][20] ([fdo#109441]) +4 similar issues
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-iclb2/igt@kms_psr@psr2_sprite_blt.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12876/shard-iclb5/igt@kms_psr@psr2_sprite_blt.html

  * igt@kms_rotation_crc@multiplane-rotation-cropping-bottom:
    - shard-kbl:          [PASS][21] -> [DMESG-FAIL][22] ([fdo#105763])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-kbl7/igt@kms_rotation_crc@multiplane-rotation-cropping-bottom.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12876/shard-kbl3/igt@kms_rotation_crc@multiplane-rotation-cropping-bottom.html

  * igt@kms_setmode@basic:
    - shard-kbl:          [PASS][23] -> [FAIL][24] ([fdo#99912])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-kbl7/igt@kms_setmode@basic.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12876/shard-kbl6/igt@kms_setmode@basic.html

  * igt@kms_vblank@pipe-c-ts-continuation-dpms-suspend:
    - shard-apl:          [PASS][25] -> [INCOMPLETE][26] ([fdo#103927])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-apl8/igt@kms_vblank@pipe-c-ts-continuation-dpms-suspend.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12876/shard-apl8/igt@kms_vblank@pipe-c-ts-continuation-dpms-suspend.html

  * igt@prime_busy@hang-bsd:
    - shard-apl:          [PASS][27] -> [FAIL][28] ([fdo#108807])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-apl5/igt@prime_busy@hang-bsd.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12876/shard-apl8/igt@prime_busy@hang-bsd.html

  
#### Possible fixes ####

  * igt@gem_ctx_isolation@rcs0-s3:
    - shard-kbl:          [INCOMPLETE][29] ([fdo#103665]) -> [PASS][30]
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-kbl2/igt@gem_ctx_isolation@rcs0-s3.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12876/shard-kbl7/igt@gem_ctx_isolation@rcs0-s3.html

  * igt@kms_cursor_crc@cursor-256x256-suspend:
    - shard-kbl:          [DMESG-WARN][31] ([fdo#108566]) -> [PASS][32]
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-kbl5/igt@kms_cursor_crc@cursor-256x256-suspend.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12876/shard-kbl3/igt@kms_cursor_crc@cursor-256x256-suspend.html

  * igt@kms_draw_crc@draw-method-xrgb8888-render-xtiled:
    - shard-skl:          [FAIL][33] ([fdo#103184]) -> [PASS][34]
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-skl5/igt@kms_draw_crc@draw-method-xrgb8888-render-xtiled.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12876/shard-skl9/igt@kms_draw_crc@draw-method-xrgb8888-render-xtiled.html

  * igt@kms_flip@plain-flip-fb-recreate:
    - shard-skl:          [FAIL][35] ([fdo#100368]) -> [PASS][36]
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-skl8/igt@kms_flip@plain-flip-fb-recreate.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12876/shard-skl2/igt@kms_flip@plain-flip-fb-recreate.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt:
    - shard-iclb:         [FAIL][37] ([fdo#103167]) -> [PASS][38] +8 similar issues
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12876/shard-iclb3/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-wc:
    - shard-skl:          [FAIL][39] ([fdo#103167]) -> [PASS][40] +2 similar issues
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-skl5/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-wc.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12876/shard-skl9/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-wc.html

  * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
    - shard-skl:          [FAIL][41] ([fdo#108145]) -> [PASS][42]
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-skl5/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12876/shard-skl9/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html

  * igt@kms_psr@psr2_basic:
    - shard-iclb:         [SKIP][43] ([fdo#109441]) -> [PASS][44] +1 similar issue
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-iclb5/igt@kms_psr@psr2_basic.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12876/shard-iclb2/igt@kms_psr@psr2_basic.html

  * igt@kms_rotation_crc@multiplane-rotation-cropping-top:
    - shard-kbl:          [FAIL][45] ([fdo#109016]) -> [PASS][46]
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-kbl7/igt@kms_rotation_crc@multiplane-rotation-cropping-top.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12876/shard-kbl2/igt@kms_rotation_crc@multiplane-rotation-cropping-top.html

  * igt@kms_setmode@basic:
    - shard-apl:          [FAIL][47] ([fdo#99912]) -> [PASS][48]
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-apl2/igt@kms_setmode@basic.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12876/shard-apl5/igt@kms_setmode@basic.html

  * igt@kms_sysfs_edid_timing:
    - shard-iclb:         [FAIL][49] ([fdo#100047]) -> [PASS][50]
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-iclb3/igt@kms_sysfs_edid_timing.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12876/shard-iclb4/igt@kms_sysfs_edid_timing.html

  * igt@kms_vblank@pipe-c-ts-continuation-suspend:
    - shard-apl:          [DMESG-WARN][51] ([fdo#108566]) -> [PASS][52] +2 similar issues
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-apl4/igt@kms_vblank@pipe-c-ts-continuation-suspend.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12876/shard-apl5/igt@kms_vblank@pipe-c-ts-continuation-suspend.html

  
  [fdo#100047]: https://bugs.freedesktop.org/show_bug.cgi?id=100047
  [fdo#100368]: https://bugs.freedesktop.org/show_bug.cgi?id=100368
  [fdo#102887]: https://bugs.freedesktop.org/show_bug.cgi?id=102887
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103184]: https://bugs.freedesktop.org/show_bug.cgi?id=103184
  [fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
  [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
  [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
  [fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
  [fdo#105763]: https://bugs.freedesktop.org/show_bug.cgi?id=105763
  [fdo#107773]: https://bugs.freedesktop.org/show_bug.cgi?id=107773
  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
  [fdo#108807]: https://bugs.freedesktop.org/show_bug.cgi?id=108807
  [fdo#109016]: https://bugs.freedesktop.org/show_bug.cgi?id=109016
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
  [fdo#109661]: https://bugs.freedesktop.org/show_bug.cgi?id=109661
  [fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403
  [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912


Participating hosts (10 -> 9)
------------------------------

  Missing    (1): pig-skl-6260u 


Build changes
-------------

  * Linux: CI_DRM_6000 -> Patchwork_12876

  CI_DRM_6000: a0c3fff52846356f63dd210cddf81e5bb01e7aa0 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4966: a75429544f5721316b04a36551c57573e0c79486 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_12876: 49ffaeff2b1d6b8377887e23c7763bb15d51283b @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12876/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH 1/2] drm/i915: Fix fastset vs. pfit on/off on HSW EDP transcoder

[Ville Syrjälä]

On Thu, Apr 25, 2019 at 07:29:05PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> On HSW the pipe A panel fitter lives inside the display power well,
> and the input MUX for the EDP transcoder needs to be configured
> appropriately to route the data through the power well as needed.
> Changing the MUX setting is not allowed while the pipe is active,
> so we need to force a full modeset whenever we need to change it.
> 
> Currently we may end up doing a fastset which won't change the
> MUX settings, but it will drop the power well reference, and that
> kills the pipe.
> 
> Cc: stable@vger.kernel.org
> Cc: Hans de Goede <hdegoede@redhat.com>
> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> Fixes: d19f958db23c ("drm/i915: Enable fastset for non-boot modesets.")
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Probably
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104838

and maybe
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108672

> ---
>  drivers/gpu/drm/i915/intel_display.c  |  9 +++++++++
>  drivers/gpu/drm/i915/intel_pipe_crc.c | 13 ++++++++++---
>  2 files changed, 19 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index c67f165b466c..691c9a929164 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -12133,6 +12133,7 @@ intel_pipe_config_compare(struct drm_i915_private *dev_priv,
>  			  struct intel_crtc_state *pipe_config,
>  			  bool adjust)
>  {
> +	struct intel_crtc *crtc = to_intel_crtc(current_config->base.crtc);
>  	bool ret = true;
>  	bool fixup_inherited = adjust &&
>  		(current_config->base.mode.private_flags & I915_MODE_FLAG_INHERITED) &&
> @@ -12354,6 +12355,14 @@ intel_pipe_config_compare(struct drm_i915_private *dev_priv,
>  		PIPE_CONF_CHECK_X(gmch_pfit.pgm_ratios);
>  	PIPE_CONF_CHECK_X(gmch_pfit.lvds_border_bits);
>  
> +	/*
> +	 * Changing the EDP transcoder input mux
> +	 * (A_ONOFF vs. A_ON) requires a full modeset.
> +	 */
> +	if (IS_HASWELL(dev_priv) && crtc->pipe == PIPE_A &&
> +	    current_config->cpu_transcoder == TRANSCODER_EDP)
> +		PIPE_CONF_CHECK_BOOL(pch_pfit.enabled);
> +
>  	if (!adjust) {
>  		PIPE_CONF_CHECK_I(pipe_src_w);
>  		PIPE_CONF_CHECK_I(pipe_src_h);
> diff --git a/drivers/gpu/drm/i915/intel_pipe_crc.c b/drivers/gpu/drm/i915/intel_pipe_crc.c
> index e94b5b1bc1b7..e7c7be4911c1 100644
> --- a/drivers/gpu/drm/i915/intel_pipe_crc.c
> +++ b/drivers/gpu/drm/i915/intel_pipe_crc.c
> @@ -311,10 +311,17 @@ intel_crtc_crc_setup_workarounds(struct intel_crtc *crtc, bool enable)
>  	pipe_config->base.mode_changed = pipe_config->has_psr;
>  	pipe_config->crc_enabled = enable;
>  
> -	if (IS_HASWELL(dev_priv) && crtc->pipe == PIPE_A) {
> +	if (IS_HASWELL(dev_priv) &&
> +	    pipe_config->base.active && crtc->pipe == PIPE_A &&
> +	    pipe_config->cpu_transcoder == TRANSCODER_EDP) {
> +		bool old_need_power_well = pipe_config->pch_pfit.enabled ||
> +			pipe_config->pch_pfit.force_thru;
> +		bool new_need_power_well = pipe_config->pch_pfit.enabled ||
> +			enable;
> +
>  		pipe_config->pch_pfit.force_thru = enable;
> -		if (pipe_config->cpu_transcoder == TRANSCODER_EDP &&
> -		    pipe_config->pch_pfit.enabled != enable)
> +
> +		if (old_need_power_well != new_need_power_well)
>  			pipe_config->base.connectors_changed = true;
>  	}
>  
> -- 
> 2.21.0

-- 
Ville Syrjälä
Intel

Re: [PATCH 1/2] drm/i915: Fix fastset vs. pfit on/off on HSW EDP transcoder

[Maarten Lankhorst]

Op 25-04-2019 om 18:29 schreef Ville Syrjala:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> On HSW the pipe A panel fitter lives inside the display power well,
> and the input MUX for the EDP transcoder needs to be configured
> appropriately to route the data through the power well as needed.
> Changing the MUX setting is not allowed while the pipe is active,
> so we need to force a full modeset whenever we need to change it.
>
> Currently we may end up doing a fastset which won't change the
> MUX settings, but it will drop the power well reference, and that
> kills the pipe.
>
> Cc: stable@vger.kernel.org
> Cc: Hans de Goede <hdegoede@redhat.com>
> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> Fixes: d19f958db23c ("drm/i915: Enable fastset for non-boot modesets.")
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_display.c  |  9 +++++++++
>  drivers/gpu/drm/i915/intel_pipe_crc.c | 13 ++++++++++---
>  2 files changed, 19 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index c67f165b466c..691c9a929164 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -12133,6 +12133,7 @@ intel_pipe_config_compare(struct drm_i915_private *dev_priv,
>  			  struct intel_crtc_state *pipe_config,
>  			  bool adjust)
>  {
> +	struct intel_crtc *crtc = to_intel_crtc(current_config->base.crtc);
>  	bool ret = true;
>  	bool fixup_inherited = adjust &&
>  		(current_config->base.mode.private_flags & I915_MODE_FLAG_INHERITED) &&
> @@ -12354,6 +12355,14 @@ intel_pipe_config_compare(struct drm_i915_private *dev_priv,
>  		PIPE_CONF_CHECK_X(gmch_pfit.pgm_ratios);
>  	PIPE_CONF_CHECK_X(gmch_pfit.lvds_border_bits);
>  
> +	/*
> +	 * Changing the EDP transcoder input mux
> +	 * (A_ONOFF vs. A_ON) requires a full modeset.
> +	 */
> +	if (IS_HASWELL(dev_priv) && crtc->pipe == PIPE_A &&
> +	    current_config->cpu_transcoder == TRANSCODER_EDP)
> +		PIPE_CONF_CHECK_BOOL(pch_pfit.enabled);

I guess it depends if we want to make it a blocker or not..

> +
>  	if (!adjust) {
>  		PIPE_CONF_CHECK_I(pipe_src_w);
>  		PIPE_CONF_CHECK_I(pipe_src_h);
> diff --git a/drivers/gpu/drm/i915/intel_pipe_crc.c b/drivers/gpu/drm/i915/intel_pipe_crc.c
> index e94b5b1bc1b7..e7c7be4911c1 100644
> --- a/drivers/gpu/drm/i915/intel_pipe_crc.c
> +++ b/drivers/gpu/drm/i915/intel_pipe_crc.c
> @@ -311,10 +311,17 @@ intel_crtc_crc_setup_workarounds(struct intel_crtc *crtc, bool enable)
>  	pipe_config->base.mode_changed = pipe_config->has_psr;
>  	pipe_config->crc_enabled = enable;
>  
> -	if (IS_HASWELL(dev_priv) && crtc->pipe == PIPE_A) {
> +	if (IS_HASWELL(dev_priv) &&
> +	    pipe_config->base.active && crtc->pipe == PIPE_A &&
> +	    pipe_config->cpu_transcoder == TRANSCODER_EDP) {
> +		bool old_need_power_well = pipe_config->pch_pfit.enabled ||
> +			pipe_config->pch_pfit.force_thru;
> +		bool new_need_power_well = pipe_config->pch_pfit.enabled ||
> +			enable;
> +
>  		pipe_config->pch_pfit.force_thru = enable;
> -		if (pipe_config->cpu_transcoder == TRANSCODER_EDP &&
> -		    pipe_config->pch_pfit.enabled != enable)
> +
> +		if (old_need_power_well != new_need_power_well)
>  			pipe_config->base.connectors_changed = true;

Could we get rid of this logic and set mode_changed instead?

Ah, I see that is done in 2/2, much less surprises then. :)

In that case, for both:

Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>

Re: [PATCH 1/2] drm/i915: Fix fastset vs. pfit on/off on HSW EDP transcoder

[Maarten Lankhorst]

Op 25-04-2019 om 18:29 schreef Ville Syrjala:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> On HSW the pipe A panel fitter lives inside the display power well,
> and the input MUX for the EDP transcoder needs to be configured
> appropriately to route the data through the power well as needed.
> Changing the MUX setting is not allowed while the pipe is active,
> so we need to force a full modeset whenever we need to change it.
>
> Currently we may end up doing a fastset which won't change the
> MUX settings, but it will drop the power well reference, and that
> kills the pipe.
>
> Cc: stable@vger.kernel.org
> Cc: Hans de Goede <hdegoede@redhat.com>
> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> Fixes: d19f958db23c ("drm/i915: Enable fastset for non-boot modesets.")
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_display.c  |  9 +++++++++
>  drivers/gpu/drm/i915/intel_pipe_crc.c | 13 ++++++++++---
>  2 files changed, 19 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index c67f165b466c..691c9a929164 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -12133,6 +12133,7 @@ intel_pipe_config_compare(struct drm_i915_private *dev_priv,
>  			  struct intel_crtc_state *pipe_config,
>  			  bool adjust)
>  {
> +	struct intel_crtc *crtc = to_intel_crtc(current_config->base.crtc);
>  	bool ret = true;
>  	bool fixup_inherited = adjust &&
>  		(current_config->base.mode.private_flags & I915_MODE_FLAG_INHERITED) &&
> @@ -12354,6 +12355,14 @@ intel_pipe_config_compare(struct drm_i915_private *dev_priv,
>  		PIPE_CONF_CHECK_X(gmch_pfit.pgm_ratios);
>  	PIPE_CONF_CHECK_X(gmch_pfit.lvds_border_bits);
>  
> +	/*
> +	 * Changing the EDP transcoder input mux
> +	 * (A_ONOFF vs. A_ON) requires a full modeset.
> +	 */
> +	if (IS_HASWELL(dev_priv) && crtc->pipe == PIPE_A &&
> +	    current_config->cpu_transcoder == TRANSCODER_EDP)
> +		PIPE_CONF_CHECK_BOOL(pch_pfit.enabled);

I guess it depends if we want to make it a blocker or not..

> +
>  	if (!adjust) {
>  		PIPE_CONF_CHECK_I(pipe_src_w);
>  		PIPE_CONF_CHECK_I(pipe_src_h);
> diff --git a/drivers/gpu/drm/i915/intel_pipe_crc.c b/drivers/gpu/drm/i915/intel_pipe_crc.c
> index e94b5b1bc1b7..e7c7be4911c1 100644
> --- a/drivers/gpu/drm/i915/intel_pipe_crc.c
> +++ b/drivers/gpu/drm/i915/intel_pipe_crc.c
> @@ -311,10 +311,17 @@ intel_crtc_crc_setup_workarounds(struct intel_crtc *crtc, bool enable)
>  	pipe_config->base.mode_changed = pipe_config->has_psr;
>  	pipe_config->crc_enabled = enable;
>  
> -	if (IS_HASWELL(dev_priv) && crtc->pipe == PIPE_A) {
> +	if (IS_HASWELL(dev_priv) &&
> +	    pipe_config->base.active && crtc->pipe == PIPE_A &&
> +	    pipe_config->cpu_transcoder == TRANSCODER_EDP) {
> +		bool old_need_power_well = pipe_config->pch_pfit.enabled ||
> +			pipe_config->pch_pfit.force_thru;
> +		bool new_need_power_well = pipe_config->pch_pfit.enabled ||
> +			enable;
> +
>  		pipe_config->pch_pfit.force_thru = enable;
> -		if (pipe_config->cpu_transcoder == TRANSCODER_EDP &&
> -		    pipe_config->pch_pfit.enabled != enable)
> +
> +		if (old_need_power_well != new_need_power_well)
>  			pipe_config->base.connectors_changed = true;

Could we get rid of this logic and set mode_changed instead?

Ah, I see that is done in 2/2, much less surprises then. :)

In that case, for both:

Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>

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Re: [PATCH 1/2] drm/i915: Fix fastset vs. pfit on/off on HSW EDP transcoder

[Ville Syrjälä]

On Wed, May 08, 2019 at 12:46:09PM +0200, Maarten Lankhorst wrote:
> Op 25-04-2019 om 18:29 schreef Ville Syrjala:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > On HSW the pipe A panel fitter lives inside the display power well,
> > and the input MUX for the EDP transcoder needs to be configured
> > appropriately to route the data through the power well as needed.
> > Changing the MUX setting is not allowed while the pipe is active,
> > so we need to force a full modeset whenever we need to change it.
> >
> > Currently we may end up doing a fastset which won't change the
> > MUX settings, but it will drop the power well reference, and that
> > kills the pipe.
> >
> > Cc: stable@vger.kernel.org
> > Cc: Hans de Goede <hdegoede@redhat.com>
> > Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> > Fixes: d19f958db23c ("drm/i915: Enable fastset for non-boot modesets.")
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_display.c  |  9 +++++++++
> >  drivers/gpu/drm/i915/intel_pipe_crc.c | 13 ++++++++++---
> >  2 files changed, 19 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> > index c67f165b466c..691c9a929164 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -12133,6 +12133,7 @@ intel_pipe_config_compare(struct drm_i915_private *dev_priv,
> >  			  struct intel_crtc_state *pipe_config,
> >  			  bool adjust)
> >  {
> > +	struct intel_crtc *crtc = to_intel_crtc(current_config->base.crtc);
> >  	bool ret = true;
> >  	bool fixup_inherited = adjust &&
> >  		(current_config->base.mode.private_flags & I915_MODE_FLAG_INHERITED) &&
> > @@ -12354,6 +12355,14 @@ intel_pipe_config_compare(struct drm_i915_private *dev_priv,
> >  		PIPE_CONF_CHECK_X(gmch_pfit.pgm_ratios);
> >  	PIPE_CONF_CHECK_X(gmch_pfit.lvds_border_bits);
> >  
> > +	/*
> > +	 * Changing the EDP transcoder input mux
> > +	 * (A_ONOFF vs. A_ON) requires a full modeset.
> > +	 */
> > +	if (IS_HASWELL(dev_priv) && crtc->pipe == PIPE_A &&
> > +	    current_config->cpu_transcoder == TRANSCODER_EDP)
> > +		PIPE_CONF_CHECK_BOOL(pch_pfit.enabled);
> 
> I guess it depends if we want to make it a blocker or not..
> 
> > +
> >  	if (!adjust) {
> >  		PIPE_CONF_CHECK_I(pipe_src_w);
> >  		PIPE_CONF_CHECK_I(pipe_src_h);
> > diff --git a/drivers/gpu/drm/i915/intel_pipe_crc.c b/drivers/gpu/drm/i915/intel_pipe_crc.c
> > index e94b5b1bc1b7..e7c7be4911c1 100644
> > --- a/drivers/gpu/drm/i915/intel_pipe_crc.c
> > +++ b/drivers/gpu/drm/i915/intel_pipe_crc.c
> > @@ -311,10 +311,17 @@ intel_crtc_crc_setup_workarounds(struct intel_crtc *crtc, bool enable)
> >  	pipe_config->base.mode_changed = pipe_config->has_psr;
> >  	pipe_config->crc_enabled = enable;
> >  
> > -	if (IS_HASWELL(dev_priv) && crtc->pipe == PIPE_A) {
> > +	if (IS_HASWELL(dev_priv) &&
> > +	    pipe_config->base.active && crtc->pipe == PIPE_A &&
> > +	    pipe_config->cpu_transcoder == TRANSCODER_EDP) {
> > +		bool old_need_power_well = pipe_config->pch_pfit.enabled ||
> > +			pipe_config->pch_pfit.force_thru;
> > +		bool new_need_power_well = pipe_config->pch_pfit.enabled ||
> > +			enable;
> > +
> >  		pipe_config->pch_pfit.force_thru = enable;
> > -		if (pipe_config->cpu_transcoder == TRANSCODER_EDP &&
> > -		    pipe_config->pch_pfit.enabled != enable)
> > +
> > +		if (old_need_power_well != new_need_power_well)
> >  			pipe_config->base.connectors_changed = true;
> 
> Could we get rid of this logic and set mode_changed instead?
> 
> Ah, I see that is done in 2/2, much less surprises then. :)

Yeah, wanted to keep the fix itself minimal for backporting.

> 
> In that case, for both:
> 
> Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>

Thanks. Series pushed.

-- 
Ville Syrjälä
Intel