All of lore.kernel.org
 help / color / mirror / Atom feed
From: Chris Brandt <chris.brandt@renesas.com>
To: Simon Horman <horms@verge.net.au>,
	Rob Herring <robh+dt@kernel.org>,
	Mark
Cc: devicetree@vger.kernel.org, linux-i2c@vger.kernel.org,
	linux-renesas-soc@vger.kernel.org,
	Chris Brandt <chris.brandt@renesas.com>
Subject: [PATCH 1/7] ARM: dts: r7s9210: Add RSPI
Date: Tue, 30 Apr 2019 08:23:03 -0500	[thread overview]
Message-ID: <20190430132309.12473-2-chris.brandt@renesas.com> (raw)
In-Reply-To: <20190430132309.12473-1-chris.brandt@renesas.com>

Add RSPI support for RZ/A2 SoC.

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
---
 arch/arm/boot/dts/r7s9210.dtsi | 45 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 45 insertions(+)

diff --git a/arch/arm/boot/dts/r7s9210.dtsi b/arch/arm/boot/dts/r7s9210.dtsi
index 22baa96f5974..8423004bb4b7 100644
--- a/arch/arm/boot/dts/r7s9210.dtsi
+++ b/arch/arm/boot/dts/r7s9210.dtsi
@@ -146,6 +146,51 @@
 			status = "disabled";
 		};
 
+		spi0: spi@e800c800 {
+			compatible = "renesas,rspi-r7s9210", "renesas,rspi-rz";
+			reg = <0xe800c800 0x24>;
+			interrupts = <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "error", "rx", "tx";
+			clocks = <&cpg CPG_MOD 97>;
+			power-domains = <&cpg>;
+			num-cs = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		spi1: spi@e800d000 {
+			compatible = "renesas,rspi-r7s9210", "renesas,rspi-rz";
+			reg = <0xe800d000 0x24>;
+			interrupts = <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "error", "rx", "tx";
+			clocks = <&cpg CPG_MOD 96>;
+			power-domains = <&cpg>;
+			num-cs = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		spi2: spi@e800d800 {
+			compatible = "renesas,rspi-r7s9210", "renesas,rspi-rz";
+			reg = <0xe800d800 0x24>;
+			interrupts = <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "error", "rx", "tx";
+			clocks = <&cpg CPG_MOD 95>;
+			power-domains = <&cpg>;
+			num-cs = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
 		ostm0: timer@e803b000 {
 			compatible = "renesas,r7s9210-ostm", "renesas,ostm";
 			reg = <0xe803b000 0x30>;
-- 
2.16.1

WARNING: multiple messages have this Message-ID (diff)
From: Chris Brandt <chris.brandt@renesas.com>
To: Simon Horman <horms@verge.net.au>,
	Rob Herring <robh+dt@kernel.org>,
	"Mark Rutland" <mark.rutland@arm.com>
Cc: <devicetree@vger.kernel.org>, <linux-i2c@vger.kernel.org>,
	<linux-renesas-soc@vger.kernel.org>,
	Chris Brandt <chris.brandt@renesas.com>
Subject: [PATCH 1/7] ARM: dts: r7s9210: Add RSPI
Date: Tue, 30 Apr 2019 08:23:03 -0500	[thread overview]
Message-ID: <20190430132309.12473-2-chris.brandt@renesas.com> (raw)
In-Reply-To: <20190430132309.12473-1-chris.brandt@renesas.com>

Add RSPI support for RZ/A2 SoC.

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
---
 arch/arm/boot/dts/r7s9210.dtsi | 45 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 45 insertions(+)

diff --git a/arch/arm/boot/dts/r7s9210.dtsi b/arch/arm/boot/dts/r7s9210.dtsi
index 22baa96f5974..8423004bb4b7 100644
--- a/arch/arm/boot/dts/r7s9210.dtsi
+++ b/arch/arm/boot/dts/r7s9210.dtsi
@@ -146,6 +146,51 @@
 			status = "disabled";
 		};
 
+		spi0: spi@e800c800 {
+			compatible = "renesas,rspi-r7s9210", "renesas,rspi-rz";
+			reg = <0xe800c800 0x24>;
+			interrupts = <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "error", "rx", "tx";
+			clocks = <&cpg CPG_MOD 97>;
+			power-domains = <&cpg>;
+			num-cs = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		spi1: spi@e800d000 {
+			compatible = "renesas,rspi-r7s9210", "renesas,rspi-rz";
+			reg = <0xe800d000 0x24>;
+			interrupts = <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "error", "rx", "tx";
+			clocks = <&cpg CPG_MOD 96>;
+			power-domains = <&cpg>;
+			num-cs = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		spi2: spi@e800d800 {
+			compatible = "renesas,rspi-r7s9210", "renesas,rspi-rz";
+			reg = <0xe800d800 0x24>;
+			interrupts = <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "error", "rx", "tx";
+			clocks = <&cpg CPG_MOD 95>;
+			power-domains = <&cpg>;
+			num-cs = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
 		ostm0: timer@e803b000 {
 			compatible = "renesas,r7s9210-ostm", "renesas,ostm";
 			reg = <0xe803b000 0x30>;
-- 
2.16.1


  reply	other threads:[~2019-04-30 13:23 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-04-30 13:23 [PATCH 0/7] dts: r7s9210: Add RZ/A2 devices Chris Brandt
2019-04-30 13:23 ` Chris Brandt
2019-04-30 13:23 ` Chris Brandt [this message]
2019-04-30 13:23   ` [PATCH 1/7] ARM: dts: r7s9210: Add RSPI Chris Brandt
2019-04-30 14:30   ` Geert Uytterhoeven
2019-04-30 14:30     ` Geert Uytterhoeven
2019-04-30 13:23 ` [PATCH 2/7] ARM: dts: r7s9210: Add Ethernet support Chris Brandt
2019-04-30 13:23   ` Chris Brandt
2019-04-30 14:38   ` Geert Uytterhoeven
2019-04-30 14:38     ` Geert Uytterhoeven
2019-04-30 13:23 ` [PATCH 3/7] dt-bindings: i2c: riic: document r7s9210 support Chris Brandt
2019-04-30 13:23   ` Chris Brandt
2019-04-30 14:47   ` Geert Uytterhoeven
2019-04-30 14:47     ` Geert Uytterhoeven
2019-05-02 21:07   ` Rob Herring
2019-05-02 21:07     ` Rob Herring
2019-05-03 14:53   ` Wolfram Sang
2019-04-30 13:23 ` [PATCH 4/7] ARM: dts: r7s9210: Add RIIC support Chris Brandt
2019-04-30 13:23   ` Chris Brandt
2019-04-30 14:47   ` Geert Uytterhoeven
2019-04-30 14:47     ` Geert Uytterhoeven
2019-04-30 13:23 ` [PATCH 5/7] ARM: dts: r7s9210: Add SDHI support Chris Brandt
2019-04-30 13:23   ` Chris Brandt
2019-04-30 14:53   ` Geert Uytterhoeven
2019-04-30 14:53     ` Geert Uytterhoeven
2019-04-30 13:23 ` [PATCH 6/7] ARM: dts: r7s9210-rza2mevb: Add Ethernet support Chris Brandt
2019-04-30 13:23   ` Chris Brandt
2019-04-30 15:21   ` Geert Uytterhoeven
2019-04-30 15:21     ` Geert Uytterhoeven
2019-04-30 16:03     ` Chris Brandt
2019-04-30 13:23 ` [PATCH 7/7] ARM: dts: r7s9210-rza2mevb: Add SDHI support Chris Brandt
2019-04-30 13:23   ` Chris Brandt
2019-04-30 15:30   ` Geert Uytterhoeven
2019-04-30 15:30     ` Geert Uytterhoeven
2019-05-06 14:02 ` [PATCH 0/7] dts: r7s9210: Add RZ/A2 devices Simon Horman

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20190430132309.12473-2-chris.brandt@renesas.com \
    --to=chris.brandt@renesas.com \
    --cc=devicetree@vger.kernel.org \
    --cc=horms@verge.net.au \
    --cc=linux-i2c@vger.kernel.org \
    --cc=linux-renesas-soc@vger.kernel.org \
    --cc=robh+dt@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.