* [PATCH] RISC-V: Avoid using invalid intermediate translations
@ 2019-04-30 23:07 Palmer Dabbelt
2019-05-01 3:19 ` Anup Patel
0 siblings, 1 reply; 3+ messages in thread
From: Palmer Dabbelt @ 2019-04-30 23:07 UTC (permalink / raw)
To: linux-riscv; +Cc: Palmer Dabbelt
This is almost entirely a comment.
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
---
arch/riscv/kernel/head.S | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S
index fe884cd69abd..fc5534e9cf4b 100644
--- a/arch/riscv/kernel/head.S
+++ b/arch/riscv/kernel/head.S
@@ -99,7 +99,9 @@ relocate:
/*
* Load trampoline page directory, which will cause us to trap to
- * stvec if VA != PA, or simply fall through if VA == PA
+ * stvec if VA != PA, or simply fall through if VA == PA. We need a
+ * full fence here because setup_vm() just wrote these PTEs and we need
+ * to ensure the new translations are in use.
*/
la a0, trampoline_pg_dir
srl a0, a0, PAGE_SHIFT
@@ -118,8 +120,14 @@ relocate:
la gp, __global_pointer$
.option pop
- /* Switch to kernel page tables */
+ /*
+ * Switch to kernel page tables. A full fence is necessary in order to
+ * avoid using the trampoline translations, which are only correct for
+ * the first superpage. Fetching the fence is guarnteed to work
+ * because that first superpage is translated the same way.
+ */
csrw sptbr, a2
+ sfence.vma
ret
--
2.21.0
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^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] RISC-V: Avoid using invalid intermediate translations
2019-04-30 23:07 [PATCH] RISC-V: Avoid using invalid intermediate translations Palmer Dabbelt
@ 2019-05-01 3:19 ` Anup Patel
0 siblings, 0 replies; 3+ messages in thread
From: Anup Patel @ 2019-05-01 3:19 UTC (permalink / raw)
To: Palmer Dabbelt; +Cc: linux-riscv
On Wed, May 1, 2019 at 4:38 AM Palmer Dabbelt <palmer@sifive.com> wrote:
>
> This is almost entirely a comment.
>
> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
> ---
> arch/riscv/kernel/head.S | 12 ++++++++++--
> 1 file changed, 10 insertions(+), 2 deletions(-)
>
> diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S
> index fe884cd69abd..fc5534e9cf4b 100644
> --- a/arch/riscv/kernel/head.S
> +++ b/arch/riscv/kernel/head.S
> @@ -99,7 +99,9 @@ relocate:
>
> /*
> * Load trampoline page directory, which will cause us to trap to
> - * stvec if VA != PA, or simply fall through if VA == PA
> + * stvec if VA != PA, or simply fall through if VA == PA. We need a
> + * full fence here because setup_vm() just wrote these PTEs and we need
> + * to ensure the new translations are in use.
> */
> la a0, trampoline_pg_dir
> srl a0, a0, PAGE_SHIFT
> @@ -118,8 +120,14 @@ relocate:
> la gp, __global_pointer$
> .option pop
>
> - /* Switch to kernel page tables */
> + /*
> + * Switch to kernel page tables. A full fence is necessary in order to
> + * avoid using the trampoline translations, which are only correct for
> + * the first superpage. Fetching the fence is guarnteed to work
> + * because that first superpage is translated the same way.
> + */
> csrw sptbr, a2
> + sfence.vma
>
> ret
>
> --
> 2.21.0
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
LGTM.
Reviewed-by: Anup Patel <anup@brainfault.org>
Regards,
Anup
_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 3+ messages in thread
* [PATCH] RISC-V: Avoid using invalid intermediate translations
@ 2019-06-18 6:12 Palmer Dabbelt
0 siblings, 0 replies; 3+ messages in thread
From: Palmer Dabbelt @ 2019-06-18 6:12 UTC (permalink / raw)
To: linux-riscv; +Cc: Palmer Dabbelt
This is almost entirely a comment.
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
---
arch/riscv/kernel/head.S | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S
index fe884cd69abd..fc5534e9cf4b 100644
--- a/arch/riscv/kernel/head.S
+++ b/arch/riscv/kernel/head.S
@@ -99,7 +99,9 @@ relocate:
/*
* Load trampoline page directory, which will cause us to trap to
- * stvec if VA != PA, or simply fall through if VA == PA
+ * stvec if VA != PA, or simply fall through if VA == PA. We need a
+ * full fence here because setup_vm() just wrote these PTEs and we need
+ * to ensure the new translations are in use.
*/
la a0, trampoline_pg_dir
srl a0, a0, PAGE_SHIFT
@@ -118,8 +120,14 @@ relocate:
la gp, __global_pointer$
.option pop
- /* Switch to kernel page tables */
+ /*
+ * Switch to kernel page tables. A full fence is necessary in order to
+ * avoid using the trampoline translations, which are only correct for
+ * the first superpage. Fetching the fence is guarnteed to work
+ * because that first superpage is translated the same way.
+ */
csrw sptbr, a2
+ sfence.vma
ret
--
2.21.0
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 3+ messages in thread
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2019-04-30 23:07 [PATCH] RISC-V: Avoid using invalid intermediate translations Palmer Dabbelt
2019-05-01 3:19 ` Anup Patel
2019-06-18 6:12 Palmer Dabbelt
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