From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 0/2] drm/i915: C8 fix
Date: Mon, 13 May 2019 16:39:02 +0300 [thread overview]
Message-ID: <20190513133904.20374-1-ville.syrjala@linux.intel.com> (raw)
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Fix toggling between no C8 planes vs. at least one C8 plane.
Test-with: 20190510171900.29593-1-ville.syrjala@linux.intel.com
Ville Syrjälä (2):
drm/i915: Update pipe gamma enable bits when C8 planes are getting
enabled/disabled
drm/i915: Add debugs for the C8 vs. legacy LUT case
drivers/gpu/drm/i915/intel_color.c | 4 +++-
drivers/gpu/drm/i915/intel_display.c | 18 ++++++++++++++++++
2 files changed, 21 insertions(+), 1 deletion(-)
--
2.21.0
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next reply other threads:[~2019-05-13 13:39 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-13 13:39 Ville Syrjala [this message]
2019-05-13 13:39 ` [PATCH 1/2] drm/i915: Update pipe gamma enable bits when C8 planes are getting enabled/disabled Ville Syrjala
2019-05-13 13:39 ` [PATCH 2/2] drm/i915: Add debugs for the C8 vs. legacy LUT case Ville Syrjala
2019-05-28 10:51 ` Maarten Lankhorst
2019-05-28 17:49 ` Ville Syrjälä
2019-05-13 16:20 ` ✓ Fi.CI.BAT: success for drm/i915: C8 fix Patchwork
2019-05-13 21:40 ` ✗ Fi.CI.IGT: failure " Patchwork
2019-05-28 13:03 ` Ville Syrjälä
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