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From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 1/2] drm/i915: Update pipe gamma enable bits when C8 planes are getting enabled/disabled
Date: Mon, 13 May 2019 16:39:03 +0300	[thread overview]
Message-ID: <20190513133904.20374-2-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20190513133904.20374-1-ville.syrjala@linux.intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

When the first C8 plane gets enabled, or the last one gets disabled we
may need to enable/disable the pipe gamma for the other active planes.
Check for that and run through the normal intel_color_check() path.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 05177f37181b..01c5c07bc7ea 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -11176,6 +11176,17 @@ static int icl_check_nv12_planes(struct intel_crtc_state *crtc_state)
 	return 0;
 }
 
+static bool c8_planes_changed(const struct intel_crtc_state *new_crtc_state)
+{
+	struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc);
+	struct intel_atomic_state *state =
+		to_intel_atomic_state(new_crtc_state->base.state);
+	const struct intel_crtc_state *old_crtc_state =
+		intel_atomic_get_old_crtc_state(state, crtc);
+
+	return !old_crtc_state->c8_planes != !new_crtc_state->c8_planes;
+}
+
 static int intel_crtc_atomic_check(struct drm_crtc *crtc,
 				   struct drm_crtc_state *crtc_state)
 {
@@ -11199,6 +11210,13 @@ static int intel_crtc_atomic_check(struct drm_crtc *crtc,
 			return ret;
 	}
 
+	/*
+	 * May need to update pipe gamma enable bits
+	 * when C8 planes are getting enabled/disabled.
+	 */
+	if (c8_planes_changed(pipe_config))
+		crtc_state->color_mgmt_changed = true;
+
 	if (mode_changed || pipe_config->update_pipe ||
 	    crtc_state->color_mgmt_changed) {
 		ret = intel_color_check(pipe_config);
-- 
2.21.0

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  reply	other threads:[~2019-05-13 13:39 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-05-13 13:39 [PATCH 0/2] drm/i915: C8 fix Ville Syrjala
2019-05-13 13:39 ` Ville Syrjala [this message]
2019-05-13 13:39 ` [PATCH 2/2] drm/i915: Add debugs for the C8 vs. legacy LUT case Ville Syrjala
2019-05-28 10:51   ` Maarten Lankhorst
2019-05-28 17:49     ` Ville Syrjälä
2019-05-13 16:20 ` ✓ Fi.CI.BAT: success for drm/i915: C8 fix Patchwork
2019-05-13 21:40 ` ✗ Fi.CI.IGT: failure " Patchwork
2019-05-28 13:03   ` Ville Syrjälä

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