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From: Julien Grall <julien.grall@arm.com>
To: xen-devel@lists.xenproject.org
Cc: Oleksandr_Tyshchenko@epam.com,
	Julien Grall <julien.grall@arm.com>,
	Stefano Stabellini <sstabellini@kernel.org>,
	Andrii_Anisov@epam.com
Subject: [PATCH MM-PART2 v2 03/19] xen/arm: processor: Use BIT(.., UL) instead of _AC(1, U) in SCTLR_ defines
Date: Tue, 14 May 2019 13:21:14 +0100	[thread overview]
Message-ID: <20190514122136.28215-6-julien.grall@arm.com> (raw)
In-Reply-To: <20190514122136.28215-1-julien.grall@arm.com>

Use the pattern BIT(..., UL) to make the code more readable. Note that
unsigned long is used instead of unsigned because SCTLR is technically
32-bit on Arm32 and 64-bit on Arm64.

Signed-off-by: Julien Grall <julien.grall@arm.com>

---
    Changes in v2:
        - Rework the patch to use BIT(..., UL) instead of _BITUL(...).
---
 xen/include/asm-arm/processor.h | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/xen/include/asm-arm/processor.h b/xen/include/asm-arm/processor.h
index f3b68185eb..bbcba061ca 100644
--- a/xen/include/asm-arm/processor.h
+++ b/xen/include/asm-arm/processor.h
@@ -120,20 +120,20 @@
 
 /* Bits specific to SCTLR_EL1 for Arm32 */
 
-#define SCTLR_A32_EL1_V     (_AC(1,U)<<13)
+#define SCTLR_A32_EL1_V     BIT(13, UL)
 
 /* Common bits for SCTLR_ELx for Arm32 */
 
-#define SCTLR_A32_ELx_TE    (_AC(1,U)<<30)
-#define SCTLR_A32_ELx_FI    (_AC(1,U)<<21)
+#define SCTLR_A32_ELx_TE    BIT(30, UL)
+#define SCTLR_A32_ELx_FI    BIT(21, UL)
 
 /* Common bits for SCTLR_ELx on all architectures */
-#define SCTLR_Axx_ELx_EE    (_AC(1,U)<<25)
-#define SCTLR_Axx_ELx_WXN   (_AC(1,U)<<19)
-#define SCTLR_Axx_ELx_I     (_AC(1,U)<<12)
-#define SCTLR_Axx_ELx_C     (_AC(1,U)<<2)
-#define SCTLR_Axx_ELx_A     (_AC(1,U)<<1)
-#define SCTLR_Axx_ELx_M     (_AC(1,U)<<0)
+#define SCTLR_Axx_ELx_EE    BIT(25, UL)
+#define SCTLR_Axx_ELx_WXN   BIT(19, UL)
+#define SCTLR_Axx_ELx_I     BIT(12, UL)
+#define SCTLR_Axx_ELx_C     BIT(2, UL)
+#define SCTLR_Axx_ELx_A     BIT(1, UL)
+#define SCTLR_Axx_ELx_M     BIT(0, UL)
 
 #define HSCTLR_BASE     _AC(0x30c51878,U)
 
-- 
2.11.0


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Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel

WARNING: multiple messages have this Message-ID (diff)
From: Julien Grall <julien.grall@arm.com>
To: xen-devel@lists.xenproject.org
Cc: Oleksandr_Tyshchenko@epam.com,
	Julien Grall <julien.grall@arm.com>,
	Stefano Stabellini <sstabellini@kernel.org>,
	Andrii_Anisov@epam.com
Subject: [Xen-devel] [PATCH MM-PART2 v2 03/19] xen/arm: processor: Use BIT(.., UL) instead of _AC(1, U) in SCTLR_ defines
Date: Tue, 14 May 2019 13:21:14 +0100	[thread overview]
Message-ID: <20190514122136.28215-6-julien.grall@arm.com> (raw)
Message-ID: <20190514122114.ldHjseBRvDMXB2SDZflk--kHYG77UOLo_KE0CeDFPkA@z> (raw)
In-Reply-To: <20190514122136.28215-1-julien.grall@arm.com>

Use the pattern BIT(..., UL) to make the code more readable. Note that
unsigned long is used instead of unsigned because SCTLR is technically
32-bit on Arm32 and 64-bit on Arm64.

Signed-off-by: Julien Grall <julien.grall@arm.com>

---
    Changes in v2:
        - Rework the patch to use BIT(..., UL) instead of _BITUL(...).
---
 xen/include/asm-arm/processor.h | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/xen/include/asm-arm/processor.h b/xen/include/asm-arm/processor.h
index f3b68185eb..bbcba061ca 100644
--- a/xen/include/asm-arm/processor.h
+++ b/xen/include/asm-arm/processor.h
@@ -120,20 +120,20 @@
 
 /* Bits specific to SCTLR_EL1 for Arm32 */
 
-#define SCTLR_A32_EL1_V     (_AC(1,U)<<13)
+#define SCTLR_A32_EL1_V     BIT(13, UL)
 
 /* Common bits for SCTLR_ELx for Arm32 */
 
-#define SCTLR_A32_ELx_TE    (_AC(1,U)<<30)
-#define SCTLR_A32_ELx_FI    (_AC(1,U)<<21)
+#define SCTLR_A32_ELx_TE    BIT(30, UL)
+#define SCTLR_A32_ELx_FI    BIT(21, UL)
 
 /* Common bits for SCTLR_ELx on all architectures */
-#define SCTLR_Axx_ELx_EE    (_AC(1,U)<<25)
-#define SCTLR_Axx_ELx_WXN   (_AC(1,U)<<19)
-#define SCTLR_Axx_ELx_I     (_AC(1,U)<<12)
-#define SCTLR_Axx_ELx_C     (_AC(1,U)<<2)
-#define SCTLR_Axx_ELx_A     (_AC(1,U)<<1)
-#define SCTLR_Axx_ELx_M     (_AC(1,U)<<0)
+#define SCTLR_Axx_ELx_EE    BIT(25, UL)
+#define SCTLR_Axx_ELx_WXN   BIT(19, UL)
+#define SCTLR_Axx_ELx_I     BIT(12, UL)
+#define SCTLR_Axx_ELx_C     BIT(2, UL)
+#define SCTLR_Axx_ELx_A     BIT(1, UL)
+#define SCTLR_Axx_ELx_M     BIT(0, UL)
 
 #define HSCTLR_BASE     _AC(0x30c51878,U)
 
-- 
2.11.0


_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel

  parent reply	other threads:[~2019-05-14 12:21 UTC|newest]

Thread overview: 58+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-05-14 12:21 [PATCH MM-PART2 v2 00/19] xen/arm: Clean-up & fixes in boot/mm code Julien Grall
2019-05-14 12:21 ` [Xen-devel] " Julien Grall
2019-05-14 12:21 ` [PATCH MM-PART1 v3 1/8] xen/arm: Don't boot Xen on platform using AIVIVT instruction caches Julien Grall
2019-05-14 12:21   ` [Xen-devel] " Julien Grall
2019-05-14 12:21 ` [PATCH MM-PART2 v2 01/19] xen/const: Extend the existing macro BIT to take a suffix in parameter Julien Grall
2019-05-14 12:21   ` [Xen-devel] " Julien Grall
2019-05-14 12:21 ` [PATCH MM-PART1 v3 2/8] xen/arm: mm: Consolidate setting SCTLR_EL2.WXN in a single place Julien Grall
2019-05-14 12:21   ` [Xen-devel] " Julien Grall
2019-05-14 12:21 ` [PATCH MM-PART2 v2 02/19] xen/arm: Rename SCTLR_* defines and remove unused one Julien Grall
2019-05-14 12:21   ` [Xen-devel] " Julien Grall
2019-05-14 12:21 ` Julien Grall [this message]
2019-05-14 12:21   ` [Xen-devel] [PATCH MM-PART2 v2 03/19] xen/arm: processor: Use BIT(.., UL) instead of _AC(1, U) in SCTLR_ defines Julien Grall
2019-05-14 12:21 ` [PATCH MM-PART1 v3 3/8] xen/arm: Remove flush_xen_text_tlb_local() Julien Grall
2019-05-14 12:21   ` [Xen-devel] " Julien Grall
2019-05-14 12:21 ` [PATCH MM-PART2 v2 04/19] xen/arm: Rework HSCTLR_BASE Julien Grall
2019-05-14 12:21   ` [Xen-devel] " Julien Grall
2019-05-14 12:21 ` [PATCH MM-PART1 v3 4/8] xen/arm: tlbflush: Clarify the TLB helpers name Julien Grall
2019-05-14 12:21   ` [Xen-devel] " Julien Grall
2019-05-14 12:21 ` [PATCH MM-PART1 v3 5/8] xen/arm: page: Clarify the Xen TLBs " Julien Grall
2019-05-14 12:21   ` [Xen-devel] " Julien Grall
2019-05-14 12:21 ` [PATCH MM-PART2 v2 05/19] xen/arm: Remove parameter cpuid from start_xen Julien Grall
2019-05-14 12:21   ` [Xen-devel] " Julien Grall
2019-05-14 12:21 ` [PATCH MM-PART1 v3 6/8] xen/arm: Gather all TLB flush helpers in tlbflush.h Julien Grall
2019-05-14 12:21   ` [Xen-devel] " Julien Grall
2019-05-14 12:21 ` [PATCH MM-PART2 v2 06/19] xen/arm: Rework secondary_start prototype Julien Grall
2019-05-14 12:21   ` [Xen-devel] " Julien Grall
2019-05-14 12:21 ` [PATCH MM-PART2 v2 07/19] xen/arm64: head: Remove unnecessary comment Julien Grall
2019-05-14 12:21   ` [Xen-devel] " Julien Grall
2019-05-14 12:21 ` [PATCH MM-PART1 v3 7/8] xen/arm: tlbflush: Rework TLB helpers Julien Grall
2019-05-14 12:21   ` [Xen-devel] " Julien Grall
2019-05-14 12:21 ` [PATCH MM-PART2 v2 08/19] xen/arm64: head: Move earlyprintk messages in .rodata.str Julien Grall
2019-05-14 12:21   ` [Xen-devel] " Julien Grall
2019-05-14 12:21 ` [PATCH MM-PART1 v3 8/8] xen/arm: mm: Flush the TLBs even if a mapping failed in create_xen_entries Julien Grall
2019-05-14 12:21   ` [Xen-devel] " Julien Grall
2019-05-14 12:21 ` [PATCH MM-PART2 v2 09/19] xen/arm64: head: Correctly report the HW CPU ID Julien Grall
2019-05-14 12:21   ` [Xen-devel] " Julien Grall
2019-05-14 12:21 ` [PATCH MM-PART2 v2 10/19] xen/arm32: " Julien Grall
2019-05-14 12:21   ` [Xen-devel] " Julien Grall
2019-05-14 12:21 ` [PATCH MM-PART2 v2 11/19] xen/arm32: head: Don't set MAIR0 and MAIR1 Julien Grall
2019-05-14 12:21   ` [Xen-devel] " Julien Grall
2019-05-14 12:21 ` [PATCH MM-PART2 v2 12/19] xen/arm32: head: Always zero r3 before update a page-table entry Julien Grall
2019-05-14 12:21   ` [Xen-devel] " Julien Grall
2019-05-14 12:21 ` [PATCH MM-PART2 v2 13/19] xen/arm32: mm: Avoid to zero and clean cache for CPU0 domheap Julien Grall
2019-05-14 12:21   ` [Xen-devel] " Julien Grall
2019-05-14 12:21 ` [PATCH MM-PART2 v2 14/19] xen/arm32: mm: Avoid cleaning the cache for secondary CPUs page-tables Julien Grall
2019-05-14 12:21   ` [Xen-devel] " Julien Grall
2019-05-14 12:21 ` [PATCH MM-PART2 v2 15/19] xen/arm: mm: Introduce DEFINE_PAGE_TABLE{, S} and use it Julien Grall
2019-05-14 12:21   ` [Xen-devel] " Julien Grall
2019-05-14 12:21 ` [PATCH MM-PART2 v2 16/19] xen/arm: mm: Protect Xen page-table update with a spinlock Julien Grall
2019-05-14 12:21   ` [Xen-devel] " Julien Grall
2019-05-14 12:21 ` [PATCH MM-PART2 v2 17/19] xen/arm: mm: Initialize page-tables earlier Julien Grall
2019-05-14 12:21   ` [Xen-devel] " Julien Grall
2019-05-14 12:21 ` [PATCH MM-PART2 v2 18/19] xen/arm: mm: Check start is always before end in {destroy, modify}_xen_mappings Julien Grall
2019-05-14 12:21   ` [Xen-devel] " Julien Grall
2019-05-14 12:21 ` [PATCH MM-PART2 v2 19/19] xen/arm: Pair call to set_fixmap with call to clear_fixmap in copy_from_paddr Julien Grall
2019-05-14 12:21   ` [Xen-devel] " Julien Grall
2019-05-14 12:23 ` [PATCH MM-PART2 v2 00/19] xen/arm: Clean-up & fixes in boot/mm code Julien Grall
2019-05-14 12:23   ` [Xen-devel] " Julien Grall

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