* [CI] drm/i915: We don't need display's suspend/resume operations when !HAS_DISPLAY
@ 2019-05-23 19:19 Rodrigo Vivi
2019-05-23 19:26 ` Ville Syrjälä
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: Rodrigo Vivi @ 2019-05-23 19:19 UTC (permalink / raw)
To: intel-gfx
Suspend resume is broken if we try to enable/disable dc9 on
cases with disabled displays.
v2: Make checkpatch happy:
-:78: WARNING:BRACES: braces {} are not necessary for single statement blocks
Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
---
drivers/gpu/drm/i915/i915_drv.c | 104 ++++++++++++++++++++++----------
1 file changed, 71 insertions(+), 33 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 83d2eb9e74cb..0100c7e940c6 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -2118,6 +2118,15 @@ get_suspend_mode(struct drm_i915_private *dev_priv, bool hibernate)
return I915_DRM_SUSPEND_MEM;
}
+static void intel_display_suspend_late(struct drm_i915_private *dev_priv)
+{
+ if (!HAS_DISPLAY(dev_priv))
+ return;
+
+ if (INTEL_GEN(dev_priv) >= 11 || IS_GEN9_LP(dev_priv))
+ bxt_enable_dc9(dev_priv);
+}
+
static int i915_drm_suspend_late(struct drm_device *dev, bool hibernation)
{
struct drm_i915_private *dev_priv = to_i915(dev);
@@ -2133,10 +2142,10 @@ static int i915_drm_suspend_late(struct drm_device *dev, bool hibernation)
intel_power_domains_suspend(dev_priv,
get_suspend_mode(dev_priv, hibernation));
+ intel_display_suspend_late(dev_priv);
+
ret = 0;
- if (INTEL_GEN(dev_priv) >= 11 || IS_GEN9_LP(dev_priv))
- bxt_enable_dc9(dev_priv);
- else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
+ if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
hsw_enable_pc8(dev_priv);
else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
ret = vlv_suspend_complete(dev_priv);
@@ -2266,6 +2275,17 @@ static int i915_drm_resume(struct drm_device *dev)
return 0;
}
+static void intel_display_resume_early(struct drm_i915_private *dev_priv)
+{
+ if (!HAS_DISPLAY(dev_priv))
+ return;
+
+ if (INTEL_GEN(dev_priv) >= 11 || IS_GEN9_LP(dev_priv)) {
+ gen9_sanitize_dc_state(dev_priv);
+ bxt_disable_dc9(dev_priv);
+ }
+}
+
static int i915_drm_resume_early(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = to_i915(dev);
@@ -2328,12 +2348,10 @@ static int i915_drm_resume_early(struct drm_device *dev)
i915_check_and_clear_faults(dev_priv);
- if (INTEL_GEN(dev_priv) >= 11 || IS_GEN9_LP(dev_priv)) {
- gen9_sanitize_dc_state(dev_priv);
- bxt_disable_dc9(dev_priv);
- } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {
+ intel_display_resume_early(dev_priv);
+
+ if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
hsw_disable_pc8(dev_priv);
- }
intel_uncore_sanitize(dev_priv);
@@ -2869,6 +2887,20 @@ static int vlv_resume_prepare(struct drm_i915_private *dev_priv,
return ret;
}
+static void intel_runtime_display_suspend(struct drm_i915_private *dev_priv)
+{
+ if (!HAS_DISPLAY(dev_priv))
+ return;
+
+ if (INTEL_GEN(dev_priv) >= 11) {
+ icl_display_core_uninit(dev_priv);
+ bxt_enable_dc9(dev_priv);
+ } else if (IS_GEN9_LP(dev_priv)) {
+ bxt_display_core_uninit(dev_priv);
+ bxt_enable_dc9(dev_priv);
+ }
+}
+
static int intel_runtime_suspend(struct device *kdev)
{
struct pci_dev *pdev = to_pci_dev(kdev);
@@ -2898,14 +2930,10 @@ static int intel_runtime_suspend(struct device *kdev)
intel_uncore_suspend(&dev_priv->uncore);
+ intel_runtime_display_suspend(dev_priv);
+
ret = 0;
- if (INTEL_GEN(dev_priv) >= 11) {
- icl_display_core_uninit(dev_priv);
- bxt_enable_dc9(dev_priv);
- } else if (IS_GEN9_LP(dev_priv)) {
- bxt_display_core_uninit(dev_priv);
- bxt_enable_dc9(dev_priv);
- } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {
+ if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {
hsw_enable_pc8(dev_priv);
} else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
ret = vlv_suspend_complete(dev_priv);
@@ -2967,6 +2995,31 @@ static int intel_runtime_suspend(struct device *kdev)
return 0;
}
+static void intel_runtime_display_resume(struct drm_i915_private *dev_priv)
+{
+ if (!HAS_DISPLAY(dev_priv))
+ return;
+
+ if (INTEL_GEN(dev_priv) >= 11) {
+ bxt_disable_dc9(dev_priv);
+ icl_display_core_init(dev_priv, true);
+ if (dev_priv->csr.dmc_payload) {
+ if (dev_priv->csr.allowed_dc_mask &
+ DC_STATE_EN_UPTO_DC6)
+ skl_enable_dc6(dev_priv);
+ else if (dev_priv->csr.allowed_dc_mask &
+ DC_STATE_EN_UPTO_DC5)
+ gen9_enable_dc5(dev_priv);
+ }
+ } else if (IS_GEN9_LP(dev_priv)) {
+ bxt_disable_dc9(dev_priv);
+ bxt_display_core_init(dev_priv, true);
+ if (dev_priv->csr.dmc_payload &&
+ (dev_priv->csr.allowed_dc_mask & DC_STATE_EN_UPTO_DC5))
+ gen9_enable_dc5(dev_priv);
+ }
+}
+
static int intel_runtime_resume(struct device *kdev)
{
struct pci_dev *pdev = to_pci_dev(kdev);
@@ -2987,24 +3040,9 @@ static int intel_runtime_resume(struct device *kdev)
if (intel_uncore_unclaimed_mmio(&dev_priv->uncore))
DRM_DEBUG_DRIVER("Unclaimed access during suspend, bios?\n");
- if (INTEL_GEN(dev_priv) >= 11) {
- bxt_disable_dc9(dev_priv);
- icl_display_core_init(dev_priv, true);
- if (dev_priv->csr.dmc_payload) {
- if (dev_priv->csr.allowed_dc_mask &
- DC_STATE_EN_UPTO_DC6)
- skl_enable_dc6(dev_priv);
- else if (dev_priv->csr.allowed_dc_mask &
- DC_STATE_EN_UPTO_DC5)
- gen9_enable_dc5(dev_priv);
- }
- } else if (IS_GEN9_LP(dev_priv)) {
- bxt_disable_dc9(dev_priv);
- bxt_display_core_init(dev_priv, true);
- if (dev_priv->csr.dmc_payload &&
- (dev_priv->csr.allowed_dc_mask & DC_STATE_EN_UPTO_DC5))
- gen9_enable_dc5(dev_priv);
- } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {
+ intel_runtime_display_resume(dev_priv);
+
+ if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {
hsw_disable_pc8(dev_priv);
} else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
ret = vlv_resume_prepare(dev_priv, true);
--
2.20.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [CI] drm/i915: We don't need display's suspend/resume operations when !HAS_DISPLAY
2019-05-23 19:19 [CI] drm/i915: We don't need display's suspend/resume operations when !HAS_DISPLAY Rodrigo Vivi
@ 2019-05-23 19:26 ` Ville Syrjälä
2019-05-23 23:10 ` Rodrigo Vivi
2019-05-23 19:55 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: We don't need display's suspend/resume operations when !HAS_DISPLAY (rev2) Patchwork
2019-05-23 20:15 ` ✓ Fi.CI.BAT: success " Patchwork
2 siblings, 1 reply; 5+ messages in thread
From: Ville Syrjälä @ 2019-05-23 19:26 UTC (permalink / raw)
To: Rodrigo Vivi; +Cc: intel-gfx
On Thu, May 23, 2019 at 12:19:35PM -0700, Rodrigo Vivi wrote:
> Suspend resume is broken if we try to enable/disable dc9 on
> cases with disabled displays.
>
> v2: Make checkpatch happy:
> -:78: WARNING:BRACES: braces {} are not necessary for single statement blocks
>
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.c | 104 ++++++++++++++++++++++----------
> 1 file changed, 71 insertions(+), 33 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 83d2eb9e74cb..0100c7e940c6 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -2118,6 +2118,15 @@ get_suspend_mode(struct drm_i915_private *dev_priv, bool hibernate)
> return I915_DRM_SUSPEND_MEM;
> }
>
> +static void intel_display_suspend_late(struct drm_i915_private *dev_priv)
> +{
> + if (!HAS_DISPLAY(dev_priv))
> + return;
> +
> + if (INTEL_GEN(dev_priv) >= 11 || IS_GEN9_LP(dev_priv))
> + bxt_enable_dc9(dev_priv);
> +}
> +
> static int i915_drm_suspend_late(struct drm_device *dev, bool hibernation)
> {
> struct drm_i915_private *dev_priv = to_i915(dev);
> @@ -2133,10 +2142,10 @@ static int i915_drm_suspend_late(struct drm_device *dev, bool hibernation)
> intel_power_domains_suspend(dev_priv,
> get_suspend_mode(dev_priv, hibernation));
>
> + intel_display_suspend_late(dev_priv);
> +
> ret = 0;
> - if (INTEL_GEN(dev_priv) >= 11 || IS_GEN9_LP(dev_priv))
> - bxt_enable_dc9(dev_priv);
> - else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
> + if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
> hsw_enable_pc8(dev_priv);
The pc8 stuff is also about display.
> else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
> ret = vlv_suspend_complete(dev_priv);
> @@ -2266,6 +2275,17 @@ static int i915_drm_resume(struct drm_device *dev)
> return 0;
> }
>
> +static void intel_display_resume_early(struct drm_i915_private *dev_priv)
> +{
> + if (!HAS_DISPLAY(dev_priv))
> + return;
> +
> + if (INTEL_GEN(dev_priv) >= 11 || IS_GEN9_LP(dev_priv)) {
> + gen9_sanitize_dc_state(dev_priv);
> + bxt_disable_dc9(dev_priv);
> + }
> +}
> +
> static int i915_drm_resume_early(struct drm_device *dev)
> {
> struct drm_i915_private *dev_priv = to_i915(dev);
> @@ -2328,12 +2348,10 @@ static int i915_drm_resume_early(struct drm_device *dev)
>
> i915_check_and_clear_faults(dev_priv);
>
> - if (INTEL_GEN(dev_priv) >= 11 || IS_GEN9_LP(dev_priv)) {
> - gen9_sanitize_dc_state(dev_priv);
> - bxt_disable_dc9(dev_priv);
> - } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {
> + intel_display_resume_early(dev_priv);
> +
> + if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
> hsw_disable_pc8(dev_priv);
> - }
>
> intel_uncore_sanitize(dev_priv);
>
> @@ -2869,6 +2887,20 @@ static int vlv_resume_prepare(struct drm_i915_private *dev_priv,
> return ret;
> }
>
> +static void intel_runtime_display_suspend(struct drm_i915_private *dev_priv)
> +{
> + if (!HAS_DISPLAY(dev_priv))
> + return;
> +
> + if (INTEL_GEN(dev_priv) >= 11) {
> + icl_display_core_uninit(dev_priv);
> + bxt_enable_dc9(dev_priv);
> + } else if (IS_GEN9_LP(dev_priv)) {
> + bxt_display_core_uninit(dev_priv);
> + bxt_enable_dc9(dev_priv);
> + }
> +}
> +
> static int intel_runtime_suspend(struct device *kdev)
> {
> struct pci_dev *pdev = to_pci_dev(kdev);
> @@ -2898,14 +2930,10 @@ static int intel_runtime_suspend(struct device *kdev)
>
> intel_uncore_suspend(&dev_priv->uncore);
>
> + intel_runtime_display_suspend(dev_priv);
> +
> ret = 0;
> - if (INTEL_GEN(dev_priv) >= 11) {
> - icl_display_core_uninit(dev_priv);
> - bxt_enable_dc9(dev_priv);
> - } else if (IS_GEN9_LP(dev_priv)) {
> - bxt_display_core_uninit(dev_priv);
> - bxt_enable_dc9(dev_priv);
> - } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {
> + if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {
> hsw_enable_pc8(dev_priv);
> } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
> ret = vlv_suspend_complete(dev_priv);
> @@ -2967,6 +2995,31 @@ static int intel_runtime_suspend(struct device *kdev)
> return 0;
> }
>
> +static void intel_runtime_display_resume(struct drm_i915_private *dev_priv)
> +{
> + if (!HAS_DISPLAY(dev_priv))
> + return;
> +
> + if (INTEL_GEN(dev_priv) >= 11) {
> + bxt_disable_dc9(dev_priv);
> + icl_display_core_init(dev_priv, true);
> + if (dev_priv->csr.dmc_payload) {
> + if (dev_priv->csr.allowed_dc_mask &
> + DC_STATE_EN_UPTO_DC6)
> + skl_enable_dc6(dev_priv);
> + else if (dev_priv->csr.allowed_dc_mask &
> + DC_STATE_EN_UPTO_DC5)
> + gen9_enable_dc5(dev_priv);
> + }
> + } else if (IS_GEN9_LP(dev_priv)) {
> + bxt_disable_dc9(dev_priv);
> + bxt_display_core_init(dev_priv, true);
> + if (dev_priv->csr.dmc_payload &&
> + (dev_priv->csr.allowed_dc_mask & DC_STATE_EN_UPTO_DC5))
> + gen9_enable_dc5(dev_priv);
> + }
> +}
> +
> static int intel_runtime_resume(struct device *kdev)
> {
> struct pci_dev *pdev = to_pci_dev(kdev);
> @@ -2987,24 +3040,9 @@ static int intel_runtime_resume(struct device *kdev)
> if (intel_uncore_unclaimed_mmio(&dev_priv->uncore))
> DRM_DEBUG_DRIVER("Unclaimed access during suspend, bios?\n");
>
> - if (INTEL_GEN(dev_priv) >= 11) {
> - bxt_disable_dc9(dev_priv);
> - icl_display_core_init(dev_priv, true);
> - if (dev_priv->csr.dmc_payload) {
> - if (dev_priv->csr.allowed_dc_mask &
> - DC_STATE_EN_UPTO_DC6)
> - skl_enable_dc6(dev_priv);
> - else if (dev_priv->csr.allowed_dc_mask &
> - DC_STATE_EN_UPTO_DC5)
> - gen9_enable_dc5(dev_priv);
> - }
> - } else if (IS_GEN9_LP(dev_priv)) {
> - bxt_disable_dc9(dev_priv);
> - bxt_display_core_init(dev_priv, true);
> - if (dev_priv->csr.dmc_payload &&
> - (dev_priv->csr.allowed_dc_mask & DC_STATE_EN_UPTO_DC5))
> - gen9_enable_dc5(dev_priv);
> - } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {
> + intel_runtime_display_resume(dev_priv);
> +
> + if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {
> hsw_disable_pc8(dev_priv);
> } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
> ret = vlv_resume_prepare(dev_priv, true);
> --
> 2.20.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for drm/i915: We don't need display's suspend/resume operations when !HAS_DISPLAY (rev2)
2019-05-23 19:19 [CI] drm/i915: We don't need display's suspend/resume operations when !HAS_DISPLAY Rodrigo Vivi
2019-05-23 19:26 ` Ville Syrjälä
@ 2019-05-23 19:55 ` Patchwork
2019-05-23 20:15 ` ✓ Fi.CI.BAT: success " Patchwork
2 siblings, 0 replies; 5+ messages in thread
From: Patchwork @ 2019-05-23 19:55 UTC (permalink / raw)
To: Rodrigo Vivi; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: We don't need display's suspend/resume operations when !HAS_DISPLAY (rev2)
URL : https://patchwork.freedesktop.org/series/60839/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
b106ab9f272e drm/i915: We don't need display's suspend/resume operations when !HAS_DISPLAY
-:14: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line)
#14:
-:78: WARNING:BRACES: braces {} are not necessary for single statement blocks
total: 0 errors, 1 warnings, 0 checks, 155 lines checked
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915: We don't need display's suspend/resume operations when !HAS_DISPLAY (rev2)
2019-05-23 19:19 [CI] drm/i915: We don't need display's suspend/resume operations when !HAS_DISPLAY Rodrigo Vivi
2019-05-23 19:26 ` Ville Syrjälä
2019-05-23 19:55 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: We don't need display's suspend/resume operations when !HAS_DISPLAY (rev2) Patchwork
@ 2019-05-23 20:15 ` Patchwork
2 siblings, 0 replies; 5+ messages in thread
From: Patchwork @ 2019-05-23 20:15 UTC (permalink / raw)
To: Rodrigo Vivi; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: We don't need display's suspend/resume operations when !HAS_DISPLAY (rev2)
URL : https://patchwork.freedesktop.org/series/60839/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6134 -> Patchwork_13084
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13084/
Known issues
------------
Here are the changes found in Patchwork_13084 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_selftest@live_contexts:
- fi-bdw-gvtdvm: [PASS][1] -> [DMESG-FAIL][2] ([fdo#110235])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6134/fi-bdw-gvtdvm/igt@i915_selftest@live_contexts.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13084/fi-bdw-gvtdvm/igt@i915_selftest@live_contexts.html
* igt@i915_selftest@live_evict:
- fi-bsw-kefka: [PASS][3] -> [DMESG-WARN][4] ([fdo#107709])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6134/fi-bsw-kefka/igt@i915_selftest@live_evict.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13084/fi-bsw-kefka/igt@i915_selftest@live_evict.html
#### Possible fixes ####
* igt@i915_pm_rpm@module-reload:
- fi-skl-6770hq: [FAIL][5] ([fdo#108511]) -> [PASS][6]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6134/fi-skl-6770hq/igt@i915_pm_rpm@module-reload.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13084/fi-skl-6770hq/igt@i915_pm_rpm@module-reload.html
* igt@kms_busy@basic-flip-c:
- fi-skl-6770hq: [SKIP][7] ([fdo#109271] / [fdo#109278]) -> [PASS][8] +2 similar issues
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6134/fi-skl-6770hq/igt@kms_busy@basic-flip-c.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13084/fi-skl-6770hq/igt@kms_busy@basic-flip-c.html
* igt@kms_flip@basic-flip-vs-dpms:
- fi-skl-6770hq: [SKIP][9] ([fdo#109271]) -> [PASS][10] +23 similar issues
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6134/fi-skl-6770hq/igt@kms_flip@basic-flip-vs-dpms.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13084/fi-skl-6770hq/igt@kms_flip@basic-flip-vs-dpms.html
#### Warnings ####
* igt@i915_selftest@live_hangcheck:
- fi-apl-guc: [DMESG-FAIL][11] ([fdo#110620]) -> [INCOMPLETE][12] ([fdo#103927] / [fdo#110624])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6134/fi-apl-guc/igt@i915_selftest@live_hangcheck.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13084/fi-apl-guc/igt@i915_selftest@live_hangcheck.html
* igt@runner@aborted:
- fi-apl-guc: [FAIL][13] ([fdo#110622]) -> [FAIL][14] ([fdo#110624])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6134/fi-apl-guc/igt@runner@aborted.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13084/fi-apl-guc/igt@runner@aborted.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#107709]: https://bugs.freedesktop.org/show_bug.cgi?id=107709
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#108511]: https://bugs.freedesktop.org/show_bug.cgi?id=108511
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#110235]: https://bugs.freedesktop.org/show_bug.cgi?id=110235
[fdo#110620]: https://bugs.freedesktop.org/show_bug.cgi?id=110620
[fdo#110622]: https://bugs.freedesktop.org/show_bug.cgi?id=110622
[fdo#110624]: https://bugs.freedesktop.org/show_bug.cgi?id=110624
[fdo#110718]: https://bugs.freedesktop.org/show_bug.cgi?id=110718
Participating hosts (52 -> 46)
------------------------------
Additional (1): fi-icl-y
Missing (7): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-byt-clapper fi-bdw-samus
Build changes
-------------
* Linux: CI_DRM_6134 -> Patchwork_13084
CI_DRM_6134: db92db5bde50c24fd2b99a1b68e6b0898e47b66c @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5011: 7f120c5f1bff2727d50f3c392d81c0f6878b61d6 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_13084: b106ab9f272ef9111d23eccc83c9a7516a18dd27 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
b106ab9f272e drm/i915: We don't need display's suspend/resume operations when !HAS_DISPLAY
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13084/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [CI] drm/i915: We don't need display's suspend/resume operations when !HAS_DISPLAY
2019-05-23 19:26 ` Ville Syrjälä
@ 2019-05-23 23:10 ` Rodrigo Vivi
0 siblings, 0 replies; 5+ messages in thread
From: Rodrigo Vivi @ 2019-05-23 23:10 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
On Thu, May 23, 2019 at 10:26:37PM +0300, Ville Syrjälä wrote:
> On Thu, May 23, 2019 at 12:19:35PM -0700, Rodrigo Vivi wrote:
> > Suspend resume is broken if we try to enable/disable dc9 on
> > cases with disabled displays.
> >
> > v2: Make checkpatch happy:
> > -:78: WARNING:BRACES: braces {} are not necessary for single statement blocks
> >
> > Cc: José Roberto de Souza <jose.souza@intel.com>
> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
> > ---
> > drivers/gpu/drm/i915/i915_drv.c | 104 ++++++++++++++++++++++----------
> > 1 file changed, 71 insertions(+), 33 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> > index 83d2eb9e74cb..0100c7e940c6 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.c
> > +++ b/drivers/gpu/drm/i915/i915_drv.c
> > @@ -2118,6 +2118,15 @@ get_suspend_mode(struct drm_i915_private *dev_priv, bool hibernate)
> > return I915_DRM_SUSPEND_MEM;
> > }
> >
> > +static void intel_display_suspend_late(struct drm_i915_private *dev_priv)
> > +{
> > + if (!HAS_DISPLAY(dev_priv))
> > + return;
> > +
> > + if (INTEL_GEN(dev_priv) >= 11 || IS_GEN9_LP(dev_priv))
> > + bxt_enable_dc9(dev_priv);
> > +}
> > +
> > static int i915_drm_suspend_late(struct drm_device *dev, bool hibernation)
> > {
> > struct drm_i915_private *dev_priv = to_i915(dev);
> > @@ -2133,10 +2142,10 @@ static int i915_drm_suspend_late(struct drm_device *dev, bool hibernation)
> > intel_power_domains_suspend(dev_priv,
> > get_suspend_mode(dev_priv, hibernation));
> >
> > + intel_display_suspend_late(dev_priv);
> > +
> > ret = 0;
> > - if (INTEL_GEN(dev_priv) >= 11 || IS_GEN9_LP(dev_priv))
> > - bxt_enable_dc9(dev_priv);
> > - else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
> > + if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
> > hsw_enable_pc8(dev_priv);
>
> The pc8 stuff is also about display.
Well, I was considering to move that along, but Package-C state
term itself goes beyond display so I decided to leave it here.
However in the end this "Package-C" sequence just moved to DMC right?!
Called after we get to certain Display C state...
so yeap I agree it makes more sense to move everything...
regardless the terms used...
>
> > else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
> > ret = vlv_suspend_complete(dev_priv);
> > @@ -2266,6 +2275,17 @@ static int i915_drm_resume(struct drm_device *dev)
> > return 0;
> > }
> >
> > +static void intel_display_resume_early(struct drm_i915_private *dev_priv)
> > +{
> > + if (!HAS_DISPLAY(dev_priv))
> > + return;
> > +
> > + if (INTEL_GEN(dev_priv) >= 11 || IS_GEN9_LP(dev_priv)) {
> > + gen9_sanitize_dc_state(dev_priv);
> > + bxt_disable_dc9(dev_priv);
> > + }
> > +}
> > +
> > static int i915_drm_resume_early(struct drm_device *dev)
> > {
> > struct drm_i915_private *dev_priv = to_i915(dev);
> > @@ -2328,12 +2348,10 @@ static int i915_drm_resume_early(struct drm_device *dev)
> >
> > i915_check_and_clear_faults(dev_priv);
> >
> > - if (INTEL_GEN(dev_priv) >= 11 || IS_GEN9_LP(dev_priv)) {
> > - gen9_sanitize_dc_state(dev_priv);
> > - bxt_disable_dc9(dev_priv);
> > - } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {
> > + intel_display_resume_early(dev_priv);
> > +
> > + if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
> > hsw_disable_pc8(dev_priv);
> > - }
> >
> > intel_uncore_sanitize(dev_priv);
> >
> > @@ -2869,6 +2887,20 @@ static int vlv_resume_prepare(struct drm_i915_private *dev_priv,
> > return ret;
> > }
> >
> > +static void intel_runtime_display_suspend(struct drm_i915_private *dev_priv)
> > +{
> > + if (!HAS_DISPLAY(dev_priv))
> > + return;
> > +
> > + if (INTEL_GEN(dev_priv) >= 11) {
> > + icl_display_core_uninit(dev_priv);
> > + bxt_enable_dc9(dev_priv);
> > + } else if (IS_GEN9_LP(dev_priv)) {
> > + bxt_display_core_uninit(dev_priv);
> > + bxt_enable_dc9(dev_priv);
> > + }
> > +}
> > +
> > static int intel_runtime_suspend(struct device *kdev)
> > {
> > struct pci_dev *pdev = to_pci_dev(kdev);
> > @@ -2898,14 +2930,10 @@ static int intel_runtime_suspend(struct device *kdev)
> >
> > intel_uncore_suspend(&dev_priv->uncore);
> >
> > + intel_runtime_display_suspend(dev_priv);
> > +
> > ret = 0;
> > - if (INTEL_GEN(dev_priv) >= 11) {
> > - icl_display_core_uninit(dev_priv);
> > - bxt_enable_dc9(dev_priv);
> > - } else if (IS_GEN9_LP(dev_priv)) {
> > - bxt_display_core_uninit(dev_priv);
> > - bxt_enable_dc9(dev_priv);
> > - } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {
> > + if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {
> > hsw_enable_pc8(dev_priv);
> > } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
> > ret = vlv_suspend_complete(dev_priv);
> > @@ -2967,6 +2995,31 @@ static int intel_runtime_suspend(struct device *kdev)
> > return 0;
> > }
> >
> > +static void intel_runtime_display_resume(struct drm_i915_private *dev_priv)
> > +{
> > + if (!HAS_DISPLAY(dev_priv))
> > + return;
> > +
> > + if (INTEL_GEN(dev_priv) >= 11) {
> > + bxt_disable_dc9(dev_priv);
> > + icl_display_core_init(dev_priv, true);
> > + if (dev_priv->csr.dmc_payload) {
> > + if (dev_priv->csr.allowed_dc_mask &
> > + DC_STATE_EN_UPTO_DC6)
> > + skl_enable_dc6(dev_priv);
> > + else if (dev_priv->csr.allowed_dc_mask &
> > + DC_STATE_EN_UPTO_DC5)
> > + gen9_enable_dc5(dev_priv);
> > + }
> > + } else if (IS_GEN9_LP(dev_priv)) {
> > + bxt_disable_dc9(dev_priv);
> > + bxt_display_core_init(dev_priv, true);
> > + if (dev_priv->csr.dmc_payload &&
> > + (dev_priv->csr.allowed_dc_mask & DC_STATE_EN_UPTO_DC5))
> > + gen9_enable_dc5(dev_priv);
> > + }
> > +}
> > +
> > static int intel_runtime_resume(struct device *kdev)
> > {
> > struct pci_dev *pdev = to_pci_dev(kdev);
> > @@ -2987,24 +3040,9 @@ static int intel_runtime_resume(struct device *kdev)
> > if (intel_uncore_unclaimed_mmio(&dev_priv->uncore))
> > DRM_DEBUG_DRIVER("Unclaimed access during suspend, bios?\n");
> >
> > - if (INTEL_GEN(dev_priv) >= 11) {
> > - bxt_disable_dc9(dev_priv);
> > - icl_display_core_init(dev_priv, true);
> > - if (dev_priv->csr.dmc_payload) {
> > - if (dev_priv->csr.allowed_dc_mask &
> > - DC_STATE_EN_UPTO_DC6)
> > - skl_enable_dc6(dev_priv);
> > - else if (dev_priv->csr.allowed_dc_mask &
> > - DC_STATE_EN_UPTO_DC5)
> > - gen9_enable_dc5(dev_priv);
> > - }
> > - } else if (IS_GEN9_LP(dev_priv)) {
> > - bxt_disable_dc9(dev_priv);
> > - bxt_display_core_init(dev_priv, true);
> > - if (dev_priv->csr.dmc_payload &&
> > - (dev_priv->csr.allowed_dc_mask & DC_STATE_EN_UPTO_DC5))
> > - gen9_enable_dc5(dev_priv);
> > - } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {
> > + intel_runtime_display_resume(dev_priv);
> > +
> > + if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {
> > hsw_disable_pc8(dev_priv);
> > } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
> > ret = vlv_resume_prepare(dev_priv, true);
> > --
> > 2.20.1
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
> --
> Ville Syrjälä
> Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2019-05-23 23:10 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-05-23 19:19 [CI] drm/i915: We don't need display's suspend/resume operations when !HAS_DISPLAY Rodrigo Vivi
2019-05-23 19:26 ` Ville Syrjälä
2019-05-23 23:10 ` Rodrigo Vivi
2019-05-23 19:55 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: We don't need display's suspend/resume operations when !HAS_DISPLAY (rev2) Patchwork
2019-05-23 20:15 ` ✓ Fi.CI.BAT: success " Patchwork
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