* [PATCH v2 0/4] net: phy: dp83867: add some fixes
@ 2019-05-27 6:16 Max Uvarov
2019-05-27 6:16 ` [PATCH v2 1/4] net: phy: dp83867: fix speed 10 in sgmii mode Max Uvarov
` (3 more replies)
0 siblings, 4 replies; 11+ messages in thread
From: Max Uvarov @ 2019-05-27 6:16 UTC (permalink / raw)
To: netdev; +Cc: andrew, f.fainelli, hkallweit1, davem, Max Uvarov
v2: fix minor comments by Heiner Kallweit and Florian Fainelli.
Max Uvarov (4):
net: phy: dp83867: fix speed 10 in sgmii mode
net: phy: dp83867: increase SGMII autoneg timer duration
net: phy: dp83867: do not call config_init twice
net: phy: dp83867: Set up RGMII TX delay
drivers/net/phy/dp83867.c | 36 ++++++++++++++++++++++++++++++++----
1 file changed, 32 insertions(+), 4 deletions(-)
--
2.17.1
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v2 1/4] net: phy: dp83867: fix speed 10 in sgmii mode
2019-05-27 6:16 [PATCH v2 0/4] net: phy: dp83867: add some fixes Max Uvarov
@ 2019-05-27 6:16 ` Max Uvarov
2019-05-27 6:39 ` Heiner Kallweit
2019-05-27 19:12 ` Florian Fainelli
2019-05-27 6:16 ` [PATCH v2 2/4] net: phy: dp83867: increase SGMII autoneg timer duration Max Uvarov
` (2 subsequent siblings)
3 siblings, 2 replies; 11+ messages in thread
From: Max Uvarov @ 2019-05-27 6:16 UTC (permalink / raw)
To: netdev; +Cc: andrew, f.fainelli, hkallweit1, davem, Max Uvarov
For support 10Mps sped in SGMII mode DP83867_10M_SGMII_RATE_ADAPT bit
of DP83867_10M_SGMII_CFG register has to be cleared by software.
That does not affect speeds 100 and 1000 so can be done on init.
Signed-off-by: Max Uvarov <muvarov@gmail.com>
Cc: Heiner Kallweit <hkallweit1@gmail.com>
---
drivers/net/phy/dp83867.c | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c
index fd35131a0c39..75861b8f3b4d 100644
--- a/drivers/net/phy/dp83867.c
+++ b/drivers/net/phy/dp83867.c
@@ -30,6 +30,7 @@
#define DP83867_STRAP_STS1 0x006E
#define DP83867_RGMIIDCTL 0x0086
#define DP83867_IO_MUX_CFG 0x0170
+#define DP83867_10M_SGMII_CFG 0x016F
#define DP83867_SW_RESET BIT(15)
#define DP83867_SW_RESTART BIT(14)
@@ -74,6 +75,9 @@
/* CFG4 bits */
#define DP83867_CFG4_PORT_MIRROR_EN BIT(0)
+/* 10M_SGMII_CFG bits */
+#define DP83867_10M_SGMII_RATE_ADAPT BIT(7)
+
enum {
DP83867_PORT_MIRROING_KEEP,
DP83867_PORT_MIRROING_EN,
@@ -277,6 +281,22 @@ static int dp83867_config_init(struct phy_device *phydev)
DP83867_IO_MUX_CFG_IO_IMPEDANCE_CTRL);
}
+ if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
+ /* For support SPEED_10 in SGMII mode
+ * DP83867_10M_SGMII_RATE_ADAPT bit
+ * has to be cleared by software. That
+ * does not affect SPEED_100 and
+ * SPEED_1000.
+ */
+ val = phy_read_mmd(phydev, DP83867_DEVADDR,
+ DP83867_10M_SGMII_CFG);
+ val &= ~DP83867_10M_SGMII_RATE_ADAPT;
+ ret = phy_write_mmd(phydev, DP83867_DEVADDR,
+ DP83867_10M_SGMII_CFG, val);
+ if (ret)
+ return ret;
+ }
+
/* Enable Interrupt output INT_OE in CFG3 register */
if (phy_interrupt_is_valid(phydev)) {
val = phy_read(phydev, DP83867_CFG3);
--
2.17.1
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v2 2/4] net: phy: dp83867: increase SGMII autoneg timer duration
2019-05-27 6:16 [PATCH v2 0/4] net: phy: dp83867: add some fixes Max Uvarov
2019-05-27 6:16 ` [PATCH v2 1/4] net: phy: dp83867: fix speed 10 in sgmii mode Max Uvarov
@ 2019-05-27 6:16 ` Max Uvarov
2019-05-27 6:44 ` Heiner Kallweit
2019-05-27 19:16 ` Florian Fainelli
2019-05-27 6:16 ` [PATCH v2 3/4] net: phy: dp83867: do not call config_init twice Max Uvarov
2019-05-27 6:16 ` [PATCH v2 4/4] net: phy: dp83867: Set up RGMII TX delay Max Uvarov
3 siblings, 2 replies; 11+ messages in thread
From: Max Uvarov @ 2019-05-27 6:16 UTC (permalink / raw)
To: netdev; +Cc: andrew, f.fainelli, hkallweit1, davem, Max Uvarov
After reset SGMII Autoneg timer is set to 2us (bits 6 and 5 are 01).
That us not enough to finalize autonegatiation on some devices.
Increase this timer duration to maximum supported 16ms.
Signed-off-by: Max Uvarov <muvarov@gmail.com>
Cc: Heiner Kallweit <hkallweit1@gmail.com>
---
drivers/net/phy/dp83867.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c
index 75861b8f3b4d..5fafcc091525 100644
--- a/drivers/net/phy/dp83867.c
+++ b/drivers/net/phy/dp83867.c
@@ -295,6 +295,16 @@ static int dp83867_config_init(struct phy_device *phydev)
DP83867_10M_SGMII_CFG, val);
if (ret)
return ret;
+
+ /* After reset SGMII Autoneg timer is set to 2us (bits 6 and 5
+ * are 01). That us not enough to finalize autoneg on some
+ * devices. Increase this timer duration to maximum 16ms.
+ */
+ val = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_CFG4);
+ val &= ~(BIT(5) | BIT(6));
+ ret = phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_CFG4, val);
+ if (ret)
+ return ret;
}
/* Enable Interrupt output INT_OE in CFG3 register */
--
2.17.1
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v2 3/4] net: phy: dp83867: do not call config_init twice
2019-05-27 6:16 [PATCH v2 0/4] net: phy: dp83867: add some fixes Max Uvarov
2019-05-27 6:16 ` [PATCH v2 1/4] net: phy: dp83867: fix speed 10 in sgmii mode Max Uvarov
2019-05-27 6:16 ` [PATCH v2 2/4] net: phy: dp83867: increase SGMII autoneg timer duration Max Uvarov
@ 2019-05-27 6:16 ` Max Uvarov
2019-05-27 19:15 ` Florian Fainelli
2019-05-27 6:16 ` [PATCH v2 4/4] net: phy: dp83867: Set up RGMII TX delay Max Uvarov
3 siblings, 1 reply; 11+ messages in thread
From: Max Uvarov @ 2019-05-27 6:16 UTC (permalink / raw)
To: netdev; +Cc: andrew, f.fainelli, hkallweit1, davem, Max Uvarov
Phy state machine calls _config_init just after
reset.
Signed-off-by: Max Uvarov <muvarov@gmail.com>
---
drivers/net/phy/dp83867.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c
index 5fafcc091525..a1c0b2128de2 100644
--- a/drivers/net/phy/dp83867.c
+++ b/drivers/net/phy/dp83867.c
@@ -337,7 +337,7 @@ static int dp83867_phy_reset(struct phy_device *phydev)
usleep_range(10, 20);
- return dp83867_config_init(phydev);
+ return 0;
}
static struct phy_driver dp83867_driver[] = {
--
2.17.1
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v2 4/4] net: phy: dp83867: Set up RGMII TX delay
2019-05-27 6:16 [PATCH v2 0/4] net: phy: dp83867: add some fixes Max Uvarov
` (2 preceding siblings ...)
2019-05-27 6:16 ` [PATCH v2 3/4] net: phy: dp83867: do not call config_init twice Max Uvarov
@ 2019-05-27 6:16 ` Max Uvarov
2019-05-27 19:15 ` Florian Fainelli
3 siblings, 1 reply; 11+ messages in thread
From: Max Uvarov @ 2019-05-27 6:16 UTC (permalink / raw)
To: netdev; +Cc: andrew, f.fainelli, hkallweit1, davem, Max Uvarov
PHY_INTERFACE_MODE_RGMII_RXID is less then TXID
so code to set tx delay is never called.
Fixes: 2a10154abcb75 ("net: phy: dp83867: Add TI dp83867 phy")
Signed-off-by: Max Uvarov <muvarov@gmail.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
---
drivers/net/phy/dp83867.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c
index a1c0b2128de2..69e36d3d0968 100644
--- a/drivers/net/phy/dp83867.c
+++ b/drivers/net/phy/dp83867.c
@@ -251,10 +251,8 @@ static int dp83867_config_init(struct phy_device *phydev)
ret = phy_write(phydev, MII_DP83867_PHYCTRL, val);
if (ret)
return ret;
- }
- if ((phydev->interface >= PHY_INTERFACE_MODE_RGMII_ID) &&
- (phydev->interface <= PHY_INTERFACE_MODE_RGMII_RXID)) {
+ /* Set up RGMII delays */
val = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_RGMIICTL);
if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
--
2.17.1
^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH v2 1/4] net: phy: dp83867: fix speed 10 in sgmii mode
2019-05-27 6:16 ` [PATCH v2 1/4] net: phy: dp83867: fix speed 10 in sgmii mode Max Uvarov
@ 2019-05-27 6:39 ` Heiner Kallweit
2019-05-27 19:12 ` Florian Fainelli
1 sibling, 0 replies; 11+ messages in thread
From: Heiner Kallweit @ 2019-05-27 6:39 UTC (permalink / raw)
To: Max Uvarov, netdev; +Cc: andrew, f.fainelli, davem
On 27.05.2019 08:16, Max Uvarov wrote:
> For support 10Mps sped in SGMII mode DP83867_10M_SGMII_RATE_ADAPT bit
> of DP83867_10M_SGMII_CFG register has to be cleared by software.
> That does not affect speeds 100 and 1000 so can be done on init.
>
> Signed-off-by: Max Uvarov <muvarov@gmail.com>
> Cc: Heiner Kallweit <hkallweit1@gmail.com>
> ---
> drivers/net/phy/dp83867.c | 20 ++++++++++++++++++++
> 1 file changed, 20 insertions(+)
>
> diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c
> index fd35131a0c39..75861b8f3b4d 100644
> --- a/drivers/net/phy/dp83867.c
> +++ b/drivers/net/phy/dp83867.c
> @@ -30,6 +30,7 @@
> #define DP83867_STRAP_STS1 0x006E
> #define DP83867_RGMIIDCTL 0x0086
> #define DP83867_IO_MUX_CFG 0x0170
> +#define DP83867_10M_SGMII_CFG 0x016F
>
> #define DP83867_SW_RESET BIT(15)
> #define DP83867_SW_RESTART BIT(14)
> @@ -74,6 +75,9 @@
> /* CFG4 bits */
> #define DP83867_CFG4_PORT_MIRROR_EN BIT(0)
>
> +/* 10M_SGMII_CFG bits */
> +#define DP83867_10M_SGMII_RATE_ADAPT BIT(7)
> +
> enum {
> DP83867_PORT_MIRROING_KEEP,
> DP83867_PORT_MIRROING_EN,
> @@ -277,6 +281,22 @@ static int dp83867_config_init(struct phy_device *phydev)
> DP83867_IO_MUX_CFG_IO_IMPEDANCE_CTRL);
> }
>
> + if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
> + /* For support SPEED_10 in SGMII mode
> + * DP83867_10M_SGMII_RATE_ADAPT bit
> + * has to be cleared by software. That
> + * does not affect SPEED_100 and
> + * SPEED_1000.
> + */
> + val = phy_read_mmd(phydev, DP83867_DEVADDR,
> + DP83867_10M_SGMII_CFG);
> + val &= ~DP83867_10M_SGMII_RATE_ADAPT;
> + ret = phy_write_mmd(phydev, DP83867_DEVADDR,
> + DP83867_10M_SGMII_CFG, val);
I think I mentioned it before: This can be simplified by using
phy_modify_mmd(). Same applies to patch 2.
> + if (ret)
> + return ret;
> + }
> +
> /* Enable Interrupt output INT_OE in CFG3 register */
> if (phy_interrupt_is_valid(phydev)) {
> val = phy_read(phydev, DP83867_CFG3);
>
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v2 2/4] net: phy: dp83867: increase SGMII autoneg timer duration
2019-05-27 6:16 ` [PATCH v2 2/4] net: phy: dp83867: increase SGMII autoneg timer duration Max Uvarov
@ 2019-05-27 6:44 ` Heiner Kallweit
2019-05-27 19:16 ` Florian Fainelli
1 sibling, 0 replies; 11+ messages in thread
From: Heiner Kallweit @ 2019-05-27 6:44 UTC (permalink / raw)
To: Max Uvarov, netdev; +Cc: andrew, f.fainelli, davem
On 27.05.2019 08:16, Max Uvarov wrote:
> After reset SGMII Autoneg timer is set to 2us (bits 6 and 5 are 01).
> That us not enough to finalize autonegatiation on some devices.
> Increase this timer duration to maximum supported 16ms.
>
> Signed-off-by: Max Uvarov <muvarov@gmail.com>
> Cc: Heiner Kallweit <hkallweit1@gmail.com>
> ---
> drivers/net/phy/dp83867.c | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c
> index 75861b8f3b4d..5fafcc091525 100644
> --- a/drivers/net/phy/dp83867.c
> +++ b/drivers/net/phy/dp83867.c
> @@ -295,6 +295,16 @@ static int dp83867_config_init(struct phy_device *phydev)
> DP83867_10M_SGMII_CFG, val);
> if (ret)
> return ret;
> +
> + /* After reset SGMII Autoneg timer is set to 2us (bits 6 and 5
> + * are 01). That us not enough to finalize autoneg on some
> + * devices. Increase this timer duration to maximum 16ms.
> + */
> + val = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_CFG4);
> + val &= ~(BIT(5) | BIT(6));
Using bit numbers directly isn't nice. Better define a mask and constants for
the different combinations of bit 5 and 6 like:
#define FOO_SGMII_ANEG_TIMER_MASK 0x60
#define FOO_SGMII_ANEG_TIMER_2US 0x20
#define FOO_SGMII_ANEG_TIMER_16MS 0x60
And then use the constants in phy_modify_mmd().
> + ret = phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_CFG4, val);
> + if (ret)
> + return ret;
> }
>
> /* Enable Interrupt output INT_OE in CFG3 register */
>
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v2 1/4] net: phy: dp83867: fix speed 10 in sgmii mode
2019-05-27 6:16 ` [PATCH v2 1/4] net: phy: dp83867: fix speed 10 in sgmii mode Max Uvarov
2019-05-27 6:39 ` Heiner Kallweit
@ 2019-05-27 19:12 ` Florian Fainelli
1 sibling, 0 replies; 11+ messages in thread
From: Florian Fainelli @ 2019-05-27 19:12 UTC (permalink / raw)
To: Max Uvarov, netdev; +Cc: andrew, hkallweit1, davem
On 5/26/2019 11:16 PM, Max Uvarov wrote:
> For support 10Mps sped in SGMII mode DP83867_10M_SGMII_RATE_ADAPT bit
> of DP83867_10M_SGMII_CFG register has to be cleared by software.
> That does not affect speeds 100 and 1000 so can be done on init.
s/support/supporting/
s/sped/speed/
>
> Signed-off-by: Max Uvarov <muvarov@gmail.com>
> Cc: Heiner Kallweit <hkallweit1@gmail.com>
> ---
> drivers/net/phy/dp83867.c | 20 ++++++++++++++++++++
> 1 file changed, 20 insertions(+)
>
> diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c
> index fd35131a0c39..75861b8f3b4d 100644
> --- a/drivers/net/phy/dp83867.c
> +++ b/drivers/net/phy/dp83867.c
> @@ -30,6 +30,7 @@
> #define DP83867_STRAP_STS1 0x006E
> #define DP83867_RGMIIDCTL 0x0086
> #define DP83867_IO_MUX_CFG 0x0170
> +#define DP83867_10M_SGMII_CFG 0x016F
>
> #define DP83867_SW_RESET BIT(15)
> #define DP83867_SW_RESTART BIT(14)
> @@ -74,6 +75,9 @@
> /* CFG4 bits */
> #define DP83867_CFG4_PORT_MIRROR_EN BIT(0)
>
> +/* 10M_SGMII_CFG bits */
> +#define DP83867_10M_SGMII_RATE_ADAPT BIT(7)
> +
> enum {
> DP83867_PORT_MIRROING_KEEP,
> DP83867_PORT_MIRROING_EN,
> @@ -277,6 +281,22 @@ static int dp83867_config_init(struct phy_device *phydev)
> DP83867_IO_MUX_CFG_IO_IMPEDANCE_CTRL);
> }
>
> + if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
> + /* For support SPEED_10 in SGMII mode
> + * DP83867_10M_SGMII_RATE_ADAPT bit
> + * has to be cleared by software. That
> + * does not affect SPEED_100 and
> + * SPEED_1000.
Likewise, s/support/supporting/ with that and Heiner's suggestion to use
phy_modify_mmd():
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
> + */
> + val = phy_read_mmd(phydev, DP83867_DEVADDR,
> + DP83867_10M_SGMII_CFG);
> + val &= ~DP83867_10M_SGMII_RATE_ADAPT;
> + ret = phy_write_mmd(phydev, DP83867_DEVADDR,
> + DP83867_10M_SGMII_CFG, val);
> + if (ret)
> + return ret;
> + }
> +
> /* Enable Interrupt output INT_OE in CFG3 register */
> if (phy_interrupt_is_valid(phydev)) {
> val = phy_read(phydev, DP83867_CFG3);
>
--
Florian
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v2 4/4] net: phy: dp83867: Set up RGMII TX delay
2019-05-27 6:16 ` [PATCH v2 4/4] net: phy: dp83867: Set up RGMII TX delay Max Uvarov
@ 2019-05-27 19:15 ` Florian Fainelli
0 siblings, 0 replies; 11+ messages in thread
From: Florian Fainelli @ 2019-05-27 19:15 UTC (permalink / raw)
To: Max Uvarov, netdev; +Cc: andrew, hkallweit1, davem
On 5/26/2019 11:16 PM, Max Uvarov wrote:
> PHY_INTERFACE_MODE_RGMII_RXID is less then TXID
> so code to set tx delay is never called.
> Fixes: 2a10154abcb75 ("net: phy: dp83867: Add TI dp83867 phy")
>
> Signed-off-by: Max Uvarov <muvarov@gmail.com>
> Cc: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
--
Florian
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v2 3/4] net: phy: dp83867: do not call config_init twice
2019-05-27 6:16 ` [PATCH v2 3/4] net: phy: dp83867: do not call config_init twice Max Uvarov
@ 2019-05-27 19:15 ` Florian Fainelli
0 siblings, 0 replies; 11+ messages in thread
From: Florian Fainelli @ 2019-05-27 19:15 UTC (permalink / raw)
To: Max Uvarov, netdev; +Cc: andrew, hkallweit1, davem
On 5/26/2019 11:16 PM, Max Uvarov wrote:
> Phy state machine calls _config_init just after
> reset.
>
> Signed-off-by: Max Uvarov <muvarov@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
--
Florian
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v2 2/4] net: phy: dp83867: increase SGMII autoneg timer duration
2019-05-27 6:16 ` [PATCH v2 2/4] net: phy: dp83867: increase SGMII autoneg timer duration Max Uvarov
2019-05-27 6:44 ` Heiner Kallweit
@ 2019-05-27 19:16 ` Florian Fainelli
1 sibling, 0 replies; 11+ messages in thread
From: Florian Fainelli @ 2019-05-27 19:16 UTC (permalink / raw)
To: Max Uvarov, netdev; +Cc: andrew, hkallweit1, davem
On 5/26/2019 11:16 PM, Max Uvarov wrote:
> After reset SGMII Autoneg timer is set to 2us (bits 6 and 5 are 01).
> That us not enough to finalize autonegatiation on some devices.
s/us/is/
> Increase this timer duration to maximum supported 16ms.
>
> Signed-off-by: Max Uvarov <muvarov@gmail.com>
> Cc: Heiner Kallweit <hkallweit1@gmail.com>
> ---
> drivers/net/phy/dp83867.c | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c
> index 75861b8f3b4d..5fafcc091525 100644
> --- a/drivers/net/phy/dp83867.c
> +++ b/drivers/net/phy/dp83867.c
> @@ -295,6 +295,16 @@ static int dp83867_config_init(struct phy_device *phydev)
> DP83867_10M_SGMII_CFG, val);
> if (ret)
> return ret;
> +
> + /* After reset SGMII Autoneg timer is set to 2us (bits 6 and 5
> + * are 01). That us not enough to finalize autoneg on some
Likewise, same typo was carried over here. With that fixed and Heiner's
suggestions addressed:
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
--
Florian
^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2019-05-27 19:16 UTC | newest]
Thread overview: 11+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-05-27 6:16 [PATCH v2 0/4] net: phy: dp83867: add some fixes Max Uvarov
2019-05-27 6:16 ` [PATCH v2 1/4] net: phy: dp83867: fix speed 10 in sgmii mode Max Uvarov
2019-05-27 6:39 ` Heiner Kallweit
2019-05-27 19:12 ` Florian Fainelli
2019-05-27 6:16 ` [PATCH v2 2/4] net: phy: dp83867: increase SGMII autoneg timer duration Max Uvarov
2019-05-27 6:44 ` Heiner Kallweit
2019-05-27 19:16 ` Florian Fainelli
2019-05-27 6:16 ` [PATCH v2 3/4] net: phy: dp83867: do not call config_init twice Max Uvarov
2019-05-27 19:15 ` Florian Fainelli
2019-05-27 6:16 ` [PATCH v2 4/4] net: phy: dp83867: Set up RGMII TX delay Max Uvarov
2019-05-27 19:15 ` Florian Fainelli
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