* [PATCH 01/10] drm/i915: Add windowing for primary planes on gen2/3 and chv
@ 2019-05-29 16:05 Ville Syrjala
2019-05-29 16:05 ` [PATCH 02/10] drm/i915: Disable sprite gamma on ivb-bdw Ville Syrjala
` (14 more replies)
0 siblings, 15 replies; 20+ messages in thread
From: Ville Syrjala @ 2019-05-29 16:05 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Plane B and C (note that we don't actually expose plane C currently)
on gen2/3 have a window generator, as does the primary plane on CHV
pipe B. So let's allow positioning of these planes freely within the
pipe source area.
Plane A on gen2/3 seems to have some kind of partial window generator
which would allow you to cut the plane off midway through the scanout,
but it would still have to start at the top-left corner of the pipe,
and it would have to be full width. That's doesn't sound all that
useful, so for simplicity let's just keep to the idea that plane A
has to be fullscreen.
Gen4 removed the plane A/B windowing support entirely, and it wasn't
reintroduced until SKL (apart from the CHV pipe B special case).
v2: s/plane/i9xx_plane/ etc. (James)
v3: Make it less confusing
v4: Deal with IS_GEN()
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 40 +++++++++++++++++++++-------
1 file changed, 31 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index c3e2b1178d55..3b913d59cc74 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3710,10 +3710,27 @@ int i9xx_check_plane_surface(struct intel_plane_state *plane_state)
return 0;
}
+static bool i9xx_plane_has_windowing(struct intel_plane *plane)
+{
+ struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
+ enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;
+
+ if (IS_CHERRYVIEW(dev_priv))
+ return i9xx_plane == PLANE_B;
+ else if (INTEL_GEN(dev_priv) >= 5 || IS_G4X(dev_priv))
+ return false;
+ else if (IS_GEN(dev_priv, 4))
+ return i9xx_plane == PLANE_C;
+ else
+ return i9xx_plane == PLANE_B ||
+ i9xx_plane == PLANE_C;
+}
+
static int
i9xx_plane_check(struct intel_crtc_state *crtc_state,
struct intel_plane_state *plane_state)
{
+ struct intel_plane *plane = to_intel_plane(plane_state->base.plane);
int ret;
ret = chv_plane_check_rotation(plane_state);
@@ -3724,7 +3741,8 @@ i9xx_plane_check(struct intel_crtc_state *crtc_state,
&crtc_state->base,
DRM_PLANE_HELPER_NO_SCALING,
DRM_PLANE_HELPER_NO_SCALING,
- false, true);
+ i9xx_plane_has_windowing(plane),
+ true);
if (ret)
return ret;
@@ -3753,6 +3771,10 @@ static void i9xx_update_plane(struct intel_plane *plane,
u32 linear_offset;
int x = plane_state->color_plane[0].x;
int y = plane_state->color_plane[0].y;
+ int crtc_x = plane_state->base.dst.x1;
+ int crtc_y = plane_state->base.dst.y1;
+ int crtc_w = drm_rect_width(&plane_state->base.dst);
+ int crtc_h = drm_rect_height(&plane_state->base.dst);
unsigned long irqflags;
u32 dspaddr_offset;
u32 dspcntr;
@@ -3771,18 +3793,18 @@ static void i9xx_update_plane(struct intel_plane *plane,
I915_WRITE_FW(DSPSTRIDE(i9xx_plane), plane_state->color_plane[0].stride);
if (INTEL_GEN(dev_priv) < 4) {
- /* pipesrc and dspsize control the size that is scaled from,
- * which should always be the user's requested size.
+ /*
+ * PLANE_A doesn't actually have a full window
+ * generator but let's assume we still need to
+ * program whatever is there.
*/
- I915_WRITE_FW(DSPPOS(i9xx_plane), 0);
+ I915_WRITE_FW(DSPPOS(i9xx_plane), (crtc_y << 16) | crtc_x);
I915_WRITE_FW(DSPSIZE(i9xx_plane),
- ((crtc_state->pipe_src_h - 1) << 16) |
- (crtc_state->pipe_src_w - 1));
+ ((crtc_h - 1) << 16) | (crtc_w - 1));
} else if (IS_CHERRYVIEW(dev_priv) && i9xx_plane == PLANE_B) {
- I915_WRITE_FW(PRIMPOS(i9xx_plane), 0);
+ I915_WRITE_FW(PRIMPOS(i9xx_plane), (crtc_y << 16) | crtc_x);
I915_WRITE_FW(PRIMSIZE(i9xx_plane),
- ((crtc_state->pipe_src_h - 1) << 16) |
- (crtc_state->pipe_src_w - 1));
+ ((crtc_h - 1) << 16) | (crtc_w - 1));
I915_WRITE_FW(PRIMCNSTALPHA(i9xx_plane), 0);
}
--
2.21.0
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH 02/10] drm/i915: Disable sprite gamma on ivb-bdw
2019-05-29 16:05 [PATCH 01/10] drm/i915: Add windowing for primary planes on gen2/3 and chv Ville Syrjala
@ 2019-05-29 16:05 ` Ville Syrjala
2019-05-29 16:05 ` [PATCH 03/10] drm/i915: Program plane gamma ramps Ville Syrjala
` (13 subsequent siblings)
14 siblings, 0 replies; 20+ messages in thread
From: Ville Syrjala @ 2019-05-29 16:05 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
We don't currently have any use for the sprite gamma on ivb-bdw.
Let's disable it. We already do that on skl+.
On pre-ivb there is no way to disable the sprite gamma, and it
only affects YCbCr pixel formats, whereas on ivb+ it also
affects RGB formats.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 2 +-
drivers/gpu/drm/i915/intel_sprite.c | 2 ++
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 07e3f861a92e..1c3d7aa1a52b 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -6448,7 +6448,7 @@ enum {
#define SPRITE_YUV_ORDER_VYUY (3 << 16)
#define SPRITE_ROTATE_180 (1 << 15)
#define SPRITE_TRICKLE_FEED_DISABLE (1 << 14)
-#define SPRITE_INT_GAMMA_ENABLE (1 << 13)
+#define SPRITE_INT_GAMMA_DISABLE (1 << 13)
#define SPRITE_TILED (1 << 10)
#define SPRITE_DEST_KEY (1 << 2)
#define _SPRA_LINOFF 0x70284
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index c180815faabd..446df1f0ce85 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -1013,6 +1013,8 @@ static u32 ivb_sprite_ctl(const struct intel_crtc_state *crtc_state,
return 0;
}
+ sprctl |= SPRITE_INT_GAMMA_DISABLE;
+
if (plane_state->base.color_encoding == DRM_COLOR_YCBCR_BT709)
sprctl |= SPRITE_YUV_TO_RGB_CSC_FORMAT_BT709;
--
2.21.0
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH 03/10] drm/i915: Program plane gamma ramps
2019-05-29 16:05 [PATCH 01/10] drm/i915: Add windowing for primary planes on gen2/3 and chv Ville Syrjala
2019-05-29 16:05 ` [PATCH 02/10] drm/i915: Disable sprite gamma on ivb-bdw Ville Syrjala
@ 2019-05-29 16:05 ` Ville Syrjala
2019-05-29 16:05 ` [PATCH 04/10] drm/i915: Deal with cpp==8 for g4x watermarks Ville Syrjala
` (12 subsequent siblings)
14 siblings, 0 replies; 20+ messages in thread
From: Ville Syrjala @ 2019-05-29 16:05 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
All sprite planes have a progammable gamma ramp. Set it up with
a linear ramp on all platforms. This actually matches the reset
value but soon we'll want to reprogram this ramp on some machines,
so let's just set it up across the board.
Note that on pre-IVB the hardware bypassed the gamma unit
unless a YCbCr pixel format is used.
v2: Add parens around << in ilk_linear_gamma()
Skip gamma programming for RGB on pre-IVB
s/DVSGAMC/DVSGAMC_G4X/
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 31 ++++--
drivers/gpu/drm/i915/intel_sprite.c | 142 ++++++++++++++++++++++++++++
2 files changed, 166 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 1c3d7aa1a52b..01861ee37d17 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -6275,6 +6275,7 @@ enum {
#define _DSPATILEOFF 0x701A4 /* 965+ only */
#define _DSPAOFFSET 0x701A4 /* HSW */
#define _DSPASURFLIVE 0x701AC
+#define _DSPAGAMC 0x701E0
#define DSPCNTR(plane) _MMIO_PIPE2(plane, _DSPACNTR)
#define DSPADDR(plane) _MMIO_PIPE2(plane, _DSPAADDR)
@@ -6286,6 +6287,7 @@ enum {
#define DSPLINOFF(plane) DSPADDR(plane)
#define DSPOFFSET(plane) _MMIO_PIPE2(plane, _DSPAOFFSET)
#define DSPSURFLIVE(plane) _MMIO_PIPE2(plane, _DSPASURFLIVE)
+#define DSPGAMC(plane, i) _MMIO(_PIPE2(plane, _DSPAGAMC) + (5 - (i)) * 4) /* plane C only, 6 x u0.8 */
/* CHV pipe B blender and primary plane */
#define _CHV_BLEND_A 0x60a00
@@ -6388,6 +6390,7 @@ enum {
#define _DVSAKEYMAXVAL 0x721a0
#define _DVSATILEOFF 0x721a4
#define _DVSASURFLIVE 0x721ac
+#define _DVSAGAMC_G4X 0x721e0 /* g4x */
#define _DVSASCALE 0x72204
#define DVS_SCALE_ENABLE (1 << 31)
#define DVS_FILTER_MASK (3 << 29)
@@ -6396,7 +6399,8 @@ enum {
#define DVS_FILTER_SOFTENING (2 << 29)
#define DVS_VERTICAL_OFFSET_HALF (1 << 28) /* must be enabled below */
#define DVS_VERTICAL_OFFSET_ENABLE (1 << 27)
-#define _DVSAGAMC 0x72300
+#define _DVSAGAMC_ILK 0x72300 /* ilk/snb */
+#define _DVSAGAMCMAX_ILK 0x72340 /* ilk/snb */
#define _DVSBCNTR 0x73180
#define _DVSBLINOFF 0x73184
@@ -6409,8 +6413,10 @@ enum {
#define _DVSBKEYMAXVAL 0x731a0
#define _DVSBTILEOFF 0x731a4
#define _DVSBSURFLIVE 0x731ac
+#define _DVSBGAMC_G4X 0x731e0 /* g4x */
#define _DVSBSCALE 0x73204
-#define _DVSBGAMC 0x73300
+#define _DVSBGAMC_ILK 0x73300 /* ilk/snb */
+#define _DVSBGAMCMAX_ILK 0x73340 /* ilk/snb */
#define DVSCNTR(pipe) _MMIO_PIPE(pipe, _DVSACNTR, _DVSBCNTR)
#define DVSLINOFF(pipe) _MMIO_PIPE(pipe, _DVSALINOFF, _DVSBLINOFF)
@@ -6424,6 +6430,9 @@ enum {
#define DVSKEYVAL(pipe) _MMIO_PIPE(pipe, _DVSAKEYVAL, _DVSBKEYVAL)
#define DVSKEYMSK(pipe) _MMIO_PIPE(pipe, _DVSAKEYMSK, _DVSBKEYMSK)
#define DVSSURFLIVE(pipe) _MMIO_PIPE(pipe, _DVSASURFLIVE, _DVSBSURFLIVE)
+#define DVSGAMC_G4X(pipe, i) _MMIO(_PIPE(pipe, _DVSAGAMC_G4X, _DVSBGAMC_G4X) + (5 - (i)) * 4) /* 6 x u0.8 */
+#define DVSGAMC_ILK(pipe, i) _MMIO(_PIPE(pipe, _DVSAGAMC_ILK, _DVSBGAMC_ILK) + (i) * 4) /* 16 x u0.10 */
+#define DVSGAMCMAX_ILK(pipe, i) _MMIO(_PIPE(pipe, _DVSAGAMCMAX_ILK, _DVSBGAMCMAX_ILK) + (i) * 4) /* 3 x u1.10 */
#define _SPRA_CTL 0x70280
#define SPRITE_ENABLE (1 << 31)
@@ -6471,6 +6480,8 @@ enum {
#define SPRITE_VERTICAL_OFFSET_HALF (1 << 28) /* must be enabled below */
#define SPRITE_VERTICAL_OFFSET_ENABLE (1 << 27)
#define _SPRA_GAMC 0x70400
+#define _SPRA_GAMC16 0x70440
+#define _SPRA_GAMC17 0x7044c
#define _SPRB_CTL 0x71280
#define _SPRB_LINOFF 0x71284
@@ -6486,6 +6497,8 @@ enum {
#define _SPRB_SURFLIVE 0x712ac
#define _SPRB_SCALE 0x71304
#define _SPRB_GAMC 0x71400
+#define _SPRB_GAMC16 0x71440
+#define _SPRB_GAMC17 0x7144c
#define SPRCTL(pipe) _MMIO_PIPE(pipe, _SPRA_CTL, _SPRB_CTL)
#define SPRLINOFF(pipe) _MMIO_PIPE(pipe, _SPRA_LINOFF, _SPRB_LINOFF)
@@ -6499,7 +6512,9 @@ enum {
#define SPRTILEOFF(pipe) _MMIO_PIPE(pipe, _SPRA_TILEOFF, _SPRB_TILEOFF)
#define SPROFFSET(pipe) _MMIO_PIPE(pipe, _SPRA_OFFSET, _SPRB_OFFSET)
#define SPRSCALE(pipe) _MMIO_PIPE(pipe, _SPRA_SCALE, _SPRB_SCALE)
-#define SPRGAMC(pipe) _MMIO_PIPE(pipe, _SPRA_GAMC, _SPRB_GAMC)
+#define SPRGAMC(pipe, i) _MMIO(_PIPE(pipe, _SPRA_GAMC, _SPRB_GAMC) + (i) * 4) /* 16 x u0.10 */
+#define SPRGAMC16(pipe, i) _MMIO(_PIPE(pipe, _SPRA_GAMC16, _SPRB_GAMC16) + (i) * 4) /* 3 x u1.10 */
+#define SPRGAMC17(pipe, i) _MMIO(_PIPE(pipe, _SPRA_GAMC17, _SPRB_GAMC17) + (i) * 4) /* 3 x u2.10 */
#define SPRSURFLIVE(pipe) _MMIO_PIPE(pipe, _SPRA_SURFLIVE, _SPRB_SURFLIVE)
#define _SPACNTR (VLV_DISPLAY_BASE + 0x72180)
@@ -6542,7 +6557,7 @@ enum {
#define _SPACLRC1 (VLV_DISPLAY_BASE + 0x721d4)
#define SP_SH_SIN(x) (((x) & 0x7ff) << 16) /* s4.7 */
#define SP_SH_COS(x) (x) /* u3.7 */
-#define _SPAGAMC (VLV_DISPLAY_BASE + 0x721f4)
+#define _SPAGAMC (VLV_DISPLAY_BASE + 0x721e0)
#define _SPBCNTR (VLV_DISPLAY_BASE + 0x72280)
#define _SPBLINOFF (VLV_DISPLAY_BASE + 0x72284)
@@ -6557,10 +6572,12 @@ enum {
#define _SPBCONSTALPHA (VLV_DISPLAY_BASE + 0x722a8)
#define _SPBCLRC0 (VLV_DISPLAY_BASE + 0x722d0)
#define _SPBCLRC1 (VLV_DISPLAY_BASE + 0x722d4)
-#define _SPBGAMC (VLV_DISPLAY_BASE + 0x722f4)
+#define _SPBGAMC (VLV_DISPLAY_BASE + 0x722e0)
+#define _VLV_SPR(pipe, plane_id, reg_a, reg_b) \
+ _PIPE((pipe) * 2 + (plane_id) - PLANE_SPRITE0, (reg_a), (reg_b))
#define _MMIO_VLV_SPR(pipe, plane_id, reg_a, reg_b) \
- _MMIO_PIPE((pipe) * 2 + (plane_id) - PLANE_SPRITE0, (reg_a), (reg_b))
+ _MMIO(_VLV_SPR((pipe), (plane_id), (reg_a), (reg_b)))
#define SPCNTR(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPACNTR, _SPBCNTR)
#define SPLINOFF(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPALINOFF, _SPBLINOFF)
@@ -6575,7 +6592,7 @@ enum {
#define SPCONSTALPHA(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPACONSTALPHA, _SPBCONSTALPHA)
#define SPCLRC0(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPACLRC0, _SPBCLRC0)
#define SPCLRC1(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPACLRC1, _SPBCLRC1)
-#define SPGAMC(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPAGAMC, _SPBGAMC)
+#define SPGAMC(pipe, plane_id, i) _MMIO(_VLV_SPR((pipe), (plane_id), _SPAGAMC, _SPBGAMC) + (5 - (i)) * 4) /* 6 x u0.10 */
/*
* CHV pipe B sprite CSC
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index 446df1f0ce85..d87479b2081a 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -683,6 +683,16 @@ skl_plane_get_hw_state(struct intel_plane *plane,
return ret;
}
+static void i9xx_plane_linear_gamma(u16 gamma[8])
+{
+ /* The points are not evenly spaced. */
+ static const u8 in[8] = { 0, 1, 2, 4, 8, 16, 24, 32 };
+ int i;
+
+ for (i = 0; i < 8; i++)
+ gamma[i] = (in[i] << 8) / 32;
+}
+
static void
chv_update_csc(const struct intel_plane_state *plane_state)
{
@@ -858,6 +868,31 @@ static u32 vlv_sprite_ctl(const struct intel_crtc_state *crtc_state,
return sprctl;
}
+static void vlv_update_gamma(const struct intel_plane_state *plane_state)
+{
+ struct intel_plane *plane = to_intel_plane(plane_state->base.plane);
+ struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
+ const struct drm_framebuffer *fb = plane_state->base.fb;
+ enum pipe pipe = plane->pipe;
+ enum plane_id plane_id = plane->id;
+ u16 gamma[8];
+ int i;
+
+ /* Seems RGB data bypasses the gamma always */
+ if (!fb->format->is_yuv)
+ return;
+
+ i9xx_plane_linear_gamma(gamma);
+
+ /* FIXME these register are single buffered :( */
+ /* The two end points are implicit (0.0 and 1.0) */
+ for (i = 1; i < 8 - 1; i++)
+ I915_WRITE_FW(SPGAMC(pipe, plane_id, i - 1),
+ gamma[i] << 16 |
+ gamma[i] << 8 |
+ gamma[i]);
+}
+
static void
vlv_update_plane(struct intel_plane *plane,
const struct intel_crtc_state *crtc_state,
@@ -916,6 +951,7 @@ vlv_update_plane(struct intel_plane *plane,
intel_plane_ggtt_offset(plane_state) + sprsurf_offset);
vlv_update_clrc(plane_state);
+ vlv_update_gamma(plane_state);
spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
}
@@ -1035,6 +1071,45 @@ static u32 ivb_sprite_ctl(const struct intel_crtc_state *crtc_state,
return sprctl;
}
+static void ivb_sprite_linear_gamma(u16 gamma[18])
+{
+ int i;
+
+ for (i = 0; i < 17; i++)
+ gamma[i] = (i << 10) / 16;
+
+ gamma[i] = 3 << 10;
+ i++;
+}
+
+static void ivb_update_gamma(const struct intel_plane_state *plane_state)
+{
+ struct intel_plane *plane = to_intel_plane(plane_state->base.plane);
+ struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
+ enum pipe pipe = plane->pipe;
+ u16 gamma[18];
+ int i;
+
+ ivb_sprite_linear_gamma(gamma);
+
+ /* FIXME these register are single buffered :( */
+ for (i = 0; i < 16; i++)
+ I915_WRITE_FW(SPRGAMC(pipe, i),
+ gamma[i] << 20 |
+ gamma[i] << 10 |
+ gamma[i]);
+
+ I915_WRITE_FW(SPRGAMC16(pipe, 0), gamma[i]);
+ I915_WRITE_FW(SPRGAMC16(pipe, 1), gamma[i]);
+ I915_WRITE_FW(SPRGAMC16(pipe, 2), gamma[i]);
+ i++;
+
+ I915_WRITE_FW(SPRGAMC17(pipe, 0), gamma[i]);
+ I915_WRITE_FW(SPRGAMC17(pipe, 1), gamma[i]);
+ I915_WRITE_FW(SPRGAMC17(pipe, 2), gamma[i]);
+ i++;
+}
+
static void
ivb_update_plane(struct intel_plane *plane,
const struct intel_crtc_state *crtc_state,
@@ -1101,6 +1176,8 @@ ivb_update_plane(struct intel_plane *plane,
I915_WRITE_FW(SPRSURF(pipe),
intel_plane_ggtt_offset(plane_state) + sprsurf_offset);
+ ivb_update_gamma(plane_state);
+
spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
}
@@ -1226,6 +1303,66 @@ static u32 g4x_sprite_ctl(const struct intel_crtc_state *crtc_state,
return dvscntr;
}
+static void g4x_update_gamma(const struct intel_plane_state *plane_state)
+{
+ struct intel_plane *plane = to_intel_plane(plane_state->base.plane);
+ struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
+ const struct drm_framebuffer *fb = plane_state->base.fb;
+ enum pipe pipe = plane->pipe;
+ u16 gamma[8];
+ int i;
+
+ /* Seems RGB data bypasses the gamma always */
+ if (!fb->format->is_yuv)
+ return;
+
+ i9xx_plane_linear_gamma(gamma);
+
+ /* FIXME these register are single buffered :( */
+ /* The two end points are implicit (0.0 and 1.0) */
+ for (i = 1; i < 8 - 1; i++)
+ I915_WRITE_FW(DVSGAMC_G4X(pipe, i - 1),
+ gamma[i] << 16 |
+ gamma[i] << 8 |
+ gamma[i]);
+}
+
+static void ilk_sprite_linear_gamma(u16 gamma[17])
+{
+ int i;
+
+ for (i = 0; i < 17; i++)
+ gamma[i] = (i << 10) / 16;
+}
+
+static void ilk_update_gamma(const struct intel_plane_state *plane_state)
+{
+ struct intel_plane *plane = to_intel_plane(plane_state->base.plane);
+ struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
+ const struct drm_framebuffer *fb = plane_state->base.fb;
+ enum pipe pipe = plane->pipe;
+ u16 gamma[17];
+ int i;
+
+ /* Seems RGB data bypasses the gamma always */
+ if (!fb->format->is_yuv)
+ return;
+
+ ilk_sprite_linear_gamma(gamma);
+
+ /* FIXME these register are single buffered :( */
+ for (i = 0; i < 16; i++)
+ I915_WRITE_FW(DVSGAMC_ILK(pipe, i),
+ gamma[i] << 20 |
+ gamma[i] << 10 |
+ gamma[i]);
+
+ I915_WRITE_FW(DVSGAMCMAX_ILK(pipe, 0), gamma[i]);
+ I915_WRITE_FW(DVSGAMCMAX_ILK(pipe, 1), gamma[i]);
+ I915_WRITE_FW(DVSGAMCMAX_ILK(pipe, 2), gamma[i]);
+ i++;
+}
+
static void
g4x_update_plane(struct intel_plane *plane,
const struct intel_crtc_state *crtc_state,
@@ -1285,6 +1422,11 @@ g4x_update_plane(struct intel_plane *plane,
I915_WRITE_FW(DVSSURF(pipe),
intel_plane_ggtt_offset(plane_state) + dvssurf_offset);
+ if (IS_G4X(dev_priv))
+ g4x_update_gamma(plane_state);
+ else
+ ilk_update_gamma(plane_state);
+
spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
}
--
2.21.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH 04/10] drm/i915: Deal with cpp==8 for g4x watermarks
2019-05-29 16:05 [PATCH 01/10] drm/i915: Add windowing for primary planes on gen2/3 and chv Ville Syrjala
2019-05-29 16:05 ` [PATCH 02/10] drm/i915: Disable sprite gamma on ivb-bdw Ville Syrjala
2019-05-29 16:05 ` [PATCH 03/10] drm/i915: Program plane gamma ramps Ville Syrjala
@ 2019-05-29 16:05 ` Ville Syrjala
2019-05-29 16:06 ` [PATCH 05/10] drm/i915: Cosmetic fix for skl+ plane switch statement Ville Syrjala
` (11 subsequent siblings)
14 siblings, 0 replies; 20+ messages in thread
From: Ville Syrjala @ 2019-05-29 16:05 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Docs tell us that on g4x we have to compute the SR watermarks
using 4 bytes per pixel. I'm going to assume that only applies
to 1 and 2 byte per pixel formats, and not 8 byte per pixel
formats. That seems like a recipe for an insufficient watermark
which could lead to underruns. Use the maximum of the two numbers
instead.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_pm.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 8f82cb72d3a6..f275698e859d 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -1115,6 +1115,8 @@ static u16 g4x_compute_wm(const struct intel_crtc_state *crtc_state,
if (!intel_wm_plane_visible(crtc_state, plane_state))
return 0;
+ cpp = plane_state->base.fb->format->cpp[0];
+
/*
* Not 100% sure which way ELK should go here as the
* spec only says CL/CTG should assume 32bpp and BW
@@ -1128,9 +1130,7 @@ static u16 g4x_compute_wm(const struct intel_crtc_state *crtc_state,
*/
if (IS_GM45(dev_priv) && plane->id == PLANE_PRIMARY &&
level != G4X_WM_LEVEL_NORMAL)
- cpp = 4;
- else
- cpp = plane_state->base.fb->format->cpp[0];
+ cpp = max(cpp, 4u);
clock = adjusted_mode->crtc_clock;
htotal = adjusted_mode->crtc_htotal;
--
2.21.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH 05/10] drm/i915: Cosmetic fix for skl+ plane switch statement
2019-05-29 16:05 [PATCH 01/10] drm/i915: Add windowing for primary planes on gen2/3 and chv Ville Syrjala
` (2 preceding siblings ...)
2019-05-29 16:05 ` [PATCH 04/10] drm/i915: Deal with cpp==8 for g4x watermarks Ville Syrjala
@ 2019-05-29 16:06 ` Ville Syrjala
2019-05-29 16:06 ` [PATCH 06/10] drm/i915: Clean up skl vs. icl plane formats Ville Syrjala
` (10 subsequent siblings)
14 siblings, 0 replies; 20+ messages in thread
From: Ville Syrjala @ 2019-05-29 16:06 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
One of the switch cases has the byte order vs. format bits
reversed to all the other cases. Appease the ocd and reorder
them.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 3b913d59cc74..77cde6de69e4 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3967,10 +3967,10 @@ static u32 skl_plane_ctl_format(u32 pixel_format)
case DRM_FORMAT_XRGB8888:
case DRM_FORMAT_ARGB8888:
return PLANE_CTL_FORMAT_XRGB_8888;
+ case DRM_FORMAT_XBGR2101010:
+ return PLANE_CTL_FORMAT_XRGB_2101010 | PLANE_CTL_ORDER_RGBX;
case DRM_FORMAT_XRGB2101010:
return PLANE_CTL_FORMAT_XRGB_2101010;
- case DRM_FORMAT_XBGR2101010:
- return PLANE_CTL_ORDER_RGBX | PLANE_CTL_FORMAT_XRGB_2101010;
case DRM_FORMAT_XBGR16161616F:
case DRM_FORMAT_ABGR16161616F:
return PLANE_CTL_FORMAT_XRGB_16161616F | PLANE_CTL_ORDER_RGBX;
--
2.21.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH 06/10] drm/i915: Clean up skl vs. icl plane formats
2019-05-29 16:05 [PATCH 01/10] drm/i915: Add windowing for primary planes on gen2/3 and chv Ville Syrjala
` (3 preceding siblings ...)
2019-05-29 16:06 ` [PATCH 05/10] drm/i915: Cosmetic fix for skl+ plane switch statement Ville Syrjala
@ 2019-05-29 16:06 ` Ville Syrjala
2019-05-29 16:06 ` [PATCH 07/10] drm/i915: Add support for half float framebuffers for skl+ Ville Syrjala
` (9 subsequent siblings)
14 siblings, 0 replies; 20+ messages in thread
From: Ville Syrjala @ 2019-05-29 16:06 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Split the format lists for different planes on skl/icl more cleanly.
On skl+ we have just two types of planes: those can do planar and
those that can't.
On icl we have three types of planes: hdr planes, sdr planes that
can do planar, and sdr planes that can't do planar. Those latter two
are the same set of planes we must when choose from when picking the
UV vs. Y plane for planar scanout. So we shall just designate
them sdr uv planes and sdr y planes.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_sprite.c | 149 ++++++++++++++--------------
1 file changed, 74 insertions(+), 75 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index d87479b2081a..9dd228f716c3 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -1996,52 +1996,6 @@ static const u32 skl_plane_formats[] = {
DRM_FORMAT_VYUY,
};
-static const u32 icl_plane_formats[] = {
- DRM_FORMAT_C8,
- DRM_FORMAT_RGB565,
- DRM_FORMAT_XRGB8888,
- DRM_FORMAT_XBGR8888,
- DRM_FORMAT_ARGB8888,
- DRM_FORMAT_ABGR8888,
- DRM_FORMAT_XRGB2101010,
- DRM_FORMAT_XBGR2101010,
- DRM_FORMAT_YUYV,
- DRM_FORMAT_YVYU,
- DRM_FORMAT_UYVY,
- DRM_FORMAT_VYUY,
- DRM_FORMAT_Y210,
- DRM_FORMAT_Y212,
- DRM_FORMAT_Y216,
- DRM_FORMAT_XVYU2101010,
- DRM_FORMAT_XVYU12_16161616,
- DRM_FORMAT_XVYU16161616,
-};
-
-static const u32 icl_hdr_plane_formats[] = {
- DRM_FORMAT_C8,
- DRM_FORMAT_RGB565,
- DRM_FORMAT_XRGB8888,
- DRM_FORMAT_XBGR8888,
- DRM_FORMAT_ARGB8888,
- DRM_FORMAT_ABGR8888,
- DRM_FORMAT_XRGB2101010,
- DRM_FORMAT_XBGR2101010,
- DRM_FORMAT_XRGB16161616F,
- DRM_FORMAT_XBGR16161616F,
- DRM_FORMAT_ARGB16161616F,
- DRM_FORMAT_ABGR16161616F,
- DRM_FORMAT_YUYV,
- DRM_FORMAT_YVYU,
- DRM_FORMAT_UYVY,
- DRM_FORMAT_VYUY,
- DRM_FORMAT_Y210,
- DRM_FORMAT_Y212,
- DRM_FORMAT_Y216,
- DRM_FORMAT_XVYU2101010,
- DRM_FORMAT_XVYU12_16161616,
- DRM_FORMAT_XVYU16161616,
-};
-
static const u32 skl_planar_formats[] = {
DRM_FORMAT_C8,
DRM_FORMAT_RGB565,
@@ -2077,7 +2031,28 @@ static const u32 glk_planar_formats[] = {
DRM_FORMAT_P016,
};
-static const u32 icl_planar_formats[] = {
+static const u32 icl_sdr_y_plane_formats[] = {
+ DRM_FORMAT_C8,
+ DRM_FORMAT_RGB565,
+ DRM_FORMAT_XRGB8888,
+ DRM_FORMAT_XBGR8888,
+ DRM_FORMAT_ARGB8888,
+ DRM_FORMAT_ABGR8888,
+ DRM_FORMAT_XRGB2101010,
+ DRM_FORMAT_XBGR2101010,
+ DRM_FORMAT_YUYV,
+ DRM_FORMAT_YVYU,
+ DRM_FORMAT_UYVY,
+ DRM_FORMAT_VYUY,
+ DRM_FORMAT_Y210,
+ DRM_FORMAT_Y212,
+ DRM_FORMAT_Y216,
+ DRM_FORMAT_XVYU2101010,
+ DRM_FORMAT_XVYU12_16161616,
+ DRM_FORMAT_XVYU16161616,
+};
+
+static const u32 icl_sdr_uv_plane_formats[] = {
DRM_FORMAT_C8,
DRM_FORMAT_RGB565,
DRM_FORMAT_XRGB8888,
@@ -2102,7 +2077,7 @@ static const u32 icl_planar_formats[] = {
DRM_FORMAT_XVYU16161616,
};
-static const u32 icl_hdr_planar_formats[] = {
+static const u32 icl_hdr_plane_formats[] = {
DRM_FORMAT_C8,
DRM_FORMAT_RGB565,
DRM_FORMAT_XRGB8888,
@@ -2353,9 +2328,6 @@ static bool skl_plane_has_fbc(struct drm_i915_private *dev_priv,
static bool skl_plane_has_planar(struct drm_i915_private *dev_priv,
enum pipe pipe, enum plane_id plane_id)
{
- if (INTEL_GEN(dev_priv) >= 11)
- return plane_id <= PLANE_SPRITE3;
-
/* Display WA #0870: skl, bxt */
if (IS_SKYLAKE(dev_priv) || IS_BROXTON(dev_priv))
return false;
@@ -2369,6 +2341,48 @@ static bool skl_plane_has_planar(struct drm_i915_private *dev_priv,
return true;
}
+static const u32 *skl_get_plane_formats(struct drm_i915_private *dev_priv,
+ enum pipe pipe, enum plane_id plane_id,
+ int *num_formats)
+{
+ if (skl_plane_has_planar(dev_priv, pipe, plane_id)) {
+ *num_formats = ARRAY_SIZE(skl_planar_formats);
+ return skl_planar_formats;
+ } else {
+ *num_formats = ARRAY_SIZE(skl_plane_formats);
+ return skl_plane_formats;
+ }
+}
+
+static const u32 *glk_get_plane_formats(struct drm_i915_private *dev_priv,
+ enum pipe pipe, enum plane_id plane_id,
+ int *num_formats)
+{
+ if (skl_plane_has_planar(dev_priv, pipe, plane_id)) {
+ *num_formats = ARRAY_SIZE(glk_planar_formats);
+ return glk_planar_formats;
+ } else {
+ *num_formats = ARRAY_SIZE(skl_plane_formats);
+ return skl_plane_formats;
+ }
+}
+
+static const u32 *icl_get_plane_formats(struct drm_i915_private *dev_priv,
+ enum pipe pipe, enum plane_id plane_id,
+ int *num_formats)
+{
+ if (icl_is_hdr_plane(dev_priv, plane_id)) {
+ *num_formats = ARRAY_SIZE(icl_hdr_plane_formats);
+ return icl_hdr_plane_formats;
+ } else if (icl_is_nv12_y_plane(plane_id)) {
+ *num_formats = ARRAY_SIZE(icl_sdr_y_plane_formats);
+ return icl_sdr_y_plane_formats;
+ } else {
+ *num_formats = ARRAY_SIZE(icl_sdr_uv_plane_formats);
+ return icl_sdr_uv_plane_formats;
+ }
+}
+
static bool skl_plane_has_ccs(struct drm_i915_private *dev_priv,
enum pipe pipe, enum plane_id plane_id)
{
@@ -2422,30 +2436,15 @@ skl_universal_plane_create(struct drm_i915_private *dev_priv,
if (icl_is_nv12_y_plane(plane_id))
plane->update_slave = icl_update_slave;
- if (skl_plane_has_planar(dev_priv, pipe, plane_id)) {
- if (icl_is_hdr_plane(dev_priv, plane_id)) {
- formats = icl_hdr_planar_formats;
- num_formats = ARRAY_SIZE(icl_hdr_planar_formats);
- } else if (INTEL_GEN(dev_priv) >= 11) {
- formats = icl_planar_formats;
- num_formats = ARRAY_SIZE(icl_planar_formats);
- } else if (INTEL_GEN(dev_priv) == 10 || IS_GEMINILAKE(dev_priv)) {
- formats = glk_planar_formats;
- num_formats = ARRAY_SIZE(glk_planar_formats);
- } else {
- formats = skl_planar_formats;
- num_formats = ARRAY_SIZE(skl_planar_formats);
- }
- } else if (icl_is_hdr_plane(dev_priv, plane_id)) {
- formats = icl_hdr_plane_formats;
- num_formats = ARRAY_SIZE(icl_hdr_plane_formats);
- } else if (INTEL_GEN(dev_priv) >= 11) {
- formats = icl_plane_formats;
- num_formats = ARRAY_SIZE(icl_plane_formats);
- } else {
- formats = skl_plane_formats;
- num_formats = ARRAY_SIZE(skl_plane_formats);
- }
+ if (INTEL_GEN(dev_priv) >= 11)
+ formats = icl_get_plane_formats(dev_priv, pipe,
+ plane_id, &num_formats);
+ else if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
+ formats = glk_get_plane_formats(dev_priv, pipe,
+ plane_id, &num_formats);
+ else
+ formats = skl_get_plane_formats(dev_priv, pipe,
+ plane_id, &num_formats);
plane->has_ccs = skl_plane_has_ccs(dev_priv, pipe, plane_id);
if (plane->has_ccs)
--
2.21.0
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH 07/10] drm/i915: Add support for half float framebuffers for skl+
2019-05-29 16:05 [PATCH 01/10] drm/i915: Add windowing for primary planes on gen2/3 and chv Ville Syrjala
` (4 preceding siblings ...)
2019-05-29 16:06 ` [PATCH 06/10] drm/i915: Clean up skl vs. icl plane formats Ville Syrjala
@ 2019-05-29 16:06 ` Ville Syrjala
2019-05-29 16:06 ` [PATCH 08/10] drm/i915: Add support for half float framebuffers for gen4+ primary planes Ville Syrjala
` (8 subsequent siblings)
14 siblings, 0 replies; 20+ messages in thread
From: Ville Syrjala @ 2019-05-29 16:06 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
skl+ supports fp16 pixel formats on all universal planes. Add the
necessary bits to expose that capability. The main different to
icl is that we can't scale fp16, so need to add the relevant
checks.
v2: Rebase on top of icl fp16
Split skl+ bits into a separate patch
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 11 +++++++----
drivers/gpu/drm/i915/intel_sprite.c | 11 +++++++++++
2 files changed, 18 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 77cde6de69e4..a8299778f721 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5560,10 +5560,6 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,
case DRM_FORMAT_ARGB8888:
case DRM_FORMAT_XRGB2101010:
case DRM_FORMAT_XBGR2101010:
- case DRM_FORMAT_XBGR16161616F:
- case DRM_FORMAT_ABGR16161616F:
- case DRM_FORMAT_XRGB16161616F:
- case DRM_FORMAT_ARGB16161616F:
case DRM_FORMAT_YUYV:
case DRM_FORMAT_YVYU:
case DRM_FORMAT_UYVY:
@@ -5579,6 +5575,13 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,
case DRM_FORMAT_XVYU12_16161616:
case DRM_FORMAT_XVYU16161616:
break;
+ case DRM_FORMAT_XBGR16161616F:
+ case DRM_FORMAT_ABGR16161616F:
+ case DRM_FORMAT_XRGB16161616F:
+ case DRM_FORMAT_ARGB16161616F:
+ if (INTEL_GEN(dev_priv) >= 11)
+ break;
+ /* fall through */
default:
DRM_DEBUG_KMS("[PLANE:%d:%s] FB:%d unsupported scaling format 0x%x\n",
intel_plane->base.base.id, intel_plane->base.name,
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index 9dd228f716c3..f5d5115f1b90 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -1479,6 +1479,11 @@ static bool intel_fb_scalable(const struct drm_framebuffer *fb)
switch (fb->format->format) {
case DRM_FORMAT_C8:
return false;
+ case DRM_FORMAT_XRGB16161616F:
+ case DRM_FORMAT_ARGB16161616F:
+ case DRM_FORMAT_XBGR16161616F:
+ case DRM_FORMAT_ABGR16161616F:
+ return INTEL_GEN(to_i915(fb->dev)) >= 11;
default:
return true;
}
@@ -1990,6 +1995,8 @@ static const u32 skl_plane_formats[] = {
DRM_FORMAT_ABGR8888,
DRM_FORMAT_XRGB2101010,
DRM_FORMAT_XBGR2101010,
+ DRM_FORMAT_XRGB16161616F,
+ DRM_FORMAT_XBGR16161616F,
DRM_FORMAT_YUYV,
DRM_FORMAT_YVYU,
DRM_FORMAT_UYVY,
@@ -2005,6 +2012,8 @@ static const u32 skl_planar_formats[] = {
DRM_FORMAT_ABGR8888,
DRM_FORMAT_XRGB2101010,
DRM_FORMAT_XBGR2101010,
+ DRM_FORMAT_XRGB16161616F,
+ DRM_FORMAT_XBGR16161616F,
DRM_FORMAT_YUYV,
DRM_FORMAT_YVYU,
DRM_FORMAT_UYVY,
@@ -2021,6 +2030,8 @@ static const u32 glk_planar_formats[] = {
DRM_FORMAT_ABGR8888,
DRM_FORMAT_XRGB2101010,
DRM_FORMAT_XBGR2101010,
+ DRM_FORMAT_XRGB16161616F,
+ DRM_FORMAT_XBGR16161616F,
DRM_FORMAT_YUYV,
DRM_FORMAT_YVYU,
DRM_FORMAT_UYVY,
--
2.21.0
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH 08/10] drm/i915: Add support for half float framebuffers for gen4+ primary planes
2019-05-29 16:05 [PATCH 01/10] drm/i915: Add windowing for primary planes on gen2/3 and chv Ville Syrjala
` (5 preceding siblings ...)
2019-05-29 16:06 ` [PATCH 07/10] drm/i915: Add support for half float framebuffers for skl+ Ville Syrjala
@ 2019-05-29 16:06 ` Ville Syrjala
2019-05-29 16:06 ` [PATCH 09/10] drm/i915: Add support for half float framebuffers for ivb+ sprites Ville Syrjala
` (7 subsequent siblings)
14 siblings, 0 replies; 20+ messages in thread
From: Ville Syrjala @ 2019-05-29 16:06 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
gen4+ supports fp16 pixel formats on the primary planes. Add the
relevant code.
On ivb fp16 scanout is slightly busted. The output from the plane will
have 1/4 the expected value. For the primary plane we would have to
use the pipe gamma or pipe csc to correct that which would affect all
the other planes as well, hence we simply choose not to expose fp16
on the ivb primary plane. On hsw the primary plane got fixed.
On gmch platforms I observed that the plane width must be below 2k
pixels with fp16 or else we get a corrupted image. This limitation
does not seem to be documented in bspec. I verified the exact limit
using the chv pipe B primary plane since it has windowing capability.
The stride limits are unaffected by fp16.
v2: Rebase on top of icl fp16
Split thea gen4+ primary plane bits into a separate patch
Deal with HAS_GMCH()
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 49 +++++++++++++++++++++++++---
1 file changed, 45 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index a8299778f721..c9f94460ac53 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -86,7 +86,17 @@ static const u32 i8xx_primary_formats[] = {
DRM_FORMAT_XRGB8888,
};
-/* Primary plane formats for gen >= 4 */
+/* Primary plane formats for ivb (no fp16 due to hw issue) */
+static const u32 ivb_primary_formats[] = {
+ DRM_FORMAT_C8,
+ DRM_FORMAT_RGB565,
+ DRM_FORMAT_XRGB8888,
+ DRM_FORMAT_XBGR8888,
+ DRM_FORMAT_XRGB2101010,
+ DRM_FORMAT_XBGR2101010,
+};
+
+/* Primary plane formats for gen >= 4, except ivb */
static const u32 i965_primary_formats[] = {
DRM_FORMAT_C8,
DRM_FORMAT_RGB565,
@@ -94,6 +104,7 @@ static const u32 i965_primary_formats[] = {
DRM_FORMAT_XBGR8888,
DRM_FORMAT_XRGB2101010,
DRM_FORMAT_XBGR2101010,
+ DRM_FORMAT_XBGR16161616F,
};
static const u64 i9xx_format_modifiers[] = {
@@ -2976,6 +2987,8 @@ static int i9xx_format_to_fourcc(int format)
return DRM_FORMAT_XRGB2101010;
case DISPPLANE_RGBX101010:
return DRM_FORMAT_XBGR2101010;
+ case DISPPLANE_RGBX161616:
+ return DRM_FORMAT_XBGR16161616F;
}
}
@@ -3637,6 +3650,9 @@ static u32 i9xx_plane_ctl(const struct intel_crtc_state *crtc_state,
case DRM_FORMAT_XBGR2101010:
dspcntr |= DISPPLANE_RGBX101010;
break;
+ case DRM_FORMAT_XBGR16161616F:
+ dspcntr |= DISPPLANE_RGBX161616;
+ break;
default:
MISSING_CASE(fb->format->format);
return 0;
@@ -3659,7 +3675,8 @@ int i9xx_check_plane_surface(struct intel_plane_state *plane_state)
{
struct drm_i915_private *dev_priv =
to_i915(plane_state->base.plane->dev);
- int src_x, src_y;
+ const struct drm_framebuffer *fb = plane_state->base.fb;
+ int src_x, src_y, src_w;
u32 offset;
int ret;
@@ -3670,9 +3687,14 @@ int i9xx_check_plane_surface(struct intel_plane_state *plane_state)
if (!plane_state->base.visible)
return 0;
+ src_w = drm_rect_width(&plane_state->base.src) >> 16;
src_x = plane_state->base.src.x1 >> 16;
src_y = plane_state->base.src.y1 >> 16;
+ /* Undocumented hardware limit on i965/g4x/vlv/chv */
+ if (HAS_GMCH(dev_priv) && fb->format->cpp[0] == 8 && src_w > 2048)
+ return -EINVAL;
+
intel_add_fb_offsets(&src_x, &src_y, plane_state, 0);
if (INTEL_GEN(dev_priv) >= 4)
@@ -14445,6 +14467,7 @@ static bool i965_plane_format_mod_supported(struct drm_plane *_plane,
case DRM_FORMAT_XBGR8888:
case DRM_FORMAT_XRGB2101010:
case DRM_FORMAT_XBGR2101010:
+ case DRM_FORMAT_XBGR16161616F:
return modifier == DRM_FORMAT_MOD_LINEAR ||
modifier == I915_FORMAT_MOD_X_TILED;
default:
@@ -14680,8 +14703,26 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe)
}
if (INTEL_GEN(dev_priv) >= 4) {
- formats = i965_primary_formats;
- num_formats = ARRAY_SIZE(i965_primary_formats);
+ /*
+ * WaFP16GammaEnabling:ivb
+ * "Workaround : When using the 64-bit format, the plane
+ * output on each color channel has one quarter amplitude.
+ * It can be brought up to full amplitude by using pipe
+ * gamma correction or pipe color space conversion to
+ * multiply the plane output by four."
+ *
+ * There is no dedicated plane gamma for the primary plane,
+ * and using the pipe gamma/csc could conflict with other
+ * planes, so we choose not to expose fp16 on IVB primary
+ * planes. HSW primary planes no longer have this problem.
+ */
+ if (IS_IVYBRIDGE(dev_priv)) {
+ formats = ivb_primary_formats;
+ num_formats = ARRAY_SIZE(ivb_primary_formats);
+ } else {
+ formats = i965_primary_formats;
+ num_formats = ARRAY_SIZE(i965_primary_formats);
+ }
modifiers = i9xx_format_modifiers;
plane->max_stride = i9xx_plane_max_stride;
--
2.21.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH 09/10] drm/i915: Add support for half float framebuffers for ivb+ sprites
2019-05-29 16:05 [PATCH 01/10] drm/i915: Add windowing for primary planes on gen2/3 and chv Ville Syrjala
` (6 preceding siblings ...)
2019-05-29 16:06 ` [PATCH 08/10] drm/i915: Add support for half float framebuffers for gen4+ primary planes Ville Syrjala
@ 2019-05-29 16:06 ` Ville Syrjala
2019-05-29 16:06 ` [PATCH 10/10] drm/i915: Add support for half float framebuffers on snb sprites Ville Syrjala
` (6 subsequent siblings)
14 siblings, 0 replies; 20+ messages in thread
From: Ville Syrjala @ 2019-05-29 16:06 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
ivb+ supports fp16 pixel formats on the sprite planes planes. Expose
that capability.
On ivb/hsw fp16 scanout is slightly busted. The output from the plane
will have 1/4 the expected value. For the sprite plane we can fix that
up with the plane gamma unit. This was fixed on bdw.
v2: Rebase on top of icl fp16
Split the ivb+ sprite birs into a separate patch
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_sprite.c | 48 +++++++++++++++++++++++++----
1 file changed, 42 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index f5d5115f1b90..19fd71d4457b 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -1010,6 +1010,16 @@ static u32 ivb_sprite_ctl_crtc(const struct intel_crtc_state *crtc_state)
return sprctl;
}
+static bool ivb_need_sprite_gamma(const struct intel_plane_state *plane_state)
+{
+ struct drm_i915_private *dev_priv =
+ to_i915(plane_state->base.plane->dev);
+ const struct drm_framebuffer *fb = plane_state->base.fb;
+
+ return fb->format->cpp[0] == 8 &&
+ (IS_IVYBRIDGE(dev_priv) || IS_HASWELL(dev_priv));
+}
+
static u32 ivb_sprite_ctl(const struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state)
{
@@ -1032,6 +1042,12 @@ static u32 ivb_sprite_ctl(const struct intel_crtc_state *crtc_state,
case DRM_FORMAT_XRGB8888:
sprctl |= SPRITE_FORMAT_RGBX888;
break;
+ case DRM_FORMAT_XBGR16161616F:
+ sprctl |= SPRITE_FORMAT_RGBX161616 | SPRITE_RGB_ORDER_RGBX;
+ break;
+ case DRM_FORMAT_XRGB16161616F:
+ sprctl |= SPRITE_FORMAT_RGBX161616;
+ break;
case DRM_FORMAT_YUYV:
sprctl |= SPRITE_FORMAT_YUV422 | SPRITE_YUV_ORDER_YUYV;
break;
@@ -1049,7 +1065,8 @@ static u32 ivb_sprite_ctl(const struct intel_crtc_state *crtc_state,
return 0;
}
- sprctl |= SPRITE_INT_GAMMA_DISABLE;
+ if (!ivb_need_sprite_gamma(plane_state))
+ sprctl |= SPRITE_INT_GAMMA_DISABLE;
if (plane_state->base.color_encoding == DRM_COLOR_YCBCR_BT709)
sprctl |= SPRITE_YUV_TO_RGB_CSC_FORMAT_BT709;
@@ -1071,12 +1088,29 @@ static u32 ivb_sprite_ctl(const struct intel_crtc_state *crtc_state,
return sprctl;
}
-static void ivb_sprite_linear_gamma(u16 gamma[18])
+static void ivb_sprite_linear_gamma(const struct intel_plane_state *plane_state,
+ u16 gamma[18])
{
- int i;
+ int scale, i;
- for (i = 0; i < 17; i++)
- gamma[i] = (i << 10) / 16;
+ if (!ivb_need_sprite_gamma(plane_state))
+ return;
+
+ /*
+ * WaFP16GammaEnabling:ivb,hsw
+ * "Workaround : When using the 64-bit format, the sprite output
+ * on each color channel has one quarter amplitude. It can be
+ * brought up to full amplitude by using sprite internal gamma
+ * correction, pipe gamma correction, or pipe color space
+ * conversion to multiply the sprite output by four."
+ */
+ scale = 4;
+
+ for (i = 0; i < 16; i++)
+ gamma[i] = min((scale * i << 10) / 16, (1 << 10) - 1);
+
+ gamma[i] = min((scale * i << 10) / 16, 1 << 10);
+ i++;
gamma[i] = 3 << 10;
i++;
@@ -1090,7 +1124,7 @@ static void ivb_update_gamma(const struct intel_plane_state *plane_state)
u16 gamma[18];
int i;
- ivb_sprite_linear_gamma(gamma);
+ ivb_sprite_linear_gamma(plane_state, gamma);
/* FIXME these register are single buffered :( */
for (i = 0; i < 16; i++)
@@ -2175,6 +2209,8 @@ static bool snb_sprite_format_mod_supported(struct drm_plane *_plane,
switch (format) {
case DRM_FORMAT_XRGB8888:
case DRM_FORMAT_XBGR8888:
+ case DRM_FORMAT_XRGB16161616F:
+ case DRM_FORMAT_XBGR16161616F:
case DRM_FORMAT_YUYV:
case DRM_FORMAT_YVYU:
case DRM_FORMAT_UYVY:
--
2.21.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH 10/10] drm/i915: Add support for half float framebuffers on snb sprites
2019-05-29 16:05 [PATCH 01/10] drm/i915: Add windowing for primary planes on gen2/3 and chv Ville Syrjala
` (7 preceding siblings ...)
2019-05-29 16:06 ` [PATCH 09/10] drm/i915: Add support for half float framebuffers for ivb+ sprites Ville Syrjala
@ 2019-05-29 16:06 ` Ville Syrjala
2019-05-29 17:38 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/10] drm/i915: Add windowing for primary planes on gen2/3 and chv Patchwork
` (5 subsequent siblings)
14 siblings, 0 replies; 20+ messages in thread
From: Ville Syrjala @ 2019-05-29 16:06 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
snb supports fp16 pixel formats on the sprite planes. Expose that
capability. Nothing special needs to be done, it just works.
v2: Rebase on top of icl fp16
Split snb+ sprite bits into a separate patch
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_sprite.c | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index 19fd71d4457b..fa9506ae2901 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -1300,6 +1300,12 @@ static u32 g4x_sprite_ctl(const struct intel_crtc_state *crtc_state,
case DRM_FORMAT_XRGB8888:
dvscntr |= DVS_FORMAT_RGBX888;
break;
+ case DRM_FORMAT_XBGR16161616F:
+ dvscntr |= DVS_FORMAT_RGBX161616 | DVS_RGB_ORDER_XBGR;
+ break;
+ case DRM_FORMAT_XRGB16161616F:
+ dvscntr |= DVS_FORMAT_RGBX161616;
+ break;
case DRM_FORMAT_YUYV:
dvscntr |= DVS_FORMAT_YUV422 | DVS_YUV_ORDER_YUYV;
break;
@@ -1998,8 +2004,10 @@ static const u64 i9xx_plane_format_modifiers[] = {
};
static const u32 snb_plane_formats[] = {
- DRM_FORMAT_XBGR8888,
DRM_FORMAT_XRGB8888,
+ DRM_FORMAT_XBGR8888,
+ DRM_FORMAT_XRGB16161616F,
+ DRM_FORMAT_XBGR16161616F,
DRM_FORMAT_YUYV,
DRM_FORMAT_YVYU,
DRM_FORMAT_UYVY,
--
2.21.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 20+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/10] drm/i915: Add windowing for primary planes on gen2/3 and chv
2019-05-29 16:05 [PATCH 01/10] drm/i915: Add windowing for primary planes on gen2/3 and chv Ville Syrjala
` (8 preceding siblings ...)
2019-05-29 16:06 ` [PATCH 10/10] drm/i915: Add support for half float framebuffers on snb sprites Ville Syrjala
@ 2019-05-29 17:38 ` Patchwork
2019-05-29 17:42 ` ✗ Fi.CI.SPARSE: " Patchwork
` (4 subsequent siblings)
14 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2019-05-29 17:38 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
== Series Details ==
Series: series starting with [01/10] drm/i915: Add windowing for primary planes on gen2/3 and chv
URL : https://patchwork.freedesktop.org/series/61345/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
5682a7985cac drm/i915: Add windowing for primary planes on gen2/3 and chv
9be64e7c694a drm/i915: Disable sprite gamma on ivb-bdw
4dc524e6adde drm/i915: Program plane gamma ramps
-:39: WARNING:LONG_LINE_COMMENT: line over 100 characters
#39: FILE: drivers/gpu/drm/i915/i915_reg.h:6290:
+#define DSPGAMC(plane, i) _MMIO(_PIPE2(plane, _DSPAGAMC) + (5 - (i)) * 4) /* plane C only, 6 x u0.8 */
-:77: WARNING:LONG_LINE_COMMENT: line over 100 characters
#77: FILE: drivers/gpu/drm/i915/i915_reg.h:6433:
+#define DVSGAMC_G4X(pipe, i) _MMIO(_PIPE(pipe, _DVSAGAMC_G4X, _DVSBGAMC_G4X) + (5 - (i)) * 4) /* 6 x u0.8 */
-:78: WARNING:LONG_LINE_COMMENT: line over 100 characters
#78: FILE: drivers/gpu/drm/i915/i915_reg.h:6434:
+#define DVSGAMC_ILK(pipe, i) _MMIO(_PIPE(pipe, _DVSAGAMC_ILK, _DVSBGAMC_ILK) + (i) * 4) /* 16 x u0.10 */
-:79: WARNING:LONG_LINE_COMMENT: line over 100 characters
#79: FILE: drivers/gpu/drm/i915/i915_reg.h:6435:
+#define DVSGAMCMAX_ILK(pipe, i) _MMIO(_PIPE(pipe, _DVSAGAMCMAX_ILK, _DVSBGAMCMAX_ILK) + (i) * 4) /* 3 x u1.10 */
-:141: WARNING:LONG_LINE: line over 100 characters
#141: FILE: drivers/gpu/drm/i915/i915_reg.h:6595:
+#define SPGAMC(pipe, plane_id, i) _MMIO(_VLV_SPR((pipe), (plane_id), _SPAGAMC, _SPBGAMC) + (5 - (i)) * 4) /* 6 x u0.10 */
total: 0 errors, 5 warnings, 0 checks, 290 lines checked
59f4e356a17e drm/i915: Deal with cpp==8 for g4x watermarks
3a33204e1ac6 drm/i915: Cosmetic fix for skl+ plane switch statement
e759b5c52ae5 drm/i915: Clean up skl vs. icl plane formats
-:147: WARNING:UNNECESSARY_ELSE: else is not generally useful after a break or return
#147: FILE: drivers/gpu/drm/i915/intel_sprite.c:2351:
+ return skl_planar_formats;
+ } else {
-:160: WARNING:UNNECESSARY_ELSE: else is not generally useful after a break or return
#160: FILE: drivers/gpu/drm/i915/intel_sprite.c:2364:
+ return glk_planar_formats;
+ } else {
-:176: WARNING:UNNECESSARY_ELSE: else is not generally useful after a break or return
#176: FILE: drivers/gpu/drm/i915/intel_sprite.c:2380:
+ return icl_sdr_y_plane_formats;
+ } else {
total: 0 errors, 3 warnings, 0 checks, 191 lines checked
d2d01e7713c7 drm/i915: Add support for half float framebuffers for skl+
f30f3f2742af drm/i915: Add support for half float framebuffers for gen4+ primary planes
37f3c4da7abc drm/i915: Add support for half float framebuffers for ivb+ sprites
29cb57ac5fd4 drm/i915: Add support for half float framebuffers on snb sprites
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 20+ messages in thread
* ✗ Fi.CI.SPARSE: warning for series starting with [01/10] drm/i915: Add windowing for primary planes on gen2/3 and chv
2019-05-29 16:05 [PATCH 01/10] drm/i915: Add windowing for primary planes on gen2/3 and chv Ville Syrjala
` (9 preceding siblings ...)
2019-05-29 17:38 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/10] drm/i915: Add windowing for primary planes on gen2/3 and chv Patchwork
@ 2019-05-29 17:42 ` Patchwork
2019-05-29 18:12 ` ✓ Fi.CI.BAT: success " Patchwork
` (3 subsequent siblings)
14 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2019-05-29 17:42 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
== Series Details ==
Series: series starting with [01/10] drm/i915: Add windowing for primary planes on gen2/3 and chv
URL : https://patchwork.freedesktop.org/series/61345/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915: Add windowing for primary planes on gen2/3 and chv
Okay!
Commit: drm/i915: Disable sprite gamma on ivb-bdw
Okay!
Commit: drm/i915: Program plane gamma ramps
Okay!
Commit: drm/i915: Deal with cpp==8 for g4x watermarks
+drivers/gpu/drm/i915/intel_pm.c:1133:23: warning: expression using sizeof(void)
-drivers/gpu/drm/i915/intel_pm.c:4452:25: warning: expression using sizeof(void)
-drivers/gpu/drm/i915/intel_pm.c:4463:25: warning: too many warnings
+drivers/gpu/drm/i915/intel_pm.c:4452:25: warning: too many warnings
Commit: drm/i915: Cosmetic fix for skl+ plane switch statement
Okay!
Commit: drm/i915: Clean up skl vs. icl plane formats
Okay!
Commit: drm/i915: Add support for half float framebuffers for skl+
Okay!
Commit: drm/i915: Add support for half float framebuffers for gen4+ primary planes
Okay!
Commit: drm/i915: Add support for half float framebuffers for ivb+ sprites
+drivers/gpu/drm/i915/intel_sprite.c:1110:28: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/intel_sprite.c:1112:20: warning: expression using sizeof(void)
Commit: drm/i915: Add support for half float framebuffers on snb sprites
Okay!
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 20+ messages in thread
* ✓ Fi.CI.BAT: success for series starting with [01/10] drm/i915: Add windowing for primary planes on gen2/3 and chv
2019-05-29 16:05 [PATCH 01/10] drm/i915: Add windowing for primary planes on gen2/3 and chv Ville Syrjala
` (10 preceding siblings ...)
2019-05-29 17:42 ` ✗ Fi.CI.SPARSE: " Patchwork
@ 2019-05-29 18:12 ` Patchwork
2019-05-30 5:43 ` ✗ Fi.CI.IGT: failure " Patchwork
` (2 subsequent siblings)
14 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2019-05-29 18:12 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
== Series Details ==
Series: series starting with [01/10] drm/i915: Add windowing for primary planes on gen2/3 and chv
URL : https://patchwork.freedesktop.org/series/61345/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6165 -> Patchwork_13133
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/
Known issues
------------
Here are the changes found in Patchwork_13133 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_switch@basic-default:
- fi-icl-y: [PASS][1] -> [INCOMPLETE][2] ([fdo#107713] / [fdo#108569])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/fi-icl-y/igt@gem_ctx_switch@basic-default.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/fi-icl-y/igt@gem_ctx_switch@basic-default.html
* igt@i915_selftest@live_contexts:
- fi-bdw-gvtdvm: [PASS][3] -> [DMESG-FAIL][4] ([fdo#110235])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/fi-bdw-gvtdvm/igt@i915_selftest@live_contexts.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/fi-bdw-gvtdvm/igt@i915_selftest@live_contexts.html
* igt@i915_selftest@live_hangcheck:
- fi-skl-iommu: [PASS][5] -> [INCOMPLETE][6] ([fdo#108602] / [fdo#108744])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/fi-skl-iommu/igt@i915_selftest@live_hangcheck.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/fi-skl-iommu/igt@i915_selftest@live_hangcheck.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [PASS][7] -> [FAIL][8] ([fdo#109485])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
* igt@kms_frontbuffer_tracking@basic:
- fi-icl-u2: [PASS][9] -> [FAIL][10] ([fdo#103167])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
- fi-blb-e6850: [PASS][11] -> [INCOMPLETE][12] ([fdo#107718])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/fi-blb-e6850/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/fi-blb-e6850/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
* igt@vgem_basic@sysfs:
- fi-icl-u3: [PASS][13] -> [DMESG-WARN][14] ([fdo#107724]) +1 similar issue
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/fi-icl-u3/igt@vgem_basic@sysfs.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/fi-icl-u3/igt@vgem_basic@sysfs.html
#### Possible fixes ####
* igt@gem_exec_suspend@basic-s4-devices:
- fi-kbl-7500u: [DMESG-WARN][15] ([fdo#105128] / [fdo#107139]) -> [PASS][16]
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/fi-kbl-7500u/igt@gem_exec_suspend@basic-s4-devices.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/fi-kbl-7500u/igt@gem_exec_suspend@basic-s4-devices.html
* igt@i915_pm_rpm@basic-pci-d3-state:
- fi-hsw-4770: [SKIP][17] ([fdo#109271]) -> [PASS][18] +1 similar issue
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/fi-hsw-4770/igt@i915_pm_rpm@basic-pci-d3-state.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/fi-hsw-4770/igt@i915_pm_rpm@basic-pci-d3-state.html
* igt@i915_selftest@live_contexts:
- fi-skl-gvtdvm: [DMESG-FAIL][19] ([fdo#110235]) -> [PASS][20]
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/fi-skl-gvtdvm/igt@i915_selftest@live_contexts.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/fi-skl-gvtdvm/igt@i915_selftest@live_contexts.html
* igt@kms_cursor_legacy@basic-flip-after-cursor-legacy:
- fi-icl-u3: [DMESG-WARN][21] ([fdo#107724]) -> [PASS][22]
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/fi-icl-u3/igt@kms_cursor_legacy@basic-flip-after-cursor-legacy.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/fi-icl-u3/igt@kms_cursor_legacy@basic-flip-after-cursor-legacy.html
* igt@kms_frontbuffer_tracking@basic:
- fi-icl-u3: [FAIL][23] ([fdo#103167]) -> [PASS][24]
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/fi-icl-u3/igt@kms_frontbuffer_tracking@basic.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/fi-icl-u3/igt@kms_frontbuffer_tracking@basic.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#105128]: https://bugs.freedesktop.org/show_bug.cgi?id=105128
[fdo#107139]: https://bugs.freedesktop.org/show_bug.cgi?id=107139
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
[fdo#108602]: https://bugs.freedesktop.org/show_bug.cgi?id=108602
[fdo#108744]: https://bugs.freedesktop.org/show_bug.cgi?id=108744
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109485]: https://bugs.freedesktop.org/show_bug.cgi?id=109485
[fdo#110235]: https://bugs.freedesktop.org/show_bug.cgi?id=110235
Participating hosts (50 -> 45)
------------------------------
Missing (5): fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-byt-clapper fi-bdw-samus
Build changes
-------------
* Linux: CI_DRM_6165 -> Patchwork_13133
CI_DRM_6165: 1052ef9140e463d4836c5214d33158b009d21b51 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5024: f414756be2ac57e194919973da7b86644ba61241 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_13133: 29cb57ac5fd4107aa8909eeb6c7918e6fa0cd1ca @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
29cb57ac5fd4 drm/i915: Add support for half float framebuffers on snb sprites
37f3c4da7abc drm/i915: Add support for half float framebuffers for ivb+ sprites
f30f3f2742af drm/i915: Add support for half float framebuffers for gen4+ primary planes
d2d01e7713c7 drm/i915: Add support for half float framebuffers for skl+
e759b5c52ae5 drm/i915: Clean up skl vs. icl plane formats
3a33204e1ac6 drm/i915: Cosmetic fix for skl+ plane switch statement
59f4e356a17e drm/i915: Deal with cpp==8 for g4x watermarks
4dc524e6adde drm/i915: Program plane gamma ramps
9be64e7c694a drm/i915: Disable sprite gamma on ivb-bdw
5682a7985cac drm/i915: Add windowing for primary planes on gen2/3 and chv
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 20+ messages in thread
* ✗ Fi.CI.IGT: failure for series starting with [01/10] drm/i915: Add windowing for primary planes on gen2/3 and chv
2019-05-29 16:05 [PATCH 01/10] drm/i915: Add windowing for primary planes on gen2/3 and chv Ville Syrjala
` (11 preceding siblings ...)
2019-05-29 18:12 ` ✓ Fi.CI.BAT: success " Patchwork
@ 2019-05-30 5:43 ` Patchwork
2019-05-31 13:05 ` Ville Syrjälä
2019-05-31 8:13 ` ✓ Fi.CI.BAT: success " Patchwork
2019-05-31 16:55 ` ✗ Fi.CI.IGT: failure " Patchwork
14 siblings, 1 reply; 20+ messages in thread
From: Patchwork @ 2019-05-30 5:43 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
== Series Details ==
Series: series starting with [01/10] drm/i915: Add windowing for primary planes on gen2/3 and chv
URL : https://patchwork.freedesktop.org/series/61345/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6165_full -> Patchwork_13133_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_13133_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_13133_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_13133_full:
### IGT changes ###
#### Possible regressions ####
* igt@kms_plane@pixel-format-pipe-a-planes:
- shard-glk: [PASS][1] -> [FAIL][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-glk3/igt@kms_plane@pixel-format-pipe-a-planes.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-glk8/igt@kms_plane@pixel-format-pipe-a-planes.html
* igt@kms_plane_scaling@pipe-c-scaler-with-pixel-format:
- shard-apl: [PASS][3] -> [FAIL][4] +4 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-apl5/igt@kms_plane_scaling@pipe-c-scaler-with-pixel-format.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-apl7/igt@kms_plane_scaling@pipe-c-scaler-with-pixel-format.html
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@gem_workarounds@suspend-resume-context:
- {shard-iclb}: [PASS][5] -> [FAIL][6] +1 similar issue
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-iclb3/igt@gem_workarounds@suspend-resume-context.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-iclb2/igt@gem_workarounds@suspend-resume-context.html
Known issues
------------
Here are the changes found in Patchwork_13133_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_switch@basic-all-heavy:
- shard-hsw: [PASS][7] -> [INCOMPLETE][8] ([fdo#103540])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-hsw5/igt@gem_ctx_switch@basic-all-heavy.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-hsw1/igt@gem_ctx_switch@basic-all-heavy.html
* igt@i915_pm_rc6_residency@rc6-accuracy:
- shard-kbl: [PASS][9] -> [SKIP][10] ([fdo#109271])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-kbl3/igt@i915_pm_rc6_residency@rc6-accuracy.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-kbl2/igt@i915_pm_rc6_residency@rc6-accuracy.html
- shard-snb: [PASS][11] -> [SKIP][12] ([fdo#109271])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-snb7/igt@i915_pm_rc6_residency@rc6-accuracy.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-snb6/igt@i915_pm_rc6_residency@rc6-accuracy.html
* igt@i915_suspend@fence-restore-untiled:
- shard-apl: [PASS][13] -> [DMESG-WARN][14] ([fdo#108566]) +2 similar issues
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-apl8/igt@i915_suspend@fence-restore-untiled.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-apl4/igt@i915_suspend@fence-restore-untiled.html
* igt@kms_available_modes_crc@available_mode_test_crc:
- shard-glk: [PASS][15] -> [INCOMPLETE][16] ([fdo#103359] / [k.org#198133])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-glk7/igt@kms_available_modes_crc@available_mode_test_crc.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-glk6/igt@kms_available_modes_crc@available_mode_test_crc.html
* igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic:
- shard-hsw: [PASS][17] -> [SKIP][18] ([fdo#109271]) +33 similar issues
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-hsw2/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-hsw1/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-skl: [PASS][19] -> [FAIL][20] ([fdo#105363])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-skl6/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-skl10/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
- shard-glk: [PASS][21] -> [FAIL][22] ([fdo#102887] / [fdo#105363])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-glk3/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-glk3/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
* igt@kms_flip@flip-vs-suspend:
- shard-skl: [PASS][23] -> [INCOMPLETE][24] ([fdo#109507])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-skl1/igt@kms_flip@flip-vs-suspend.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-skl10/igt@kms_flip@flip-vs-suspend.html
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes:
- shard-kbl: [PASS][25] -> [DMESG-WARN][26] ([fdo#108566])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-kbl1/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-kbl6/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
* igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
- shard-skl: [PASS][27] -> [FAIL][28] ([fdo#108145] / [fdo#110403])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-skl7/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-skl8/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
* igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min:
- shard-skl: [PASS][29] -> [FAIL][30] ([fdo#108145])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-skl4/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-skl7/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
* igt@kms_plane_scaling@pipe-a-scaler-with-clipping-clamping:
- shard-glk: [PASS][31] -> [FAIL][32] ([fdo#110098]) +4 similar issues
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-glk8/igt@kms_plane_scaling@pipe-a-scaler-with-clipping-clamping.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-glk9/igt@kms_plane_scaling@pipe-a-scaler-with-clipping-clamping.html
* igt@kms_plane_scaling@pipe-b-scaler-with-clipping-clamping:
- shard-skl: [PASS][33] -> [FAIL][34] ([fdo#109052]) +4 similar issues
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-skl7/igt@kms_plane_scaling@pipe-b-scaler-with-clipping-clamping.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-skl8/igt@kms_plane_scaling@pipe-b-scaler-with-clipping-clamping.html
* igt@kms_plane_scaling@pipe-b-scaler-with-pixel-format:
- shard-kbl: [PASS][35] -> [FAIL][36] ([fdo#109052]) +4 similar issues
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-kbl6/igt@kms_plane_scaling@pipe-b-scaler-with-pixel-format.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-kbl1/igt@kms_plane_scaling@pipe-b-scaler-with-pixel-format.html
* igt@kms_setmode@basic:
- shard-kbl: [PASS][37] -> [FAIL][38] ([fdo#99912])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-kbl3/igt@kms_setmode@basic.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-kbl2/igt@kms_setmode@basic.html
* igt@kms_vblank@pipe-a-ts-continuation-suspend:
- shard-skl: [PASS][39] -> [INCOMPLETE][40] ([fdo#104108])
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-skl7/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-skl8/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
#### Possible fixes ####
* igt@gem_ctx_isolation@rcs0-s3:
- shard-skl: [INCOMPLETE][41] ([fdo#104108]) -> [PASS][42]
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-skl8/igt@gem_ctx_isolation@rcs0-s3.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-skl1/igt@gem_ctx_isolation@rcs0-s3.html
* igt@gem_eio@in-flight-suspend:
- shard-kbl: [FAIL][43] ([fdo#110667]) -> [PASS][44]
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-kbl3/igt@gem_eio@in-flight-suspend.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-kbl2/igt@gem_eio@in-flight-suspend.html
* igt@gem_workarounds@basic-read-context:
- {shard-iclb}: [FAIL][45] -> [PASS][46] +1 similar issue
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-iclb1/igt@gem_workarounds@basic-read-context.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-iclb7/igt@gem_workarounds@basic-read-context.html
* igt@i915_suspend@debugfs-reader:
- shard-apl: [DMESG-WARN][47] ([fdo#108566]) -> [PASS][48] +7 similar issues
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-apl8/igt@i915_suspend@debugfs-reader.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-apl4/igt@i915_suspend@debugfs-reader.html
* {igt@kms_big_fb@linear-64bpp-rotate-180}:
- shard-skl: [SKIP][49] ([fdo#109271]) -> [PASS][50] +3 similar issues
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-skl8/igt@kms_big_fb@linear-64bpp-rotate-180.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-skl1/igt@kms_big_fb@linear-64bpp-rotate-180.html
* {igt@kms_big_fb@x-tiled-64bpp-rotate-0}:
- shard-apl: [SKIP][51] ([fdo#109271]) -> [PASS][52] +5 similar issues
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-apl7/igt@kms_big_fb@x-tiled-64bpp-rotate-0.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-apl5/igt@kms_big_fb@x-tiled-64bpp-rotate-0.html
* {igt@kms_big_fb@x-tiled-64bpp-rotate-180}:
- shard-snb: [SKIP][53] ([fdo#109271]) -> [PASS][54] +3 similar issues
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-snb2/igt@kms_big_fb@x-tiled-64bpp-rotate-180.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-snb5/igt@kms_big_fb@x-tiled-64bpp-rotate-180.html
- shard-kbl: [SKIP][55] ([fdo#109271]) -> [PASS][56] +5 similar issues
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-kbl1/igt@kms_big_fb@x-tiled-64bpp-rotate-180.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-kbl6/igt@kms_big_fb@x-tiled-64bpp-rotate-180.html
* {igt@kms_big_fb@y-tiled-64bpp-rotate-180}:
- shard-glk: [SKIP][57] ([fdo#109271]) -> [PASS][58] +5 similar issues
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-glk2/igt@kms_big_fb@y-tiled-64bpp-rotate-180.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-glk4/igt@kms_big_fb@y-tiled-64bpp-rotate-180.html
* igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite:
- {shard-iclb}: [FAIL][59] ([fdo#103167]) -> [PASS][60] +5 similar issues
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-iclb4/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-iclb4/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-pwrite:
- shard-hsw: [SKIP][61] ([fdo#109271]) -> [PASS][62] +33 similar issues
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-hsw1/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-pwrite.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-hsw8/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-pwrite:
- shard-skl: [FAIL][63] ([fdo#108040]) -> [PASS][64] +1 similar issue
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-skl9/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-pwrite.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-skl6/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-pwrite.html
* igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
- shard-skl: [FAIL][65] ([fdo#108145]) -> [PASS][66] +1 similar issue
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-skl9/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-skl6/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
* igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
- shard-skl: [FAIL][67] ([fdo#108145] / [fdo#110403]) -> [PASS][68]
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-skl9/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-skl6/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
#### Warnings ####
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-move:
- shard-skl: [FAIL][69] ([fdo#108040]) -> [FAIL][70] ([fdo#103167])
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-skl3/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-move.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-skl4/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-move.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#102887]: https://bugs.freedesktop.org/show_bug.cgi?id=102887
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103359]: https://bugs.freedesktop.org/show_bug.cgi?id=103359
[fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
[fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
[fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#108040]: https://bugs.freedesktop.org/show_bug.cgi?id=108040
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
[fdo#109052]: https://bugs.freedesktop.org/show_bug.cgi?id=109052
[fdo#109100]: https://bugs.freedesktop.org/show_bug.cgi?id=109100
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109507]: https://bugs.freedesktop.org/show_bug.cgi?id=109507
[fdo#109673]: https://bugs.freedesktop.org/show_bug.cgi?id=109673
[fdo#110098]: https://bugs.freedesktop.org/show_bug.cgi?id=110098
[fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403
[fdo#110667]: https://bugs.freedesktop.org/show_bug.cgi?id=110667
[fdo#110728]: https://bugs.freedesktop.org/show_bug.cgi?id=110728
[fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
[k.org#198133]: https://bugzilla.kernel.org/show_bug.cgi?id=198133
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Build changes
-------------
* Linux: CI_DRM_6165 -> Patchwork_13133
CI_DRM_6165: 1052ef9140e463d4836c5214d33158b009d21b51 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5024: f414756be2ac57e194919973da7b86644ba61241 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_13133: 29cb57ac5fd4107aa8909eeb6c7918e6fa0cd1ca @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 20+ messages in thread
* ✓ Fi.CI.BAT: success for series starting with [01/10] drm/i915: Add windowing for primary planes on gen2/3 and chv
2019-05-29 16:05 [PATCH 01/10] drm/i915: Add windowing for primary planes on gen2/3 and chv Ville Syrjala
` (12 preceding siblings ...)
2019-05-30 5:43 ` ✗ Fi.CI.IGT: failure " Patchwork
@ 2019-05-31 8:13 ` Patchwork
2019-05-31 16:55 ` ✗ Fi.CI.IGT: failure " Patchwork
14 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2019-05-31 8:13 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
== Series Details ==
Series: series starting with [01/10] drm/i915: Add windowing for primary planes on gen2/3 and chv
URL : https://patchwork.freedesktop.org/series/61345/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6165 -> Patchwork_13133
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/
Known issues
------------
Here are the changes found in Patchwork_13133 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_switch@basic-default:
- fi-icl-y: [PASS][1] -> [INCOMPLETE][2] ([fdo#107713] / [fdo#108569])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/fi-icl-y/igt@gem_ctx_switch@basic-default.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/fi-icl-y/igt@gem_ctx_switch@basic-default.html
* igt@i915_selftest@live_contexts:
- fi-bdw-gvtdvm: [PASS][3] -> [DMESG-FAIL][4] ([fdo#110235])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/fi-bdw-gvtdvm/igt@i915_selftest@live_contexts.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/fi-bdw-gvtdvm/igt@i915_selftest@live_contexts.html
* igt@i915_selftest@live_hangcheck:
- fi-skl-iommu: [PASS][5] -> [INCOMPLETE][6] ([fdo#108602] / [fdo#108744])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/fi-skl-iommu/igt@i915_selftest@live_hangcheck.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/fi-skl-iommu/igt@i915_selftest@live_hangcheck.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [PASS][7] -> [FAIL][8] ([fdo#109485])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
* igt@kms_frontbuffer_tracking@basic:
- fi-icl-u2: [PASS][9] -> [FAIL][10] ([fdo#103167])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
- fi-blb-e6850: [PASS][11] -> [INCOMPLETE][12] ([fdo#107718])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/fi-blb-e6850/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/fi-blb-e6850/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
* igt@vgem_basic@sysfs:
- fi-icl-u3: [PASS][13] -> [DMESG-WARN][14] ([fdo#107724]) +1 similar issue
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/fi-icl-u3/igt@vgem_basic@sysfs.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/fi-icl-u3/igt@vgem_basic@sysfs.html
#### Possible fixes ####
* igt@gem_exec_suspend@basic-s4-devices:
- fi-kbl-7500u: [DMESG-WARN][15] ([fdo#105128] / [fdo#107139]) -> [PASS][16]
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/fi-kbl-7500u/igt@gem_exec_suspend@basic-s4-devices.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/fi-kbl-7500u/igt@gem_exec_suspend@basic-s4-devices.html
* igt@i915_pm_rpm@basic-pci-d3-state:
- fi-hsw-4770: [SKIP][17] ([fdo#109271]) -> [PASS][18] +1 similar issue
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/fi-hsw-4770/igt@i915_pm_rpm@basic-pci-d3-state.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/fi-hsw-4770/igt@i915_pm_rpm@basic-pci-d3-state.html
* igt@i915_selftest@live_contexts:
- fi-skl-gvtdvm: [DMESG-FAIL][19] ([fdo#110235]) -> [PASS][20]
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/fi-skl-gvtdvm/igt@i915_selftest@live_contexts.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/fi-skl-gvtdvm/igt@i915_selftest@live_contexts.html
* igt@kms_cursor_legacy@basic-flip-after-cursor-legacy:
- fi-icl-u3: [DMESG-WARN][21] ([fdo#107724]) -> [PASS][22]
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/fi-icl-u3/igt@kms_cursor_legacy@basic-flip-after-cursor-legacy.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/fi-icl-u3/igt@kms_cursor_legacy@basic-flip-after-cursor-legacy.html
* igt@kms_frontbuffer_tracking@basic:
- fi-icl-u3: [FAIL][23] ([fdo#103167]) -> [PASS][24]
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/fi-icl-u3/igt@kms_frontbuffer_tracking@basic.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/fi-icl-u3/igt@kms_frontbuffer_tracking@basic.html
#### Warnings ####
* igt@i915_selftest@live_contexts:
- fi-icl-dsi: [DMESG-WARN][25] ([fdo#110801]) -> [INCOMPLETE][26] ([fdo#107713] / [fdo#108569])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/fi-icl-dsi/igt@i915_selftest@live_contexts.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/fi-icl-dsi/igt@i915_selftest@live_contexts.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#105128]: https://bugs.freedesktop.org/show_bug.cgi?id=105128
[fdo#107139]: https://bugs.freedesktop.org/show_bug.cgi?id=107139
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
[fdo#108602]: https://bugs.freedesktop.org/show_bug.cgi?id=108602
[fdo#108744]: https://bugs.freedesktop.org/show_bug.cgi?id=108744
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109485]: https://bugs.freedesktop.org/show_bug.cgi?id=109485
[fdo#110235]: https://bugs.freedesktop.org/show_bug.cgi?id=110235
[fdo#110801]: https://bugs.freedesktop.org/show_bug.cgi?id=110801
Participating hosts (50 -> 45)
------------------------------
Missing (5): fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-byt-clapper fi-bdw-samus
Build changes
-------------
* Linux: CI_DRM_6165 -> Patchwork_13133
CI_DRM_6165: 1052ef9140e463d4836c5214d33158b009d21b51 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5024: f414756be2ac57e194919973da7b86644ba61241 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_13133: 29cb57ac5fd4107aa8909eeb6c7918e6fa0cd1ca @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
29cb57ac5fd4 drm/i915: Add support for half float framebuffers on snb sprites
37f3c4da7abc drm/i915: Add support for half float framebuffers for ivb+ sprites
f30f3f2742af drm/i915: Add support for half float framebuffers for gen4+ primary planes
d2d01e7713c7 drm/i915: Add support for half float framebuffers for skl+
e759b5c52ae5 drm/i915: Clean up skl vs. icl plane formats
3a33204e1ac6 drm/i915: Cosmetic fix for skl+ plane switch statement
59f4e356a17e drm/i915: Deal with cpp==8 for g4x watermarks
4dc524e6adde drm/i915: Program plane gamma ramps
9be64e7c694a drm/i915: Disable sprite gamma on ivb-bdw
5682a7985cac drm/i915: Add windowing for primary planes on gen2/3 and chv
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: ✗ Fi.CI.IGT: failure for series starting with [01/10] drm/i915: Add windowing for primary planes on gen2/3 and chv
2019-05-30 5:43 ` ✗ Fi.CI.IGT: failure " Patchwork
@ 2019-05-31 13:05 ` Ville Syrjälä
2019-06-05 14:01 ` Maarten Lankhorst
2019-06-05 15:44 ` Ville Syrjälä
0 siblings, 2 replies; 20+ messages in thread
From: Ville Syrjälä @ 2019-05-31 13:05 UTC (permalink / raw)
To: intel-gfx
On Thu, May 30, 2019 at 05:43:00AM -0000, Patchwork wrote:
> == Series Details ==
>
> Series: series starting with [01/10] drm/i915: Add windowing for primary planes on gen2/3 and chv
> URL : https://patchwork.freedesktop.org/series/61345/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_6165_full -> Patchwork_13133_full
> ====================================================
>
> Summary
> -------
>
> **FAILURE**
>
> Serious unknown changes coming with Patchwork_13133_full absolutely need to be
> verified manually.
>
> If you think the reported changes have nothing to do with the changes
> introduced in Patchwork_13133_full, please notify your bug team to allow them
> to document this new failure mode, which will reduce false positives in CI.
>
>
>
> Possible new issues
> -------------------
>
> Here are the unknown changes that may have been introduced in Patchwork_13133_full:
>
> ### IGT changes ###
>
> #### Possible regressions ####
>
> * igt@kms_plane@pixel-format-pipe-a-planes:
> - shard-glk: [PASS][1] -> [FAIL][2]
> [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-glk3/igt@kms_plane@pixel-format-pipe-a-planes.html
> [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-glk8/igt@kms_plane@pixel-format-pipe-a-planes.html
<7> [125.370679] [drm:drm_mode_debug_printmodeline] Modeline "1920x1080": 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
...
<7> [125.542650] [drm:intel_dump_cdclk_state [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage
level 4
...
<7> [133.682144] [drm:skl_check_pipe_max_pixel_rate [i915]] Max supported pixel clock with scaling exceeded
Max pixel rate for 64bpp is 79.2*2 * 8/9 = 140.8 Mhz, which we are
exceeding. We'd need some way to bump the cdclk for this case, but
the kernel will only do that for modesets, and it won't account for
that 8/9 factor. Not sure there is a great way to handle these sorts
of cases.
>
> * igt@kms_plane_scaling@pipe-c-scaler-with-pixel-format:
> - shard-apl: [PASS][3] -> [FAIL][4] +4 similar issues
> [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-apl5/igt@kms_plane_scaling@pipe-c-scaler-with-pixel-format.html
> [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-apl7/igt@kms_plane_scaling@pipe-c-scaler-with-pixel-format.html
<7> [1749.831610] [drm:drm_atomic_helper_check_plane_state] Invalid scaling of plane
<7> [1749.831620] [drm:drm_rect_debug_print] src: 8.000000x8.000000+0.000000+0.000000
<7> [1749.831625] [drm:drm_rect_debug_print] dst: 1920x1080+0+0
Not quite sure what's going on here. Unfortunately the debugs don't have
enough information to see what's going on.
>
>
> #### Suppressed ####
>
> The following results come from untrusted machines, tests, or statuses.
> They do not affect the overall result.
>
> * igt@gem_workarounds@suspend-resume-context:
> - {shard-iclb}: [PASS][5] -> [FAIL][6] +1 similar issue
> [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-iclb3/igt@gem_workarounds@suspend-resume-context.html
> [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-iclb2/igt@gem_workarounds@suspend-resume-context.html
>
>
> Known issues
> ------------
>
> Here are the changes found in Patchwork_13133_full that come from known issues:
>
> ### IGT changes ###
>
> #### Issues hit ####
>
> * igt@gem_ctx_switch@basic-all-heavy:
> - shard-hsw: [PASS][7] -> [INCOMPLETE][8] ([fdo#103540])
> [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-hsw5/igt@gem_ctx_switch@basic-all-heavy.html
> [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-hsw1/igt@gem_ctx_switch@basic-all-heavy.html
>
> * igt@i915_pm_rc6_residency@rc6-accuracy:
> - shard-kbl: [PASS][9] -> [SKIP][10] ([fdo#109271])
> [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-kbl3/igt@i915_pm_rc6_residency@rc6-accuracy.html
> [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-kbl2/igt@i915_pm_rc6_residency@rc6-accuracy.html
> - shard-snb: [PASS][11] -> [SKIP][12] ([fdo#109271])
> [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-snb7/igt@i915_pm_rc6_residency@rc6-accuracy.html
> [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-snb6/igt@i915_pm_rc6_residency@rc6-accuracy.html
>
> * igt@i915_suspend@fence-restore-untiled:
> - shard-apl: [PASS][13] -> [DMESG-WARN][14] ([fdo#108566]) +2 similar issues
> [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-apl8/igt@i915_suspend@fence-restore-untiled.html
> [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-apl4/igt@i915_suspend@fence-restore-untiled.html
>
> * igt@kms_available_modes_crc@available_mode_test_crc:
> - shard-glk: [PASS][15] -> [INCOMPLETE][16] ([fdo#103359] / [k.org#198133])
> [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-glk7/igt@kms_available_modes_crc@available_mode_test_crc.html
> [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-glk6/igt@kms_available_modes_crc@available_mode_test_crc.html
>
> * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic:
> - shard-hsw: [PASS][17] -> [SKIP][18] ([fdo#109271]) +33 similar issues
> [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-hsw2/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html
> [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-hsw1/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html
>
> * igt@kms_flip@flip-vs-expired-vblank-interruptible:
> - shard-skl: [PASS][19] -> [FAIL][20] ([fdo#105363])
> [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-skl6/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
> [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-skl10/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
> - shard-glk: [PASS][21] -> [FAIL][22] ([fdo#102887] / [fdo#105363])
> [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-glk3/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
> [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-glk3/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
>
> * igt@kms_flip@flip-vs-suspend:
> - shard-skl: [PASS][23] -> [INCOMPLETE][24] ([fdo#109507])
> [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-skl1/igt@kms_flip@flip-vs-suspend.html
> [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-skl10/igt@kms_flip@flip-vs-suspend.html
>
> * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes:
> - shard-kbl: [PASS][25] -> [DMESG-WARN][26] ([fdo#108566])
> [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-kbl1/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
> [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-kbl6/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
>
> * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
> - shard-skl: [PASS][27] -> [FAIL][28] ([fdo#108145] / [fdo#110403])
> [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-skl7/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
> [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-skl8/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
>
> * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min:
> - shard-skl: [PASS][29] -> [FAIL][30] ([fdo#108145])
> [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-skl4/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
> [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-skl7/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
>
> * igt@kms_plane_scaling@pipe-a-scaler-with-clipping-clamping:
> - shard-glk: [PASS][31] -> [FAIL][32] ([fdo#110098]) +4 similar issues
> [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-glk8/igt@kms_plane_scaling@pipe-a-scaler-with-clipping-clamping.html
> [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-glk9/igt@kms_plane_scaling@pipe-a-scaler-with-clipping-clamping.html
>
> * igt@kms_plane_scaling@pipe-b-scaler-with-clipping-clamping:
> - shard-skl: [PASS][33] -> [FAIL][34] ([fdo#109052]) +4 similar issues
> [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-skl7/igt@kms_plane_scaling@pipe-b-scaler-with-clipping-clamping.html
> [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-skl8/igt@kms_plane_scaling@pipe-b-scaler-with-clipping-clamping.html
>
> * igt@kms_plane_scaling@pipe-b-scaler-with-pixel-format:
> - shard-kbl: [PASS][35] -> [FAIL][36] ([fdo#109052]) +4 similar issues
> [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-kbl6/igt@kms_plane_scaling@pipe-b-scaler-with-pixel-format.html
> [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-kbl1/igt@kms_plane_scaling@pipe-b-scaler-with-pixel-format.html
>
> * igt@kms_setmode@basic:
> - shard-kbl: [PASS][37] -> [FAIL][38] ([fdo#99912])
> [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-kbl3/igt@kms_setmode@basic.html
> [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-kbl2/igt@kms_setmode@basic.html
>
> * igt@kms_vblank@pipe-a-ts-continuation-suspend:
> - shard-skl: [PASS][39] -> [INCOMPLETE][40] ([fdo#104108])
> [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-skl7/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
> [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-skl8/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
>
>
> #### Possible fixes ####
>
> * igt@gem_ctx_isolation@rcs0-s3:
> - shard-skl: [INCOMPLETE][41] ([fdo#104108]) -> [PASS][42]
> [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-skl8/igt@gem_ctx_isolation@rcs0-s3.html
> [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-skl1/igt@gem_ctx_isolation@rcs0-s3.html
>
> * igt@gem_eio@in-flight-suspend:
> - shard-kbl: [FAIL][43] ([fdo#110667]) -> [PASS][44]
> [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-kbl3/igt@gem_eio@in-flight-suspend.html
> [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-kbl2/igt@gem_eio@in-flight-suspend.html
>
> * igt@gem_workarounds@basic-read-context:
> - {shard-iclb}: [FAIL][45] -> [PASS][46] +1 similar issue
> [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-iclb1/igt@gem_workarounds@basic-read-context.html
> [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-iclb7/igt@gem_workarounds@basic-read-context.html
>
> * igt@i915_suspend@debugfs-reader:
> - shard-apl: [DMESG-WARN][47] ([fdo#108566]) -> [PASS][48] +7 similar issues
> [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-apl8/igt@i915_suspend@debugfs-reader.html
> [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-apl4/igt@i915_suspend@debugfs-reader.html
>
> * {igt@kms_big_fb@linear-64bpp-rotate-180}:
> - shard-skl: [SKIP][49] ([fdo#109271]) -> [PASS][50] +3 similar issues
> [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-skl8/igt@kms_big_fb@linear-64bpp-rotate-180.html
> [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-skl1/igt@kms_big_fb@linear-64bpp-rotate-180.html
>
> * {igt@kms_big_fb@x-tiled-64bpp-rotate-0}:
> - shard-apl: [SKIP][51] ([fdo#109271]) -> [PASS][52] +5 similar issues
> [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-apl7/igt@kms_big_fb@x-tiled-64bpp-rotate-0.html
> [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-apl5/igt@kms_big_fb@x-tiled-64bpp-rotate-0.html
>
> * {igt@kms_big_fb@x-tiled-64bpp-rotate-180}:
> - shard-snb: [SKIP][53] ([fdo#109271]) -> [PASS][54] +3 similar issues
> [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-snb2/igt@kms_big_fb@x-tiled-64bpp-rotate-180.html
> [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-snb5/igt@kms_big_fb@x-tiled-64bpp-rotate-180.html
> - shard-kbl: [SKIP][55] ([fdo#109271]) -> [PASS][56] +5 similar issues
> [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-kbl1/igt@kms_big_fb@x-tiled-64bpp-rotate-180.html
> [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-kbl6/igt@kms_big_fb@x-tiled-64bpp-rotate-180.html
>
> * {igt@kms_big_fb@y-tiled-64bpp-rotate-180}:
> - shard-glk: [SKIP][57] ([fdo#109271]) -> [PASS][58] +5 similar issues
> [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-glk2/igt@kms_big_fb@y-tiled-64bpp-rotate-180.html
> [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-glk4/igt@kms_big_fb@y-tiled-64bpp-rotate-180.html
>
> * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite:
> - {shard-iclb}: [FAIL][59] ([fdo#103167]) -> [PASS][60] +5 similar issues
> [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-iclb4/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite.html
> [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-iclb4/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite.html
>
> * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-pwrite:
> - shard-hsw: [SKIP][61] ([fdo#109271]) -> [PASS][62] +33 similar issues
> [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-hsw1/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-pwrite.html
> [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-hsw8/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-pwrite.html
>
> * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-pwrite:
> - shard-skl: [FAIL][63] ([fdo#108040]) -> [PASS][64] +1 similar issue
> [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-skl9/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-pwrite.html
> [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-skl6/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-pwrite.html
>
> * igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
> - shard-skl: [FAIL][65] ([fdo#108145]) -> [PASS][66] +1 similar issue
> [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-skl9/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
> [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-skl6/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
>
> * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
> - shard-skl: [FAIL][67] ([fdo#108145] / [fdo#110403]) -> [PASS][68]
> [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-skl9/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
> [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-skl6/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
>
>
> #### Warnings ####
>
> * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-move:
> - shard-skl: [FAIL][69] ([fdo#108040]) -> [FAIL][70] ([fdo#103167])
> [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-skl3/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-move.html
> [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-skl4/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-move.html
>
>
> {name}: This element is suppressed. This means it is ignored when computing
> the status of the difference (SUCCESS, WARNING, or FAILURE).
>
> [fdo#102887]: https://bugs.freedesktop.org/show_bug.cgi?id=102887
> [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
> [fdo#103359]: https://bugs.freedesktop.org/show_bug.cgi?id=103359
> [fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
> [fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
> [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
> [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
> [fdo#108040]: https://bugs.freedesktop.org/show_bug.cgi?id=108040
> [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
> [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
> [fdo#109052]: https://bugs.freedesktop.org/show_bug.cgi?id=109052
> [fdo#109100]: https://bugs.freedesktop.org/show_bug.cgi?id=109100
> [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
> [fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
> [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
> [fdo#109507]: https://bugs.freedesktop.org/show_bug.cgi?id=109507
> [fdo#109673]: https://bugs.freedesktop.org/show_bug.cgi?id=109673
> [fdo#110098]: https://bugs.freedesktop.org/show_bug.cgi?id=110098
> [fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403
> [fdo#110667]: https://bugs.freedesktop.org/show_bug.cgi?id=110667
> [fdo#110728]: https://bugs.freedesktop.org/show_bug.cgi?id=110728
> [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
> [k.org#198133]: https://bugzilla.kernel.org/show_bug.cgi?id=198133
>
>
> Participating hosts (10 -> 10)
> ------------------------------
>
> No changes in participating hosts
>
>
> Build changes
> -------------
>
> * Linux: CI_DRM_6165 -> Patchwork_13133
>
> CI_DRM_6165: 1052ef9140e463d4836c5214d33158b009d21b51 @ git://anongit.freedesktop.org/gfx-ci/linux
> IGT_5024: f414756be2ac57e194919973da7b86644ba61241 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
> Patchwork_13133: 29cb57ac5fd4107aa8909eeb6c7918e6fa0cd1ca @ git://anongit.freedesktop.org/gfx-ci/linux
> piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
>
> == Logs ==
>
> For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/
--
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 20+ messages in thread
* ✗ Fi.CI.IGT: failure for series starting with [01/10] drm/i915: Add windowing for primary planes on gen2/3 and chv
2019-05-29 16:05 [PATCH 01/10] drm/i915: Add windowing for primary planes on gen2/3 and chv Ville Syrjala
` (13 preceding siblings ...)
2019-05-31 8:13 ` ✓ Fi.CI.BAT: success " Patchwork
@ 2019-05-31 16:55 ` Patchwork
14 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2019-05-31 16:55 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
== Series Details ==
Series: series starting with [01/10] drm/i915: Add windowing for primary planes on gen2/3 and chv
URL : https://patchwork.freedesktop.org/series/61345/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6165_full -> Patchwork_13133_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_13133_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_13133_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_13133_full:
### IGT changes ###
#### Possible regressions ####
* igt@kms_plane@pixel-format-pipe-a-planes:
- shard-glk: [PASS][1] -> ([PASS][2], [FAIL][3])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-glk3/igt@kms_plane@pixel-format-pipe-a-planes.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-glk4/igt@kms_plane@pixel-format-pipe-a-planes.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-glk8/igt@kms_plane@pixel-format-pipe-a-planes.html
* igt@kms_plane_scaling@pipe-a-scaler-with-pixel-format:
- shard-apl: [PASS][4] -> [FAIL][5]
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-apl1/igt@kms_plane_scaling@pipe-a-scaler-with-pixel-format.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-apl8/igt@kms_plane_scaling@pipe-a-scaler-with-pixel-format.html
* igt@kms_plane_scaling@pipe-b-scaler-with-pixel-format:
- shard-apl: [PASS][6] -> ([FAIL][7], [FAIL][8]) +3 similar issues
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-apl3/igt@kms_plane_scaling@pipe-b-scaler-with-pixel-format.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-apl2/igt@kms_plane_scaling@pipe-b-scaler-with-pixel-format.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-apl8/igt@kms_plane_scaling@pipe-b-scaler-with-pixel-format.html
Known issues
------------
Here are the changes found in Patchwork_13133_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_switch@basic-all-heavy:
- shard-hsw: [PASS][9] -> [INCOMPLETE][10] ([fdo#103540])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-hsw5/igt@gem_ctx_switch@basic-all-heavy.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-hsw1/igt@gem_ctx_switch@basic-all-heavy.html
* igt@gem_exec_schedule@reorder-wide-vebox:
- shard-apl: [PASS][11] -> ([INCOMPLETE][12], [PASS][13]) ([fdo#103927]) +1 similar issue
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-apl8/igt@gem_exec_schedule@reorder-wide-vebox.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-apl3/igt@gem_exec_schedule@reorder-wide-vebox.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-apl7/igt@gem_exec_schedule@reorder-wide-vebox.html
* igt@gem_workarounds@basic-read:
- shard-iclb: [PASS][14] -> ([FAIL][15], [PASS][16]) ([fdo#110802]) +3 similar issues
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-iclb6/igt@gem_workarounds@basic-read.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-iclb1/igt@gem_workarounds@basic-read.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-iclb6/igt@gem_workarounds@basic-read.html
* igt@gem_workarounds@reset-context:
- shard-iclb: [PASS][17] -> ([FAIL][18], [FAIL][19]) ([fdo#110802])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-iclb8/igt@gem_workarounds@reset-context.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-iclb1/igt@gem_workarounds@reset-context.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-iclb2/igt@gem_workarounds@reset-context.html
* igt@i915_pm_rc6_residency@rc6-accuracy:
- shard-kbl: [PASS][20] -> ([PASS][21], [SKIP][22]) ([fdo#109271])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-kbl3/igt@i915_pm_rc6_residency@rc6-accuracy.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-kbl3/igt@i915_pm_rc6_residency@rc6-accuracy.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-kbl2/igt@i915_pm_rc6_residency@rc6-accuracy.html
- shard-snb: [PASS][23] -> ([SKIP][24], [SKIP][25]) ([fdo#109271])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-snb7/igt@i915_pm_rc6_residency@rc6-accuracy.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-snb6/igt@i915_pm_rc6_residency@rc6-accuracy.html
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-snb4/igt@i915_pm_rc6_residency@rc6-accuracy.html
* igt@i915_suspend@fence-restore-tiled2untiled:
- shard-apl: [PASS][26] -> ([PASS][27], [DMESG-WARN][28]) ([fdo#108566]) +5 similar issues
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-apl4/igt@i915_suspend@fence-restore-tiled2untiled.html
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-apl4/igt@i915_suspend@fence-restore-tiled2untiled.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-apl6/igt@i915_suspend@fence-restore-tiled2untiled.html
* igt@i915_suspend@fence-restore-untiled:
- shard-apl: [PASS][29] -> ([DMESG-WARN][30], [DMESG-WARN][31]) ([fdo#108566])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-apl8/igt@i915_suspend@fence-restore-untiled.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-apl4/igt@i915_suspend@fence-restore-untiled.html
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-apl6/igt@i915_suspend@fence-restore-untiled.html
* igt@kms_available_modes_crc@available_mode_test_crc:
- shard-glk: [PASS][32] -> ([INCOMPLETE][33], [PASS][34]) ([fdo#103359] / [k.org#198133])
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-glk7/igt@kms_available_modes_crc@available_mode_test_crc.html
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-glk6/igt@kms_available_modes_crc@available_mode_test_crc.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-glk4/igt@kms_available_modes_crc@available_mode_test_crc.html
* igt@kms_flip@2x-flip-vs-expired-vblank:
- shard-glk: [PASS][35] -> ([PASS][36], [FAIL][37]) ([fdo#105363])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-glk7/igt@kms_flip@2x-flip-vs-expired-vblank.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-glk5/igt@kms_flip@2x-flip-vs-expired-vblank.html
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-glk2/igt@kms_flip@2x-flip-vs-expired-vblank.html
* igt@kms_flip@2x-plain-flip-ts-check-interruptible:
- shard-hsw: [PASS][38] -> ([PASS][39], [SKIP][40]) ([fdo#109271]) +46 similar issues
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-hsw2/igt@kms_flip@2x-plain-flip-ts-check-interruptible.html
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-hsw8/igt@kms_flip@2x-plain-flip-ts-check-interruptible.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-hsw1/igt@kms_flip@2x-plain-flip-ts-check-interruptible.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-skl: [PASS][41] -> ([FAIL][42], [PASS][43]) ([fdo#105363])
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-skl6/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-skl10/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-skl9/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
- shard-glk: [PASS][44] -> ([PASS][45], [FAIL][46]) ([fdo#102887] / [fdo#105363])
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-glk3/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-glk9/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-glk3/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
* igt@kms_flip@flip-vs-suspend:
- shard-skl: [PASS][47] -> ([PASS][48], [INCOMPLETE][49]) ([fdo#109507])
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-skl1/igt@kms_flip@flip-vs-suspend.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-skl2/igt@kms_flip@flip-vs-suspend.html
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-skl10/igt@kms_flip@flip-vs-suspend.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-msflip-blt:
- shard-hsw: [PASS][50] -> [SKIP][51] ([fdo#109271]) +3 similar issues
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-hsw5/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-msflip-blt.html
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-hsw1/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render:
- shard-iclb: [PASS][52] -> ([FAIL][53], [PASS][54]) ([fdo#103167]) +8 similar issues
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-iclb8/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render.html
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-iclb8/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-iclb1/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render.html
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes:
- shard-kbl: [PASS][55] -> ([DMESG-WARN][56], [PASS][57]) ([fdo#108566]) +1 similar issue
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-kbl3/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-kbl6/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-kbl2/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
* igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
- shard-skl: [PASS][58] -> ([FAIL][59], [FAIL][60]) ([fdo#108145] / [fdo#110403])
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-skl7/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-skl8/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-skl4/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
* igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min:
- shard-skl: [PASS][61] -> ([FAIL][62], [FAIL][63]) ([fdo#108145])
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-skl4/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-skl7/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-skl9/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
* igt@kms_plane_scaling@pipe-a-scaler-with-clipping-clamping:
- shard-glk: [PASS][64] -> ([FAIL][65], [FAIL][66]) ([fdo#110098]) +3 similar issues
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-glk8/igt@kms_plane_scaling@pipe-a-scaler-with-clipping-clamping.html
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-glk6/igt@kms_plane_scaling@pipe-a-scaler-with-clipping-clamping.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-glk9/igt@kms_plane_scaling@pipe-a-scaler-with-clipping-clamping.html
* igt@kms_plane_scaling@pipe-b-scaler-with-clipping-clamping:
- shard-skl: [PASS][67] -> ([FAIL][68], [FAIL][69]) ([fdo#109052]) +4 similar issues
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-skl7/igt@kms_plane_scaling@pipe-b-scaler-with-clipping-clamping.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-skl8/igt@kms_plane_scaling@pipe-b-scaler-with-clipping-clamping.html
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-skl4/igt@kms_plane_scaling@pipe-b-scaler-with-clipping-clamping.html
* igt@kms_plane_scaling@pipe-b-scaler-with-pixel-format:
- shard-glk: [PASS][70] -> [FAIL][71] ([fdo#110098])
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-glk2/igt@kms_plane_scaling@pipe-b-scaler-with-pixel-format.html
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-glk4/igt@kms_plane_scaling@pipe-b-scaler-with-pixel-format.html
* igt@kms_plane_scaling@pipe-c-scaler-with-pixel-format:
- shard-kbl: [PASS][72] -> ([FAIL][73], [FAIL][74]) ([fdo#109052]) +4 similar issues
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-kbl1/igt@kms_plane_scaling@pipe-c-scaler-with-pixel-format.html
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-kbl1/igt@kms_plane_scaling@pipe-c-scaler-with-pixel-format.html
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-kbl2/igt@kms_plane_scaling@pipe-c-scaler-with-pixel-format.html
* igt@kms_psr@psr2_cursor_mmap_gtt:
- shard-iclb: [PASS][75] -> ([SKIP][76], [SKIP][77]) ([fdo#109441])
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-iclb2/igt@kms_psr@psr2_cursor_mmap_gtt.html
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-iclb7/igt@kms_psr@psr2_cursor_mmap_gtt.html
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-iclb5/igt@kms_psr@psr2_cursor_mmap_gtt.html
* igt@kms_setmode@basic:
- shard-kbl: [PASS][78] -> ([PASS][79], [FAIL][80]) ([fdo#99912])
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-kbl3/igt@kms_setmode@basic.html
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-kbl3/igt@kms_setmode@basic.html
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-kbl2/igt@kms_setmode@basic.html
* igt@kms_vblank@pipe-a-ts-continuation-suspend:
- shard-skl: [PASS][81] -> ([PASS][82], [INCOMPLETE][83]) ([fdo#104108])
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-skl7/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-skl4/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-skl8/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
* igt@kms_vblank@pipe-b-ts-continuation-suspend:
- shard-apl: [PASS][84] -> [DMESG-WARN][85] ([fdo#108566])
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-apl3/igt@kms_vblank@pipe-b-ts-continuation-suspend.html
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-apl2/igt@kms_vblank@pipe-b-ts-continuation-suspend.html
* igt@perf@polling:
- shard-iclb: [PASS][86] -> ([PASS][87], [FAIL][88]) ([fdo#110728])
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-iclb7/igt@perf@polling.html
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-iclb3/igt@perf@polling.html
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-iclb5/igt@perf@polling.html
#### Possible fixes ####
* igt@gem_ctx_isolation@rcs0-s3:
- shard-apl: [DMESG-WARN][89] ([fdo#108566]) -> [PASS][90] +1 similar issue
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-apl7/igt@gem_ctx_isolation@rcs0-s3.html
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-apl5/igt@gem_ctx_isolation@rcs0-s3.html
- shard-skl: [INCOMPLETE][91] ([fdo#104108]) -> ([PASS][92], [PASS][93])
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-skl8/igt@gem_ctx_isolation@rcs0-s3.html
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-skl4/igt@gem_ctx_isolation@rcs0-s3.html
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-skl1/igt@gem_ctx_isolation@rcs0-s3.html
* igt@gem_eio@in-flight-suspend:
- shard-kbl: [FAIL][94] ([fdo#110667]) -> ([PASS][95], [PASS][96])
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-kbl3/igt@gem_eio@in-flight-suspend.html
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-kbl1/igt@gem_eio@in-flight-suspend.html
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-kbl2/igt@gem_eio@in-flight-suspend.html
* igt@gem_workarounds@basic-read-context:
- shard-iclb: [FAIL][97] ([fdo#110802]) -> ([PASS][98], [PASS][99])
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-iclb1/igt@gem_workarounds@basic-read-context.html
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-iclb7/igt@gem_workarounds@basic-read-context.html
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-iclb8/igt@gem_workarounds@basic-read-context.html
* igt@gem_workarounds@reset-fd:
- shard-iclb: [FAIL][100] ([fdo#110802]) -> [PASS][101]
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-iclb2/igt@gem_workarounds@reset-fd.html
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-iclb3/igt@gem_workarounds@reset-fd.html
* igt@i915_suspend@sysfs-reader:
- shard-apl: [DMESG-WARN][102] ([fdo#108566]) -> ([PASS][103], [PASS][104]) +1 similar issue
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-apl4/igt@i915_suspend@sysfs-reader.html
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-apl4/igt@i915_suspend@sysfs-reader.html
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-apl6/igt@i915_suspend@sysfs-reader.html
* igt@kms_big_fb@linear-64bpp-rotate-180:
- shard-apl: [SKIP][105] ([fdo#109271]) -> ([PASS][106], [PASS][107]) +2 similar issues
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-apl3/igt@kms_big_fb@linear-64bpp-rotate-180.html
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-apl8/igt@kms_big_fb@linear-64bpp-rotate-180.html
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-apl2/igt@kms_big_fb@linear-64bpp-rotate-180.html
- shard-glk: [SKIP][108] ([fdo#109271]) -> [PASS][109]
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-glk2/igt@kms_big_fb@linear-64bpp-rotate-180.html
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-glk4/igt@kms_big_fb@linear-64bpp-rotate-180.html
* igt@kms_big_fb@x-tiled-64bpp-rotate-0:
- shard-snb: [SKIP][110] ([fdo#109271]) -> ([PASS][111], [PASS][112]) +3 similar issues
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-snb7/igt@kms_big_fb@x-tiled-64bpp-rotate-0.html
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-snb6/igt@kms_big_fb@x-tiled-64bpp-rotate-0.html
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-snb5/igt@kms_big_fb@x-tiled-64bpp-rotate-0.html
- shard-apl: [SKIP][113] ([fdo#109271]) -> [PASS][114] +2 similar issues
[113]: https://i
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: ✗ Fi.CI.IGT: failure for series starting with [01/10] drm/i915: Add windowing for primary planes on gen2/3 and chv
2019-05-31 13:05 ` Ville Syrjälä
@ 2019-06-05 14:01 ` Maarten Lankhorst
2019-06-05 15:48 ` Ville Syrjälä
2019-06-05 15:44 ` Ville Syrjälä
1 sibling, 1 reply; 20+ messages in thread
From: Maarten Lankhorst @ 2019-06-05 14:01 UTC (permalink / raw)
To: Ville Syrjälä, intel-gfx
Op 31-05-2019 om 15:05 schreef Ville Syrjälä:
> On Thu, May 30, 2019 at 05:43:00AM -0000, Patchwork wrote:
>> == Series Details ==
>>
>> Series: series starting with [01/10] drm/i915: Add windowing for primary planes on gen2/3 and chv
>> URL : https://patchwork.freedesktop.org/series/61345/
>> State : failure
>>
>> == Summary ==
>>
>> CI Bug Log - changes from CI_DRM_6165_full -> Patchwork_13133_full
>> ====================================================
>>
>> Summary
>> -------
>>
>> **FAILURE**
>>
>> Serious unknown changes coming with Patchwork_13133_full absolutely need to be
>> verified manually.
>>
>> If you think the reported changes have nothing to do with the changes
>> introduced in Patchwork_13133_full, please notify your bug team to allow them
>> to document this new failure mode, which will reduce false positives in CI.
>>
>>
>>
>> Possible new issues
>> -------------------
>>
>> Here are the unknown changes that may have been introduced in Patchwork_13133_full:
>>
>> ### IGT changes ###
>>
>> #### Possible regressions ####
>>
>> * igt@kms_plane@pixel-format-pipe-a-planes:
>> - shard-glk: [PASS][1] -> [FAIL][2]
>> [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-glk3/igt@kms_plane@pixel-format-pipe-a-planes.html
>> [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-glk8/igt@kms_plane@pixel-format-pipe-a-planes.html
> <7> [125.370679] [drm:drm_mode_debug_printmodeline] Modeline "1920x1080": 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
> ...
> <7> [125.542650] [drm:intel_dump_cdclk_state [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage
> level 4
> ...
> <7> [133.682144] [drm:skl_check_pipe_max_pixel_rate [i915]] Max supported pixel clock with scaling exceeded
>
> Max pixel rate for 64bpp is 79.2*2 * 8/9 = 140.8 Mhz, which we are
> exceeding. We'd need some way to bump the cdclk for this case, but
> the kernel will only do that for modesets, and it won't account for
> that 8/9 factor. Not sure there is a great way to handle these sorts
> of cases.
>
>> * igt@kms_plane_scaling@pipe-c-scaler-with-pixel-format:
>> - shard-apl: [PASS][3] -> [FAIL][4] +4 similar issues
>> [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-apl5/igt@kms_plane_scaling@pipe-c-scaler-with-pixel-format.html
>> [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-apl7/igt@kms_plane_scaling@pipe-c-scaler-with-pixel-format.html
> <7> [1749.831610] [drm:drm_atomic_helper_check_plane_state] Invalid scaling of plane
> <7> [1749.831620] [drm:drm_rect_debug_print] src: 8.000000x8.000000+0.000000+0.000000
> <7> [1749.831625] [drm:drm_rect_debug_print] dst: 1920x1080+0+0
>
> Not quite sure what's going on here. Unfortunately the debugs don't have
> enough information to see what's going on.
For first 6 patches
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
What happens on < gen9 btw with half float support?
Enabling patches look sane, but worried about hw coverage.
So if you are sure it works on <gen9 for those on all clocks, go ahead and add my r-b on those too. But I would like to have no regressions so have to get gen9 fixed first before pushing. :)
>>
>> #### Suppressed ####
>>
>> The following results come from untrusted machines, tests, or statuses.
>> They do not affect the overall result.
>>
>> * igt@gem_workarounds@suspend-resume-context:
>> - {shard-iclb}: [PASS][5] -> [FAIL][6] +1 similar issue
>> [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-iclb3/igt@gem_workarounds@suspend-resume-context.html
>> [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-iclb2/igt@gem_workarounds@suspend-resume-context.html
>>
>>
>> Known issues
>> ------------
>>
>> Here are the changes found in Patchwork_13133_full that come from known issues:
>>
>> ### IGT changes ###
>>
>> #### Issues hit ####
>>
>> * igt@gem_ctx_switch@basic-all-heavy:
>> - shard-hsw: [PASS][7] -> [INCOMPLETE][8] ([fdo#103540])
>> [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-hsw5/igt@gem_ctx_switch@basic-all-heavy.html
>> [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-hsw1/igt@gem_ctx_switch@basic-all-heavy.html
>>
>> * igt@i915_pm_rc6_residency@rc6-accuracy:
>> - shard-kbl: [PASS][9] -> [SKIP][10] ([fdo#109271])
>> [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-kbl3/igt@i915_pm_rc6_residency@rc6-accuracy.html
>> [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-kbl2/igt@i915_pm_rc6_residency@rc6-accuracy.html
>> - shard-snb: [PASS][11] -> [SKIP][12] ([fdo#109271])
>> [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-snb7/igt@i915_pm_rc6_residency@rc6-accuracy.html
>> [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-snb6/igt@i915_pm_rc6_residency@rc6-accuracy.html
>>
>> * igt@i915_suspend@fence-restore-untiled:
>> - shard-apl: [PASS][13] -> [DMESG-WARN][14] ([fdo#108566]) +2 similar issues
>> [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-apl8/igt@i915_suspend@fence-restore-untiled.html
>> [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-apl4/igt@i915_suspend@fence-restore-untiled.html
>>
>> * igt@kms_available_modes_crc@available_mode_test_crc:
>> - shard-glk: [PASS][15] -> [INCOMPLETE][16] ([fdo#103359] / [k.org#198133])
>> [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-glk7/igt@kms_available_modes_crc@available_mode_test_crc.html
>> [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-glk6/igt@kms_available_modes_crc@available_mode_test_crc.html
>>
>> * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic:
>> - shard-hsw: [PASS][17] -> [SKIP][18] ([fdo#109271]) +33 similar issues
>> [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-hsw2/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html
>> [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-hsw1/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html
>>
>> * igt@kms_flip@flip-vs-expired-vblank-interruptible:
>> - shard-skl: [PASS][19] -> [FAIL][20] ([fdo#105363])
>> [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-skl6/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
>> [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-skl10/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
>> - shard-glk: [PASS][21] -> [FAIL][22] ([fdo#102887] / [fdo#105363])
>> [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-glk3/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
>> [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-glk3/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
>>
>> * igt@kms_flip@flip-vs-suspend:
>> - shard-skl: [PASS][23] -> [INCOMPLETE][24] ([fdo#109507])
>> [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-skl1/igt@kms_flip@flip-vs-suspend.html
>> [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-skl10/igt@kms_flip@flip-vs-suspend.html
>>
>> * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes:
>> - shard-kbl: [PASS][25] -> [DMESG-WARN][26] ([fdo#108566])
>> [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-kbl1/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
>> [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-kbl6/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
>>
>> * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
>> - shard-skl: [PASS][27] -> [FAIL][28] ([fdo#108145] / [fdo#110403])
>> [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-skl7/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
>> [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-skl8/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
>>
>> * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min:
>> - shard-skl: [PASS][29] -> [FAIL][30] ([fdo#108145])
>> [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-skl4/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
>> [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-skl7/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
>>
>> * igt@kms_plane_scaling@pipe-a-scaler-with-clipping-clamping:
>> - shard-glk: [PASS][31] -> [FAIL][32] ([fdo#110098]) +4 similar issues
>> [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-glk8/igt@kms_plane_scaling@pipe-a-scaler-with-clipping-clamping.html
>> [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-glk9/igt@kms_plane_scaling@pipe-a-scaler-with-clipping-clamping.html
>>
>> * igt@kms_plane_scaling@pipe-b-scaler-with-clipping-clamping:
>> - shard-skl: [PASS][33] -> [FAIL][34] ([fdo#109052]) +4 similar issues
>> [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-skl7/igt@kms_plane_scaling@pipe-b-scaler-with-clipping-clamping.html
>> [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-skl8/igt@kms_plane_scaling@pipe-b-scaler-with-clipping-clamping.html
>>
>> * igt@kms_plane_scaling@pipe-b-scaler-with-pixel-format:
>> - shard-kbl: [PASS][35] -> [FAIL][36] ([fdo#109052]) +4 similar issues
>> [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-kbl6/igt@kms_plane_scaling@pipe-b-scaler-with-pixel-format.html
>> [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-kbl1/igt@kms_plane_scaling@pipe-b-scaler-with-pixel-format.html
>>
>> * igt@kms_setmode@basic:
>> - shard-kbl: [PASS][37] -> [FAIL][38] ([fdo#99912])
>> [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-kbl3/igt@kms_setmode@basic.html
>> [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-kbl2/igt@kms_setmode@basic.html
>>
>> * igt@kms_vblank@pipe-a-ts-continuation-suspend:
>> - shard-skl: [PASS][39] -> [INCOMPLETE][40] ([fdo#104108])
>> [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-skl7/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
>> [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-skl8/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
>>
>>
>> #### Possible fixes ####
>>
>> * igt@gem_ctx_isolation@rcs0-s3:
>> - shard-skl: [INCOMPLETE][41] ([fdo#104108]) -> [PASS][42]
>> [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-skl8/igt@gem_ctx_isolation@rcs0-s3.html
>> [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-skl1/igt@gem_ctx_isolation@rcs0-s3.html
>>
>> * igt@gem_eio@in-flight-suspend:
>> - shard-kbl: [FAIL][43] ([fdo#110667]) -> [PASS][44]
>> [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-kbl3/igt@gem_eio@in-flight-suspend.html
>> [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-kbl2/igt@gem_eio@in-flight-suspend.html
>>
>> * igt@gem_workarounds@basic-read-context:
>> - {shard-iclb}: [FAIL][45] -> [PASS][46] +1 similar issue
>> [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-iclb1/igt@gem_workarounds@basic-read-context.html
>> [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-iclb7/igt@gem_workarounds@basic-read-context.html
>>
>> * igt@i915_suspend@debugfs-reader:
>> - shard-apl: [DMESG-WARN][47] ([fdo#108566]) -> [PASS][48] +7 similar issues
>> [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-apl8/igt@i915_suspend@debugfs-reader.html
>> [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-apl4/igt@i915_suspend@debugfs-reader.html
>>
>> * {igt@kms_big_fb@linear-64bpp-rotate-180}:
>> - shard-skl: [SKIP][49] ([fdo#109271]) -> [PASS][50] +3 similar issues
>> [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-skl8/igt@kms_big_fb@linear-64bpp-rotate-180.html
>> [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-skl1/igt@kms_big_fb@linear-64bpp-rotate-180.html
>>
>> * {igt@kms_big_fb@x-tiled-64bpp-rotate-0}:
>> - shard-apl: [SKIP][51] ([fdo#109271]) -> [PASS][52] +5 similar issues
>> [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-apl7/igt@kms_big_fb@x-tiled-64bpp-rotate-0.html
>> [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-apl5/igt@kms_big_fb@x-tiled-64bpp-rotate-0.html
>>
>> * {igt@kms_big_fb@x-tiled-64bpp-rotate-180}:
>> - shard-snb: [SKIP][53] ([fdo#109271]) -> [PASS][54] +3 similar issues
>> [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-snb2/igt@kms_big_fb@x-tiled-64bpp-rotate-180.html
>> [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-snb5/igt@kms_big_fb@x-tiled-64bpp-rotate-180.html
>> - shard-kbl: [SKIP][55] ([fdo#109271]) -> [PASS][56] +5 similar issues
>> [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-kbl1/igt@kms_big_fb@x-tiled-64bpp-rotate-180.html
>> [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-kbl6/igt@kms_big_fb@x-tiled-64bpp-rotate-180.html
>>
>> * {igt@kms_big_fb@y-tiled-64bpp-rotate-180}:
>> - shard-glk: [SKIP][57] ([fdo#109271]) -> [PASS][58] +5 similar issues
>> [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-glk2/igt@kms_big_fb@y-tiled-64bpp-rotate-180.html
>> [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-glk4/igt@kms_big_fb@y-tiled-64bpp-rotate-180.html
>>
>> * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite:
>> - {shard-iclb}: [FAIL][59] ([fdo#103167]) -> [PASS][60] +5 similar issues
>> [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-iclb4/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite.html
>> [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-iclb4/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite.html
>>
>> * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-pwrite:
>> - shard-hsw: [SKIP][61] ([fdo#109271]) -> [PASS][62] +33 similar issues
>> [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-hsw1/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-pwrite.html
>> [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-hsw8/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-pwrite.html
>>
>> * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-pwrite:
>> - shard-skl: [FAIL][63] ([fdo#108040]) -> [PASS][64] +1 similar issue
>> [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-skl9/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-pwrite.html
>> [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-skl6/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-pwrite.html
>>
>> * igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
>> - shard-skl: [FAIL][65] ([fdo#108145]) -> [PASS][66] +1 similar issue
>> [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-skl9/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
>> [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-skl6/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
>>
>> * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
>> - shard-skl: [FAIL][67] ([fdo#108145] / [fdo#110403]) -> [PASS][68]
>> [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-skl9/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
>> [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-skl6/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
>>
>>
>> #### Warnings ####
>>
>> * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-move:
>> - shard-skl: [FAIL][69] ([fdo#108040]) -> [FAIL][70] ([fdo#103167])
>> [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-skl3/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-move.html
>> [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-skl4/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-move.html
>>
>>
>> {name}: This element is suppressed. This means it is ignored when computing
>> the status of the difference (SUCCESS, WARNING, or FAILURE).
>>
>> [fdo#102887]: https://bugs.freedesktop.org/show_bug.cgi?id=102887
>> [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
>> [fdo#103359]: https://bugs.freedesktop.org/show_bug.cgi?id=103359
>> [fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
>> [fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
>> [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
>> [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
>> [fdo#108040]: https://bugs.freedesktop.org/show_bug.cgi?id=108040
>> [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
>> [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
>> [fdo#109052]: https://bugs.freedesktop.org/show_bug.cgi?id=109052
>> [fdo#109100]: https://bugs.freedesktop.org/show_bug.cgi?id=109100
>> [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
>> [fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
>> [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
>> [fdo#109507]: https://bugs.freedesktop.org/show_bug.cgi?id=109507
>> [fdo#109673]: https://bugs.freedesktop.org/show_bug.cgi?id=109673
>> [fdo#110098]: https://bugs.freedesktop.org/show_bug.cgi?id=110098
>> [fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403
>> [fdo#110667]: https://bugs.freedesktop.org/show_bug.cgi?id=110667
>> [fdo#110728]: https://bugs.freedesktop.org/show_bug.cgi?id=110728
>> [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
>> [k.org#198133]: https://bugzilla.kernel.org/show_bug.cgi?id=198133
>>
>>
>> Participating hosts (10 -> 10)
>> ------------------------------
>>
>> No changes in participating hosts
>>
>>
>> Build changes
>> -------------
>>
>> * Linux: CI_DRM_6165 -> Patchwork_13133
>>
>> CI_DRM_6165: 1052ef9140e463d4836c5214d33158b009d21b51 @ git://anongit.freedesktop.org/gfx-ci/linux
>> IGT_5024: f414756be2ac57e194919973da7b86644ba61241 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
>> Patchwork_13133: 29cb57ac5fd4107aa8909eeb6c7918e6fa0cd1ca @ git://anongit.freedesktop.org/gfx-ci/linux
>> piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
>>
>> == Logs ==
>>
>> For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/
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^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: ✗ Fi.CI.IGT: failure for series starting with [01/10] drm/i915: Add windowing for primary planes on gen2/3 and chv
2019-05-31 13:05 ` Ville Syrjälä
2019-06-05 14:01 ` Maarten Lankhorst
@ 2019-06-05 15:44 ` Ville Syrjälä
1 sibling, 0 replies; 20+ messages in thread
From: Ville Syrjälä @ 2019-06-05 15:44 UTC (permalink / raw)
To: intel-gfx
On Fri, May 31, 2019 at 04:05:51PM +0300, Ville Syrjälä wrote:
> On Thu, May 30, 2019 at 05:43:00AM -0000, Patchwork wrote:
> > == Series Details ==
> >
> > Series: series starting with [01/10] drm/i915: Add windowing for primary planes on gen2/3 and chv
> > URL : https://patchwork.freedesktop.org/series/61345/
> > State : failure
> >
> > == Summary ==
> >
> > CI Bug Log - changes from CI_DRM_6165_full -> Patchwork_13133_full
> > ====================================================
> >
> > Summary
> > -------
> >
> > **FAILURE**
> >
> > Serious unknown changes coming with Patchwork_13133_full absolutely need to be
> > verified manually.
> >
> > If you think the reported changes have nothing to do with the changes
> > introduced in Patchwork_13133_full, please notify your bug team to allow them
> > to document this new failure mode, which will reduce false positives in CI.
> >
> >
> >
> > Possible new issues
> > -------------------
> >
> > Here are the unknown changes that may have been introduced in Patchwork_13133_full:
> >
> > ### IGT changes ###
> >
> > #### Possible regressions ####
> >
> > * igt@kms_plane@pixel-format-pipe-a-planes:
> > - shard-glk: [PASS][1] -> [FAIL][2]
> > [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-glk3/igt@kms_plane@pixel-format-pipe-a-planes.html
> > [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-glk8/igt@kms_plane@pixel-format-pipe-a-planes.html
>
> <7> [125.370679] [drm:drm_mode_debug_printmodeline] Modeline "1920x1080": 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
> ...
> <7> [125.542650] [drm:intel_dump_cdclk_state [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage
> level 4
> ...
> <7> [133.682144] [drm:skl_check_pipe_max_pixel_rate [i915]] Max supported pixel clock with scaling exceeded
>
> Max pixel rate for 64bpp is 79.2*2 * 8/9 = 140.8 Mhz, which we are
> exceeding. We'd need some way to bump the cdclk for this case, but
> the kernel will only do that for modesets, and it won't account for
> that 8/9 factor. Not sure there is a great way to handle these sorts
> of cases.
>
> >
> > * igt@kms_plane_scaling@pipe-c-scaler-with-pixel-format:
> > - shard-apl: [PASS][3] -> [FAIL][4] +4 similar issues
> > [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-apl5/igt@kms_plane_scaling@pipe-c-scaler-with-pixel-format.html
> > [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-apl7/igt@kms_plane_scaling@pipe-c-scaler-with-pixel-format.html
>
> <7> [1749.831610] [drm:drm_atomic_helper_check_plane_state] Invalid scaling of plane
> <7> [1749.831620] [drm:drm_rect_debug_print] src: 8.000000x8.000000+0.000000+0.000000
> <7> [1749.831625] [drm:drm_rect_debug_print] dst: 1920x1080+0+0
>
> Not quite sure what's going on here. Unfortunately the debugs don't have
> enough information to see what's going on.
Doh. That's obviously the "no scaling with fp16" hardware limitation
kicking in. I'll need to adjust the test somehow to make it skip fp16
on these platforms.
--
Ville Syrjälä
Intel
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^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: ✗ Fi.CI.IGT: failure for series starting with [01/10] drm/i915: Add windowing for primary planes on gen2/3 and chv
2019-06-05 14:01 ` Maarten Lankhorst
@ 2019-06-05 15:48 ` Ville Syrjälä
0 siblings, 0 replies; 20+ messages in thread
From: Ville Syrjälä @ 2019-06-05 15:48 UTC (permalink / raw)
To: Maarten Lankhorst; +Cc: intel-gfx
On Wed, Jun 05, 2019 at 04:01:05PM +0200, Maarten Lankhorst wrote:
> Op 31-05-2019 om 15:05 schreef Ville Syrjälä:
> > On Thu, May 30, 2019 at 05:43:00AM -0000, Patchwork wrote:
> >> == Series Details ==
> >>
> >> Series: series starting with [01/10] drm/i915: Add windowing for primary planes on gen2/3 and chv
> >> URL : https://patchwork.freedesktop.org/series/61345/
> >> State : failure
> >>
> >> == Summary ==
> >>
> >> CI Bug Log - changes from CI_DRM_6165_full -> Patchwork_13133_full
> >> ====================================================
> >>
> >> Summary
> >> -------
> >>
> >> **FAILURE**
> >>
> >> Serious unknown changes coming with Patchwork_13133_full absolutely need to be
> >> verified manually.
> >>
> >> If you think the reported changes have nothing to do with the changes
> >> introduced in Patchwork_13133_full, please notify your bug team to allow them
> >> to document this new failure mode, which will reduce false positives in CI.
> >>
> >>
> >>
> >> Possible new issues
> >> -------------------
> >>
> >> Here are the unknown changes that may have been introduced in Patchwork_13133_full:
> >>
> >> ### IGT changes ###
> >>
> >> #### Possible regressions ####
> >>
> >> * igt@kms_plane@pixel-format-pipe-a-planes:
> >> - shard-glk: [PASS][1] -> [FAIL][2]
> >> [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-glk3/igt@kms_plane@pixel-format-pipe-a-planes.html
> >> [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-glk8/igt@kms_plane@pixel-format-pipe-a-planes.html
> > <7> [125.370679] [drm:drm_mode_debug_printmodeline] Modeline "1920x1080": 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
> > ...
> > <7> [125.542650] [drm:intel_dump_cdclk_state [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage
> > level 4
> > ...
> > <7> [133.682144] [drm:skl_check_pipe_max_pixel_rate [i915]] Max supported pixel clock with scaling exceeded
> >
> > Max pixel rate for 64bpp is 79.2*2 * 8/9 = 140.8 Mhz, which we are
> > exceeding. We'd need some way to bump the cdclk for this case, but
> > the kernel will only do that for modesets, and it won't account for
> > that 8/9 factor. Not sure there is a great way to handle these sorts
> > of cases.
> >
> >> * igt@kms_plane_scaling@pipe-c-scaler-with-pixel-format:
> >> - shard-apl: [PASS][3] -> [FAIL][4] +4 similar issues
> >> [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6165/shard-apl5/igt@kms_plane_scaling@pipe-c-scaler-with-pixel-format.html
> >> [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13133/shard-apl7/igt@kms_plane_scaling@pipe-c-scaler-with-pixel-format.html
> > <7> [1749.831610] [drm:drm_atomic_helper_check_plane_state] Invalid scaling of plane
> > <7> [1749.831620] [drm:drm_rect_debug_print] src: 8.000000x8.000000+0.000000+0.000000
> > <7> [1749.831625] [drm:drm_rect_debug_print] dst: 1920x1080+0+0
> >
> > Not quite sure what's going on here. Unfortunately the debugs don't have
> > enough information to see what's going on.
>
> For first 6 patches
>
> Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Thanks.
>
> What happens on < gen9 btw with half float support?
>
> Enabling patches look sane, but worried about hw coverage.
>
> So if you are sure it works on <gen9 for those on all clocks, go ahead and add my r-b on those too. But I would like to have no regressions so have to get gen9 fixed first before pushing. :)
We do have some missing checks for the cdclk vs. fp16 case on pre-gen9,
as well as missing similar cdclk vs. scaling checks. I think I have some
kind of plan to remedy that. And I can probably tweak that into bumping
the cdclk for fp16 as well (assuming a modeset is allowed for the commit
in question of course).
--
Ville Syrjälä
Intel
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^ permalink raw reply [flat|nested] 20+ messages in thread
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-- links below jump to the message on this page --
2019-05-29 16:05 [PATCH 01/10] drm/i915: Add windowing for primary planes on gen2/3 and chv Ville Syrjala
2019-05-29 16:05 ` [PATCH 02/10] drm/i915: Disable sprite gamma on ivb-bdw Ville Syrjala
2019-05-29 16:05 ` [PATCH 03/10] drm/i915: Program plane gamma ramps Ville Syrjala
2019-05-29 16:05 ` [PATCH 04/10] drm/i915: Deal with cpp==8 for g4x watermarks Ville Syrjala
2019-05-29 16:06 ` [PATCH 05/10] drm/i915: Cosmetic fix for skl+ plane switch statement Ville Syrjala
2019-05-29 16:06 ` [PATCH 06/10] drm/i915: Clean up skl vs. icl plane formats Ville Syrjala
2019-05-29 16:06 ` [PATCH 07/10] drm/i915: Add support for half float framebuffers for skl+ Ville Syrjala
2019-05-29 16:06 ` [PATCH 08/10] drm/i915: Add support for half float framebuffers for gen4+ primary planes Ville Syrjala
2019-05-29 16:06 ` [PATCH 09/10] drm/i915: Add support for half float framebuffers for ivb+ sprites Ville Syrjala
2019-05-29 16:06 ` [PATCH 10/10] drm/i915: Add support for half float framebuffers on snb sprites Ville Syrjala
2019-05-29 17:38 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/10] drm/i915: Add windowing for primary planes on gen2/3 and chv Patchwork
2019-05-29 17:42 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-05-29 18:12 ` ✓ Fi.CI.BAT: success " Patchwork
2019-05-30 5:43 ` ✗ Fi.CI.IGT: failure " Patchwork
2019-05-31 13:05 ` Ville Syrjälä
2019-06-05 14:01 ` Maarten Lankhorst
2019-06-05 15:48 ` Ville Syrjälä
2019-06-05 15:44 ` Ville Syrjälä
2019-05-31 8:13 ` ✓ Fi.CI.BAT: success " Patchwork
2019-05-31 16:55 ` ✗ Fi.CI.IGT: failure " Patchwork
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