* [PATCH 1/3] x86/CPU: Add more Icelake model number
@ 2019-06-03 13:41 kan.liang
2019-06-03 13:41 ` [PATCH 2/3] perf/x86/intel: Add more Icelake CPUIDs kan.liang
` (3 more replies)
0 siblings, 4 replies; 13+ messages in thread
From: kan.liang @ 2019-06-03 13:41 UTC (permalink / raw)
To: mingo, peterz, bp, tglx, linux-kernel, x86
Cc: qiuxu.zhuo, tony.luck, rui.zhang, Kan Liang
From: Kan Liang <kan.liang@linux.intel.com>
Add the CPUID model number of Icelake (ICL) desktop and server
processors to the Intel family list.
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
---
arch/x86/include/asm/intel-family.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h
index 9f15384c504a..310118805f57 100644
--- a/arch/x86/include/asm/intel-family.h
+++ b/arch/x86/include/asm/intel-family.h
@@ -52,6 +52,9 @@
#define INTEL_FAM6_CANNONLAKE_MOBILE 0x66
+#define INTEL_FAM6_ICELAKE_X 0x6A
+#define INTEL_FAM6_ICELAKE_XEON_D 0x6C
+#define INTEL_FAM6_ICELAKE_DESKTOP 0x7D
#define INTEL_FAM6_ICELAKE_MOBILE 0x7E
/* "Small Core" Processors (Atom) */
--
2.14.5
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH 2/3] perf/x86/intel: Add more Icelake CPUIDs
2019-06-03 13:41 [PATCH 1/3] x86/CPU: Add more Icelake model number kan.liang
@ 2019-06-03 13:41 ` kan.liang
2019-06-03 15:47 ` Peter Zijlstra
2019-06-17 14:35 ` [tip:perf/core] " tip-bot for Kan Liang
2019-06-03 13:41 ` [PATCH 3/3] perf/x86/intel: Add Icelake desktop CPUID kan.liang
` (2 subsequent siblings)
3 siblings, 2 replies; 13+ messages in thread
From: kan.liang @ 2019-06-03 13:41 UTC (permalink / raw)
To: mingo, peterz, bp, tglx, linux-kernel, x86
Cc: qiuxu.zhuo, tony.luck, rui.zhang, Kan Liang
From: Kan Liang <kan.liang@linux.intel.com>
Add new model number for Icelake desktop and server to perf.
The data source encoding for Icelake server is the same as Skylake
server.
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
---
arch/x86/events/intel/core.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index 546d13e436aa..c915afdaaba6 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -4940,6 +4940,9 @@ __init int intel_pmu_init(void)
break;
case INTEL_FAM6_ICELAKE_MOBILE:
+ case INTEL_FAM6_ICELAKE_DESKTOP:
+ case INTEL_FAM6_ICELAKE_X:
+ case INTEL_FAM6_ICELAKE_XEON_D:
x86_pmu.late_ack = true;
memcpy(hw_cache_event_ids, skl_hw_cache_event_ids, sizeof(hw_cache_event_ids));
memcpy(hw_cache_extra_regs, skl_hw_cache_extra_regs, sizeof(hw_cache_extra_regs));
@@ -4962,7 +4965,9 @@ __init int intel_pmu_init(void)
x86_pmu.cpu_events = get_icl_events_attrs();
x86_pmu.rtm_abort_event = X86_CONFIG(.event=0xca, .umask=0x02);
x86_pmu.lbr_pt_coexist = true;
- intel_pmu_pebs_data_source_skl(false);
+ intel_pmu_pebs_data_source_skl(
+ (boot_cpu_data.x86_model == INTEL_FAM6_ICELAKE_X) ||
+ (boot_cpu_data.x86_model == INTEL_FAM6_ICELAKE_XEON_D));
pr_cont("Icelake events, ");
name = "icelake";
break;
--
2.14.5
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH 3/3] perf/x86/intel: Add Icelake desktop CPUID
2019-06-03 13:41 [PATCH 1/3] x86/CPU: Add more Icelake model number kan.liang
2019-06-03 13:41 ` [PATCH 2/3] perf/x86/intel: Add more Icelake CPUIDs kan.liang
@ 2019-06-03 13:41 ` kan.liang
2019-06-17 14:34 ` [tip:perf/core] " tip-bot for Kan Liang
2019-06-06 6:35 ` [PATCH 1/3] x86/CPU: Add more Icelake model number Borislav Petkov
2019-06-06 7:52 ` [tip:x86/urgent] x86/CPU: Add more Icelake model numbers tip-bot for Kan Liang
3 siblings, 1 reply; 13+ messages in thread
From: kan.liang @ 2019-06-03 13:41 UTC (permalink / raw)
To: mingo, peterz, bp, tglx, linux-kernel, x86
Cc: qiuxu.zhuo, tony.luck, rui.zhang, Kan Liang
From: Kan Liang <kan.liang@linux.intel.com>
Add new Icelake desktop CPUID for RAPL, CSTATE and UNCORE.
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
---
arch/x86/events/intel/cstate.c | 1 +
arch/x86/events/intel/rapl.c | 1 +
arch/x86/events/intel/uncore.c | 1 +
3 files changed, 3 insertions(+)
diff --git a/arch/x86/events/intel/cstate.c b/arch/x86/events/intel/cstate.c
index 6072f92cb8ea..e6dc61fcfd97 100644
--- a/arch/x86/events/intel/cstate.c
+++ b/arch/x86/events/intel/cstate.c
@@ -580,6 +580,7 @@ static const struct x86_cpu_id intel_cstates_match[] __initconst = {
X86_CSTATES_MODEL(INTEL_FAM6_ATOM_GOLDMONT_PLUS, glm_cstates),
X86_CSTATES_MODEL(INTEL_FAM6_ICELAKE_MOBILE, snb_cstates),
+ X86_CSTATES_MODEL(INTEL_FAM6_ICELAKE_DESKTOP, snb_cstates),
{ },
};
MODULE_DEVICE_TABLE(x86cpu, intel_cstates_match);
diff --git a/arch/x86/events/intel/rapl.c b/arch/x86/events/intel/rapl.c
index 37ebf6fc5415..6892e38cfdaf 100644
--- a/arch/x86/events/intel/rapl.c
+++ b/arch/x86/events/intel/rapl.c
@@ -777,6 +777,7 @@ static const struct x86_cpu_id rapl_cpu_match[] __initconst = {
X86_RAPL_MODEL_MATCH(INTEL_FAM6_ATOM_GOLDMONT_PLUS, hsw_rapl_init),
X86_RAPL_MODEL_MATCH(INTEL_FAM6_ICELAKE_MOBILE, skl_rapl_init),
+ X86_RAPL_MODEL_MATCH(INTEL_FAM6_ICELAKE_DESKTOP, skl_rapl_init),
{},
};
diff --git a/arch/x86/events/intel/uncore.c b/arch/x86/events/intel/uncore.c
index fc40a1473058..56b2cbc0ddaf 100644
--- a/arch/x86/events/intel/uncore.c
+++ b/arch/x86/events/intel/uncore.c
@@ -1399,6 +1399,7 @@ static const struct x86_cpu_id intel_uncore_match[] __initconst = {
X86_UNCORE_MODEL_MATCH(INTEL_FAM6_KABYLAKE_MOBILE, skl_uncore_init),
X86_UNCORE_MODEL_MATCH(INTEL_FAM6_KABYLAKE_DESKTOP, skl_uncore_init),
X86_UNCORE_MODEL_MATCH(INTEL_FAM6_ICELAKE_MOBILE, icl_uncore_init),
+ X86_UNCORE_MODEL_MATCH(INTEL_FAM6_ICELAKE_DESKTOP, icl_uncore_init),
{},
};
--
2.14.5
^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH 2/3] perf/x86/intel: Add more Icelake CPUIDs
2019-06-03 13:41 ` [PATCH 2/3] perf/x86/intel: Add more Icelake CPUIDs kan.liang
@ 2019-06-03 15:47 ` Peter Zijlstra
2019-06-03 16:14 ` Liang, Kan
2019-06-17 14:35 ` [tip:perf/core] " tip-bot for Kan Liang
1 sibling, 1 reply; 13+ messages in thread
From: Peter Zijlstra @ 2019-06-03 15:47 UTC (permalink / raw)
To: kan.liang
Cc: mingo, bp, tglx, linux-kernel, x86, qiuxu.zhuo, tony.luck, rui.zhang
On Mon, Jun 03, 2019 at 06:41:21AM -0700, kan.liang@linux.intel.com wrote:
> @@ -4962,7 +4965,9 @@ __init int intel_pmu_init(void)
> x86_pmu.cpu_events = get_icl_events_attrs();
> x86_pmu.rtm_abort_event = X86_CONFIG(.event=0xca, .umask=0x02);
> x86_pmu.lbr_pt_coexist = true;
> - intel_pmu_pebs_data_source_skl(false);
> + intel_pmu_pebs_data_source_skl(
> + (boot_cpu_data.x86_model == INTEL_FAM6_ICELAKE_X) ||
> + (boot_cpu_data.x86_model == INTEL_FAM6_ICELAKE_XEON_D));
That's pretty sad, a model switch inside a model switch :/
> pr_cont("Icelake events, ");
> name = "icelake";
> break;
Would something like so not be nicer?
---
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -4485,6 +4485,7 @@ __init int intel_pmu_init(void)
struct event_constraint *c;
unsigned int unused;
struct extra_reg *er;
+ bool pmem = false;
int version, i;
char *name;
@@ -4936,9 +4937,10 @@ __init int intel_pmu_init(void)
name = "knights-landing";
break;
+ case INTEL_FAM6_SKYLAKE_X:
+ pmem = true;
case INTEL_FAM6_SKYLAKE_MOBILE:
case INTEL_FAM6_SKYLAKE_DESKTOP:
- case INTEL_FAM6_SKYLAKE_X:
case INTEL_FAM6_KABYLAKE_MOBILE:
case INTEL_FAM6_KABYLAKE_DESKTOP:
x86_add_quirk(intel_pebs_isolation_quirk);
@@ -4970,8 +4972,7 @@ __init int intel_pmu_init(void)
td_attr = hsw_events_attrs;
mem_attr = hsw_mem_events_attrs;
tsx_attr = hsw_tsx_events_attrs;
- intel_pmu_pebs_data_source_skl(
- boot_cpu_data.x86_model == INTEL_FAM6_SKYLAKE_X);
+ intel_pmu_pebs_data_source_skl(pmem);
if (boot_cpu_has(X86_FEATURE_TSX_FORCE_ABORT)) {
x86_pmu.flags |= PMU_FL_TFA;
@@ -4985,7 +4986,11 @@ __init int intel_pmu_init(void)
name = "skylake";
break;
+ case INTEL_FAM6_ICELAKE_X:
+ case INTEL_FAM6_ICELAKE_XEON_D:
+ pmem = true;
case INTEL_FAM6_ICELAKE_MOBILE:
+ case INTEL_FAM6_ICELAKE_DESKTOP:
x86_pmu.late_ack = true;
memcpy(hw_cache_event_ids, skl_hw_cache_event_ids, sizeof(hw_cache_event_ids));
memcpy(hw_cache_extra_regs, skl_hw_cache_extra_regs, sizeof(hw_cache_extra_regs));
@@ -5009,7 +5014,7 @@ __init int intel_pmu_init(void)
tsx_attr = icl_tsx_events_attrs;
x86_pmu.rtm_abort_event = X86_CONFIG(.event=0xca, .umask=0x02);
x86_pmu.lbr_pt_coexist = true;
- intel_pmu_pebs_data_source_skl(false);
+ intel_pmu_pebs_data_source_skl(pmem);
pr_cont("Icelake events, ");
name = "icelake";
break;
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 2/3] perf/x86/intel: Add more Icelake CPUIDs
2019-06-03 15:47 ` Peter Zijlstra
@ 2019-06-03 16:14 ` Liang, Kan
2019-06-03 16:30 ` Peter Zijlstra
0 siblings, 1 reply; 13+ messages in thread
From: Liang, Kan @ 2019-06-03 16:14 UTC (permalink / raw)
To: Peter Zijlstra
Cc: mingo, bp, tglx, linux-kernel, x86, qiuxu.zhuo, tony.luck, rui.zhang
On 6/3/2019 11:47 AM, Peter Zijlstra wrote:
> On Mon, Jun 03, 2019 at 06:41:21AM -0700, kan.liang@linux.intel.com wrote:
>> @@ -4962,7 +4965,9 @@ __init int intel_pmu_init(void)
>> x86_pmu.cpu_events = get_icl_events_attrs();
>> x86_pmu.rtm_abort_event = X86_CONFIG(.event=0xca, .umask=0x02);
>> x86_pmu.lbr_pt_coexist = true;
>> - intel_pmu_pebs_data_source_skl(false);
>> + intel_pmu_pebs_data_source_skl(
>> + (boot_cpu_data.x86_model == INTEL_FAM6_ICELAKE_X) ||
>> + (boot_cpu_data.x86_model == INTEL_FAM6_ICELAKE_XEON_D));
>
> That's pretty sad, a model switch inside a model switch :/
>
>> pr_cont("Icelake events, ");
>> name = "icelake";
>> break;
>
> Would something like so not be nicer?
Yes, it looks better. Thanks.
Should I combine your patch with mine, and send out V2?
Or are you prefer to add your patch on top of this patch set?
Thanks,
Kan
>
> ---
> --- a/arch/x86/events/intel/core.c
> +++ b/arch/x86/events/intel/core.c
> @@ -4485,6 +4485,7 @@ __init int intel_pmu_init(void)
> struct event_constraint *c;
> unsigned int unused;
> struct extra_reg *er;
> + bool pmem = false;
> int version, i;
> char *name;
>
> @@ -4936,9 +4937,10 @@ __init int intel_pmu_init(void)
> name = "knights-landing";
> break;
>
> + case INTEL_FAM6_SKYLAKE_X:
> + pmem = true;
> case INTEL_FAM6_SKYLAKE_MOBILE:
> case INTEL_FAM6_SKYLAKE_DESKTOP:
> - case INTEL_FAM6_SKYLAKE_X:
> case INTEL_FAM6_KABYLAKE_MOBILE:
> case INTEL_FAM6_KABYLAKE_DESKTOP:
> x86_add_quirk(intel_pebs_isolation_quirk);
> @@ -4970,8 +4972,7 @@ __init int intel_pmu_init(void)
> td_attr = hsw_events_attrs;
> mem_attr = hsw_mem_events_attrs;
> tsx_attr = hsw_tsx_events_attrs;
> - intel_pmu_pebs_data_source_skl(
> - boot_cpu_data.x86_model == INTEL_FAM6_SKYLAKE_X);
> + intel_pmu_pebs_data_source_skl(pmem);
>
> if (boot_cpu_has(X86_FEATURE_TSX_FORCE_ABORT)) {
> x86_pmu.flags |= PMU_FL_TFA;
> @@ -4985,7 +4986,11 @@ __init int intel_pmu_init(void)
> name = "skylake";
> break;
>
> + case INTEL_FAM6_ICELAKE_X:
> + case INTEL_FAM6_ICELAKE_XEON_D:
> + pmem = true;
> case INTEL_FAM6_ICELAKE_MOBILE:
> + case INTEL_FAM6_ICELAKE_DESKTOP:
> x86_pmu.late_ack = true;
> memcpy(hw_cache_event_ids, skl_hw_cache_event_ids, sizeof(hw_cache_event_ids));
> memcpy(hw_cache_extra_regs, skl_hw_cache_extra_regs, sizeof(hw_cache_extra_regs));
> @@ -5009,7 +5014,7 @@ __init int intel_pmu_init(void)
> tsx_attr = icl_tsx_events_attrs;
> x86_pmu.rtm_abort_event = X86_CONFIG(.event=0xca, .umask=0x02);
> x86_pmu.lbr_pt_coexist = true;
> - intel_pmu_pebs_data_source_skl(false);
> + intel_pmu_pebs_data_source_skl(pmem);
> pr_cont("Icelake events, ");
> name = "icelake";
> break;
>
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 2/3] perf/x86/intel: Add more Icelake CPUIDs
2019-06-03 16:14 ` Liang, Kan
@ 2019-06-03 16:30 ` Peter Zijlstra
0 siblings, 0 replies; 13+ messages in thread
From: Peter Zijlstra @ 2019-06-03 16:30 UTC (permalink / raw)
To: Liang, Kan
Cc: mingo, bp, tglx, linux-kernel, x86, qiuxu.zhuo, tony.luck, rui.zhang
On Mon, Jun 03, 2019 at 12:14:49PM -0400, Liang, Kan wrote:
>
>
> On 6/3/2019 11:47 AM, Peter Zijlstra wrote:
> > On Mon, Jun 03, 2019 at 06:41:21AM -0700, kan.liang@linux.intel.com wrote:
> > > @@ -4962,7 +4965,9 @@ __init int intel_pmu_init(void)
> > > x86_pmu.cpu_events = get_icl_events_attrs();
> > > x86_pmu.rtm_abort_event = X86_CONFIG(.event=0xca, .umask=0x02);
> > > x86_pmu.lbr_pt_coexist = true;
> > > - intel_pmu_pebs_data_source_skl(false);
> > > + intel_pmu_pebs_data_source_skl(
> > > + (boot_cpu_data.x86_model == INTEL_FAM6_ICELAKE_X) ||
> > > + (boot_cpu_data.x86_model == INTEL_FAM6_ICELAKE_XEON_D));
> >
> > That's pretty sad, a model switch inside a model switch :/
> >
> > > pr_cont("Icelake events, ");
> > > name = "icelake";
> > > break;
> >
> > Would something like so not be nicer?
>
> Yes, it looks better. Thanks.
>
> Should I combine your patch with mine, and send out V2?
> Or are you prefer to add your patch on top of this patch set?
I'll frob it. Thanks!
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 1/3] x86/CPU: Add more Icelake model number
2019-06-03 13:41 [PATCH 1/3] x86/CPU: Add more Icelake model number kan.liang
2019-06-03 13:41 ` [PATCH 2/3] perf/x86/intel: Add more Icelake CPUIDs kan.liang
2019-06-03 13:41 ` [PATCH 3/3] perf/x86/intel: Add Icelake desktop CPUID kan.liang
@ 2019-06-06 6:35 ` Borislav Petkov
2019-06-06 7:13 ` Zhuo, Qiuxu
2019-06-06 7:52 ` [tip:x86/urgent] x86/CPU: Add more Icelake model numbers tip-bot for Kan Liang
3 siblings, 1 reply; 13+ messages in thread
From: Borislav Petkov @ 2019-06-06 6:35 UTC (permalink / raw)
To: kan.liang
Cc: mingo, peterz, tglx, linux-kernel, x86, qiuxu.zhuo, tony.luck, rui.zhang
On Mon, Jun 03, 2019 at 06:41:20AM -0700, kan.liang@linux.intel.com wrote:
> From: Kan Liang <kan.liang@linux.intel.com>
>
> Add the CPUID model number of Icelake (ICL) desktop and server
> processors to the Intel family list.
>
> Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
> Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
You're sending this patch but it has Qiuxu's SOB too. What's that
supposed to mean?
--
Regards/Gruss,
Boris.
Good mailing practices for 400: avoid top-posting and trim the reply.
^ permalink raw reply [flat|nested] 13+ messages in thread
* RE: [PATCH 1/3] x86/CPU: Add more Icelake model number
2019-06-06 6:35 ` [PATCH 1/3] x86/CPU: Add more Icelake model number Borislav Petkov
@ 2019-06-06 7:13 ` Zhuo, Qiuxu
2019-06-06 7:33 ` Borislav Petkov
0 siblings, 1 reply; 13+ messages in thread
From: Zhuo, Qiuxu @ 2019-06-06 7:13 UTC (permalink / raw)
To: Borislav Petkov, kan.liang
Cc: mingo, peterz, tglx, linux-kernel, x86, Luck, Tony, Zhang, Rui
> From: Borislav Petkov [mailto:bp@alien8.de]
> ...
> > From: Kan Liang <kan.liang@linux.intel.com>
> >
> > Add the CPUID model number of Icelake (ICL) desktop and server
> > processors to the Intel family list.
> >
> > Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
> > Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
>
> You're sending this patch but it has Qiuxu's SOB too. What's that supposed to mean?
Hi Boris,
During internal co-work, based on Kan's original patch, I got the "#define" in the Ice Lake group sorted by model number(the header of the file requires the sorting) and added my SOB. Dropping my SOB or adding a text "[Qiuxu: Get the macros in the Ice Lake group sorted by model number.]" at the end of the commit message - which one is better/clear for you?
Thanks!
-Qiuxu
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 1/3] x86/CPU: Add more Icelake model number
2019-06-06 7:13 ` Zhuo, Qiuxu
@ 2019-06-06 7:33 ` Borislav Petkov
2019-06-06 8:44 ` Zhuo, Qiuxu
0 siblings, 1 reply; 13+ messages in thread
From: Borislav Petkov @ 2019-06-06 7:33 UTC (permalink / raw)
To: Zhuo, Qiuxu
Cc: kan.liang, mingo, peterz, tglx, linux-kernel, x86, Luck, Tony,
Zhang, Rui
On Thu, Jun 06, 2019 at 07:13:18AM +0000, Zhuo, Qiuxu wrote:
> During internal co-work, based on Kan's original patch, I got the
> "#define" in the Ice Lake group sorted by model number(the header of
> the file requires the sorting) and added my SOB. Dropping my SOB or
> adding a text "[Qiuxu: Get the macros in the Ice Lake group sorted
> by model number.]" at the end of the commit message - which one is
> better/clear for you?
I'll add that note when applying.
Thx.
--
Regards/Gruss,
Boris.
Good mailing practices for 400: avoid top-posting and trim the reply.
^ permalink raw reply [flat|nested] 13+ messages in thread
* [tip:x86/urgent] x86/CPU: Add more Icelake model numbers
2019-06-03 13:41 [PATCH 1/3] x86/CPU: Add more Icelake model number kan.liang
` (2 preceding siblings ...)
2019-06-06 6:35 ` [PATCH 1/3] x86/CPU: Add more Icelake model number Borislav Petkov
@ 2019-06-06 7:52 ` tip-bot for Kan Liang
3 siblings, 0 replies; 13+ messages in thread
From: tip-bot for Kan Liang @ 2019-06-06 7:52 UTC (permalink / raw)
To: linux-tip-commits
Cc: tony.luck, hpa, mingo, qiuxu.zhuo, rajneesh.bhardwaj, bp, x86,
kan.liang, mingo, andriy.shevchenko, linux-kernel, peterz, tglx
Commit-ID: e35faeb64146f2015f2aec14b358ae508e4066db
Gitweb: https://git.kernel.org/tip/e35faeb64146f2015f2aec14b358ae508e4066db
Author: Kan Liang <kan.liang@linux.intel.com>
AuthorDate: Mon, 3 Jun 2019 06:41:20 -0700
Committer: Borislav Petkov <bp@suse.de>
CommitDate: Thu, 6 Jun 2019 09:42:36 +0200
x86/CPU: Add more Icelake model numbers
Add the CPUID model numbers of Icelake (ICL) desktop and server
processors to the Intel family list.
[ Qiuxu: Sort the macros by model number. ]
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
Cc: Rajneesh Bhardwaj <rajneesh.bhardwaj@linux.intel.com>
Cc: rui.zhang@intel.com
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Tony Luck <tony.luck@intel.com>
Cc: x86-ml <x86@kernel.org>
Link: https://lkml.kernel.org/r/20190603134122.13853-1-kan.liang@linux.intel.com
---
arch/x86/include/asm/intel-family.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h
index 9f15384c504a..310118805f57 100644
--- a/arch/x86/include/asm/intel-family.h
+++ b/arch/x86/include/asm/intel-family.h
@@ -52,6 +52,9 @@
#define INTEL_FAM6_CANNONLAKE_MOBILE 0x66
+#define INTEL_FAM6_ICELAKE_X 0x6A
+#define INTEL_FAM6_ICELAKE_XEON_D 0x6C
+#define INTEL_FAM6_ICELAKE_DESKTOP 0x7D
#define INTEL_FAM6_ICELAKE_MOBILE 0x7E
/* "Small Core" Processors (Atom) */
^ permalink raw reply related [flat|nested] 13+ messages in thread
* RE: [PATCH 1/3] x86/CPU: Add more Icelake model number
2019-06-06 7:33 ` Borislav Petkov
@ 2019-06-06 8:44 ` Zhuo, Qiuxu
0 siblings, 0 replies; 13+ messages in thread
From: Zhuo, Qiuxu @ 2019-06-06 8:44 UTC (permalink / raw)
To: Borislav Petkov
Cc: kan.liang, mingo, peterz, tglx, linux-kernel, x86, Luck, Tony,
Zhang, Rui
> From: Borislav Petkov [mailto:bp@alien8.de]
>> ...
>> Dropping my SOB or adding a text "[Qiuxu: Get the macros in the Ice Lake group sorted by
> > model number.]" at the end of the commit message - which one is better/clear for you?
>
> I'll add that note when applying.
>
> Thx.
Thanks Boris!
-Qiuxu
^ permalink raw reply [flat|nested] 13+ messages in thread
* [tip:perf/core] perf/x86/intel: Add Icelake desktop CPUID
2019-06-03 13:41 ` [PATCH 3/3] perf/x86/intel: Add Icelake desktop CPUID kan.liang
@ 2019-06-17 14:34 ` tip-bot for Kan Liang
0 siblings, 0 replies; 13+ messages in thread
From: tip-bot for Kan Liang @ 2019-06-17 14:34 UTC (permalink / raw)
To: linux-tip-commits
Cc: linux-kernel, mingo, torvalds, hpa, peterz, tglx, kan.liang
Commit-ID: 2a538fda82824a7722e296be656bb5d11d91a9cb
Gitweb: https://git.kernel.org/tip/2a538fda82824a7722e296be656bb5d11d91a9cb
Author: Kan Liang <kan.liang@linux.intel.com>
AuthorDate: Mon, 3 Jun 2019 06:41:22 -0700
Committer: Ingo Molnar <mingo@kernel.org>
CommitDate: Mon, 17 Jun 2019 12:36:14 +0200
perf/x86/intel: Add Icelake desktop CPUID
Add new Icelake desktop CPUID for RAPL, CSTATE and UNCORE.
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: bp@alien8.de
Cc: qiuxu.zhuo@intel.com
Cc: rui.zhang@intel.com
Cc: tony.luck@intel.com
Link: https://lkml.kernel.org/r/20190603134122.13853-3-kan.liang@linux.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
---
arch/x86/events/intel/cstate.c | 1 +
arch/x86/events/intel/rapl.c | 1 +
arch/x86/events/intel/uncore.c | 1 +
3 files changed, 3 insertions(+)
diff --git a/arch/x86/events/intel/cstate.c b/arch/x86/events/intel/cstate.c
index 267d7f8e12ab..e1caa0b49d63 100644
--- a/arch/x86/events/intel/cstate.c
+++ b/arch/x86/events/intel/cstate.c
@@ -580,6 +580,7 @@ static const struct x86_cpu_id intel_cstates_match[] __initconst = {
X86_CSTATES_MODEL(INTEL_FAM6_ATOM_GOLDMONT_PLUS, glm_cstates),
X86_CSTATES_MODEL(INTEL_FAM6_ICELAKE_MOBILE, snb_cstates),
+ X86_CSTATES_MODEL(INTEL_FAM6_ICELAKE_DESKTOP, snb_cstates),
{ },
};
MODULE_DEVICE_TABLE(x86cpu, intel_cstates_match);
diff --git a/arch/x86/events/intel/rapl.c b/arch/x86/events/intel/rapl.c
index 8c7ecde3ba70..798135419a62 100644
--- a/arch/x86/events/intel/rapl.c
+++ b/arch/x86/events/intel/rapl.c
@@ -778,6 +778,7 @@ static const struct x86_cpu_id rapl_cpu_match[] __initconst = {
X86_RAPL_MODEL_MATCH(INTEL_FAM6_ATOM_GOLDMONT_PLUS, hsw_rapl_init),
X86_RAPL_MODEL_MATCH(INTEL_FAM6_ICELAKE_MOBILE, skl_rapl_init),
+ X86_RAPL_MODEL_MATCH(INTEL_FAM6_ICELAKE_DESKTOP, skl_rapl_init),
{},
};
diff --git a/arch/x86/events/intel/uncore.c b/arch/x86/events/intel/uncore.c
index 6094c8db949d..d37bb2c657b0 100644
--- a/arch/x86/events/intel/uncore.c
+++ b/arch/x86/events/intel/uncore.c
@@ -1403,6 +1403,7 @@ static const struct x86_cpu_id intel_uncore_match[] __initconst = {
X86_UNCORE_MODEL_MATCH(INTEL_FAM6_KABYLAKE_DESKTOP, skl_uncore_init),
X86_UNCORE_MODEL_MATCH(INTEL_FAM6_ICELAKE_MOBILE, icl_uncore_init),
X86_UNCORE_MODEL_MATCH(INTEL_FAM6_ICELAKE_NNPI, icl_uncore_init),
+ X86_UNCORE_MODEL_MATCH(INTEL_FAM6_ICELAKE_DESKTOP, icl_uncore_init),
{},
};
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [tip:perf/core] perf/x86/intel: Add more Icelake CPUIDs
2019-06-03 13:41 ` [PATCH 2/3] perf/x86/intel: Add more Icelake CPUIDs kan.liang
2019-06-03 15:47 ` Peter Zijlstra
@ 2019-06-17 14:35 ` tip-bot for Kan Liang
1 sibling, 0 replies; 13+ messages in thread
From: tip-bot for Kan Liang @ 2019-06-17 14:35 UTC (permalink / raw)
To: linux-tip-commits
Cc: tglx, linux-kernel, kan.liang, peterz, hpa, mingo, torvalds
Commit-ID: faaeff98666c24376cebd0b106504d05a36881d1
Gitweb: https://git.kernel.org/tip/faaeff98666c24376cebd0b106504d05a36881d1
Author: Kan Liang <kan.liang@linux.intel.com>
AuthorDate: Mon, 3 Jun 2019 06:41:21 -0700
Committer: Ingo Molnar <mingo@kernel.org>
CommitDate: Mon, 17 Jun 2019 12:36:16 +0200
perf/x86/intel: Add more Icelake CPUIDs
Add new model number for Icelake desktop and server to perf.
The data source encoding for Icelake server is the same as Skylake
server.
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: bp@alien8.de
Cc: qiuxu.zhuo@intel.com
Cc: rui.zhang@intel.com
Cc: tony.luck@intel.com
Link: https://lkml.kernel.org/r/20190603134122.13853-2-kan.liang@linux.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
---
arch/x86/events/intel/core.c | 13 +++++++++----
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index 71001f005bfe..4377bf6a6f82 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -4485,6 +4485,7 @@ __init int intel_pmu_init(void)
struct event_constraint *c;
unsigned int unused;
struct extra_reg *er;
+ bool pmem = false;
int version, i;
char *name;
@@ -4936,9 +4937,10 @@ __init int intel_pmu_init(void)
name = "knights-landing";
break;
+ case INTEL_FAM6_SKYLAKE_X:
+ pmem = true;
case INTEL_FAM6_SKYLAKE_MOBILE:
case INTEL_FAM6_SKYLAKE_DESKTOP:
- case INTEL_FAM6_SKYLAKE_X:
case INTEL_FAM6_KABYLAKE_MOBILE:
case INTEL_FAM6_KABYLAKE_DESKTOP:
x86_add_quirk(intel_pebs_isolation_quirk);
@@ -4970,8 +4972,7 @@ __init int intel_pmu_init(void)
td_attr = hsw_events_attrs;
mem_attr = hsw_mem_events_attrs;
tsx_attr = hsw_tsx_events_attrs;
- intel_pmu_pebs_data_source_skl(
- boot_cpu_data.x86_model == INTEL_FAM6_SKYLAKE_X);
+ intel_pmu_pebs_data_source_skl(pmem);
if (boot_cpu_has(X86_FEATURE_TSX_FORCE_ABORT)) {
x86_pmu.flags |= PMU_FL_TFA;
@@ -4985,7 +4986,11 @@ __init int intel_pmu_init(void)
name = "skylake";
break;
+ case INTEL_FAM6_ICELAKE_X:
+ case INTEL_FAM6_ICELAKE_XEON_D:
+ pmem = true;
case INTEL_FAM6_ICELAKE_MOBILE:
+ case INTEL_FAM6_ICELAKE_DESKTOP:
x86_pmu.late_ack = true;
memcpy(hw_cache_event_ids, skl_hw_cache_event_ids, sizeof(hw_cache_event_ids));
memcpy(hw_cache_extra_regs, skl_hw_cache_extra_regs, sizeof(hw_cache_extra_regs));
@@ -5009,7 +5014,7 @@ __init int intel_pmu_init(void)
tsx_attr = icl_tsx_events_attrs;
x86_pmu.rtm_abort_event = X86_CONFIG(.event=0xca, .umask=0x02);
x86_pmu.lbr_pt_coexist = true;
- intel_pmu_pebs_data_source_skl(false);
+ intel_pmu_pebs_data_source_skl(pmem);
pr_cont("Icelake events, ");
name = "icelake";
break;
^ permalink raw reply related [flat|nested] 13+ messages in thread
end of thread, other threads:[~2019-06-17 14:37 UTC | newest]
Thread overview: 13+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-06-03 13:41 [PATCH 1/3] x86/CPU: Add more Icelake model number kan.liang
2019-06-03 13:41 ` [PATCH 2/3] perf/x86/intel: Add more Icelake CPUIDs kan.liang
2019-06-03 15:47 ` Peter Zijlstra
2019-06-03 16:14 ` Liang, Kan
2019-06-03 16:30 ` Peter Zijlstra
2019-06-17 14:35 ` [tip:perf/core] " tip-bot for Kan Liang
2019-06-03 13:41 ` [PATCH 3/3] perf/x86/intel: Add Icelake desktop CPUID kan.liang
2019-06-17 14:34 ` [tip:perf/core] " tip-bot for Kan Liang
2019-06-06 6:35 ` [PATCH 1/3] x86/CPU: Add more Icelake model number Borislav Petkov
2019-06-06 7:13 ` Zhuo, Qiuxu
2019-06-06 7:33 ` Borislav Petkov
2019-06-06 8:44 ` Zhuo, Qiuxu
2019-06-06 7:52 ` [tip:x86/urgent] x86/CPU: Add more Icelake model numbers tip-bot for Kan Liang
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