All of lore.kernel.org
 help / color / mirror / Atom feed
* [PATCH 1/2] drm/edid: Clean up DRM_EDID_DIGITAL_* flags
@ 2019-05-29 11:02 Ville Syrjala
  2019-05-29 11:02 ` [PATCH 2/2] drm/edid: Ignore "DFP 1.x" bit for EDID 1.2 and earlier Ville Syrjala
  0 siblings, 1 reply; 5+ messages in thread
From: Ville Syrjala @ 2019-05-29 11:02 UTC (permalink / raw)
  To: dri-devel

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Give the "DFP 1.x" bit a proper name, and clean up the rest
of the bits defines as well.

Cc: Mario Kleiner <mario.kleiner.de@gmail.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/drm_edid.c |  2 +-
 include/drm/drm_edid.h     | 32 +++++++++++++++++---------------
 2 files changed, 18 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index d87f574feeca..dd601ed6a30e 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -4570,7 +4570,7 @@ u32 drm_add_display_info(struct drm_connector *connector, const struct edid *edi
 	 * extensions which tell otherwise.
 	 */
 	if ((info->bpc == 0) && (edid->revision < 4) &&
-	    (edid->input & DRM_EDID_DIGITAL_TYPE_DVI)) {
+	    (edid->input & DRM_EDID_DIGITAL_DFP_1_X)) {
 		info->bpc = 8;
 		DRM_DEBUG("%s: Assigning DFP sink color depth as %d bpc.\n",
 			  connector->name, info->bpc);
diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h
index 0e21e91c4314..88b63801f9db 100644
--- a/include/drm/drm_edid.h
+++ b/include/drm/drm_edid.h
@@ -177,21 +177,23 @@ struct detailed_timing {
 #define DRM_EDID_INPUT_BLANK_TO_BLACK  (1 << 4)
 #define DRM_EDID_INPUT_VIDEO_LEVEL     (3 << 5)
 #define DRM_EDID_INPUT_DIGITAL         (1 << 7)
-#define DRM_EDID_DIGITAL_DEPTH_MASK    (7 << 4)
-#define DRM_EDID_DIGITAL_DEPTH_UNDEF   (0 << 4)
-#define DRM_EDID_DIGITAL_DEPTH_6       (1 << 4)
-#define DRM_EDID_DIGITAL_DEPTH_8       (2 << 4)
-#define DRM_EDID_DIGITAL_DEPTH_10      (3 << 4)
-#define DRM_EDID_DIGITAL_DEPTH_12      (4 << 4)
-#define DRM_EDID_DIGITAL_DEPTH_14      (5 << 4)
-#define DRM_EDID_DIGITAL_DEPTH_16      (6 << 4)
-#define DRM_EDID_DIGITAL_DEPTH_RSVD    (7 << 4)
-#define DRM_EDID_DIGITAL_TYPE_UNDEF    (0)
-#define DRM_EDID_DIGITAL_TYPE_DVI      (1)
-#define DRM_EDID_DIGITAL_TYPE_HDMI_A   (2)
-#define DRM_EDID_DIGITAL_TYPE_HDMI_B   (3)
-#define DRM_EDID_DIGITAL_TYPE_MDDI     (4)
-#define DRM_EDID_DIGITAL_TYPE_DP       (5)
+#define DRM_EDID_DIGITAL_DEPTH_MASK    (7 << 4) /* 1.4 */
+#define DRM_EDID_DIGITAL_DEPTH_UNDEF   (0 << 4) /* 1.4 */
+#define DRM_EDID_DIGITAL_DEPTH_6       (1 << 4) /* 1.4 */
+#define DRM_EDID_DIGITAL_DEPTH_8       (2 << 4) /* 1.4 */
+#define DRM_EDID_DIGITAL_DEPTH_10      (3 << 4) /* 1.4 */
+#define DRM_EDID_DIGITAL_DEPTH_12      (4 << 4) /* 1.4 */
+#define DRM_EDID_DIGITAL_DEPTH_14      (5 << 4) /* 1.4 */
+#define DRM_EDID_DIGITAL_DEPTH_16      (6 << 4) /* 1.4 */
+#define DRM_EDID_DIGITAL_DEPTH_RSVD    (7 << 4) /* 1.4 */
+#define DRM_EDID_DIGITAL_TYPE_MASK     (7 << 0) /* 1.4 */
+#define DRM_EDID_DIGITAL_TYPE_UNDEF    (0 << 0) /* 1.4 */
+#define DRM_EDID_DIGITAL_TYPE_DVI      (1 << 0) /* 1.4 */
+#define DRM_EDID_DIGITAL_TYPE_HDMI_A   (2 << 0) /* 1.4 */
+#define DRM_EDID_DIGITAL_TYPE_HDMI_B   (3 << 0) /* 1.4 */
+#define DRM_EDID_DIGITAL_TYPE_MDDI     (4 << 0) /* 1.4 */
+#define DRM_EDID_DIGITAL_TYPE_DP       (5 << 0) /* 1.4 */
+#define DRM_EDID_DIGITAL_DFP_1_X       (1 << 0) /* 1.3 */
 
 #define DRM_EDID_FEATURE_DEFAULT_GTF      (1 << 0)
 #define DRM_EDID_FEATURE_PREFERRED_TIMING (1 << 1)
-- 
2.21.0

_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [PATCH 2/2] drm/edid: Ignore "DFP 1.x" bit for EDID 1.2 and earlier
  2019-05-29 11:02 [PATCH 1/2] drm/edid: Clean up DRM_EDID_DIGITAL_* flags Ville Syrjala
@ 2019-05-29 11:02 ` Ville Syrjala
  2019-05-29 13:50   ` Alex Deucher
  0 siblings, 1 reply; 5+ messages in thread
From: Ville Syrjala @ 2019-05-29 11:02 UTC (permalink / raw)
  To: dri-devel

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

From VESA EDID implementation guide v1.0:
"For EDID version 1 revision 2 or earlier data structures when offset 14h
 bit 7 is set to one, the value of bits 6-0 are undefined, and therefore
 cannot be interpreted to mean anything."

And since EDID 1.4 redefines that bit let's consult it only for
EDID 1.3.

Cc: Mario Kleiner <mario.kleiner.de@gmail.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/drm_edid.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index dd601ed6a30e..c3296a72fff9 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -4569,8 +4569,8 @@ u32 drm_add_display_info(struct drm_connector *connector, const struct edid *edi
 	 * tells us to assume 8 bpc color depth if the EDID doesn't have
 	 * extensions which tell otherwise.
 	 */
-	if ((info->bpc == 0) && (edid->revision < 4) &&
-	    (edid->input & DRM_EDID_DIGITAL_DFP_1_X)) {
+	if (info->bpc == 0 && edid->revision == 3 &&
+	    edid->input & DRM_EDID_DIGITAL_DFP_1_X) {
 		info->bpc = 8;
 		DRM_DEBUG("%s: Assigning DFP sink color depth as %d bpc.\n",
 			  connector->name, info->bpc);
-- 
2.21.0

_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

^ permalink raw reply related	[flat|nested] 5+ messages in thread

* Re: [PATCH 2/2] drm/edid: Ignore "DFP 1.x" bit for EDID 1.2 and earlier
  2019-05-29 11:02 ` [PATCH 2/2] drm/edid: Ignore "DFP 1.x" bit for EDID 1.2 and earlier Ville Syrjala
@ 2019-05-29 13:50   ` Alex Deucher
  2019-05-29 16:50     ` Mario Kleiner
  0 siblings, 1 reply; 5+ messages in thread
From: Alex Deucher @ 2019-05-29 13:50 UTC (permalink / raw)
  To: Ville Syrjala; +Cc: Maling list - DRI developers

On Wed, May 29, 2019 at 7:02 AM Ville Syrjala
<ville.syrjala@linux.intel.com> wrote:
>
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> From VESA EDID implementation guide v1.0:
> "For EDID version 1 revision 2 or earlier data structures when offset 14h
>  bit 7 is set to one, the value of bits 6-0 are undefined, and therefore
>  cannot be interpreted to mean anything."
>
> And since EDID 1.4 redefines that bit let's consult it only for
> EDID 1.3.
>
> Cc: Mario Kleiner <mario.kleiner.de@gmail.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Series is:
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

> ---
>  drivers/gpu/drm/drm_edid.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
> index dd601ed6a30e..c3296a72fff9 100644
> --- a/drivers/gpu/drm/drm_edid.c
> +++ b/drivers/gpu/drm/drm_edid.c
> @@ -4569,8 +4569,8 @@ u32 drm_add_display_info(struct drm_connector *connector, const struct edid *edi
>          * tells us to assume 8 bpc color depth if the EDID doesn't have
>          * extensions which tell otherwise.
>          */
> -       if ((info->bpc == 0) && (edid->revision < 4) &&
> -           (edid->input & DRM_EDID_DIGITAL_DFP_1_X)) {
> +       if (info->bpc == 0 && edid->revision == 3 &&
> +           edid->input & DRM_EDID_DIGITAL_DFP_1_X) {
>                 info->bpc = 8;
>                 DRM_DEBUG("%s: Assigning DFP sink color depth as %d bpc.\n",
>                           connector->name, info->bpc);
> --
> 2.21.0
>
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH 2/2] drm/edid: Ignore "DFP 1.x" bit for EDID 1.2 and earlier
  2019-05-29 13:50   ` Alex Deucher
@ 2019-05-29 16:50     ` Mario Kleiner
  2019-06-06 13:24       ` Ville Syrjälä
  0 siblings, 1 reply; 5+ messages in thread
From: Mario Kleiner @ 2019-05-29 16:50 UTC (permalink / raw)
  To: Alex Deucher; +Cc: Maling list - DRI developers

On Wed, May 29, 2019 at 7:02 AM Ville Syrjala
<ville.syrjala@linux.intel.com> wrote:
>
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> From VESA EDID implementation guide v1.0:
> "For EDID version 1 revision 2 or earlier data structures when offset 14h
>  bit 7 is set to one, the value of bits 6-0 are undefined, and therefore
>  cannot be interpreted to mean anything."
>
> And since EDID 1.4 redefines that bit let's consult it only for
> EDID 1.3.
>
> Cc: Mario Kleiner <mario.kleiner.de@gmail.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Yes. Series is:
Reviewed-by: Mario Kleiner <mario.kleiner.de@gmail.com>

-mario

On Wed, May 29, 2019 at 3:50 PM Alex Deucher <alexdeucher@gmail.com> wrote:
>
> On Wed, May 29, 2019 at 7:02 AM Ville Syrjala
> <ville.syrjala@linux.intel.com> wrote:
> >
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > From VESA EDID implementation guide v1.0:
> > "For EDID version 1 revision 2 or earlier data structures when offset 14h
> >  bit 7 is set to one, the value of bits 6-0 are undefined, and therefore
> >  cannot be interpreted to mean anything."
> >
> > And since EDID 1.4 redefines that bit let's consult it only for
> > EDID 1.3.
> >
> > Cc: Mario Kleiner <mario.kleiner.de@gmail.com>
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Series is:
> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
>
> > ---
> >  drivers/gpu/drm/drm_edid.c | 4 ++--
> >  1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
> > index dd601ed6a30e..c3296a72fff9 100644
> > --- a/drivers/gpu/drm/drm_edid.c
> > +++ b/drivers/gpu/drm/drm_edid.c
> > @@ -4569,8 +4569,8 @@ u32 drm_add_display_info(struct drm_connector *connector, const struct edid *edi
> >          * tells us to assume 8 bpc color depth if the EDID doesn't have
> >          * extensions which tell otherwise.
> >          */
> > -       if ((info->bpc == 0) && (edid->revision < 4) &&
> > -           (edid->input & DRM_EDID_DIGITAL_DFP_1_X)) {
> > +       if (info->bpc == 0 && edid->revision == 3 &&
> > +           edid->input & DRM_EDID_DIGITAL_DFP_1_X) {
> >                 info->bpc = 8;
> >                 DRM_DEBUG("%s: Assigning DFP sink color depth as %d bpc.\n",
> >                           connector->name, info->bpc);
> > --
> > 2.21.0
> >
> > _______________________________________________
> > dri-devel mailing list
> > dri-devel@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/dri-devel
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH 2/2] drm/edid: Ignore "DFP 1.x" bit for EDID 1.2 and earlier
  2019-05-29 16:50     ` Mario Kleiner
@ 2019-06-06 13:24       ` Ville Syrjälä
  0 siblings, 0 replies; 5+ messages in thread
From: Ville Syrjälä @ 2019-06-06 13:24 UTC (permalink / raw)
  To: Mario Kleiner; +Cc: Maling list - DRI developers

On Wed, May 29, 2019 at 06:50:40PM +0200, Mario Kleiner wrote:
> On Wed, May 29, 2019 at 7:02 AM Ville Syrjala
> <ville.syrjala@linux.intel.com> wrote:
> >
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > From VESA EDID implementation guide v1.0:
> > "For EDID version 1 revision 2 or earlier data structures when offset 14h
> >  bit 7 is set to one, the value of bits 6-0 are undefined, and therefore
> >  cannot be interpreted to mean anything."
> >
> > And since EDID 1.4 redefines that bit let's consult it only for
> > EDID 1.3.
> >
> > Cc: Mario Kleiner <mario.kleiner.de@gmail.com>
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Yes. Series is:
> Reviewed-by: Mario Kleiner <mario.kleiner.de@gmail.com>
> 
> -mario
> 
> On Wed, May 29, 2019 at 3:50 PM Alex Deucher <alexdeucher@gmail.com> wrote:
> >
> > On Wed, May 29, 2019 at 7:02 AM Ville Syrjala
> > <ville.syrjala@linux.intel.com> wrote:
> > >
> > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > >
> > > From VESA EDID implementation guide v1.0:
> > > "For EDID version 1 revision 2 or earlier data structures when offset 14h
> > >  bit 7 is set to one, the value of bits 6-0 are undefined, and therefore
> > >  cannot be interpreted to mean anything."
> > >
> > > And since EDID 1.4 redefines that bit let's consult it only for
> > > EDID 1.3.
> > >
> > > Cc: Mario Kleiner <mario.kleiner.de@gmail.com>
> > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Series is:
> > Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

Thanks. Series pushed to drm-misc-next.

> >
> > > ---
> > >  drivers/gpu/drm/drm_edid.c | 4 ++--
> > >  1 file changed, 2 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
> > > index dd601ed6a30e..c3296a72fff9 100644
> > > --- a/drivers/gpu/drm/drm_edid.c
> > > +++ b/drivers/gpu/drm/drm_edid.c
> > > @@ -4569,8 +4569,8 @@ u32 drm_add_display_info(struct drm_connector *connector, const struct edid *edi
> > >          * tells us to assume 8 bpc color depth if the EDID doesn't have
> > >          * extensions which tell otherwise.
> > >          */
> > > -       if ((info->bpc == 0) && (edid->revision < 4) &&
> > > -           (edid->input & DRM_EDID_DIGITAL_DFP_1_X)) {
> > > +       if (info->bpc == 0 && edid->revision == 3 &&
> > > +           edid->input & DRM_EDID_DIGITAL_DFP_1_X) {
> > >                 info->bpc = 8;
> > >                 DRM_DEBUG("%s: Assigning DFP sink color depth as %d bpc.\n",
> > >                           connector->name, info->bpc);
> > > --
> > > 2.21.0
> > >
> > > _______________________________________________
> > > dri-devel mailing list
> > > dri-devel@lists.freedesktop.org
> > > https://lists.freedesktop.org/mailman/listinfo/dri-devel
> > _______________________________________________
> > dri-devel mailing list
> > dri-devel@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/dri-devel

-- 
Ville Syrjälä
Intel
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2019-06-06 13:24 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-05-29 11:02 [PATCH 1/2] drm/edid: Clean up DRM_EDID_DIGITAL_* flags Ville Syrjala
2019-05-29 11:02 ` [PATCH 2/2] drm/edid: Ignore "DFP 1.x" bit for EDID 1.2 and earlier Ville Syrjala
2019-05-29 13:50   ` Alex Deucher
2019-05-29 16:50     ` Mario Kleiner
2019-06-06 13:24       ` Ville Syrjälä

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.