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* [Qemu-devel] PCI(e): Documentation "io-reserve" and related properties?
@ 2019-06-06 16:19 Kashyap Chamarthy
  2019-06-06 18:20 ` Michael S. Tsirkin
  0 siblings, 1 reply; 6+ messages in thread
From: Kashyap Chamarthy @ 2019-06-06 16:19 UTC (permalink / raw)
  To: qemu-devel; +Cc: mst

Hi folks,

Today I learnt about some obscure PCIe-related properties, in context of
the adding PCIe root ports to a guest, namely:

    io-reserve
    mem-reserve
    bus-reserve
    pref32-reserve
    pref64-reserve

Unfortunately, the commit[*] that added them provided no documentation
whatsover.

In my scenario, I was specifically wondering about what does
"io-reserve" mean, in what context to use it, etc.  (But documentation
about other properties is also welcome.)

Anyone more well-versed in this area care to shed some light?


[*] 6755e618d0 (hw/pci: add PCI resource reserve capability to legacy
    PCI bridge, 2018-08-21)

-- 
/kashyap


^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2019-06-11 10:21 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-06-06 16:19 [Qemu-devel] PCI(e): Documentation "io-reserve" and related properties? Kashyap Chamarthy
2019-06-06 18:20 ` Michael S. Tsirkin
2019-06-07 11:43   ` Andrea Bolognani
2019-06-11 10:15     ` Marcel Apfelbaum
2019-06-11  7:21   ` Kashyap Chamarthy
2019-06-11 10:19     ` Marcel Apfelbaum

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