[igt-dev] [PATCH i-g-t v2 0/5] Engine discovery for few more tests

[igt-dev] [PATCH i-g-t v2 0/5] Engine discovery for few more tests

[Ramalingam C]

New uAPI is used for discovery of engines at below tests
	gem_bad_reloc
	gem_exec_async
	gem_exec_capture
	gem_exec_params
	prime_vgem

Ramalingam C (5):
  test/i915: gem_bad_reloc: use the gem_engine_topology library
  test/i915: gem_exec_async: use the gem_engine_topology library
  test/i915: gem_exec_capture: use the gem_engine_topology library
  test/i915: gem_exec_params: use the gem_engine_topology library
  test/prime_vgem: use the gem_engine_topology library

 tests/i915/gem_bad_reloc.c    | 14 +++----
 tests/i915/gem_exec_async.c   | 34 ++++++++---------
 tests/i915/gem_exec_capture.c | 24 +++++-------
 tests/i915/gem_exec_params.c  | 41 ++++----------------
 tests/prime_vgem.c            | 70 ++++++++++++++++-------------------
 5 files changed, 71 insertions(+), 112 deletions(-)

-- 
2.19.1

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[igt-dev] [PATCH i-g-t v2 1/5] test/i915: gem_bad_reloc: use the gem_engine_topology library

[Ramalingam C]

Replace the legacy for_each_engine* defines with the ones
implemented in the gem_engine_topology library.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 tests/i915/gem_bad_reloc.c | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/tests/i915/gem_bad_reloc.c b/tests/i915/gem_bad_reloc.c
index 7624cd8e0949..26a932a3a933 100644
--- a/tests/i915/gem_bad_reloc.c
+++ b/tests/i915/gem_bad_reloc.c
@@ -50,7 +50,8 @@ IGT_TEST_DESCRIPTION("Simulates SNA behaviour using negative self-relocations"
  * than the total size of the GTT), the GPU will hang.
  * See https://bugs.freedesktop.org/show_bug.cgi?id=78533
  */
-static void negative_reloc(int fd, unsigned engine, unsigned flags)
+static void negative_reloc(int fd, const struct intel_execution_engine2 *e,
+			   unsigned flags)
 {
 	struct drm_i915_gem_execbuffer2 execbuf;
 	struct drm_i915_gem_exec_object2 obj;
@@ -60,7 +61,6 @@ static void negative_reloc(int fd, unsigned engine, unsigned flags)
 	uint64_t *offsets;
 	int i;
 
-	gem_require_ring(fd, engine);
 	igt_require(intel_gen(intel_get_drm_devid(fd)) >= 7);
 
 	memset(&obj, 0, sizeof(obj));
@@ -70,7 +70,7 @@ static void negative_reloc(int fd, unsigned engine, unsigned flags)
 	memset(&execbuf, 0, sizeof(execbuf));
 	execbuf.buffers_ptr = (uintptr_t)&obj;
 	execbuf.buffer_count = 1;
-	execbuf.flags = engine | (flags & USE_LUT);
+	execbuf.flags = e->flags | (flags & USE_LUT);
 	igt_require(__gem_execbuf(fd, &execbuf) == 0);
 
 	igt_info("Found offset %lld for 4k batch\n", (long long)obj.offset);
@@ -185,7 +185,7 @@ static void negative_reloc_blt(int fd)
 
 igt_main
 {
-	const struct intel_execution_engine *e;
+	const struct intel_execution_engine2 *e;
 	int fd = -1;
 
 	igt_fixture {
@@ -193,12 +193,12 @@ igt_main
 		igt_require_gem(fd);
 	}
 
-	for (e = intel_execution_engines; e->name; e++) {
+	__for_each_physical_engine(fd, e) {
 		igt_subtest_f("negative-reloc-%s", e->name)
-			negative_reloc(fd, e->exec_id | e->flags, 0);
+			negative_reloc(fd, e, 0);
 
 		igt_subtest_f("negative-reloc-lut-%s", e->name)
-			negative_reloc(fd, e->exec_id | e->flags, USE_LUT);
+			negative_reloc(fd, e, USE_LUT);
 	}
 
 	igt_subtest("negative-reloc-bltcopy")
-- 
2.19.1

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[igt-dev] [PATCH i-g-t v2 2/5] test/i915: gem_exec_async: use the gem_engine_topology library

[Ramalingam C]

Replace the legacy for_each_engine* defines with the ones
implemented in the gem_engine_topology library.

v2:
  class and instance are compared for engine identification [Andi]

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 tests/i915/gem_exec_async.c | 34 +++++++++++++++-------------------
 1 file changed, 15 insertions(+), 19 deletions(-)

diff --git a/tests/i915/gem_exec_async.c b/tests/i915/gem_exec_async.c
index 9a06af7e29cb..0da97f1f0506 100644
--- a/tests/i915/gem_exec_async.c
+++ b/tests/i915/gem_exec_async.c
@@ -28,7 +28,7 @@
 
 IGT_TEST_DESCRIPTION("Check that we can issue concurrent writes across the engines.");
 
-static void store_dword(int fd, unsigned ring,
+static void store_dword(int fd, const struct intel_execution_engine2 *e,
 			uint32_t target, uint32_t offset, uint32_t value)
 {
 	const int gen = intel_gen(intel_get_drm_devid(fd));
@@ -41,7 +41,7 @@ static void store_dword(int fd, unsigned ring,
 	memset(&execbuf, 0, sizeof(execbuf));
 	execbuf.buffers_ptr = to_user_pointer(obj);
 	execbuf.buffer_count = 2;
-	execbuf.flags = ring;
+	execbuf.flags = e->flags;
 	if (gen < 6)
 		execbuf.flags |= I915_EXEC_SECURE;
 
@@ -80,15 +80,15 @@ static void store_dword(int fd, unsigned ring,
 	gem_close(fd, obj[1].handle);
 }
 
-static void one(int fd, unsigned ring, uint32_t flags)
+static void one(int fd, const struct intel_execution_engine2 *e)
 {
 	const int gen = intel_gen(intel_get_drm_devid(fd));
 	struct drm_i915_gem_exec_object2 obj[2];
+	struct intel_execution_engine2 *engine;
 #define SCRATCH 0
 #define BATCH 1
 	struct drm_i915_gem_relocation_entry reloc;
 	struct drm_i915_gem_execbuffer2 execbuf;
-	unsigned int other;
 	uint32_t *batch;
 	int i;
 
@@ -138,19 +138,21 @@ static void one(int fd, unsigned ring, uint32_t flags)
 	memset(&execbuf, 0, sizeof(execbuf));
 	execbuf.buffers_ptr = to_user_pointer(obj);
 	execbuf.buffer_count = 2;
-	execbuf.flags = ring | flags;
+	execbuf.flags = e->flags;
 	igt_require(__gem_execbuf(fd, &execbuf) == 0);
 	gem_close(fd, obj[BATCH].handle);
 
 	i = 0;
-	for_each_physical_engine(fd, other) {
-		if (other == ring)
+
+	__for_each_physical_engine(fd, engine) {
+		if (engine->class == e->class &&
+		    engine->instance == e->instance)
 			continue;
 
-		if (!gem_can_store_dword(fd, other))
+		if (!gem_class_can_store_dword(fd, engine->class))
 			continue;
 
-		store_dword(fd, other, obj[SCRATCH].handle, 4*i, i);
+		store_dword(fd, engine, obj[SCRATCH].handle, 4*i, i);
 		i++;
 	}
 
@@ -185,7 +187,7 @@ static bool has_async_execbuf(int fd)
 
 igt_main
 {
-	const struct intel_execution_engine *e;
+	const struct intel_execution_engine2 *e;
 	int fd = -1;
 
 	igt_skip_on_simulation();
@@ -199,17 +201,11 @@ igt_main
 		igt_fork_hang_detector(fd);
 	}
 
-	for (e = intel_execution_engines; e->name; e++) {
-		/* default exec-id is purely symbolic */
-		if (e->exec_id == 0)
-			continue;
-
+	__for_each_physical_engine(fd, e)
 		igt_subtest_f("concurrent-writes-%s", e->name) {
-			igt_require(gem_ring_has_physical_engine(fd, e->exec_id | e->flags));
-			igt_require(gem_can_store_dword(fd, e->exec_id | e->flags));
-			one(fd, e->exec_id, e->flags);
+			igt_require(gem_class_can_store_dword(fd, e->class));
+			one(fd, e);
 		}
-	}
 
 	igt_fixture {
 		igt_stop_hang_detector();
-- 
2.19.1

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[igt-dev] [PATCH i-g-t v2 3/5] test/i915: gem_exec_capture: use the gem_engine_topology library

[Ramalingam C]

Replace the legacy for_each_engine* defines with the ones implemented
in the gem_engine_topology library.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 tests/i915/gem_exec_capture.c | 24 ++++++++++--------------
 1 file changed, 10 insertions(+), 14 deletions(-)

diff --git a/tests/i915/gem_exec_capture.c b/tests/i915/gem_exec_capture.c
index 4457496d6d05..c0c3b88d5fa7 100644
--- a/tests/i915/gem_exec_capture.c
+++ b/tests/i915/gem_exec_capture.c
@@ -61,7 +61,8 @@ static void check_error_state(int dir, struct drm_i915_gem_exec_object2 *obj)
 	igt_assert(found);
 }
 
-static void __capture1(int fd, int dir, unsigned ring, uint32_t target)
+static void __capture1(int fd, int dir, const struct intel_execution_engine2 *e,
+		       uint32_t target)
 {
 	const int gen = intel_gen(intel_get_drm_devid(fd));
 	struct drm_i915_gem_exec_object2 obj[4];
@@ -145,7 +146,7 @@ static void __capture1(int fd, int dir, unsigned ring, uint32_t target)
 	memset(&execbuf, 0, sizeof(execbuf));
 	execbuf.buffers_ptr = (uintptr_t)obj;
 	execbuf.buffer_count = ARRAY_SIZE(obj);
-	execbuf.flags = ring;
+	execbuf.flags = e ? e->flags : 0;
 	if (gen > 3 && gen < 6)
 		execbuf.flags |= I915_EXEC_SECURE;
 
@@ -168,12 +169,12 @@ static void __capture1(int fd, int dir, unsigned ring, uint32_t target)
 	gem_close(fd, obj[SCRATCH].handle);
 }
 
-static void capture(int fd, int dir, unsigned ring)
+static void capture(int fd, int dir, const struct intel_execution_engine2 *e)
 {
 	uint32_t handle;
 
 	handle = gem_create(fd, 4096);
-	__capture1(fd, dir, ring, handle);
+	__capture1(fd, dir, e, handle);
 	gem_close(fd, handle);
 }
 
@@ -501,7 +502,7 @@ static void userptr(int fd, int dir)
 	igt_assert(posix_memalign(&ptr, 4096, 4096) == 0);
 	igt_require(__gem_userptr(fd, ptr, 4096, 0, 0, &handle) == 0);
 
-	__capture1(fd, dir, 0, handle);
+	__capture1(fd, dir, NULL, handle);
 
 	gem_close(fd, handle);
 	free(ptr);
@@ -526,7 +527,7 @@ static size_t safer_strlen(const char *s)
 
 igt_main
 {
-	const struct intel_execution_engine *e;
+	const struct intel_execution_engine2 *e;
 	igt_hang_t hang;
 	int fd = -1;
 	int dir = -1;
@@ -552,15 +553,10 @@ igt_main
 		igt_require(safer_strlen(igt_sysfs_get(dir, "error")) > 0);
 	}
 
-	for (e = intel_execution_engines; e->name; e++) {
-		/* default exec-id is purely symbolic */
-		if (e->exec_id == 0)
-			continue;
-
+	__for_each_physical_engine(fd, e) {
 		igt_subtest_f("capture-%s", e->name) {
-			igt_require(gem_ring_has_physical_engine(fd, e->exec_id | e->flags));
-			igt_require(gem_can_store_dword(fd, e->exec_id | e->flags));
-			capture(fd, dir, e->exec_id | e->flags);
+			igt_require(gem_class_can_store_dword(fd, e->class));
+			capture(fd, dir, e);
 		}
 	}
 
-- 
2.19.1

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[igt-dev] [PATCH i-g-t v2 4/5] test/i915: gem_exec_params: use the gem_engine_topology library

[Ramalingam C]

Replace the legacy for_each_engine* defines with the ones implemented
in the gem_engine_topology library.

v2:
  has_ring() check is removed [tvertko]
  Engine type is identified through CLASS [tvrtko]

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 tests/i915/gem_exec_params.c | 41 ++++++------------------------------
 1 file changed, 7 insertions(+), 34 deletions(-)

diff --git a/tests/i915/gem_exec_params.c b/tests/i915/gem_exec_params.c
index 49c56a8d75e9..3bc5b0a9d531 100644
--- a/tests/i915/gem_exec_params.c
+++ b/tests/i915/gem_exec_params.c
@@ -52,30 +52,6 @@
 #define LOCAL_I915_EXEC_BATCH_FIRST (1 << 18)
 #define LOCAL_I915_EXEC_FENCE_ARRAY (1 << 19)
 
-static bool has_ring(int fd, unsigned ring_exec_flags)
-{
-	switch (ring_exec_flags & I915_EXEC_RING_MASK) {
-	case 0:
-	case I915_EXEC_RENDER:
-		return true;
-
-	case I915_EXEC_BSD:
-		if (ring_exec_flags & LOCAL_I915_EXEC_BSD_MASK)
-			return gem_has_bsd2(fd);
-		else
-			return gem_has_bsd(fd);
-
-	case I915_EXEC_BLT:
-		return gem_has_blt(fd);
-
-	case I915_EXEC_VEBOX:
-		return gem_has_vebox(fd);
-	}
-
-	igt_assert_f(0, "invalid exec flag 0x%x\n", ring_exec_flags);
-	return false;
-}
-
 static bool has_exec_batch_first(int fd)
 {
 	int val = -1;
@@ -201,7 +177,7 @@ int fd;
 
 igt_main
 {
-	const struct intel_execution_engine *e;
+	const struct intel_execution_engine2 *e;
 
 	igt_fixture {
 		fd = drm_open_driver(DRIVER_INTEL);
@@ -235,11 +211,9 @@ igt_main
 	}
 
 	igt_subtest("control") {
-		for (e = intel_execution_engines; e->name; e++) {
-			if (has_ring(fd, e->exec_id | e->flags)) {
-				execbuf.flags = e->exec_id | e->flags;
-				gem_execbuf(fd, &execbuf);
-			}
+		__for_each_physical_engine(fd, e) {
+			execbuf.flags = e->flags;
+			gem_execbuf(fd, &execbuf);
 		}
 	}
 
@@ -387,14 +361,13 @@ igt_main
 
 	igt_subtest("rs-invalid") {
 		bool has_rs = has_resource_streamer(fd);
-		unsigned int engine;
 
-		for_each_engine(fd, engine) {
+		__for_each_physical_engine(fd, e) {
 			int expect = -EINVAL;
-			if (has_rs && (engine == 0 || engine == I915_EXEC_RENDER))
+			if (has_rs && (e->class == I915_ENGINE_CLASS_RENDER))
 				expect = 0;
 
-			execbuf.flags = engine | LOCAL_I915_EXEC_RESOURCE_STREAMER;
+			execbuf.flags = e->flags | LOCAL_I915_EXEC_RESOURCE_STREAMER;
 			igt_assert_eq(__gem_execbuf(fd, &execbuf), expect);
 		}
 	}
-- 
2.19.1

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[igt-dev] [PATCH i-g-t v2 5/5] test/prime_vgem: use the gem_engine_topology library

[Ramalingam C]

Replace the legacy for_each_engine* defines with the ones
implemented in the gem_engine_topology library.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 tests/prime_vgem.c | 70 +++++++++++++++++++++-------------------------
 1 file changed, 32 insertions(+), 38 deletions(-)

diff --git a/tests/prime_vgem.c b/tests/prime_vgem.c
index 69ae8c9b0710..7689f6b3d6c8 100644
--- a/tests/prime_vgem.c
+++ b/tests/prime_vgem.c
@@ -325,7 +325,7 @@ static bool prime_busy(int fd, bool excl)
 	return poll(&pfd, 1, 0) == 0;
 }
 
-static void work(int i915, int dmabuf, unsigned ring, uint32_t flags)
+static void work(int i915, int dmabuf, const struct intel_execution_engine2 *e)
 {
 	const int SCRATCH = 0;
 	const int BATCH = 1;
@@ -341,7 +341,7 @@ static void work(int i915, int dmabuf, unsigned ring, uint32_t flags)
 	memset(&execbuf, 0, sizeof(execbuf));
 	execbuf.buffers_ptr = (uintptr_t)obj;
 	execbuf.buffer_count = 2;
-	execbuf.flags = ring | flags;
+	execbuf.flags = e ? e->flags : I915_EXEC_DEFAULT;
 	if (gen < 6)
 		execbuf.flags |= I915_EXEC_SECURE;
 
@@ -420,7 +420,7 @@ static void work(int i915, int dmabuf, unsigned ring, uint32_t flags)
 	igt_assert(read_busy && write_busy);
 }
 
-static void test_busy(int i915, int vgem, unsigned ring, uint32_t flags)
+static void test_busy(int i915, int vgem, const struct intel_execution_engine2 *e)
 {
 	struct vgem_bo scratch;
 	struct timespec tv;
@@ -434,7 +434,7 @@ static void test_busy(int i915, int vgem, unsigned ring, uint32_t flags)
 	vgem_create(vgem, &scratch);
 	dmabuf = prime_handle_to_fd(vgem, scratch.handle);
 
-	work(i915, dmabuf, ring, flags);
+	work(i915, dmabuf, e);
 
 	/* Calling busy in a loop should be enough to flush the rendering */
 	memset(&tv, 0, sizeof(tv));
@@ -450,7 +450,8 @@ static void test_busy(int i915, int vgem, unsigned ring, uint32_t flags)
 	close(dmabuf);
 }
 
-static void test_wait(int i915, int vgem, unsigned ring, uint32_t flags)
+static void test_wait(int i915, int vgem,
+		      const struct intel_execution_engine2 *e)
 {
 	struct vgem_bo scratch;
 	struct pollfd pfd;
@@ -463,7 +464,7 @@ static void test_wait(int i915, int vgem, unsigned ring, uint32_t flags)
 	vgem_create(vgem, &scratch);
 	pfd.fd = prime_handle_to_fd(vgem, scratch.handle);
 
-	work(i915, pfd.fd, ring, flags);
+	work(i915, pfd.fd, e);
 
 	pfd.events = POLLIN;
 	igt_assert_eq(poll(&pfd, 1, 10000), 1);
@@ -477,7 +478,7 @@ static void test_wait(int i915, int vgem, unsigned ring, uint32_t flags)
 	close(pfd.fd);
 }
 
-static void test_sync(int i915, int vgem, unsigned ring, uint32_t flags)
+static void test_sync(int i915, int vgem, const struct intel_execution_engine2 *e)
 {
 	struct vgem_bo scratch;
 	uint32_t *ptr;
@@ -494,7 +495,7 @@ static void test_sync(int i915, int vgem, unsigned ring, uint32_t flags)
 	igt_assert(ptr != MAP_FAILED);
 	gem_close(vgem, scratch.handle);
 
-	work(i915, dmabuf, ring, flags);
+	work(i915, dmabuf, e);
 
 	prime_sync_start(dmabuf, false);
 	for (i = 0; i < 1024; i++)
@@ -506,7 +507,8 @@ static void test_sync(int i915, int vgem, unsigned ring, uint32_t flags)
 	munmap(ptr, scratch.size);
 }
 
-static void test_fence_wait(int i915, int vgem, unsigned ring, unsigned flags)
+static void test_fence_wait(int i915, int vgem,
+			    const struct intel_execution_engine2 *e)
 {
 	struct vgem_bo scratch;
 	uint32_t fence;
@@ -527,7 +529,7 @@ static void test_fence_wait(int i915, int vgem, unsigned ring, unsigned flags)
 	igt_assert(ptr != MAP_FAILED);
 
 	igt_fork(child, 1)
-		work(i915, dmabuf, ring, flags);
+		work(i915, dmabuf, e);
 
 	sleep(1);
 
@@ -568,7 +570,7 @@ static void test_fence_hang(int i915, int vgem, unsigned flags)
 	igt_assert(ptr != MAP_FAILED);
 	gem_close(vgem, scratch.handle);
 
-	work(i915, dmabuf, I915_EXEC_DEFAULT, 0);
+	work(i915, dmabuf, NULL);
 
 	/* The work should have been cancelled */
 
@@ -811,7 +813,7 @@ static void test_flip(int i915, int vgem, unsigned hang)
 
 igt_main
 {
-	const struct intel_execution_engine *e;
+	const struct intel_execution_engine2 *e;
 	int i915 = -1;
 	int vgem = -1;
 
@@ -840,39 +842,32 @@ igt_main
 	igt_subtest("coherency-gtt")
 		test_gtt_interleaved(vgem, i915);
 
-	for (e = intel_execution_engines; e->name; e++) {
+	__for_each_physical_engine(i915, e) {
 		igt_subtest_f("%ssync-%s",
-			      e->exec_id == 0 ? "basic-" : "",
-			      e->name) {
-			gem_require_ring(i915, e->exec_id | e->flags);
-			igt_require(gem_can_store_dword(i915, e->exec_id | e->flags));
+			      e->class == I915_ENGINE_CLASS_RENDER ?
+			      "basic-" : "", e->name) {
+			igt_require(gem_class_can_store_dword(i915, e->class));
 
 			gem_quiescent_gpu(i915);
-			test_sync(i915, vgem, e->exec_id, e->flags);
+			test_sync(i915, vgem, e);
 		}
-	}
 
-	for (e = intel_execution_engines; e->name; e++) {
 		igt_subtest_f("%sbusy-%s",
-			      e->exec_id == 0 ? "basic-" : "",
-			      e->name) {
-			gem_require_ring(i915, e->exec_id | e->flags);
-			igt_require(gem_can_store_dword(i915, e->exec_id | e->flags));
+			      e->class == I915_ENGINE_CLASS_RENDER ?
+			      "basic-" : "", e->name) {
+			igt_require(gem_can_store_dword(i915, e->class));
 
 			gem_quiescent_gpu(i915);
-			test_busy(i915, vgem, e->exec_id, e->flags);
+			test_busy(i915, vgem, e);
 		}
-	}
 
-	for (e = intel_execution_engines; e->name; e++) {
 		igt_subtest_f("%swait-%s",
-			      e->exec_id == 0 ? "basic-" : "",
-			      e->name) {
-			gem_require_ring(i915, e->exec_id | e->flags);
-			igt_require(gem_can_store_dword(i915, e->exec_id | e->flags));
+			      e->class == I915_ENGINE_CLASS_RENDER ?
+			      "basic-" : "", e->name) {
+			igt_require(gem_can_store_dword(i915, e->class));
 
 			gem_quiescent_gpu(i915);
-			test_wait(i915, vgem, e->exec_id, e->flags);
+			test_wait(i915, vgem, e);
 		}
 	}
 
@@ -887,15 +882,14 @@ igt_main
 		igt_subtest("basic-fence-mmap")
 			test_fence_mmap(i915, vgem);
 
-		for (e = intel_execution_engines; e->name; e++) {
+		__for_each_physical_engine(i915, e) {
 			igt_subtest_f("%sfence-wait-%s",
-					e->exec_id == 0 ? "basic-" : "",
-					e->name) {
-				gem_require_ring(i915, e->exec_id | e->flags);
-				igt_require(gem_can_store_dword(i915, e->exec_id | e->flags));
+					e->class == I915_ENGINE_CLASS_RENDER ?
+					"basic-" : "", e->name) {
+				igt_require(gem_can_store_dword(i915, e->class));
 
 				gem_quiescent_gpu(i915);
-				test_fence_wait(i915, vgem, e->exec_id, e->flags);
+				test_fence_wait(i915, vgem, e);
 			}
 		}
 
-- 
2.19.1

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Re: [igt-dev] [PATCH i-g-t v2 2/5] test/i915: gem_exec_async: use the gem_engine_topology library

[Chris Wilson]

Quoting Ramalingam C (2019-05-30 16:42:19)
> @@ -80,15 +80,15 @@ static void store_dword(int fd, unsigned ring,
>         gem_close(fd, obj[1].handle);
>  }
>  
> -static void one(int fd, unsigned ring, uint32_t flags)
> +static void one(int fd, const struct intel_execution_engine2 *e)
>  {
>         const int gen = intel_gen(intel_get_drm_devid(fd));
>         struct drm_i915_gem_exec_object2 obj[2];
> +       struct intel_execution_engine2 *engine;

Keep this as other.

>  #define SCRATCH 0
>  #define BATCH 1
>         struct drm_i915_gem_relocation_entry reloc;
>         struct drm_i915_gem_execbuffer2 execbuf;
> -       unsigned int other;
>         uint32_t *batch;
>         int i;
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Re: [igt-dev] [PATCH i-g-t v2 3/5] test/i915: gem_exec_capture: use the gem_engine_topology library

[Chris Wilson]

Quoting Ramalingam C (2019-05-30 16:42:20)
> @@ -501,7 +502,7 @@ static void userptr(int fd, int dir)
>         igt_assert(posix_memalign(&ptr, 4096, 4096) == 0);
>         igt_require(__gem_userptr(fd, ptr, 4096, 0, 0, &handle) == 0);
>  
> -       __capture1(fd, dir, 0, handle);
> +       __capture1(fd, dir, NULL, handle);

You're missing something here. Using the new iterator NULL results in a
random engine.
-Chris
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Re: [igt-dev] [PATCH i-g-t v2 4/5] test/i915: gem_exec_params: use the gem_engine_topology library

[Chris Wilson]

Quoting Ramalingam C (2019-05-30 16:42:21)
> Replace the legacy for_each_engine* defines with the ones implemented
> in the gem_engine_topology library.
> 
> v2:
>   has_ring() check is removed [tvertko]
>   Engine type is identified through CLASS [tvrtko]
> 
> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> ---
>  tests/i915/gem_exec_params.c | 41 ++++++------------------------------
>  1 file changed, 7 insertions(+), 34 deletions(-)
> 
> diff --git a/tests/i915/gem_exec_params.c b/tests/i915/gem_exec_params.c
> index 49c56a8d75e9..3bc5b0a9d531 100644
> --- a/tests/i915/gem_exec_params.c
> +++ b/tests/i915/gem_exec_params.c
> @@ -52,30 +52,6 @@
>  #define LOCAL_I915_EXEC_BATCH_FIRST (1 << 18)
>  #define LOCAL_I915_EXEC_FENCE_ARRAY (1 << 19)
>  
> -static bool has_ring(int fd, unsigned ring_exec_flags)
> -{
> -       switch (ring_exec_flags & I915_EXEC_RING_MASK) {
> -       case 0:
> -       case I915_EXEC_RENDER:
> -               return true;
> -
> -       case I915_EXEC_BSD:
> -               if (ring_exec_flags & LOCAL_I915_EXEC_BSD_MASK)
> -                       return gem_has_bsd2(fd);
> -               else
> -                       return gem_has_bsd(fd);
> -
> -       case I915_EXEC_BLT:
> -               return gem_has_blt(fd);
> -
> -       case I915_EXEC_VEBOX:
> -               return gem_has_vebox(fd);
> -       }
> -
> -       igt_assert_f(0, "invalid exec flag 0x%x\n", ring_exec_flags);
> -       return false;
> -}
> -
>  static bool has_exec_batch_first(int fd)
>  {
>         int val = -1;
> @@ -201,7 +177,7 @@ int fd;
>  
>  igt_main
>  {
> -       const struct intel_execution_engine *e;
> +       const struct intel_execution_engine2 *e;
>  
>         igt_fixture {
>                 fd = drm_open_driver(DRIVER_INTEL);
> @@ -235,11 +211,9 @@ igt_main
>         }
>  
>         igt_subtest("control") {
> -               for (e = intel_execution_engines; e->name; e++) {
> -                       if (has_ring(fd, e->exec_id | e->flags)) {
> -                               execbuf.flags = e->exec_id | e->flags;
> -                               gem_execbuf(fd, &execbuf);
> -                       }
> +               __for_each_physical_engine(fd, e) {
> +                       execbuf.flags = e->flags;
> +                       gem_execbuf(fd, &execbuf);

This is silly. Previously it was cross-checking the GETPARAM against the
EXECBUFFER uABI. Now it is asking the same question twice.

This is the example that should not be using physical engines as it
exercising ABI. Please be careful.
-Chris
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Re: [igt-dev] [PATCH i-g-t v2 5/5] test/prime_vgem: use the gem_engine_topology library

[Chris Wilson]

Quoting Ramalingam C (2019-05-30 16:42:22)
> Replace the legacy for_each_engine* defines with the ones
> implemented in the gem_engine_topology library.
> 
> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> ---
>  tests/prime_vgem.c | 70 +++++++++++++++++++++-------------------------
>  1 file changed, 32 insertions(+), 38 deletions(-)
> 
> diff --git a/tests/prime_vgem.c b/tests/prime_vgem.c
> index 69ae8c9b0710..7689f6b3d6c8 100644
> --- a/tests/prime_vgem.c
> +++ b/tests/prime_vgem.c
> @@ -325,7 +325,7 @@ static bool prime_busy(int fd, bool excl)
>         return poll(&pfd, 1, 0) == 0;
>  }
>  
> -static void work(int i915, int dmabuf, unsigned ring, uint32_t flags)
> +static void work(int i915, int dmabuf, const struct intel_execution_engine2 *e)
>  {
>         const int SCRATCH = 0;
>         const int BATCH = 1;
> @@ -341,7 +341,7 @@ static void work(int i915, int dmabuf, unsigned ring, uint32_t flags)
>         memset(&execbuf, 0, sizeof(execbuf));
>         execbuf.buffers_ptr = (uintptr_t)obj;
>         execbuf.buffer_count = 2;
> -       execbuf.flags = ring | flags;
> +       execbuf.flags = e ? e->flags : I915_EXEC_DEFAULT;

Again, this is random selection. I915_EXEC_DEFAULT is dangerous once a
random engine map has been installed.
-Chris
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Re: [igt-dev] [PATCH i-g-t v2 3/5] test/i915: gem_exec_capture: use the gem_engine_topology library

[Ramalingam C]

On 2019-05-30 at 16:47:35 +0100, Chris Wilson wrote:
> Quoting Ramalingam C (2019-05-30 16:42:20)
> > @@ -501,7 +502,7 @@ static void userptr(int fd, int dir)
> >         igt_assert(posix_memalign(&ptr, 4096, 4096) == 0);
> >         igt_require(__gem_userptr(fd, ptr, 4096, 0, 0, &handle) == 0);
> >  
> > -       __capture1(fd, dir, 0, handle);
> > +       __capture1(fd, dir, NULL, handle);
> 
> You're missing something here. Using the new iterator NULL results in a
> random engine.
Chris,

engine pointer is passed into __capture1() and following delta handles
the flags for execbuf.
-       execbuf.flags = ring;
+       execbuf.flags = e ? e->flags : 0;

Will this be fine?

-Ram
> -Chris
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Re: [igt-dev] [PATCH i-g-t v2 5/5] test/prime_vgem: use the gem_engine_topology library

[Ramalingam C]

On 2019-05-30 at 16:50:47 +0100, Chris Wilson wrote:
> Quoting Ramalingam C (2019-05-30 16:42:22)
> > Replace the legacy for_each_engine* defines with the ones
> > implemented in the gem_engine_topology library.
> > 
> > Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> > ---
> >  tests/prime_vgem.c | 70 +++++++++++++++++++++-------------------------
> >  1 file changed, 32 insertions(+), 38 deletions(-)
> > 
> > diff --git a/tests/prime_vgem.c b/tests/prime_vgem.c
> > index 69ae8c9b0710..7689f6b3d6c8 100644
> > --- a/tests/prime_vgem.c
> > +++ b/tests/prime_vgem.c
> > @@ -325,7 +325,7 @@ static bool prime_busy(int fd, bool excl)
> >         return poll(&pfd, 1, 0) == 0;
> >  }
> >  
> > -static void work(int i915, int dmabuf, unsigned ring, uint32_t flags)
> > +static void work(int i915, int dmabuf, const struct intel_execution_engine2 *e)
> >  {
> >         const int SCRATCH = 0;
> >         const int BATCH = 1;
> > @@ -341,7 +341,7 @@ static void work(int i915, int dmabuf, unsigned ring, uint32_t flags)
> >         memset(&execbuf, 0, sizeof(execbuf));
> >         execbuf.buffers_ptr = (uintptr_t)obj;
> >         execbuf.buffer_count = 2;
> > -       execbuf.flags = ring | flags;
> > +       execbuf.flags = e ? e->flags : I915_EXEC_DEFAULT;
> 
> Again, this is random selection. I915_EXEC_DEFAULT is dangerous once a
> random engine map has been installed.
So should we use I915_EXEC_RENDER instead of I915_EXEC_DEFAULT?

-Ram.
> -Chris
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Re: [igt-dev] [PATCH i-g-t v2 4/5] test/i915: gem_exec_params: use the gem_engine_topology library

[Ramalingam C]

On 2019-05-30 at 16:49:45 +0100, Chris Wilson wrote:
> Quoting Ramalingam C (2019-05-30 16:42:21)
> > Replace the legacy for_each_engine* defines with the ones implemented
> > in the gem_engine_topology library.
> > 
> > v2:
> >   has_ring() check is removed [tvertko]
> >   Engine type is identified through CLASS [tvrtko]
> > 
> > Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> > ---
> >  tests/i915/gem_exec_params.c | 41 ++++++------------------------------
> >  1 file changed, 7 insertions(+), 34 deletions(-)
> > 
> > diff --git a/tests/i915/gem_exec_params.c b/tests/i915/gem_exec_params.c
> > index 49c56a8d75e9..3bc5b0a9d531 100644
> > --- a/tests/i915/gem_exec_params.c
> > +++ b/tests/i915/gem_exec_params.c
> > @@ -52,30 +52,6 @@
> >  #define LOCAL_I915_EXEC_BATCH_FIRST (1 << 18)
> >  #define LOCAL_I915_EXEC_FENCE_ARRAY (1 << 19)
> >  
> > -static bool has_ring(int fd, unsigned ring_exec_flags)
> > -{
> > -       switch (ring_exec_flags & I915_EXEC_RING_MASK) {
> > -       case 0:
> > -       case I915_EXEC_RENDER:
> > -               return true;
> > -
> > -       case I915_EXEC_BSD:
> > -               if (ring_exec_flags & LOCAL_I915_EXEC_BSD_MASK)
> > -                       return gem_has_bsd2(fd);
> > -               else
> > -                       return gem_has_bsd(fd);
> > -
> > -       case I915_EXEC_BLT:
> > -               return gem_has_blt(fd);
> > -
> > -       case I915_EXEC_VEBOX:
> > -               return gem_has_vebox(fd);
> > -       }
> > -
> > -       igt_assert_f(0, "invalid exec flag 0x%x\n", ring_exec_flags);
> > -       return false;
> > -}
> > -
> >  static bool has_exec_batch_first(int fd)
> >  {
> >         int val = -1;
> > @@ -201,7 +177,7 @@ int fd;
> >  
> >  igt_main
> >  {
> > -       const struct intel_execution_engine *e;
> > +       const struct intel_execution_engine2 *e;
> >  
> >         igt_fixture {
> >                 fd = drm_open_driver(DRIVER_INTEL);
> > @@ -235,11 +211,9 @@ igt_main
> >         }
> >  
> >         igt_subtest("control") {
> > -               for (e = intel_execution_engines; e->name; e++) {
> > -                       if (has_ring(fd, e->exec_id | e->flags)) {
> > -                               execbuf.flags = e->exec_id | e->flags;
> > -                               gem_execbuf(fd, &execbuf);
> > -                       }
> > +               __for_each_physical_engine(fd, e) {
> > +                       execbuf.flags = e->flags;
> > +                       gem_execbuf(fd, &execbuf);
> 
> This is silly. Previously it was cross-checking the GETPARAM against the
> EXECBUFFER uABI. Now it is asking the same question twice.
> 
> This is the example that should not be using physical engines as it
> exercising ABI. Please be careful.

Still I am not able to understand this comment. If you dont mind could
you please elaborate?

As per my understanding, we iterate on physical engines and execute the
execbuf on those engines.

-Ram.
> -Chris
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Re: [igt-dev] [PATCH i-g-t v2 2/5] test/i915: gem_exec_async: use the gem_engine_topology library

[Ramalingam C]

On 2019-05-30 at 16:44:45 +0100, Chris Wilson wrote:
> Quoting Ramalingam C (2019-05-30 16:42:19)
> > @@ -80,15 +80,15 @@ static void store_dword(int fd, unsigned ring,
> >         gem_close(fd, obj[1].handle);
> >  }
> >  
> > -static void one(int fd, unsigned ring, uint32_t flags)
> > +static void one(int fd, const struct intel_execution_engine2 *e)
> >  {
> >         const int gen = intel_gen(intel_get_drm_devid(fd));
> >         struct drm_i915_gem_exec_object2 obj[2];
> > +       struct intel_execution_engine2 *engine;
> 
> Keep this as other.
Sure. This will be applicable on other patches too. I will update them
too.

Thanks,
-Ram
> 
> >  #define SCRATCH 0
> >  #define BATCH 1
> >         struct drm_i915_gem_relocation_entry reloc;
> >         struct drm_i915_gem_execbuffer2 execbuf;
> > -       unsigned int other;
> >         uint32_t *batch;
> >         int i;
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[igt-dev] ✓ Fi.CI.BAT: success for Engine discovery for few more tests

[Patchwork]

== Series Details ==

Series: Engine discovery for few more tests
URL   : https://patchwork.freedesktop.org/series/61397/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6170 -> IGTPW_3084
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/61397/revisions/1/mbox/

Known issues
------------

  Here are the changes found in IGTPW_3084 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_fence@basic-wait-default:
    - fi-icl-u3:          [PASS][1] -> [DMESG-WARN][2] ([fdo#107724]) +1 similar issue
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6170/fi-icl-u3/igt@gem_exec_fence@basic-wait-default.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3084/fi-icl-u3/igt@gem_exec_fence@basic-wait-default.html

  * igt@i915_selftest@live_contexts:
    - fi-bdw-gvtdvm:      [PASS][3] -> [DMESG-FAIL][4] ([fdo#110235])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6170/fi-bdw-gvtdvm/igt@i915_selftest@live_contexts.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3084/fi-bdw-gvtdvm/igt@i915_selftest@live_contexts.html
    - fi-skl-gvtdvm:      [PASS][5] -> [DMESG-FAIL][6] ([fdo#110235])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6170/fi-skl-gvtdvm/igt@i915_selftest@live_contexts.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3084/fi-skl-gvtdvm/igt@i915_selftest@live_contexts.html

  
#### Possible fixes ####

  * igt@gem_cpu_reloc@basic:
    - fi-icl-u3:          [DMESG-WARN][7] ([fdo#107724]) -> [PASS][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6170/fi-icl-u3/igt@gem_cpu_reloc@basic.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3084/fi-icl-u3/igt@gem_cpu_reloc@basic.html

  * igt@gem_exec_suspend@basic-s3:
    - fi-blb-e6850:       [INCOMPLETE][9] ([fdo#107718]) -> [PASS][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6170/fi-blb-e6850/igt@gem_exec_suspend@basic-s3.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3084/fi-blb-e6850/igt@gem_exec_suspend@basic-s3.html

  * igt@i915_module_load@reload-with-fault-injection:
    - fi-snb-2600:        [INCOMPLETE][11] ([fdo#105411]) -> [PASS][12]
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6170/fi-snb-2600/igt@i915_module_load@reload-with-fault-injection.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3084/fi-snb-2600/igt@i915_module_load@reload-with-fault-injection.html

  * igt@i915_selftest@live_hangcheck:
    - fi-icl-u2:          [INCOMPLETE][13] ([fdo#107713] / [fdo#108569]) -> [PASS][14]
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6170/fi-icl-u2/igt@i915_selftest@live_hangcheck.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3084/fi-icl-u2/igt@i915_selftest@live_hangcheck.html
    - fi-icl-y:           [INCOMPLETE][15] ([fdo#107713] / [fdo#108569]) -> [PASS][16]
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6170/fi-icl-y/igt@i915_selftest@live_hangcheck.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3084/fi-icl-y/igt@i915_selftest@live_hangcheck.html

  * igt@kms_busy@basic-flip-c:
    - fi-skl-6770hq:      [SKIP][17] ([fdo#109271] / [fdo#109278]) -> [PASS][18] +2 similar issues
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6170/fi-skl-6770hq/igt@kms_busy@basic-flip-c.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3084/fi-skl-6770hq/igt@kms_busy@basic-flip-c.html

  * igt@kms_flip@basic-flip-vs-dpms:
    - fi-skl-6770hq:      [SKIP][19] ([fdo#109271]) -> [PASS][20] +23 similar issues
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6170/fi-skl-6770hq/igt@kms_flip@basic-flip-vs-dpms.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3084/fi-skl-6770hq/igt@kms_flip@basic-flip-vs-dpms.html

  * igt@kms_frontbuffer_tracking@basic:
    - fi-icl-u3:          [FAIL][21] ([fdo#103167]) -> [PASS][22]
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6170/fi-icl-u3/igt@kms_frontbuffer_tracking@basic.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3084/fi-icl-u3/igt@kms_frontbuffer_tracking@basic.html
    - fi-hsw-peppy:       [DMESG-WARN][23] ([fdo#102614]) -> [PASS][24]
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6170/fi-hsw-peppy/igt@kms_frontbuffer_tracking@basic.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3084/fi-hsw-peppy/igt@kms_frontbuffer_tracking@basic.html

  
  [fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#105411]: https://bugs.freedesktop.org/show_bug.cgi?id=105411
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
  [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
  [fdo#110235]: https://bugs.freedesktop.org/show_bug.cgi?id=110235


Participating hosts (48 -> 45)
------------------------------

  Additional (1): fi-hsw-4770r 
  Missing    (4): fi-byt-clapper fi-byt-squawks fi-bsw-cyan fi-bdw-samus 


Build changes
-------------

  * IGT: IGT_5026 -> IGTPW_3084

  CI_DRM_6170: 083b00d3f2e613efaf5cb631b3497f4eba457333 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_3084: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3084/
  IGT_5026: 4108c74c3b15460de25ab989f4e2031594559dfc @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools



== Testlist changes ==

+++ 48 lines
--- 54 lines

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3084/
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[igt-dev] ✗ Fi.CI.IGT: failure for Engine discovery for few more tests

[Patchwork]

== Series Details ==

Series: Engine discovery for few more tests
URL   : https://patchwork.freedesktop.org/series/61397/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_6170_full -> IGTPW_3084_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with IGTPW_3084_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in IGTPW_3084_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/61397/revisions/1/mbox/

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_3084_full:

### IGT changes ###

#### Possible regressions ####

  * igt@gem_bad_reloc@negative-reloc-bltcopy:
    - shard-glk:          [PASS][1] -> [FAIL][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6170/shard-glk7/igt@gem_bad_reloc@negative-reloc-bltcopy.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3084/shard-glk5/igt@gem_bad_reloc@negative-reloc-bltcopy.html
    - shard-iclb:         [PASS][3] -> [FAIL][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6170/shard-iclb7/igt@gem_bad_reloc@negative-reloc-bltcopy.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3084/shard-iclb7/igt@gem_bad_reloc@negative-reloc-bltcopy.html
    - shard-apl:          [PASS][5] -> [FAIL][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6170/shard-apl8/igt@gem_bad_reloc@negative-reloc-bltcopy.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3084/shard-apl2/igt@gem_bad_reloc@negative-reloc-bltcopy.html
    - shard-snb:          [PASS][7] -> [FAIL][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6170/shard-snb4/igt@gem_bad_reloc@negative-reloc-bltcopy.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3084/shard-snb4/igt@gem_bad_reloc@negative-reloc-bltcopy.html
    - shard-kbl:          [PASS][9] -> [FAIL][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6170/shard-kbl2/igt@gem_bad_reloc@negative-reloc-bltcopy.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3084/shard-kbl2/igt@gem_bad_reloc@negative-reloc-bltcopy.html

  
New tests
---------

  New tests have been introduced between CI_DRM_6170_full and IGTPW_3084_full:

### New IGT tests (48) ###

  * igt@gem_bad_reloc@negative-reloc-bcs0:
    - Statuses : 5 pass(s) 1 skip(s)
    - Exec time: [0.0, 0.00] s

  * igt@gem_bad_reloc@negative-reloc-lut-bcs0:
    - Statuses : 5 pass(s) 1 skip(s)
    - Exec time: [0.0, 0.00] s

  * igt@gem_bad_reloc@negative-reloc-lut-rcs0:
    - Statuses : 4 pass(s) 1 skip(s)
    - Exec time: [0.0, 0.00] s

  * igt@gem_bad_reloc@negative-reloc-lut-vcs0:
    - Statuses : 4 pass(s) 1 skip(s)
    - Exec time: [0.0, 0.01] s

  * igt@gem_bad_reloc@negative-reloc-lut-vcs1:
    - Statuses : 1 pass(s)
    - Exec time: [0.0] s

  * igt@gem_bad_reloc@negative-reloc-lut-vcs2:
    - Statuses :
    - Exec time: [None] s

  * igt@gem_bad_reloc@negative-reloc-lut-vecs0:
    - Statuses : 5 pass(s)
    - Exec time: [0.0, 0.00] s

  * igt@gem_bad_reloc@negative-reloc-rcs0:
    - Statuses : 5 pass(s) 1 skip(s)
    - Exec time: [0.0, 0.00] s

  * igt@gem_bad_reloc@negative-reloc-vcs0:
    - Statuses : 5 pass(s) 1 skip(s)
    - Exec time: [0.0, 0.00] s

  * igt@gem_bad_reloc@negative-reloc-vcs1:
    - Statuses : 1 pass(s)
    - Exec time: [0.00] s

  * igt@gem_bad_reloc@negative-reloc-vcs2:
    - Statuses :
    - Exec time: [None] s

  * igt@gem_bad_reloc@negative-reloc-vecs0:
    - Statuses : 5 pass(s)
    - Exec time: [0.0, 0.00] s

  * igt@gem_exec_async@concurrent-writes-bcs0:
    - Statuses : 6 pass(s)
    - Exec time: [0.00] s

  * igt@gem_exec_async@concurrent-writes-rcs0:
    - Statuses : 6 pass(s)
    - Exec time: [0.00, 0.01] s

  * igt@gem_exec_async@concurrent-writes-vcs0:
    - Statuses : 5 pass(s) 1 skip(s)
    - Exec time: [0.0, 0.00] s

  * igt@gem_exec_async@concurrent-writes-vcs1:
    - Statuses : 1 pass(s)
    - Exec time: [0.00] s

  * igt@gem_exec_async@concurrent-writes-vcs2:
    - Statuses : 1 pass(s)
    - Exec time: [0.00] s

  * igt@gem_exec_async@concurrent-writes-vecs0:
    - Statuses : 4 pass(s)
    - Exec time: [0.00] s

  * igt@gem_exec_capture@capture-bcs0:
    - Statuses : 6 pass(s)
    - Exec time: [0.01] s

  * igt@gem_exec_capture@capture-rcs0:
    - Statuses : 6 pass(s)
    - Exec time: [0.01] s

  * igt@gem_exec_capture@capture-vcs0:
    - Statuses : 5 pass(s) 1 skip(s)
    - Exec time: [0.0, 0.02] s

  * igt@gem_exec_capture@capture-vcs1:
    - Statuses : 1 pass(s)
    - Exec time: [0.01] s

  * igt@gem_exec_capture@capture-vcs2:
    - Statuses :
    - Exec time: [None] s

  * igt@gem_exec_capture@capture-vecs0:
    - Statuses : 5 pass(s)
    - Exec time: [0.01] s

  * igt@prime_vgem@basic-busy-rcs0:
    - Statuses : 6 pass(s)
    - Exec time: [0.01, 0.02] s

  * igt@prime_vgem@basic-fence-wait-rcs0:
    - Statuses : 6 pass(s)
    - Exec time: [1.01, 1.02] s

  * igt@prime_vgem@basic-sync-rcs0:
    - Statuses : 4 pass(s)
    - Exec time: [0.01, 0.02] s

  * igt@prime_vgem@basic-wait-rcs0:
    - Statuses : 6 pass(s)
    - Exec time: [0.01] s

  * igt@prime_vgem@busy-bcs0:
    - Statuses : 6 pass(s)
    - Exec time: [0.01, 0.02] s

  * igt@prime_vgem@busy-vcs0:
    - Statuses : 5 pass(s) 1 skip(s)
    - Exec time: [0.0, 0.02] s

  * igt@prime_vgem@busy-vcs1:
    - Statuses : 1 pass(s)
    - Exec time: [0.01] s

  * igt@prime_vgem@busy-vcs2:
    - Statuses :
    - Exec time: [None] s

  * igt@prime_vgem@busy-vecs0:
    - Statuses : 5 pass(s)
    - Exec time: [0.01, 0.02] s

  * igt@prime_vgem@fence-wait-bcs0:
    - Statuses : 6 pass(s)
    - Exec time: [1.01, 1.02] s

  * igt@prime_vgem@fence-wait-vcs0:
    - Statuses : 4 pass(s) 1 skip(s)
    - Exec time: [0.0, 1.02] s

  * igt@prime_vgem@fence-wait-vcs1:
    - Statuses : 1 pass(s)
    - Exec time: [1.01] s

  * igt@prime_vgem@fence-wait-vcs2:
    - Statuses :
    - Exec time: [None] s

  * igt@prime_vgem@fence-wait-vecs0:
    - Statuses : 5 pass(s)
    - Exec time: [1.01, 1.02] s

  * igt@prime_vgem@sync-bcs0:
    - Statuses : 6 pass(s)
    - Exec time: [0.01] s

  * igt@prime_vgem@sync-vcs0:
    - Statuses : 4 pass(s) 1 skip(s)
    - Exec time: [0.0, 0.01] s

  * igt@prime_vgem@sync-vcs1:
    - Statuses : 1 pass(s)
    - Exec time: [0.02] s

  * igt@prime_vgem@sync-vcs2:
    - Statuses : 1 pass(s)
    - Exec time: [0.02] s

  * igt@prime_vgem@sync-vecs0:
    - Statuses : 5 pass(s)
    - Exec time: [0.01, 0.02] s

  * igt@prime_vgem@wait-bcs0:
    - Statuses : 6 pass(s)
    - Exec time: [0.01] s

  * igt@prime_vgem@wait-vcs0:
    - Statuses : 5 pass(s) 1 skip(s)
    - Exec time: [0.0, 0.02] s

  * igt@prime_vgem@wait-vcs1:
    - Statuses : 1 pass(s)
    - Exec time: [0.02] s

  * igt@prime_vgem@wait-vcs2:
    - Statuses : 1 pass(s)
    - Exec time: [0.02] s

  * igt@prime_vgem@wait-vecs0:
    - Statuses : 5 pass(s)
    - Exec time: [0.01, 0.02] s

  

Known issues
------------

  Here are the changes found in IGTPW_3084_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_ctx_isolation@bcs0-s3:
    - shard-apl:          [PASS][11] -> [DMESG-WARN][12] ([fdo#108566]) +4 similar issues
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6170/shard-apl4/igt@gem_ctx_isolation@bcs0-s3.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3084/shard-apl7/igt@gem_ctx_isolation@bcs0-s3.html

  * igt@gem_exec_reloc@basic-wc-cpu-noreloc:
    - shard-iclb:         [PASS][13] -> [INCOMPLETE][14] ([fdo#107713])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6170/shard-iclb1/igt@gem_exec_reloc@basic-wc-cpu-noreloc.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3084/shard-iclb3/igt@gem_exec_reloc@basic-wc-cpu-noreloc.html

  * igt@kms_cursor_crc@pipe-c-cursor-suspend:
    - shard-kbl:          [PASS][15] -> [DMESG-WARN][16] ([fdo#108566]) +1 similar issue
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6170/shard-kbl1/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3084/shard-kbl6/igt@kms_cursor_crc@pipe-c-cursor-suspend.html

  * igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy:
    - shard-glk:          [PASS][17] -> [FAIL][18] ([fdo#104873])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6170/shard-glk5/igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3084/shard-glk3/igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
    - shard-kbl:          [PASS][19] -> [FAIL][20] ([fdo#102670])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6170/shard-kbl6/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3084/shard-kbl6/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html

  * igt@kms_dp_dsc@basic-dsc-enable-edp:
    - shard-iclb:         [PASS][21] -> [SKIP][22] ([fdo#109349])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6170/shard-iclb2/igt@kms_dp_dsc@basic-dsc-enable-edp.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3084/shard-iclb3/igt@kms_dp_dsc@basic-dsc-enable-edp.html

  * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
    - shard-hsw:          [PASS][23] -> [SKIP][24] ([fdo#109271]) +4 similar issues
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6170/shard-hsw5/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3084/shard-hsw1/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-pwrite:
    - shard-iclb:         [PASS][25] -> [FAIL][26] ([fdo#103167]) +3 similar issues
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6170/shard-iclb1/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-pwrite.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3084/shard-iclb4/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-pwrite.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-rte:
    - shard-iclb:         [PASS][27] -> [FAIL][28] ([fdo#103167] / [fdo#110378])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6170/shard-iclb5/igt@kms_frontbuffer_tracking@fbcpsr-1p-rte.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3084/shard-iclb2/igt@kms_frontbuffer_tracking@fbcpsr-1p-rte.html

  * igt@kms_sequence@get-busy:
    - shard-hsw:          [PASS][29] -> [DMESG-WARN][30] ([fdo#102614])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6170/shard-hsw1/igt@kms_sequence@get-busy.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3084/shard-hsw5/igt@kms_sequence@get-busy.html

  
#### Possible fixes ####

  * igt@gem_tiled_swapping@non-threaded:
    - shard-iclb:         [FAIL][31] ([fdo#108686]) -> [PASS][32]
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6170/shard-iclb6/igt@gem_tiled_swapping@non-threaded.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3084/shard-iclb3/igt@gem_tiled_swapping@non-threaded.html

  * igt@i915_pm_rc6_residency@rc6-accuracy:
    - shard-kbl:          [SKIP][33] ([fdo#109271]) -> [PASS][34]
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6170/shard-kbl7/igt@i915_pm_rc6_residency@rc6-accuracy.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3084/shard-kbl4/igt@i915_pm_rc6_residency@rc6-accuracy.html

  * igt@i915_pm_rpm@gem-execbuf-stress:
    - shard-iclb:         [INCOMPLETE][35] ([fdo#107713] / [fdo#108840]) -> [PASS][36]
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6170/shard-iclb6/igt@i915_pm_rpm@gem-execbuf-stress.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3084/shard-iclb8/igt@i915_pm_rpm@gem-execbuf-stress.html

  * igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset:
    - shard-hsw:          [SKIP][37] ([fdo#109271]) -> [PASS][38] +22 similar issues
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6170/shard-hsw1/igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3084/shard-hsw4/igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset.html

  * igt@kms_flip@flip-vs-panning-interruptible:
    - shard-glk:          [INCOMPLETE][39] ([fdo#103359] / [k.org#198133]) -> [PASS][40]
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6170/shard-glk7/igt@kms_flip@flip-vs-panning-interruptible.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3084/shard-glk9/igt@kms_flip@flip-vs-panning-interruptible.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt:
    - shard-iclb:         [FAIL][41] ([fdo#103167]) -> [PASS][42] +6 similar issues
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6170/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3084/shard-iclb8/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt.html

  * igt@kms_psr2_su@page_flip:
    - shard-iclb:         [SKIP][43] ([fdo#109642]) -> [PASS][44]
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6170/shard-iclb5/igt@kms_psr2_su@page_flip.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3084/shard-iclb2/igt@kms_psr2_su@page_flip.html

  * igt@kms_psr@psr2_cursor_mmap_cpu:
    - shard-iclb:         [SKIP][45] ([fdo#109441]) -> [PASS][46] +2 similar issues
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6170/shard-iclb3/igt@kms_psr@psr2_cursor_mmap_cpu.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3084/shard-iclb2/igt@kms_psr@psr2_cursor_mmap_cpu.html

  * igt@kms_vblank@pipe-c-ts-continuation-suspend:
    - shard-apl:          [DMESG-WARN][47] ([fdo#108566]) -> [PASS][48] +5 similar issues
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6170/shard-apl3/igt@kms_vblank@pipe-c-ts-continuation-suspend.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3084/shard-apl4/igt@kms_vblank@pipe-c-ts-continuation-suspend.html

  * igt@perf@short-reads:
    - shard-kbl:          [FAIL][49] ([fdo#103183]) -> [PASS][50]
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6170/shard-kbl7/igt@perf@short-reads.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3084/shard-kbl3/igt@perf@short-reads.html

  * igt@perf_pmu@rc6-runtime-pm-long:
    - shard-glk:          [FAIL][51] ([fdo#105010]) -> [PASS][52]
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6170/shard-glk3/igt@perf_pmu@rc6-runtime-pm-long.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3084/shard-glk5/igt@perf_pmu@rc6-runtime-pm-long.html

  
#### Warnings ####

  * igt@gem_mmap_gtt@forked-big-copy-odd:
    - shard-iclb:         [TIMEOUT][53] ([fdo#109673]) -> [INCOMPLETE][54] ([fdo#107713] / [fdo#109100])
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6170/shard-iclb5/igt@gem_mmap_gtt@forked-big-copy-odd.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3084/shard-iclb4/igt@gem_mmap_gtt@forked-big-copy-odd.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-move:
    - shard-iclb:         [INCOMPLETE][55] ([fdo#107713]) -> [SKIP][56] ([fdo#109280])
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6170/shard-iclb7/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-move.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3084/shard-iclb2/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-move.html

  
  [fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614
  [fdo#102670]: https://bugs.freedesktop.org/show_bug.cgi?id=102670
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103183]: https://bugs.freedesktop.org/show_bug.cgi?id=103183
  [fdo#103359]: https://bugs.freedesktop.org/show_bug.cgi?id=103359
  [fdo#104873]: https://bugs.freedesktop.org/show_bug.cgi?id=104873
  [fdo#105010]: https://bugs.freedesktop.org/show_bug.cgi?id=105010
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
  [fdo#108686]: https://bugs.freedesktop.org/show_bug.cgi?id=108686
  [fdo#108840]: https://bugs.freedesktop.org/show_bug.cgi?id=108840
  [fdo#109100]: https://bugs.freedesktop.org/show_bug.cgi?id=109100
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
  [fdo#109349]: https://bugs.freedesktop.org/show_bug.cgi?id=109349
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
  [fdo#109673]: https://bugs.freedesktop.org/show_bug.cgi?id=109673
  [fdo#110378]: https://bugs.freedesktop.org/show_bug.cgi?id=110378
  [k.org#198133]: https://bugzilla.kernel.org/show_bug.cgi?id=198133


Participating hosts (10 -> 6)
------------------------------

  Missing    (4): pig-skl-6260u shard-skl pig-hsw-4770r pig-glk-j5005 


Build changes
-------------

  * IGT: IGT_5026 -> IGTPW_3084
  * Piglit: piglit_4509 -> None

  CI_DRM_6170: 083b00d3f2e613efaf5cb631b3497f4eba457333 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_3084: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3084/
  IGT_5026: 4108c74c3b15460de25ab989f4e2031594559dfc @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3084/
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Re: [igt-dev] [PATCH i-g-t v2 1/5] test/i915: gem_bad_reloc: use the gem_engine_topology library

[Andi Shyti]

Hi Ram,

sorry for taking so long to reply, here I am now :)

On Thu, May 30, 2019 at 09:12:18PM +0530, Ramalingam C wrote:
> Replace the legacy for_each_engine* defines with the ones
> implemented in the gem_engine_topology library.

Here we still have the problem of "negative-reloc-bltcopy"
failing, which we have been discussing with Tvrtko already.

We are missing a function that iterates through mapped engines
and returns class and instance.

Let me come out with a proposal.

Andi

PS Tvrtko has been suggesting it from quite many times.
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Re: [igt-dev] [PATCH i-g-t v2 2/5] test/i915: gem_exec_async: use the gem_engine_topology library

[Andi Shyti]

Hi Ram,

On Thu, May 30, 2019 at 09:12:19PM +0530, Ramalingam C wrote:
> Replace the legacy for_each_engine* defines with the ones
> implemented in the gem_engine_topology library.
> 
> v2:
>   class and instance are compared for engine identification [Andi]
> 
> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>

this looks good to me,

Reviewed-by: Andi Shyti <andi.shyti@intel.com>

Thanks,
Andi

> ---
>  tests/i915/gem_exec_async.c | 34 +++++++++++++++-------------------
>  1 file changed, 15 insertions(+), 19 deletions(-)
> 
> diff --git a/tests/i915/gem_exec_async.c b/tests/i915/gem_exec_async.c
> index 9a06af7e29cb..0da97f1f0506 100644
> --- a/tests/i915/gem_exec_async.c
> +++ b/tests/i915/gem_exec_async.c
> @@ -28,7 +28,7 @@
>  
>  IGT_TEST_DESCRIPTION("Check that we can issue concurrent writes across the engines.");
>  
> -static void store_dword(int fd, unsigned ring,
> +static void store_dword(int fd, const struct intel_execution_engine2 *e,
>  			uint32_t target, uint32_t offset, uint32_t value)
>  {
>  	const int gen = intel_gen(intel_get_drm_devid(fd));
> @@ -41,7 +41,7 @@ static void store_dword(int fd, unsigned ring,
>  	memset(&execbuf, 0, sizeof(execbuf));
>  	execbuf.buffers_ptr = to_user_pointer(obj);
>  	execbuf.buffer_count = 2;
> -	execbuf.flags = ring;
> +	execbuf.flags = e->flags;
>  	if (gen < 6)
>  		execbuf.flags |= I915_EXEC_SECURE;
>  
> @@ -80,15 +80,15 @@ static void store_dword(int fd, unsigned ring,
>  	gem_close(fd, obj[1].handle);
>  }
>  
> -static void one(int fd, unsigned ring, uint32_t flags)
> +static void one(int fd, const struct intel_execution_engine2 *e)
>  {
>  	const int gen = intel_gen(intel_get_drm_devid(fd));
>  	struct drm_i915_gem_exec_object2 obj[2];
> +	struct intel_execution_engine2 *engine;
>  #define SCRATCH 0
>  #define BATCH 1
>  	struct drm_i915_gem_relocation_entry reloc;
>  	struct drm_i915_gem_execbuffer2 execbuf;
> -	unsigned int other;
>  	uint32_t *batch;
>  	int i;
>  
> @@ -138,19 +138,21 @@ static void one(int fd, unsigned ring, uint32_t flags)
>  	memset(&execbuf, 0, sizeof(execbuf));
>  	execbuf.buffers_ptr = to_user_pointer(obj);
>  	execbuf.buffer_count = 2;
> -	execbuf.flags = ring | flags;
> +	execbuf.flags = e->flags;
>  	igt_require(__gem_execbuf(fd, &execbuf) == 0);
>  	gem_close(fd, obj[BATCH].handle);
>  
>  	i = 0;
> -	for_each_physical_engine(fd, other) {
> -		if (other == ring)
> +
> +	__for_each_physical_engine(fd, engine) {
> +		if (engine->class == e->class &&
> +		    engine->instance == e->instance)
>  			continue;
>  
> -		if (!gem_can_store_dword(fd, other))
> +		if (!gem_class_can_store_dword(fd, engine->class))
>  			continue;
>  
> -		store_dword(fd, other, obj[SCRATCH].handle, 4*i, i);
> +		store_dword(fd, engine, obj[SCRATCH].handle, 4*i, i);
>  		i++;
>  	}
>  
> @@ -185,7 +187,7 @@ static bool has_async_execbuf(int fd)
>  
>  igt_main
>  {
> -	const struct intel_execution_engine *e;
> +	const struct intel_execution_engine2 *e;
>  	int fd = -1;
>  
>  	igt_skip_on_simulation();
> @@ -199,17 +201,11 @@ igt_main
>  		igt_fork_hang_detector(fd);
>  	}
>  
> -	for (e = intel_execution_engines; e->name; e++) {
> -		/* default exec-id is purely symbolic */
> -		if (e->exec_id == 0)
> -			continue;
> -
> +	__for_each_physical_engine(fd, e)
>  		igt_subtest_f("concurrent-writes-%s", e->name) {
> -			igt_require(gem_ring_has_physical_engine(fd, e->exec_id | e->flags));
> -			igt_require(gem_can_store_dword(fd, e->exec_id | e->flags));
> -			one(fd, e->exec_id, e->flags);
> +			igt_require(gem_class_can_store_dword(fd, e->class));
> +			one(fd, e);
>  		}
> -	}
>  
>  	igt_fixture {
>  		igt_stop_hang_detector();
> -- 
> 2.19.1
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Re: [igt-dev] [PATCH i-g-t v2 3/5] test/i915: gem_exec_capture: use the gem_engine_topology library

[Andi Shyti]

Hi Ram,

On Thu, May 30, 2019 at 09:12:20PM +0530, Ramalingam C wrote:
> Replace the legacy for_each_engine* defines with the ones implemented
> in the gem_engine_topology library.
> 
> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>

looks good, as well,

Reviewed-by: Andi Shyti <andi.shyti@intel.com>

Thanks,
Andi
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Re: [igt-dev] [PATCH i-g-t v2 4/5] test/i915: gem_exec_params: use the gem_engine_topology library

[Andi Shyti]

Hi Ram,

On Thu, May 30, 2019 at 09:12:21PM +0530, Ramalingam C wrote:
> Replace the legacy for_each_engine* defines with the ones implemented
> in the gem_engine_topology library.
> 
> v2:
>   has_ring() check is removed [tvertko]
                                 ^^^^^^

it's Tvrtko :)

>   Engine type is identified through CLASS [tvrtko]
> 
> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>

here I have these tests failing, as well:

  Subtest invalid-bsd1-flag-on-render: FAIL (0.003s)
  Subtest invalid-bsd2-flag-on-render: FAIL (0.003s)
  Subtest invalid-bsd1-flag-on-blt: FAIL (0.078s)
  Subtest invalid-bsd2-flag-on-blt: FAIL (0.002s)

Andi
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Re: [igt-dev] [PATCH i-g-t v2 5/5] test/prime_vgem: use the gem_engine_topology library

[Andi Shyti]

Hi Ram,

just a nitpick

> -	execbuf.flags = ring | flags;
> +	execbuf.flags = e ? e->flags : I915_EXEC_DEFAULT;

Because we are moving to the new engine naming, the
"I915_EXEC_DEFAULT" engine, conceptually, should not be used.

Politically, with Tvrtko, we agreed that he default engine now
is "I915_ENGINE_CLASS_RENDER", it's not the best as solution, but
works.

The rest looks good.

Reviewed-by: Andi Shyti <andi.shyti@intel.com>

Thanks,
Andi
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Re: [igt-dev] [PATCH i-g-t v2 5/5] test/prime_vgem: use the gem_engine_topology library

[Tvrtko Ursulin]

On 06/06/2019 15:17, Andi Shyti wrote:
> Hi Ram,
> 
> just a nitpick
> 
>> -	execbuf.flags = ring | flags;
>> +	execbuf.flags = e ? e->flags : I915_EXEC_DEFAULT;
> 
> Because we are moving to the new engine naming, the
> "I915_EXEC_DEFAULT" engine, conceptually, should not be used.
> 
> Politically, with Tvrtko, we agreed that he default engine now
> is "I915_ENGINE_CLASS_RENDER", it's not the best as solution, but
> works.

I totally don't remember I ever suggested to use class or even it was 
discussed.  :) Didn't we say to just use zero?

Regards,

Tvrtko

> The rest looks good.
> 
> Reviewed-by: Andi Shyti <andi.shyti@intel.com>
> 
> Thanks,
> Andi
> 
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Re: [igt-dev] [PATCH i-g-t v2 5/5] test/prime_vgem: use the gem_engine_topology library

[Ramalingam C]

On 2019-06-06 at 15:38:36 +0100, Tvrtko Ursulin wrote:
> 
> On 06/06/2019 15:17, Andi Shyti wrote:
> > Hi Ram,
> > 
> > just a nitpick
> > 
> > > -	execbuf.flags = ring | flags;
> > > +	execbuf.flags = e ? e->flags : I915_EXEC_DEFAULT;
> > 
> > Because we are moving to the new engine naming, the
> > "I915_EXEC_DEFAULT" engine, conceptually, should not be used.
> > 
> > Politically, with Tvrtko, we agreed that he default engine now
> > is "I915_ENGINE_CLASS_RENDER", it's not the best as solution, but
> > works.
> 
> I totally don't remember I ever suggested to use class or even it was
> discussed.  :) Didn't we say to just use zero?
Can't use I915_EXEC_RENDER instead of DEFAULT!? because that will be
exec_flag for render class right?

-Ram
> 
> Regards,
> 
> Tvrtko
> 
> > The rest looks good.
> > 
> > Reviewed-by: Andi Shyti <andi.shyti@intel.com>
> > 
> > Thanks,
> > Andi
> > 
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Re: [igt-dev] [PATCH i-g-t v2 5/5] test/prime_vgem: use the gem_engine_topology library

[Tvrtko Ursulin]

On 06/06/2019 16:31, Ramalingam C wrote:
> On 2019-06-06 at 15:38:36 +0100, Tvrtko Ursulin wrote:
>>
>> On 06/06/2019 15:17, Andi Shyti wrote:
>>> Hi Ram,
>>>
>>> just a nitpick
>>>
>>>> -	execbuf.flags = ring | flags;
>>>> +	execbuf.flags = e ? e->flags : I915_EXEC_DEFAULT;
>>>
>>> Because we are moving to the new engine naming, the
>>> "I915_EXEC_DEFAULT" engine, conceptually, should not be used.
>>>
>>> Politically, with Tvrtko, we agreed that he default engine now
>>> is "I915_ENGINE_CLASS_RENDER", it's not the best as solution, but
>>> works.
>>
>> I totally don't remember I ever suggested to use class or even it was
>> discussed.  :) Didn't we say to just use zero?
> Can't use I915_EXEC_RENDER instead of DEFAULT!? because that will be
> exec_flag for render class right?

No, I915_EXEC_RENDER is 1 so if the context has engine map configured 
that will map to 2nd engine in the map - which is not rcs0.

We are relying here on rcs0 being first (index 0). But that is also not 
reliable. We need a lookup helper to be more robust going forward.

Regards,

Tvrtko


> -Ram
>>
>> Regards,
>>
>> Tvrtko
>>
>>> The rest looks good.
>>>
>>> Reviewed-by: Andi Shyti <andi.shyti@intel.com>
>>>
>>> Thanks,
>>> Andi
>>>
> 
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Re: [igt-dev] [PATCH i-g-t v2 5/5] test/prime_vgem: use the gem_engine_topology library

[Ramalingam C]

On 2019-06-06 at 16:34:03 +0100, Tvrtko Ursulin wrote:
> 
> On 06/06/2019 16:31, Ramalingam C wrote:
> > On 2019-06-06 at 15:38:36 +0100, Tvrtko Ursulin wrote:
> > > 
> > > On 06/06/2019 15:17, Andi Shyti wrote:
> > > > Hi Ram,
> > > > 
> > > > just a nitpick
> > > > 
> > > > > -	execbuf.flags = ring | flags;
> > > > > +	execbuf.flags = e ? e->flags : I915_EXEC_DEFAULT;
> > > > 
> > > > Because we are moving to the new engine naming, the
> > > > "I915_EXEC_DEFAULT" engine, conceptually, should not be used.
> > > > 
> > > > Politically, with Tvrtko, we agreed that he default engine now
> > > > is "I915_ENGINE_CLASS_RENDER", it's not the best as solution, but
> > > > works.
> > > 
> > > I totally don't remember I ever suggested to use class or even it was
> > > discussed.  :) Didn't we say to just use zero?
> > Can't use I915_EXEC_RENDER instead of DEFAULT!? because that will be
> > exec_flag for render class right?
> 
> No, I915_EXEC_RENDER is 1 so if the context has engine map configured that
> will map to 2nd engine in the map - which is not rcs0.
> 
> We are relying here on rcs0 being first (index 0). But that is also not
> reliable. We need a lookup helper to be more robust going forward.
something like below?

get_engine_exec_flag_for_class(fd, e, class) __for_each_physical_engine(fd, e) \
                                                if (e->class == class) { \
                                                        e->flags;
                                                        break; \
                                                } \
                                                0;

-Ram
> 
> Regards,
> 
> Tvrtko
> 
> 
> > -Ram
> > > 
> > > Regards,
> > > 
> > > Tvrtko
> > > 
> > > > The rest looks good.
> > > > 
> > > > Reviewed-by: Andi Shyti <andi.shyti@intel.com>
> > > > 
> > > > Thanks,
> > > > Andi
> > > > 
> > 
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Re: [igt-dev] [PATCH i-g-t v2 5/5] test/prime_vgem: use the gem_engine_topology library

[Tvrtko Ursulin]

On 06/06/2019 16:48, Ramalingam C wrote:
> On 2019-06-06 at 16:34:03 +0100, Tvrtko Ursulin wrote:
>>
>> On 06/06/2019 16:31, Ramalingam C wrote:
>>> On 2019-06-06 at 15:38:36 +0100, Tvrtko Ursulin wrote:
>>>>
>>>> On 06/06/2019 15:17, Andi Shyti wrote:
>>>>> Hi Ram,
>>>>>
>>>>> just a nitpick
>>>>>
>>>>>> -	execbuf.flags = ring | flags;
>>>>>> +	execbuf.flags = e ? e->flags : I915_EXEC_DEFAULT;
>>>>>
>>>>> Because we are moving to the new engine naming, the
>>>>> "I915_EXEC_DEFAULT" engine, conceptually, should not be used.
>>>>>
>>>>> Politically, with Tvrtko, we agreed that he default engine now
>>>>> is "I915_ENGINE_CLASS_RENDER", it's not the best as solution, but
>>>>> works.
>>>>
>>>> I totally don't remember I ever suggested to use class or even it was
>>>> discussed.  :) Didn't we say to just use zero?
>>> Can't use I915_EXEC_RENDER instead of DEFAULT!? because that will be
>>> exec_flag for render class right?
>>
>> No, I915_EXEC_RENDER is 1 so if the context has engine map configured that
>> will map to 2nd engine in the map - which is not rcs0.
>>
>> We are relying here on rcs0 being first (index 0). But that is also not
>> reliable. We need a lookup helper to be more robust going forward.
> something like below?
> 
> get_engine_exec_flag_for_class(fd, e, class) __for_each_physical_engine(fd, e) \
>                                                  if (e->class == class) { \
>                                                          e->flags;
>                                                          break; \
>                                                  } \
>                                                  0;

I think it needs a context and struct i915_engine_class_instance as 
input and returns flags, yes.

(fd, ctx, ci) -> flags

Regards,

Tvrtko


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Re: [igt-dev] [PATCH i-g-t v2 5/5] test/prime_vgem: use the gem_engine_topology library

[Andi Shyti]

On Thu, Jun 06, 2019 at 03:38:36PM +0100, Tvrtko Ursulin wrote:
> 
> On 06/06/2019 15:17, Andi Shyti wrote:
> > Hi Ram,
> > 
> > just a nitpick
> > 
> > > -	execbuf.flags = ring | flags;
> > > +	execbuf.flags = e ? e->flags : I915_EXEC_DEFAULT;
> > 
> > Because we are moving to the new engine naming, the
> > "I915_EXEC_DEFAULT" engine, conceptually, should not be used.
> > 
> > Politically, with Tvrtko, we agreed that he default engine now
> > is "I915_ENGINE_CLASS_RENDER", it's not the best as solution, but
> > works.
> 
> I totally don't remember I ever suggested to use class or even it was
> discussed.  :) Didn't we say to just use zero?

in one of the 25 reviews we agreed o that, but yes, '0' looks
better.
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Re: [igt-dev] [PATCH i-g-t v2 5/5] test/prime_vgem: use the gem_engine_topology library

[Andi Shyti]

Hi Ram,

> > > > > just a nitpick
> > > > > 
> > > > > > -	execbuf.flags = ring | flags;
> > > > > > +	execbuf.flags = e ? e->flags : I915_EXEC_DEFAULT;
> > > > > 
> > > > > Because we are moving to the new engine naming, the
> > > > > "I915_EXEC_DEFAULT" engine, conceptually, should not be used.
> > > > > 
> > > > > Politically, with Tvrtko, we agreed that he default engine now
> > > > > is "I915_ENGINE_CLASS_RENDER", it's not the best as solution, but
> > > > > works.
> > > > 
> > > > I totally don't remember I ever suggested to use class or even it was
> > > > discussed.  :) Didn't we say to just use zero?
> > > Can't use I915_EXEC_RENDER instead of DEFAULT!? because that will be
> > > exec_flag for render class right?
> > 
> > No, I915_EXEC_RENDER is 1 so if the context has engine map configured that
> > will map to 2nd engine in the map - which is not rcs0.
> > 
> > We are relying here on rcs0 being first (index 0). But that is also not
> > reliable. We need a lookup helper to be more robust going forward.
> something like below?
> 
> get_engine_exec_flag_for_class(fd, e, class) __for_each_physical_engine(fd, e) \
>                                                 if (e->class == class) { \
>                                                         e->flags;
>                                                         break; \
>                                                 } \
>                                                 0;

I guess we would need to query the gpu, fetch the engine list and
search the needed engine, somthing similar to
gem_context_lookup_engine() in gem_engine_topology.c

if you want you can give it a shot, otherwise I can do it over
the weekend and send it on Monday.

Andi
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