* [PATCH 1/2] drm/i915/guc: Move intel_guc_reserved_gtt_size to intel_wopcm_guc_size
@ 2019-06-11 11:00 Tvrtko Ursulin
2019-06-11 11:00 ` [PATCH 2/2] drm/i915: Make GuC GGTT reservation work on ggtt Tvrtko Ursulin
` (6 more replies)
0 siblings, 7 replies; 11+ messages in thread
From: Tvrtko Ursulin @ 2019-06-11 11:00 UTC (permalink / raw)
To: Intel-gfx
From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reduces pointer chasing and gets more to the point.
v2:
* Tidy whitespace.
* Tidy comment. (Michal)
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Suggested-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 2 +-
drivers/gpu/drm/i915/intel_guc.c | 17 -----------------
drivers/gpu/drm/i915/intel_guc.h | 1 -
drivers/gpu/drm/i915/intel_wopcm.h | 15 +++++++++++++++
4 files changed, 16 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 2e15850bd987..5b5125ee49f3 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2830,7 +2830,7 @@ int i915_gem_init_ggtt(struct drm_i915_private *dev_priv)
* why.
*/
ggtt->pin_bias = max_t(u32, I915_GTT_PAGE_SIZE,
- intel_guc_reserved_gtt_size(&dev_priv->guc));
+ intel_wopcm_guc_size(&dev_priv->wopcm));
ret = intel_vgt_balloon(dev_priv);
if (ret)
diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c
index 43232242d167..d45d97624402 100644
--- a/drivers/gpu/drm/i915/intel_guc.c
+++ b/drivers/gpu/drm/i915/intel_guc.c
@@ -686,23 +686,6 @@ struct i915_vma *intel_guc_allocate_vma(struct intel_guc *guc, u32 size)
return vma;
}
-/**
- * intel_guc_reserved_gtt_size()
- * @guc: intel_guc structure
- *
- * The GuC WOPCM mapping shadows the lower part of the GGTT, so if we are using
- * GuC we can't have any objects pinned in that region. This function returns
- * the size of the shadowed region.
- *
- * Returns:
- * 0 if GuC is not present or not in use.
- * Otherwise, the GuC WOPCM size.
- */
-u32 intel_guc_reserved_gtt_size(struct intel_guc *guc)
-{
- return guc_to_i915(guc)->wopcm.guc.size;
-}
-
int intel_guc_reserve_ggtt_top(struct intel_guc *guc)
{
struct drm_i915_private *i915 = guc_to_i915(guc);
diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h
index e07e4c69cf08..85c3b02a0c08 100644
--- a/drivers/gpu/drm/i915/intel_guc.h
+++ b/drivers/gpu/drm/i915/intel_guc.h
@@ -172,7 +172,6 @@ int intel_guc_auth_huc(struct intel_guc *guc, u32 rsa_offset);
int intel_guc_suspend(struct intel_guc *guc);
int intel_guc_resume(struct intel_guc *guc);
struct i915_vma *intel_guc_allocate_vma(struct intel_guc *guc, u32 size);
-u32 intel_guc_reserved_gtt_size(struct intel_guc *guc);
int intel_guc_reserve_ggtt_top(struct intel_guc *guc);
void intel_guc_release_ggtt_top(struct intel_guc *guc);
diff --git a/drivers/gpu/drm/i915/intel_wopcm.h b/drivers/gpu/drm/i915/intel_wopcm.h
index 6298910a384c..114401971520 100644
--- a/drivers/gpu/drm/i915/intel_wopcm.h
+++ b/drivers/gpu/drm/i915/intel_wopcm.h
@@ -24,6 +24,21 @@ struct intel_wopcm {
} guc;
};
+/**
+ * intel_wopcm_guc_size()
+ * @wopcm: intel_wopcm structure
+ *
+ * Returns size of the WOPCM shadowed region.
+ *
+ * Returns:
+ * 0 if GuC is not present or not in use.
+ * Otherwise, the GuC WOPCM size.
+ */
+static inline u32 intel_wopcm_guc_size(struct intel_wopcm *wopcm)
+{
+ return wopcm->guc.size;
+}
+
void intel_wopcm_init_early(struct intel_wopcm *wopcm);
int intel_wopcm_init(struct intel_wopcm *wopcm);
int intel_wopcm_init_hw(struct intel_wopcm *wopcm);
--
2.20.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 2/2] drm/i915: Make GuC GGTT reservation work on ggtt
2019-06-11 11:00 [PATCH 1/2] drm/i915/guc: Move intel_guc_reserved_gtt_size to intel_wopcm_guc_size Tvrtko Ursulin
@ 2019-06-11 11:00 ` Tvrtko Ursulin
2019-06-11 12:23 ` [PATCH v4 " Tvrtko Ursulin
2019-06-11 11:47 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/guc: Move intel_guc_reserved_gtt_size to intel_wopcm_guc_size Patchwork
` (5 subsequent siblings)
6 siblings, 1 reply; 11+ messages in thread
From: Tvrtko Ursulin @ 2019-06-11 11:00 UTC (permalink / raw)
To: Intel-gfx
From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
These functions operate on ggtt so make them take that directly as
parameter.
At the same time move the USES_GUC conditional down to
intel_guc_reserve_ggtt_top for symmetry with
intel_guc_reserved_gtt_size.
v2:
* Rename and move functions to be static in i915_gem_gtt.c (Michal)
v3:
* Add comment explaining reason for reservation, add assert and fix
error message. (Michal)
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 43 ++++++++++++++++++++++++-----
drivers/gpu/drm/i915/intel_guc.c | 27 ------------------
drivers/gpu/drm/i915/intel_guc.h | 2 --
3 files changed, 36 insertions(+), 36 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 5b5125ee49f3..ca3d79662cc1 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2807,6 +2807,32 @@ static void fini_aliasing_ppgtt(struct drm_i915_private *i915)
ggtt->vm.vma_ops.unbind_vma = ggtt_unbind_vma;
}
+static int ggtt_reserve_guc_top(struct i915_ggtt *ggtt)
+{
+ u64 size;
+ int ret;
+
+ if (!USES_GUC(ggtt->vm.i915))
+ return 0;
+
+ GEM_BUG_ON(GUC_GGTT_TOP > ggtt->vm.total);
+ size = ggtt->vm.total - GUC_GGTT_TOP;
+
+ ret = i915_gem_gtt_reserve(&ggtt->vm, &ggtt->uc_fw, size,
+ GUC_GGTT_TOP, I915_COLOR_UNEVICTABLE,
+ PIN_NOEVICT);
+ if (ret)
+ DRM_DEBUG_DRIVER("Failed to reserve top of GGTT for GuC\n");
+
+ return ret;
+}
+
+static void ggtt_release_guc_top(struct i915_ggtt *ggtt)
+{
+ if (drm_mm_node_allocated(&ggtt->uc_fw))
+ drm_mm_remove_node(&ggtt->uc_fw);
+}
+
int i915_gem_init_ggtt(struct drm_i915_private *dev_priv)
{
/* Let GEM Manage all of the aperture.
@@ -2844,11 +2870,14 @@ int i915_gem_init_ggtt(struct drm_i915_private *dev_priv)
if (ret)
return ret;
- if (USES_GUC(dev_priv)) {
- ret = intel_guc_reserve_ggtt_top(&dev_priv->guc);
- if (ret)
- goto err_reserve;
- }
+ /*
+ * The upper portion of the GuC address space has a sizeable hole
+ * (several MB) that is inaccessible by GuC. Reserve this range within
+ * GGTT as it can comfortably hold GuC/HuC firmware images.
+ */
+ ret = ggtt_reserve_guc_top(ggtt);
+ if (ret)
+ goto err_reserve;
/* Clear any non-preallocated blocks */
drm_mm_for_each_hole(entry, &ggtt->vm.mm, hole_start, hole_end) {
@@ -2870,7 +2899,7 @@ int i915_gem_init_ggtt(struct drm_i915_private *dev_priv)
return 0;
err_appgtt:
- intel_guc_release_ggtt_top(&dev_priv->guc);
+ ggtt_release_guc_top(ggtt);
err_reserve:
drm_mm_remove_node(&ggtt->error_capture);
return ret;
@@ -2897,7 +2926,7 @@ void i915_ggtt_cleanup_hw(struct drm_i915_private *dev_priv)
if (drm_mm_node_allocated(&ggtt->error_capture))
drm_mm_remove_node(&ggtt->error_capture);
- intel_guc_release_ggtt_top(&dev_priv->guc);
+ ggtt_release_guc_top(ggtt);
if (drm_mm_initialized(&ggtt->vm.mm)) {
intel_vgt_deballoon(dev_priv);
diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c
index d45d97624402..c40a6efdd33a 100644
--- a/drivers/gpu/drm/i915/intel_guc.c
+++ b/drivers/gpu/drm/i915/intel_guc.c
@@ -685,30 +685,3 @@ struct i915_vma *intel_guc_allocate_vma(struct intel_guc *guc, u32 size)
i915_gem_object_put(obj);
return vma;
}
-
-int intel_guc_reserve_ggtt_top(struct intel_guc *guc)
-{
- struct drm_i915_private *i915 = guc_to_i915(guc);
- struct i915_ggtt *ggtt = &i915->ggtt;
- u64 size;
- int ret;
-
- size = ggtt->vm.total - GUC_GGTT_TOP;
-
- ret = i915_gem_gtt_reserve(&ggtt->vm, &ggtt->uc_fw, size,
- GUC_GGTT_TOP, I915_COLOR_UNEVICTABLE,
- PIN_NOEVICT);
- if (ret)
- DRM_DEBUG_DRIVER("GuC: failed to reserve top of ggtt\n");
-
- return ret;
-}
-
-void intel_guc_release_ggtt_top(struct intel_guc *guc)
-{
- struct drm_i915_private *i915 = guc_to_i915(guc);
- struct i915_ggtt *ggtt = &i915->ggtt;
-
- if (drm_mm_node_allocated(&ggtt->uc_fw))
- drm_mm_remove_node(&ggtt->uc_fw);
-}
diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h
index 85c3b02a0c08..08c906abdfa2 100644
--- a/drivers/gpu/drm/i915/intel_guc.h
+++ b/drivers/gpu/drm/i915/intel_guc.h
@@ -172,8 +172,6 @@ int intel_guc_auth_huc(struct intel_guc *guc, u32 rsa_offset);
int intel_guc_suspend(struct intel_guc *guc);
int intel_guc_resume(struct intel_guc *guc);
struct i915_vma *intel_guc_allocate_vma(struct intel_guc *guc, u32 size);
-int intel_guc_reserve_ggtt_top(struct intel_guc *guc);
-void intel_guc_release_ggtt_top(struct intel_guc *guc);
static inline bool intel_guc_is_loaded(struct intel_guc *guc)
{
--
2.20.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 11+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/guc: Move intel_guc_reserved_gtt_size to intel_wopcm_guc_size
2019-06-11 11:00 [PATCH 1/2] drm/i915/guc: Move intel_guc_reserved_gtt_size to intel_wopcm_guc_size Tvrtko Ursulin
2019-06-11 11:00 ` [PATCH 2/2] drm/i915: Make GuC GGTT reservation work on ggtt Tvrtko Ursulin
@ 2019-06-11 11:47 ` Patchwork
2019-06-11 11:49 ` ✗ Fi.CI.SPARSE: " Patchwork
` (4 subsequent siblings)
6 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2019-06-11 11:47 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/i915/guc: Move intel_guc_reserved_gtt_size to intel_wopcm_guc_size
URL : https://patchwork.freedesktop.org/series/61887/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
08010f3675e3 drm/i915/guc: Move intel_guc_reserved_gtt_size to intel_wopcm_guc_size
b3763a316000 drm/i915: Make GuC GGTT reservation work on ggtt
-:40: WARNING:CONSTANT_COMPARISON: Comparisons should place the constant on the right side of the test
#40: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:2818:
+ GEM_BUG_ON(GUC_GGTT_TOP > ggtt->vm.total);
total: 0 errors, 1 warnings, 0 checks, 78 lines checked
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 11+ messages in thread
* ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915/guc: Move intel_guc_reserved_gtt_size to intel_wopcm_guc_size
2019-06-11 11:00 [PATCH 1/2] drm/i915/guc: Move intel_guc_reserved_gtt_size to intel_wopcm_guc_size Tvrtko Ursulin
2019-06-11 11:00 ` [PATCH 2/2] drm/i915: Make GuC GGTT reservation work on ggtt Tvrtko Ursulin
2019-06-11 11:47 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/guc: Move intel_guc_reserved_gtt_size to intel_wopcm_guc_size Patchwork
@ 2019-06-11 11:49 ` Patchwork
2019-06-11 12:06 ` ✓ Fi.CI.BAT: success " Patchwork
` (3 subsequent siblings)
6 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2019-06-11 11:49 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/i915/guc: Move intel_guc_reserved_gtt_size to intel_wopcm_guc_size
URL : https://patchwork.freedesktop.org/series/61887/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915/guc: Move intel_guc_reserved_gtt_size to intel_wopcm_guc_size
-O:drivers/gpu/drm/i915/i915_gem_gtt.c:2832:26: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_gem_gtt.c:2832:26: warning: expression using sizeof(void)
Commit: drm/i915: Make GuC GGTT reservation work on ggtt
Okay!
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 11+ messages in thread
* ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/guc: Move intel_guc_reserved_gtt_size to intel_wopcm_guc_size
2019-06-11 11:00 [PATCH 1/2] drm/i915/guc: Move intel_guc_reserved_gtt_size to intel_wopcm_guc_size Tvrtko Ursulin
` (2 preceding siblings ...)
2019-06-11 11:49 ` ✗ Fi.CI.SPARSE: " Patchwork
@ 2019-06-11 12:06 ` Patchwork
2019-06-11 12:39 ` ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915/guc: Move intel_guc_reserved_gtt_size to intel_wopcm_guc_size (rev2) Patchwork
` (2 subsequent siblings)
6 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2019-06-11 12:06 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/i915/guc: Move intel_guc_reserved_gtt_size to intel_wopcm_guc_size
URL : https://patchwork.freedesktop.org/series/61887/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6230 -> Patchwork_13237
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13237/
Known issues
------------
Here are the changes found in Patchwork_13237 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_mmap@basic:
- fi-icl-u3: [PASS][1] -> [DMESG-WARN][2] ([fdo#107724])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-icl-u3/igt@gem_mmap@basic.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13237/fi-icl-u3/igt@gem_mmap@basic.html
* igt@i915_selftest@live_hangcheck:
- fi-icl-u2: [PASS][3] -> [INCOMPLETE][4] ([fdo#107713] / [fdo#108569])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-icl-u2/igt@i915_selftest@live_hangcheck.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13237/fi-icl-u2/igt@i915_selftest@live_hangcheck.html
#### Possible fixes ####
* igt@gem_mmap@basic-small-bo:
- fi-icl-u3: [DMESG-WARN][5] ([fdo#107724]) -> [PASS][6] +2 similar issues
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-icl-u3/igt@gem_mmap@basic-small-bo.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13237/fi-icl-u3/igt@gem_mmap@basic-small-bo.html
* igt@i915_selftest@live_contexts:
- fi-bdw-gvtdvm: [DMESG-FAIL][7] ([fdo#110235]) -> [PASS][8]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-bdw-gvtdvm/igt@i915_selftest@live_contexts.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13237/fi-bdw-gvtdvm/igt@i915_selftest@live_contexts.html
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
[fdo#110235]: https://bugs.freedesktop.org/show_bug.cgi?id=110235
Participating hosts (54 -> 46)
------------------------------
Missing (8): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y fi-byt-clapper fi-bdw-samus
Build changes
-------------
* Linux: CI_DRM_6230 -> Patchwork_13237
CI_DRM_6230: 57bd224fa47bfe2a2b83fbfcfc48aaded027d211 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5050: 4c072238c784e6acb00634a80c3c55fb8358058b @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_13237: b3763a316000dc11c1ff19b079d000651f447050 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
b3763a316000 drm/i915: Make GuC GGTT reservation work on ggtt
08010f3675e3 drm/i915/guc: Move intel_guc_reserved_gtt_size to intel_wopcm_guc_size
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13237/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v4 2/2] drm/i915: Make GuC GGTT reservation work on ggtt
2019-06-11 11:00 ` [PATCH 2/2] drm/i915: Make GuC GGTT reservation work on ggtt Tvrtko Ursulin
@ 2019-06-11 12:23 ` Tvrtko Ursulin
2019-06-11 13:13 ` Tvrtko Ursulin
0 siblings, 1 reply; 11+ messages in thread
From: Tvrtko Ursulin @ 2019-06-11 12:23 UTC (permalink / raw)
To: Intel-gfx
From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
These functions operate on ggtt so make them take that directly as
parameter.
At the same time move the USES_GUC conditional down to
intel_guc_reserve_ggtt_top for symmetry with
intel_guc_reserved_gtt_size.
v2:
* Rename and move functions to be static in i915_gem_gtt.c (Michal)
v3:
* Add comment explaining reason for reservation, add assert and fix
error message. (Michal)
v4:
* Fix checkpatch error.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 43 ++++++++++++++++++++++++-----
drivers/gpu/drm/i915/intel_guc.c | 27 ------------------
drivers/gpu/drm/i915/intel_guc.h | 2 --
3 files changed, 36 insertions(+), 36 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 5b5125ee49f3..c13b52b66ef1 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2807,6 +2807,32 @@ static void fini_aliasing_ppgtt(struct drm_i915_private *i915)
ggtt->vm.vma_ops.unbind_vma = ggtt_unbind_vma;
}
+static int ggtt_reserve_guc_top(struct i915_ggtt *ggtt)
+{
+ u64 size;
+ int ret;
+
+ if (!USES_GUC(ggtt->vm.i915))
+ return 0;
+
+ GEM_BUG_ON(ggtt->vm.total <= GUC_GGTT_TOP);
+ size = ggtt->vm.total - GUC_GGTT_TOP;
+
+ ret = i915_gem_gtt_reserve(&ggtt->vm, &ggtt->uc_fw, size,
+ GUC_GGTT_TOP, I915_COLOR_UNEVICTABLE,
+ PIN_NOEVICT);
+ if (ret)
+ DRM_DEBUG_DRIVER("Failed to reserve top of GGTT for GuC\n");
+
+ return ret;
+}
+
+static void ggtt_release_guc_top(struct i915_ggtt *ggtt)
+{
+ if (drm_mm_node_allocated(&ggtt->uc_fw))
+ drm_mm_remove_node(&ggtt->uc_fw);
+}
+
int i915_gem_init_ggtt(struct drm_i915_private *dev_priv)
{
/* Let GEM Manage all of the aperture.
@@ -2844,11 +2870,14 @@ int i915_gem_init_ggtt(struct drm_i915_private *dev_priv)
if (ret)
return ret;
- if (USES_GUC(dev_priv)) {
- ret = intel_guc_reserve_ggtt_top(&dev_priv->guc);
- if (ret)
- goto err_reserve;
- }
+ /*
+ * The upper portion of the GuC address space has a sizeable hole
+ * (several MB) that is inaccessible by GuC. Reserve this range within
+ * GGTT as it can comfortably hold GuC/HuC firmware images.
+ */
+ ret = ggtt_reserve_guc_top(ggtt);
+ if (ret)
+ goto err_reserve;
/* Clear any non-preallocated blocks */
drm_mm_for_each_hole(entry, &ggtt->vm.mm, hole_start, hole_end) {
@@ -2870,7 +2899,7 @@ int i915_gem_init_ggtt(struct drm_i915_private *dev_priv)
return 0;
err_appgtt:
- intel_guc_release_ggtt_top(&dev_priv->guc);
+ ggtt_release_guc_top(ggtt);
err_reserve:
drm_mm_remove_node(&ggtt->error_capture);
return ret;
@@ -2897,7 +2926,7 @@ void i915_ggtt_cleanup_hw(struct drm_i915_private *dev_priv)
if (drm_mm_node_allocated(&ggtt->error_capture))
drm_mm_remove_node(&ggtt->error_capture);
- intel_guc_release_ggtt_top(&dev_priv->guc);
+ ggtt_release_guc_top(ggtt);
if (drm_mm_initialized(&ggtt->vm.mm)) {
intel_vgt_deballoon(dev_priv);
diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c
index d45d97624402..c40a6efdd33a 100644
--- a/drivers/gpu/drm/i915/intel_guc.c
+++ b/drivers/gpu/drm/i915/intel_guc.c
@@ -685,30 +685,3 @@ struct i915_vma *intel_guc_allocate_vma(struct intel_guc *guc, u32 size)
i915_gem_object_put(obj);
return vma;
}
-
-int intel_guc_reserve_ggtt_top(struct intel_guc *guc)
-{
- struct drm_i915_private *i915 = guc_to_i915(guc);
- struct i915_ggtt *ggtt = &i915->ggtt;
- u64 size;
- int ret;
-
- size = ggtt->vm.total - GUC_GGTT_TOP;
-
- ret = i915_gem_gtt_reserve(&ggtt->vm, &ggtt->uc_fw, size,
- GUC_GGTT_TOP, I915_COLOR_UNEVICTABLE,
- PIN_NOEVICT);
- if (ret)
- DRM_DEBUG_DRIVER("GuC: failed to reserve top of ggtt\n");
-
- return ret;
-}
-
-void intel_guc_release_ggtt_top(struct intel_guc *guc)
-{
- struct drm_i915_private *i915 = guc_to_i915(guc);
- struct i915_ggtt *ggtt = &i915->ggtt;
-
- if (drm_mm_node_allocated(&ggtt->uc_fw))
- drm_mm_remove_node(&ggtt->uc_fw);
-}
diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h
index 85c3b02a0c08..08c906abdfa2 100644
--- a/drivers/gpu/drm/i915/intel_guc.h
+++ b/drivers/gpu/drm/i915/intel_guc.h
@@ -172,8 +172,6 @@ int intel_guc_auth_huc(struct intel_guc *guc, u32 rsa_offset);
int intel_guc_suspend(struct intel_guc *guc);
int intel_guc_resume(struct intel_guc *guc);
struct i915_vma *intel_guc_allocate_vma(struct intel_guc *guc, u32 size);
-int intel_guc_reserve_ggtt_top(struct intel_guc *guc);
-void intel_guc_release_ggtt_top(struct intel_guc *guc);
static inline bool intel_guc_is_loaded(struct intel_guc *guc)
{
--
2.20.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 11+ messages in thread
* ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915/guc: Move intel_guc_reserved_gtt_size to intel_wopcm_guc_size (rev2)
2019-06-11 11:00 [PATCH 1/2] drm/i915/guc: Move intel_guc_reserved_gtt_size to intel_wopcm_guc_size Tvrtko Ursulin
` (3 preceding siblings ...)
2019-06-11 12:06 ` ✓ Fi.CI.BAT: success " Patchwork
@ 2019-06-11 12:39 ` Patchwork
2019-06-11 13:04 ` ✓ Fi.CI.BAT: success " Patchwork
2019-06-12 14:51 ` ✓ Fi.CI.IGT: " Patchwork
6 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2019-06-11 12:39 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/i915/guc: Move intel_guc_reserved_gtt_size to intel_wopcm_guc_size (rev2)
URL : https://patchwork.freedesktop.org/series/61887/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915/guc: Move intel_guc_reserved_gtt_size to intel_wopcm_guc_size
-O:drivers/gpu/drm/i915/i915_gem_gtt.c:2832:26: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_gem_gtt.c:2832:26: warning: expression using sizeof(void)
Commit: drm/i915: Make GuC GGTT reservation work on ggtt
Okay!
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 11+ messages in thread
* ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/guc: Move intel_guc_reserved_gtt_size to intel_wopcm_guc_size (rev2)
2019-06-11 11:00 [PATCH 1/2] drm/i915/guc: Move intel_guc_reserved_gtt_size to intel_wopcm_guc_size Tvrtko Ursulin
` (4 preceding siblings ...)
2019-06-11 12:39 ` ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915/guc: Move intel_guc_reserved_gtt_size to intel_wopcm_guc_size (rev2) Patchwork
@ 2019-06-11 13:04 ` Patchwork
2019-06-12 14:51 ` ✓ Fi.CI.IGT: " Patchwork
6 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2019-06-11 13:04 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/i915/guc: Move intel_guc_reserved_gtt_size to intel_wopcm_guc_size (rev2)
URL : https://patchwork.freedesktop.org/series/61887/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6230 -> Patchwork_13240
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/
Known issues
------------
Here are the changes found in Patchwork_13240 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_suspend@basic-s3:
- fi-blb-e6850: [PASS][1] -> [INCOMPLETE][2] ([fdo#107718])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-blb-e6850/igt@gem_exec_suspend@basic-s3.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/fi-blb-e6850/igt@gem_exec_suspend@basic-s3.html
* igt@gem_flink_basic@bad-open:
- fi-icl-u3: [PASS][3] -> [DMESG-WARN][4] ([fdo#107724])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-icl-u3/igt@gem_flink_basic@bad-open.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/fi-icl-u3/igt@gem_flink_basic@bad-open.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [PASS][5] -> [FAIL][6] ([fdo#109485])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
#### Possible fixes ####
* igt@gem_ctx_switch@basic-default:
- {fi-icl-guc}: [INCOMPLETE][7] ([fdo#107713] / [fdo#108569]) -> [PASS][8]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-icl-guc/igt@gem_ctx_switch@basic-default.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/fi-icl-guc/igt@gem_ctx_switch@basic-default.html
* igt@gem_mmap@basic-small-bo:
- fi-icl-u3: [DMESG-WARN][9] ([fdo#107724]) -> [PASS][10] +2 similar issues
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-icl-u3/igt@gem_mmap@basic-small-bo.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/fi-icl-u3/igt@gem_mmap@basic-small-bo.html
* igt@i915_selftest@live_contexts:
- fi-bdw-gvtdvm: [DMESG-FAIL][11] ([fdo#110235]) -> [PASS][12]
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-bdw-gvtdvm/igt@i915_selftest@live_contexts.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/fi-bdw-gvtdvm/igt@i915_selftest@live_contexts.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
[fdo#109485]: https://bugs.freedesktop.org/show_bug.cgi?id=109485
[fdo#110235]: https://bugs.freedesktop.org/show_bug.cgi?id=110235
Participating hosts (54 -> 43)
------------------------------
Missing (11): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-j1900 fi-byt-squawks fi-bsw-cyan fi-apl-guc fi-byt-clapper fi-pnv-d510 fi-icl-dsi fi-bdw-samus
Build changes
-------------
* Linux: CI_DRM_6230 -> Patchwork_13240
CI_DRM_6230: 57bd224fa47bfe2a2b83fbfcfc48aaded027d211 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5050: 4c072238c784e6acb00634a80c3c55fb8358058b @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_13240: e22d47259fa9f80d9445832cde295e8995a7983f @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
e22d47259fa9 drm/i915: Make GuC GGTT reservation work on ggtt
6e5a49ccd0e3 drm/i915/guc: Move intel_guc_reserved_gtt_size to intel_wopcm_guc_size
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v4 2/2] drm/i915: Make GuC GGTT reservation work on ggtt
2019-06-11 12:23 ` [PATCH v4 " Tvrtko Ursulin
@ 2019-06-11 13:13 ` Tvrtko Ursulin
2019-06-11 13:19 ` Michal Wajdeczko
0 siblings, 1 reply; 11+ messages in thread
From: Tvrtko Ursulin @ 2019-06-11 13:13 UTC (permalink / raw)
To: Intel-gfx, Michal Wajdeczko
Michal,
On 11/06/2019 13:23, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>
> These functions operate on ggtt so make them take that directly as
> parameter.
>
> At the same time move the USES_GUC conditional down to
> intel_guc_reserve_ggtt_top for symmetry with
> intel_guc_reserved_gtt_size.
>
> v2:
> * Rename and move functions to be static in i915_gem_gtt.c (Michal)
>
> v3:
> * Add comment explaining reason for reservation, add assert and fix
> error message. (Michal)
>
> v4:
> * Fix checkpatch error.
>
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
I've assumed I would be able to implement your small suggestions
correctly so I've kept the r-b. Could you just give it a quick glance
over to see if that is indeed true.
Regards,
Tvrtko
> ---
> drivers/gpu/drm/i915/i915_gem_gtt.c | 43 ++++++++++++++++++++++++-----
> drivers/gpu/drm/i915/intel_guc.c | 27 ------------------
> drivers/gpu/drm/i915/intel_guc.h | 2 --
> 3 files changed, 36 insertions(+), 36 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index 5b5125ee49f3..c13b52b66ef1 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -2807,6 +2807,32 @@ static void fini_aliasing_ppgtt(struct drm_i915_private *i915)
> ggtt->vm.vma_ops.unbind_vma = ggtt_unbind_vma;
> }
>
> +static int ggtt_reserve_guc_top(struct i915_ggtt *ggtt)
> +{
> + u64 size;
> + int ret;
> +
> + if (!USES_GUC(ggtt->vm.i915))
> + return 0;
> +
> + GEM_BUG_ON(ggtt->vm.total <= GUC_GGTT_TOP);
> + size = ggtt->vm.total - GUC_GGTT_TOP;
> +
> + ret = i915_gem_gtt_reserve(&ggtt->vm, &ggtt->uc_fw, size,
> + GUC_GGTT_TOP, I915_COLOR_UNEVICTABLE,
> + PIN_NOEVICT);
> + if (ret)
> + DRM_DEBUG_DRIVER("Failed to reserve top of GGTT for GuC\n");
> +
> + return ret;
> +}
> +
> +static void ggtt_release_guc_top(struct i915_ggtt *ggtt)
> +{
> + if (drm_mm_node_allocated(&ggtt->uc_fw))
> + drm_mm_remove_node(&ggtt->uc_fw);
> +}
> +
> int i915_gem_init_ggtt(struct drm_i915_private *dev_priv)
> {
> /* Let GEM Manage all of the aperture.
> @@ -2844,11 +2870,14 @@ int i915_gem_init_ggtt(struct drm_i915_private *dev_priv)
> if (ret)
> return ret;
>
> - if (USES_GUC(dev_priv)) {
> - ret = intel_guc_reserve_ggtt_top(&dev_priv->guc);
> - if (ret)
> - goto err_reserve;
> - }
> + /*
> + * The upper portion of the GuC address space has a sizeable hole
> + * (several MB) that is inaccessible by GuC. Reserve this range within
> + * GGTT as it can comfortably hold GuC/HuC firmware images.
> + */
> + ret = ggtt_reserve_guc_top(ggtt);
> + if (ret)
> + goto err_reserve;
>
> /* Clear any non-preallocated blocks */
> drm_mm_for_each_hole(entry, &ggtt->vm.mm, hole_start, hole_end) {
> @@ -2870,7 +2899,7 @@ int i915_gem_init_ggtt(struct drm_i915_private *dev_priv)
> return 0;
>
> err_appgtt:
> - intel_guc_release_ggtt_top(&dev_priv->guc);
> + ggtt_release_guc_top(ggtt);
> err_reserve:
> drm_mm_remove_node(&ggtt->error_capture);
> return ret;
> @@ -2897,7 +2926,7 @@ void i915_ggtt_cleanup_hw(struct drm_i915_private *dev_priv)
> if (drm_mm_node_allocated(&ggtt->error_capture))
> drm_mm_remove_node(&ggtt->error_capture);
>
> - intel_guc_release_ggtt_top(&dev_priv->guc);
> + ggtt_release_guc_top(ggtt);
>
> if (drm_mm_initialized(&ggtt->vm.mm)) {
> intel_vgt_deballoon(dev_priv);
> diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c
> index d45d97624402..c40a6efdd33a 100644
> --- a/drivers/gpu/drm/i915/intel_guc.c
> +++ b/drivers/gpu/drm/i915/intel_guc.c
> @@ -685,30 +685,3 @@ struct i915_vma *intel_guc_allocate_vma(struct intel_guc *guc, u32 size)
> i915_gem_object_put(obj);
> return vma;
> }
> -
> -int intel_guc_reserve_ggtt_top(struct intel_guc *guc)
> -{
> - struct drm_i915_private *i915 = guc_to_i915(guc);
> - struct i915_ggtt *ggtt = &i915->ggtt;
> - u64 size;
> - int ret;
> -
> - size = ggtt->vm.total - GUC_GGTT_TOP;
> -
> - ret = i915_gem_gtt_reserve(&ggtt->vm, &ggtt->uc_fw, size,
> - GUC_GGTT_TOP, I915_COLOR_UNEVICTABLE,
> - PIN_NOEVICT);
> - if (ret)
> - DRM_DEBUG_DRIVER("GuC: failed to reserve top of ggtt\n");
> -
> - return ret;
> -}
> -
> -void intel_guc_release_ggtt_top(struct intel_guc *guc)
> -{
> - struct drm_i915_private *i915 = guc_to_i915(guc);
> - struct i915_ggtt *ggtt = &i915->ggtt;
> -
> - if (drm_mm_node_allocated(&ggtt->uc_fw))
> - drm_mm_remove_node(&ggtt->uc_fw);
> -}
> diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h
> index 85c3b02a0c08..08c906abdfa2 100644
> --- a/drivers/gpu/drm/i915/intel_guc.h
> +++ b/drivers/gpu/drm/i915/intel_guc.h
> @@ -172,8 +172,6 @@ int intel_guc_auth_huc(struct intel_guc *guc, u32 rsa_offset);
> int intel_guc_suspend(struct intel_guc *guc);
> int intel_guc_resume(struct intel_guc *guc);
> struct i915_vma *intel_guc_allocate_vma(struct intel_guc *guc, u32 size);
> -int intel_guc_reserve_ggtt_top(struct intel_guc *guc);
> -void intel_guc_release_ggtt_top(struct intel_guc *guc);
>
> static inline bool intel_guc_is_loaded(struct intel_guc *guc)
> {
>
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v4 2/2] drm/i915: Make GuC GGTT reservation work on ggtt
2019-06-11 13:13 ` Tvrtko Ursulin
@ 2019-06-11 13:19 ` Michal Wajdeczko
0 siblings, 0 replies; 11+ messages in thread
From: Michal Wajdeczko @ 2019-06-11 13:19 UTC (permalink / raw)
To: Intel-gfx, Tvrtko Ursulin
On Tue, 11 Jun 2019 15:13:21 +0200, Tvrtko Ursulin
<tvrtko.ursulin@linux.intel.com> wrote:
>
> Michal,
>
> On 11/06/2019 13:23, Tvrtko Ursulin wrote:
>> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>> These functions operate on ggtt so make them take that directly as
>> parameter.
>> At the same time move the USES_GUC conditional down to
>> intel_guc_reserve_ggtt_top for symmetry with
>> intel_guc_reserved_gtt_size.
>> v2:
>> * Rename and move functions to be static in i915_gem_gtt.c (Michal)
>> v3:
>> * Add comment explaining reason for reservation, add assert and fix
>> error message. (Michal)
>> v4:
>> * Fix checkpatch error.
>> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
>> Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
>
> I've assumed I would be able to implement your small suggestions
> correctly so I've kept the r-b. Could you just give it a quick glance
> over to see if that is indeed true.
It's ok, r-b is valid.
Michal
>
> Regards,
>
> Tvrtko
>
>> ---
>> drivers/gpu/drm/i915/i915_gem_gtt.c | 43 ++++++++++++++++++++++++-----
>> drivers/gpu/drm/i915/intel_guc.c | 27 ------------------
>> drivers/gpu/drm/i915/intel_guc.h | 2 --
>> 3 files changed, 36 insertions(+), 36 deletions(-)
>> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
>> b/drivers/gpu/drm/i915/i915_gem_gtt.c
>> index 5b5125ee49f3..c13b52b66ef1 100644
>> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
>> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
>> @@ -2807,6 +2807,32 @@ static void fini_aliasing_ppgtt(struct
>> drm_i915_private *i915)
>> ggtt->vm.vma_ops.unbind_vma = ggtt_unbind_vma;
>> }
>> +static int ggtt_reserve_guc_top(struct i915_ggtt *ggtt)
>> +{
>> + u64 size;
>> + int ret;
>> +
>> + if (!USES_GUC(ggtt->vm.i915))
>> + return 0;
>> +
>> + GEM_BUG_ON(ggtt->vm.total <= GUC_GGTT_TOP);
>> + size = ggtt->vm.total - GUC_GGTT_TOP;
>> +
>> + ret = i915_gem_gtt_reserve(&ggtt->vm, &ggtt->uc_fw, size,
>> + GUC_GGTT_TOP, I915_COLOR_UNEVICTABLE,
>> + PIN_NOEVICT);
>> + if (ret)
>> + DRM_DEBUG_DRIVER("Failed to reserve top of GGTT for GuC\n");
>> +
>> + return ret;
>> +}
>> +
>> +static void ggtt_release_guc_top(struct i915_ggtt *ggtt)
>> +{
>> + if (drm_mm_node_allocated(&ggtt->uc_fw))
>> + drm_mm_remove_node(&ggtt->uc_fw);
>> +}
>> +
>> int i915_gem_init_ggtt(struct drm_i915_private *dev_priv)
>> {
>> /* Let GEM Manage all of the aperture.
>> @@ -2844,11 +2870,14 @@ int i915_gem_init_ggtt(struct drm_i915_private
>> *dev_priv)
>> if (ret)
>> return ret;
>> - if (USES_GUC(dev_priv)) {
>> - ret = intel_guc_reserve_ggtt_top(&dev_priv->guc);
>> - if (ret)
>> - goto err_reserve;
>> - }
>> + /*
>> + * The upper portion of the GuC address space has a sizeable hole
>> + * (several MB) that is inaccessible by GuC. Reserve this range within
>> + * GGTT as it can comfortably hold GuC/HuC firmware images.
>> + */
>> + ret = ggtt_reserve_guc_top(ggtt);
>> + if (ret)
>> + goto err_reserve;
>> /* Clear any non-preallocated blocks */
>> drm_mm_for_each_hole(entry, &ggtt->vm.mm, hole_start, hole_end) {
>> @@ -2870,7 +2899,7 @@ int i915_gem_init_ggtt(struct drm_i915_private
>> *dev_priv)
>> return 0;
>> err_appgtt:
>> - intel_guc_release_ggtt_top(&dev_priv->guc);
>> + ggtt_release_guc_top(ggtt);
>> err_reserve:
>> drm_mm_remove_node(&ggtt->error_capture);
>> return ret;
>> @@ -2897,7 +2926,7 @@ void i915_ggtt_cleanup_hw(struct drm_i915_private
>> *dev_priv)
>> if (drm_mm_node_allocated(&ggtt->error_capture))
>> drm_mm_remove_node(&ggtt->error_capture);
>> - intel_guc_release_ggtt_top(&dev_priv->guc);
>> + ggtt_release_guc_top(ggtt);
>> if (drm_mm_initialized(&ggtt->vm.mm)) {
>> intel_vgt_deballoon(dev_priv);
>> diff --git a/drivers/gpu/drm/i915/intel_guc.c
>> b/drivers/gpu/drm/i915/intel_guc.c
>> index d45d97624402..c40a6efdd33a 100644
>> --- a/drivers/gpu/drm/i915/intel_guc.c
>> +++ b/drivers/gpu/drm/i915/intel_guc.c
>> @@ -685,30 +685,3 @@ struct i915_vma *intel_guc_allocate_vma(struct
>> intel_guc *guc, u32 size)
>> i915_gem_object_put(obj);
>> return vma;
>> }
>> -
>> -int intel_guc_reserve_ggtt_top(struct intel_guc *guc)
>> -{
>> - struct drm_i915_private *i915 = guc_to_i915(guc);
>> - struct i915_ggtt *ggtt = &i915->ggtt;
>> - u64 size;
>> - int ret;
>> -
>> - size = ggtt->vm.total - GUC_GGTT_TOP;
>> -
>> - ret = i915_gem_gtt_reserve(&ggtt->vm, &ggtt->uc_fw, size,
>> - GUC_GGTT_TOP, I915_COLOR_UNEVICTABLE,
>> - PIN_NOEVICT);
>> - if (ret)
>> - DRM_DEBUG_DRIVER("GuC: failed to reserve top of ggtt\n");
>> -
>> - return ret;
>> -}
>> -
>> -void intel_guc_release_ggtt_top(struct intel_guc *guc)
>> -{
>> - struct drm_i915_private *i915 = guc_to_i915(guc);
>> - struct i915_ggtt *ggtt = &i915->ggtt;
>> -
>> - if (drm_mm_node_allocated(&ggtt->uc_fw))
>> - drm_mm_remove_node(&ggtt->uc_fw);
>> -}
>> diff --git a/drivers/gpu/drm/i915/intel_guc.h
>> b/drivers/gpu/drm/i915/intel_guc.h
>> index 85c3b02a0c08..08c906abdfa2 100644
>> --- a/drivers/gpu/drm/i915/intel_guc.h
>> +++ b/drivers/gpu/drm/i915/intel_guc.h
>> @@ -172,8 +172,6 @@ int intel_guc_auth_huc(struct intel_guc *guc, u32
>> rsa_offset);
>> int intel_guc_suspend(struct intel_guc *guc);
>> int intel_guc_resume(struct intel_guc *guc);
>> struct i915_vma *intel_guc_allocate_vma(struct intel_guc *guc, u32
>> size);
>> -int intel_guc_reserve_ggtt_top(struct intel_guc *guc);
>> -void intel_guc_release_ggtt_top(struct intel_guc *guc);
>> static inline bool intel_guc_is_loaded(struct intel_guc *guc)
>> {
>>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 11+ messages in thread
* ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/guc: Move intel_guc_reserved_gtt_size to intel_wopcm_guc_size (rev2)
2019-06-11 11:00 [PATCH 1/2] drm/i915/guc: Move intel_guc_reserved_gtt_size to intel_wopcm_guc_size Tvrtko Ursulin
` (5 preceding siblings ...)
2019-06-11 13:04 ` ✓ Fi.CI.BAT: success " Patchwork
@ 2019-06-12 14:51 ` Patchwork
6 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2019-06-12 14:51 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/i915/guc: Move intel_guc_reserved_gtt_size to intel_wopcm_guc_size (rev2)
URL : https://patchwork.freedesktop.org/series/61887/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6230_full -> Patchwork_13240_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Known issues
------------
Here are the changes found in Patchwork_13240_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_isolation@vecs0-s3:
- shard-skl: [PASS][1] -> [INCOMPLETE][2] ([fdo#104108])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-skl1/igt@gem_ctx_isolation@vecs0-s3.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/shard-skl5/igt@gem_ctx_isolation@vecs0-s3.html
* igt@gem_softpin@noreloc-s3:
- shard-apl: [PASS][3] -> [DMESG-WARN][4] ([fdo#108566])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-apl6/igt@gem_softpin@noreloc-s3.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/shard-apl7/igt@gem_softpin@noreloc-s3.html
* igt@kms_flip@flip-vs-expired-vblank:
- shard-skl: [PASS][5] -> [FAIL][6] ([fdo#105363])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-skl4/igt@kms_flip@flip-vs-expired-vblank.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/shard-skl4/igt@kms_flip@flip-vs-expired-vblank.html
* igt@kms_flip_tiling@flip-to-x-tiled:
- shard-iclb: [PASS][7] -> [FAIL][8] ([fdo#108134])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-iclb5/igt@kms_flip_tiling@flip-to-x-tiled.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/shard-iclb4/igt@kms_flip_tiling@flip-to-x-tiled.html
* igt@kms_flip_tiling@flip-x-tiled:
- shard-iclb: [PASS][9] -> [FAIL][10] ([fdo#108303])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-iclb5/igt@kms_flip_tiling@flip-x-tiled.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/shard-iclb4/igt@kms_flip_tiling@flip-x-tiled.html
* igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite:
- shard-iclb: [PASS][11] -> [FAIL][12] ([fdo#103167]) +1 similar issue
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-iclb3/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/shard-iclb5/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-plflip-blt:
- shard-hsw: [PASS][13] -> [SKIP][14] ([fdo#109271]) +20 similar issues
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-hsw8/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-plflip-blt.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/shard-hsw1/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-plflip-blt.html
* igt@kms_setmode@basic:
- shard-hsw: [PASS][15] -> [FAIL][16] ([fdo#99912])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-hsw1/igt@kms_setmode@basic.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/shard-hsw8/igt@kms_setmode@basic.html
- shard-kbl: [PASS][17] -> [FAIL][18] ([fdo#99912])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-kbl2/igt@kms_setmode@basic.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/shard-kbl3/igt@kms_setmode@basic.html
#### Possible fixes ####
* igt@gem_eio@in-flight-suspend:
- shard-glk: [FAIL][19] ([fdo#110667]) -> [PASS][20]
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-glk2/igt@gem_eio@in-flight-suspend.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/shard-glk4/igt@gem_eio@in-flight-suspend.html
* igt@gem_mmap_gtt@forked-medium-copy:
- shard-iclb: [INCOMPLETE][21] ([fdo#107713]) -> [PASS][22]
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-iclb4/igt@gem_mmap_gtt@forked-medium-copy.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/shard-iclb3/igt@gem_mmap_gtt@forked-medium-copy.html
* igt@i915_suspend@sysfs-reader:
- shard-apl: [DMESG-WARN][23] ([fdo#108566]) -> [PASS][24]
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-apl5/igt@i915_suspend@sysfs-reader.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/shard-apl7/igt@i915_suspend@sysfs-reader.html
* igt@kms_cursor_crc@pipe-b-cursor-128x128-onscreen:
- shard-apl: [INCOMPLETE][25] ([fdo#103927]) -> [PASS][26]
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-apl8/igt@kms_cursor_crc@pipe-b-cursor-128x128-onscreen.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/shard-apl8/igt@kms_cursor_crc@pipe-b-cursor-128x128-onscreen.html
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
- shard-glk: [FAIL][27] ([fdo#105363]) -> [PASS][28]
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-glk7/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/shard-glk1/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html
* igt@kms_flip@2x-plain-flip-ts-check-interruptible:
- shard-hsw: [SKIP][29] ([fdo#109271]) -> [PASS][30] +16 similar issues
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-hsw1/igt@kms_flip@2x-plain-flip-ts-check-interruptible.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/shard-hsw6/igt@kms_flip@2x-plain-flip-ts-check-interruptible.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-skl: [FAIL][31] ([fdo#105363]) -> [PASS][32]
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-skl5/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/shard-skl2/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
- shard-apl: [FAIL][33] ([fdo#102887] / [fdo#105363]) -> [PASS][34]
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-apl8/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/shard-apl7/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-plflip-blt:
- shard-iclb: [FAIL][35] ([fdo#103167]) -> [PASS][36] +2 similar issues
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-iclb7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-plflip-blt.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/shard-iclb7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@psr-rgb101010-draw-blt:
- shard-skl: [FAIL][37] ([fdo#103167]) -> [PASS][38] +1 similar issue
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-skl7/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-blt.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/shard-skl2/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-blt.html
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
- shard-kbl: [INCOMPLETE][39] ([fdo#103665]) -> [PASS][40]
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-kbl2/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/shard-kbl1/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
* igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
- shard-skl: [FAIL][41] ([fdo#108145]) -> [PASS][42] +1 similar issue
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-skl7/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/shard-skl2/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
* igt@kms_psr@psr2_cursor_plane_move:
- shard-iclb: [SKIP][43] ([fdo#109441]) -> [PASS][44]
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-iclb6/igt@kms_psr@psr2_cursor_plane_move.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/shard-iclb2/igt@kms_psr@psr2_cursor_plane_move.html
* igt@kms_setmode@basic:
- shard-apl: [FAIL][45] ([fdo#99912]) -> [PASS][46]
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-apl3/igt@kms_setmode@basic.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/shard-apl6/igt@kms_setmode@basic.html
* igt@perf_pmu@rc6:
- shard-kbl: [SKIP][47] ([fdo#109271]) -> [PASS][48]
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-kbl2/igt@perf_pmu@rc6.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/shard-kbl6/igt@perf_pmu@rc6.html
#### Warnings ####
* igt@gem_mmap_gtt@forked-big-copy-xy:
- shard-iclb: [INCOMPLETE][49] ([fdo#107713] / [fdo#109100]) -> [TIMEOUT][50] ([fdo#109673])
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-iclb1/igt@gem_mmap_gtt@forked-big-copy-xy.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/shard-iclb6/igt@gem_mmap_gtt@forked-big-copy-xy.html
* igt@gem_tiled_swapping@non-threaded:
- shard-hsw: [INCOMPLETE][51] ([fdo#103540]) -> [FAIL][52] ([fdo#108686])
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-hsw1/igt@gem_tiled_swapping@non-threaded.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/shard-hsw4/igt@gem_tiled_swapping@non-threaded.html
[fdo#102887]: https://bugs.freedesktop.org/show_bug.cgi?id=102887
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
[fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
[fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#108134]: https://bugs.freedesktop.org/show_bug.cgi?id=108134
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#108303]: https://bugs.freedesktop.org/show_bug.cgi?id=108303
[fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
[fdo#108686]: https://bugs.freedesktop.org/show_bug.cgi?id=108686
[fdo#109100]: https://bugs.freedesktop.org/show_bug.cgi?id=109100
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109673]: https://bugs.freedesktop.org/show_bug.cgi?id=109673
[fdo#110667]: https://bugs.freedesktop.org/show_bug.cgi?id=110667
[fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Build changes
-------------
* Linux: CI_DRM_6230 -> Patchwork_13240
CI_DRM_6230: 57bd224fa47bfe2a2b83fbfcfc48aaded027d211 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5050: 4c072238c784e6acb00634a80c3c55fb8358058b @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_13240: e22d47259fa9f80d9445832cde295e8995a7983f @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2019-06-12 14:51 UTC | newest]
Thread overview: 11+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-06-11 11:00 [PATCH 1/2] drm/i915/guc: Move intel_guc_reserved_gtt_size to intel_wopcm_guc_size Tvrtko Ursulin
2019-06-11 11:00 ` [PATCH 2/2] drm/i915: Make GuC GGTT reservation work on ggtt Tvrtko Ursulin
2019-06-11 12:23 ` [PATCH v4 " Tvrtko Ursulin
2019-06-11 13:13 ` Tvrtko Ursulin
2019-06-11 13:19 ` Michal Wajdeczko
2019-06-11 11:47 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/guc: Move intel_guc_reserved_gtt_size to intel_wopcm_guc_size Patchwork
2019-06-11 11:49 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-06-11 12:06 ` ✓ Fi.CI.BAT: success " Patchwork
2019-06-11 12:39 ` ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915/guc: Move intel_guc_reserved_gtt_size to intel_wopcm_guc_size (rev2) Patchwork
2019-06-11 13:04 ` ✓ Fi.CI.BAT: success " Patchwork
2019-06-12 14:51 ` ✓ Fi.CI.IGT: " Patchwork
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