From: Catalin Marinas <catalin.marinas@arm.com>
To: Masayoshi Mizuma <msys.mizuma@gmail.com>
Cc: Will Deacon <will.deacon@arm.com>,
linux-arm-kernel@lists.infradead.org,
Masayoshi Mizuma <m.mizuma@jp.fujitsu.com>,
linux-kernel@vger.kernel.org,
Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>,
Zhang Lei <zhang.lei@jp.fujitsu.com>
Subject: Re: [PATCH 2/2] arm64/mm: show TAINT_CPU_OUT_OF_SPEC warning if the cache size is over the spec.
Date: Tue, 11 Jun 2019 16:41:06 +0100 [thread overview]
Message-ID: <20190611154105.GE10165@c02tf0j2hf1t.cambridge.arm.com> (raw)
In-Reply-To: <20190611151731.6135-3-msys.mizuma@gmail.com>
On Tue, Jun 11, 2019 at 11:17:31AM -0400, Masayoshi Mizuma wrote:
> From: Masayoshi Mizuma <m.mizuma@jp.fujitsu.com>
>
> Show the warning and taints as TAINT_CPU_OUT_OF_SPEC if the cache line
> size is greater than the maximum.
In general the "out of spec" part is a misnomer, we tend to apply it to
CPU features that are not supported by the kernel rather than some CPU
feature not compliant with the architecture (we call the latter errata).
I suggest you drop this patch.
--
Catalin
WARNING: multiple messages have this Message-ID (diff)
From: Catalin Marinas <catalin.marinas@arm.com>
To: Masayoshi Mizuma <msys.mizuma@gmail.com>
Cc: Masayoshi Mizuma <m.mizuma@jp.fujitsu.com>,
Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>,
Will Deacon <will.deacon@arm.com>,
linux-kernel@vger.kernel.org,
Zhang Lei <zhang.lei@jp.fujitsu.com>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 2/2] arm64/mm: show TAINT_CPU_OUT_OF_SPEC warning if the cache size is over the spec.
Date: Tue, 11 Jun 2019 16:41:06 +0100 [thread overview]
Message-ID: <20190611154105.GE10165@c02tf0j2hf1t.cambridge.arm.com> (raw)
In-Reply-To: <20190611151731.6135-3-msys.mizuma@gmail.com>
On Tue, Jun 11, 2019 at 11:17:31AM -0400, Masayoshi Mizuma wrote:
> From: Masayoshi Mizuma <m.mizuma@jp.fujitsu.com>
>
> Show the warning and taints as TAINT_CPU_OUT_OF_SPEC if the cache line
> size is greater than the maximum.
In general the "out of spec" part is a misnomer, we tend to apply it to
CPU features that are not supported by the kernel rather than some CPU
feature not compliant with the architecture (we call the latter errata).
I suggest you drop this patch.
--
Catalin
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next prev parent reply other threads:[~2019-06-11 15:41 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-11 15:17 [PATCH 0/2] Correct the cache line size warning Masayoshi Mizuma
2019-06-11 15:17 ` Masayoshi Mizuma
2019-06-11 15:17 ` [PATCH 1/2] arm64/mm: check cpu cache line size with non-coherent device Masayoshi Mizuma
2019-06-11 15:17 ` Masayoshi Mizuma
2019-06-11 18:00 ` Catalin Marinas
2019-06-11 18:00 ` Catalin Marinas
2019-06-11 22:02 ` Masayoshi Mizuma
2019-06-11 22:02 ` Masayoshi Mizuma
2019-06-13 15:54 ` Catalin Marinas
2019-06-13 15:54 ` Catalin Marinas
2019-06-13 17:10 ` Robin Murphy
2019-06-13 17:10 ` Robin Murphy
2019-06-11 15:17 ` [PATCH 2/2] arm64/mm: show TAINT_CPU_OUT_OF_SPEC warning if the cache size is over the spec Masayoshi Mizuma
2019-06-11 15:17 ` Masayoshi Mizuma
2019-06-11 15:41 ` Catalin Marinas [this message]
2019-06-11 15:41 ` Catalin Marinas
2019-06-11 16:18 ` Masayoshi Mizuma
2019-06-11 16:18 ` Masayoshi Mizuma
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