* [PATCH i-g-t] i915/gem_ctx_shared: Prefer explicit domain control
@ 2019-06-11 8:17 ` Chris Wilson
0 siblings, 0 replies; 6+ messages in thread
From: Chris Wilson @ 2019-06-11 8:17 UTC (permalink / raw)
To: intel-gfx; +Cc: igt-dev
Since we are fiddling behind the scenes, we are writing to objects that
are not part of the execbuffer, do not rely on implicit domain
management being able to track the appropriate CPU cache status.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110890
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
tests/i915/gem_ctx_shared.c | 32 ++++++++++++++++++++++----------
1 file changed, 22 insertions(+), 10 deletions(-)
diff --git a/tests/i915/gem_ctx_shared.c b/tests/i915/gem_ctx_shared.c
index 069964546..ed43e8903 100644
--- a/tests/i915/gem_ctx_shared.c
+++ b/tests/i915/gem_ctx_shared.c
@@ -184,27 +184,30 @@ static void exhaust_shared_gtt(int i915, unsigned int flags)
static void exec_shared_gtt(int i915, unsigned int ring)
{
const int gen = intel_gen(intel_get_drm_devid(i915));
- const uint32_t bbe = MI_BATCH_BUFFER_END;
- struct drm_i915_gem_exec_object2 obj = {
- .handle = gem_create(i915, 4096)
- };
+ struct drm_i915_gem_exec_object2 obj = {};
struct drm_i915_gem_execbuffer2 execbuf = {
.buffers_ptr = to_user_pointer(&obj),
.buffer_count = 1,
.flags = ring,
};
- uint32_t scratch = obj.handle;
+ uint32_t scratch, *s;
uint32_t batch[16];
int i;
gem_require_ring(i915, ring);
igt_require(gem_can_store_dword(i915, ring));
+ scratch = gem_create(i915, 4096);
+ s = gem_mmap__cpu(i915, scratch, 0, 4096, PROT_WRITE);
+
+ gem_set_domain(i915, scratch, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU);
+ *s = MI_BATCH_BUFFER_END;
+
/* Load object into place in the GTT */
- gem_write(i915, obj.handle, 0, &bbe, sizeof(bbe));
+ obj.handle = scratch;
gem_execbuf(i915, &execbuf);
- /* Presume nothing causes an eviction in the meantime */
+ /* Presume nothing causes an eviction in the meantime! */
obj.handle = gem_create(i915, 4096);
@@ -235,10 +238,19 @@ static void exec_shared_gtt(int i915, unsigned int ring)
gem_sync(i915, obj.handle); /* write hazard lies */
gem_close(i915, obj.handle);
- gem_read(i915, scratch, 0, batch, sizeof(uint32_t));
- gem_close(i915, scratch);
+ /*
+ * If we created the new context with the old GTT, the write
+ * into the stale location of scratch will have landed in the right
+ * object. Otherwise, it should read the previous value of
+ * MI_BATCH_BUFFER_END.
+ *
+ * Setting .write = CPU to paper over our write hazard lies above.
+ */
+ gem_set_domain(i915, scratch, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU);
+ igt_assert_eq_u32(*s, 0xc0ffee);
- igt_assert_eq_u32(*batch, 0xc0ffee);
+ munmap(s, 4096);
+ gem_close(i915, scratch);
}
static int nop_sync(int i915, uint32_t ctx, unsigned int ring, int64_t timeout)
--
2.20.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [Intel-gfx] [PATCH i-g-t] i915/gem_ctx_shared: Prefer explicit domain control
@ 2019-06-11 8:17 ` Chris Wilson
0 siblings, 0 replies; 6+ messages in thread
From: Chris Wilson @ 2019-06-11 8:17 UTC (permalink / raw)
To: intel-gfx; +Cc: igt-dev
Since we are fiddling behind the scenes, we are writing to objects that
are not part of the execbuffer, do not rely on implicit domain
management being able to track the appropriate CPU cache status.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110890
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
tests/i915/gem_ctx_shared.c | 32 ++++++++++++++++++++++----------
1 file changed, 22 insertions(+), 10 deletions(-)
diff --git a/tests/i915/gem_ctx_shared.c b/tests/i915/gem_ctx_shared.c
index 069964546..ed43e8903 100644
--- a/tests/i915/gem_ctx_shared.c
+++ b/tests/i915/gem_ctx_shared.c
@@ -184,27 +184,30 @@ static void exhaust_shared_gtt(int i915, unsigned int flags)
static void exec_shared_gtt(int i915, unsigned int ring)
{
const int gen = intel_gen(intel_get_drm_devid(i915));
- const uint32_t bbe = MI_BATCH_BUFFER_END;
- struct drm_i915_gem_exec_object2 obj = {
- .handle = gem_create(i915, 4096)
- };
+ struct drm_i915_gem_exec_object2 obj = {};
struct drm_i915_gem_execbuffer2 execbuf = {
.buffers_ptr = to_user_pointer(&obj),
.buffer_count = 1,
.flags = ring,
};
- uint32_t scratch = obj.handle;
+ uint32_t scratch, *s;
uint32_t batch[16];
int i;
gem_require_ring(i915, ring);
igt_require(gem_can_store_dword(i915, ring));
+ scratch = gem_create(i915, 4096);
+ s = gem_mmap__cpu(i915, scratch, 0, 4096, PROT_WRITE);
+
+ gem_set_domain(i915, scratch, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU);
+ *s = MI_BATCH_BUFFER_END;
+
/* Load object into place in the GTT */
- gem_write(i915, obj.handle, 0, &bbe, sizeof(bbe));
+ obj.handle = scratch;
gem_execbuf(i915, &execbuf);
- /* Presume nothing causes an eviction in the meantime */
+ /* Presume nothing causes an eviction in the meantime! */
obj.handle = gem_create(i915, 4096);
@@ -235,10 +238,19 @@ static void exec_shared_gtt(int i915, unsigned int ring)
gem_sync(i915, obj.handle); /* write hazard lies */
gem_close(i915, obj.handle);
- gem_read(i915, scratch, 0, batch, sizeof(uint32_t));
- gem_close(i915, scratch);
+ /*
+ * If we created the new context with the old GTT, the write
+ * into the stale location of scratch will have landed in the right
+ * object. Otherwise, it should read the previous value of
+ * MI_BATCH_BUFFER_END.
+ *
+ * Setting .write = CPU to paper over our write hazard lies above.
+ */
+ gem_set_domain(i915, scratch, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU);
+ igt_assert_eq_u32(*s, 0xc0ffee);
- igt_assert_eq_u32(*batch, 0xc0ffee);
+ munmap(s, 4096);
+ gem_close(i915, scratch);
}
static int nop_sync(int i915, uint32_t ctx, unsigned int ring, int64_t timeout)
--
2.20.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [igt-dev] ✓ Fi.CI.BAT: success for i915/gem_ctx_shared: Prefer explicit domain control
2019-06-11 8:17 ` [Intel-gfx] " Chris Wilson
(?)
@ 2019-06-11 8:50 ` Patchwork
-1 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2019-06-11 8:50 UTC (permalink / raw)
To: Chris Wilson; +Cc: igt-dev
== Series Details ==
Series: i915/gem_ctx_shared: Prefer explicit domain control
URL : https://patchwork.freedesktop.org/series/61882/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6230 -> IGTPW_3138
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://patchwork.freedesktop.org/api/1.0/series/61882/revisions/1/mbox/
Known issues
------------
Here are the changes found in IGTPW_3138 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_suspend@basic-s4-devices:
- fi-blb-e6850: [PASS][1] -> [INCOMPLETE][2] ([fdo#107718])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-blb-e6850/igt@gem_exec_suspend@basic-s4-devices.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3138/fi-blb-e6850/igt@gem_exec_suspend@basic-s4-devices.html
* igt@gem_render_linear_blits@basic:
- fi-icl-u3: [PASS][3] -> [DMESG-WARN][4] ([fdo#107724])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-icl-u3/igt@gem_render_linear_blits@basic.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3138/fi-icl-u3/igt@gem_render_linear_blits@basic.html
#### Possible fixes ####
* igt@gem_mmap@basic-small-bo:
- fi-icl-u3: [DMESG-WARN][5] ([fdo#107724]) -> [PASS][6] +2 similar issues
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-icl-u3/igt@gem_mmap@basic-small-bo.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3138/fi-icl-u3/igt@gem_mmap@basic-small-bo.html
* igt@i915_selftest@live_contexts:
- fi-bdw-gvtdvm: [DMESG-FAIL][7] ([fdo#110235]) -> [PASS][8]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-bdw-gvtdvm/igt@i915_selftest@live_contexts.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3138/fi-bdw-gvtdvm/igt@i915_selftest@live_contexts.html
[fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#110235]: https://bugs.freedesktop.org/show_bug.cgi?id=110235
Participating hosts (54 -> 45)
------------------------------
Missing (9): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-icl-u2 fi-bsw-cyan fi-byt-clapper fi-icl-dsi fi-bdw-samus
Build changes
-------------
* IGT: IGT_5050 -> IGTPW_3138
CI_DRM_6230: 57bd224fa47bfe2a2b83fbfcfc48aaded027d211 @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_3138: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3138/
IGT_5050: 4c072238c784e6acb00634a80c3c55fb8358058b @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3138/
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 6+ messages in thread
* [igt-dev] ✓ Fi.CI.IGT: success for i915/gem_ctx_shared: Prefer explicit domain control
2019-06-11 8:17 ` [Intel-gfx] " Chris Wilson
(?)
(?)
@ 2019-06-12 10:35 ` Patchwork
-1 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2019-06-12 10:35 UTC (permalink / raw)
To: Chris Wilson; +Cc: igt-dev
== Series Details ==
Series: i915/gem_ctx_shared: Prefer explicit domain control
URL : https://patchwork.freedesktop.org/series/61882/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6230_full -> IGTPW_3138_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://patchwork.freedesktop.org/api/1.0/series/61882/revisions/1/mbox/
Known issues
------------
Here are the changes found in IGTPW_3138_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_balancer@smoke:
- shard-iclb: [PASS][1] -> [SKIP][2] ([fdo#110854])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-iclb1/igt@gem_exec_balancer@smoke.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3138/shard-iclb6/igt@gem_exec_balancer@smoke.html
* igt@gem_workarounds@suspend-resume-context:
- shard-kbl: [PASS][3] -> [DMESG-WARN][4] ([fdo#108566])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-kbl4/igt@gem_workarounds@suspend-resume-context.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3138/shard-kbl3/igt@gem_workarounds@suspend-resume-context.html
* igt@i915_suspend@fence-restore-tiled2untiled:
- shard-apl: [PASS][5] -> [DMESG-WARN][6] ([fdo#108566]) +4 similar issues
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-apl6/igt@i915_suspend@fence-restore-tiled2untiled.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3138/shard-apl7/igt@i915_suspend@fence-restore-tiled2untiled.html
* igt@kms_cursor_legacy@all-pipes-forked-bo:
- shard-snb: [PASS][7] -> [INCOMPLETE][8] ([fdo#105411])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-snb1/igt@kms_cursor_legacy@all-pipes-forked-bo.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3138/shard-snb6/igt@kms_cursor_legacy@all-pipes-forked-bo.html
* igt@kms_flip@2x-plain-flip-interruptible:
- shard-hsw: [PASS][9] -> [SKIP][10] ([fdo#109271]) +16 similar issues
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-hsw4/igt@kms_flip@2x-plain-flip-interruptible.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3138/shard-hsw1/igt@kms_flip@2x-plain-flip-interruptible.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-glk: [PASS][11] -> [INCOMPLETE][12] ([fdo#103359] / [k.org#198133])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-glk9/igt@kms_flip@flip-vs-suspend-interruptible.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3138/shard-glk9/igt@kms_flip@flip-vs-suspend-interruptible.html
* igt@kms_flip@plain-flip-ts-check:
- shard-glk: [PASS][13] -> [FAIL][14] ([fdo#100368])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-glk9/igt@kms_flip@plain-flip-ts-check.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3138/shard-glk4/igt@kms_flip@plain-flip-ts-check.html
* igt@kms_frontbuffer_tracking@fbc-suspend:
- shard-iclb: [PASS][15] -> [FAIL][16] ([fdo#103167]) +2 similar issues
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-iclb7/igt@kms_frontbuffer_tracking@fbc-suspend.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3138/shard-iclb4/igt@kms_frontbuffer_tracking@fbc-suspend.html
* igt@kms_setmode@basic:
- shard-hsw: [PASS][17] -> [FAIL][18] ([fdo#99912])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-hsw1/igt@kms_setmode@basic.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3138/shard-hsw2/igt@kms_setmode@basic.html
- shard-kbl: [PASS][19] -> [FAIL][20] ([fdo#99912])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-kbl2/igt@kms_setmode@basic.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3138/shard-kbl7/igt@kms_setmode@basic.html
#### Possible fixes ####
* igt@gem_eio@in-flight-suspend:
- shard-glk: [FAIL][21] ([fdo#110667]) -> [PASS][22]
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-glk2/igt@gem_eio@in-flight-suspend.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3138/shard-glk4/igt@gem_eio@in-flight-suspend.html
* igt@gem_mmap_gtt@forked-big-copy:
- shard-iclb: [INCOMPLETE][23] ([fdo#107713] / [fdo#109100]) -> [PASS][24]
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-iclb8/igt@gem_mmap_gtt@forked-big-copy.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3138/shard-iclb4/igt@gem_mmap_gtt@forked-big-copy.html
* igt@gem_mmap_gtt@forked-medium-copy:
- shard-iclb: [INCOMPLETE][25] ([fdo#107713]) -> [PASS][26]
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-iclb4/igt@gem_mmap_gtt@forked-medium-copy.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3138/shard-iclb5/igt@gem_mmap_gtt@forked-medium-copy.html
* igt@gem_tiled_swapping@non-threaded:
- shard-hsw: [INCOMPLETE][27] ([fdo#103540]) -> [PASS][28]
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-hsw1/igt@gem_tiled_swapping@non-threaded.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3138/shard-hsw8/igt@gem_tiled_swapping@non-threaded.html
* igt@i915_suspend@sysfs-reader:
- shard-apl: [DMESG-WARN][29] ([fdo#108566]) -> [PASS][30] +2 similar issues
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-apl5/igt@i915_suspend@sysfs-reader.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3138/shard-apl5/igt@i915_suspend@sysfs-reader.html
* igt@kms_cursor_crc@pipe-b-cursor-128x128-onscreen:
- shard-apl: [INCOMPLETE][31] ([fdo#103927]) -> [PASS][32]
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-apl8/igt@kms_cursor_crc@pipe-b-cursor-128x128-onscreen.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3138/shard-apl3/igt@kms_cursor_crc@pipe-b-cursor-128x128-onscreen.html
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
- shard-glk: [FAIL][33] ([fdo#105363]) -> [PASS][34]
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-glk7/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3138/shard-glk3/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html
* igt@kms_flip@2x-plain-flip-ts-check-interruptible:
- shard-hsw: [SKIP][35] ([fdo#109271]) -> [PASS][36] +18 similar issues
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-hsw1/igt@kms_flip@2x-plain-flip-ts-check-interruptible.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3138/shard-hsw7/igt@kms_flip@2x-plain-flip-ts-check-interruptible.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-apl: [FAIL][37] ([fdo#102887] / [fdo#105363]) -> [PASS][38]
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-apl8/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3138/shard-apl4/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-onoff:
- shard-apl: [FAIL][39] ([fdo#103167]) -> [PASS][40]
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-apl4/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-onoff.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3138/shard-apl6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-onoff.html
- shard-kbl: [FAIL][41] ([fdo#103167]) -> [PASS][42]
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-kbl1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-onoff.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3138/shard-kbl6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-onoff.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-plflip-blt:
- shard-iclb: [FAIL][43] ([fdo#103167]) -> [PASS][44] +2 similar issues
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-iclb7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-plflip-blt.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3138/shard-iclb7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-mmap-gtt:
- shard-glk: [FAIL][45] ([fdo#103167]) -> [PASS][46] +1 similar issue
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-glk8/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-mmap-gtt.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3138/shard-glk2/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-mmap-gtt.html
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
- shard-kbl: [INCOMPLETE][47] ([fdo#103665]) -> [PASS][48]
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-kbl2/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3138/shard-kbl1/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
* igt@kms_setmode@basic:
- shard-apl: [FAIL][49] ([fdo#99912]) -> [PASS][50]
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-apl3/igt@kms_setmode@basic.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3138/shard-apl1/igt@kms_setmode@basic.html
* igt@perf_pmu@rc6:
- shard-kbl: [SKIP][51] ([fdo#109271]) -> [PASS][52]
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-kbl2/igt@perf_pmu@rc6.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3138/shard-kbl4/igt@perf_pmu@rc6.html
#### Warnings ####
* igt@gem_mmap_gtt@forked-big-copy-xy:
- shard-iclb: [INCOMPLETE][53] ([fdo#107713] / [fdo#109100]) -> [TIMEOUT][54] ([fdo#109673])
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-iclb1/igt@gem_mmap_gtt@forked-big-copy-xy.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3138/shard-iclb4/igt@gem_mmap_gtt@forked-big-copy-xy.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#100368]: https://bugs.freedesktop.org/show_bug.cgi?id=100368
[fdo#102370]: https://bugs.freedesktop.org/show_bug.cgi?id=102370
[fdo#102887]: https://bugs.freedesktop.org/show_bug.cgi?id=102887
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103359]: https://bugs.freedesktop.org/show_bug.cgi?id=103359
[fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
[fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
[fdo#105411]: https://bugs.freedesktop.org/show_bug.cgi?id=105411
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
[fdo#109100]: https://bugs.freedesktop.org/show_bug.cgi?id=109100
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109593]: https://bugs.freedesktop.org/show_bug.cgi?id=109593
[fdo#109673]: https://bugs.freedesktop.org/show_bug.cgi?id=109673
[fdo#110667]: https://bugs.freedesktop.org/show_bug.cgi?id=110667
[fdo#110854]: https://bugs.freedesktop.org/show_bug.cgi?id=110854
[fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
[k.org#198133]: https://bugzilla.kernel.org/show_bug.cgi?id=198133
Participating hosts (10 -> 6)
------------------------------
Missing (4): pig-skl-6260u shard-skl pig-hsw-4770r pig-glk-j5005
Build changes
-------------
* IGT: IGT_5050 -> IGTPW_3138
* Piglit: piglit_4509 -> None
CI_DRM_6230: 57bd224fa47bfe2a2b83fbfcfc48aaded027d211 @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_3138: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3138/
IGT_5050: 4c072238c784e6acb00634a80c3c55fb8358058b @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3138/
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [igt-dev] [PATCH i-g-t] i915/gem_ctx_shared: Prefer explicit domain control
2019-06-11 8:17 ` [Intel-gfx] " Chris Wilson
@ 2019-06-14 13:18 ` Mika Kuoppala
-1 siblings, 0 replies; 6+ messages in thread
From: Mika Kuoppala @ 2019-06-14 13:18 UTC (permalink / raw)
To: Chris Wilson, intel-gfx; +Cc: igt-dev
Chris Wilson <chris@chris-wilson.co.uk> writes:
> Since we are fiddling behind the scenes, we are writing to objects that
> are not part of the execbuffer, do not rely on implicit domain
> management being able to track the appropriate CPU cache status.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110890
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> ---
> tests/i915/gem_ctx_shared.c | 32 ++++++++++++++++++++++----------
> 1 file changed, 22 insertions(+), 10 deletions(-)
>
> diff --git a/tests/i915/gem_ctx_shared.c b/tests/i915/gem_ctx_shared.c
> index 069964546..ed43e8903 100644
> --- a/tests/i915/gem_ctx_shared.c
> +++ b/tests/i915/gem_ctx_shared.c
> @@ -184,27 +184,30 @@ static void exhaust_shared_gtt(int i915, unsigned int flags)
> static void exec_shared_gtt(int i915, unsigned int ring)
> {
> const int gen = intel_gen(intel_get_drm_devid(i915));
> - const uint32_t bbe = MI_BATCH_BUFFER_END;
> - struct drm_i915_gem_exec_object2 obj = {
> - .handle = gem_create(i915, 4096)
> - };
> + struct drm_i915_gem_exec_object2 obj = {};
> struct drm_i915_gem_execbuffer2 execbuf = {
> .buffers_ptr = to_user_pointer(&obj),
> .buffer_count = 1,
> .flags = ring,
> };
> - uint32_t scratch = obj.handle;
> + uint32_t scratch, *s;
> uint32_t batch[16];
> int i;
>
> gem_require_ring(i915, ring);
> igt_require(gem_can_store_dword(i915, ring));
>
> + scratch = gem_create(i915, 4096);
> + s = gem_mmap__cpu(i915, scratch, 0, 4096, PROT_WRITE);
> +
> + gem_set_domain(i915, scratch, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU);
> + *s = MI_BATCH_BUFFER_END;
> +
> /* Load object into place in the GTT */
> - gem_write(i915, obj.handle, 0, &bbe, sizeof(bbe));
> + obj.handle = scratch;
> gem_execbuf(i915, &execbuf);
>
> - /* Presume nothing causes an eviction in the meantime */
> + /* Presume nothing causes an eviction in the meantime! */
>
> obj.handle = gem_create(i915, 4096);
>
> @@ -235,10 +238,19 @@ static void exec_shared_gtt(int i915, unsigned int ring)
> gem_sync(i915, obj.handle); /* write hazard lies */
> gem_close(i915, obj.handle);
>
> - gem_read(i915, scratch, 0, batch, sizeof(uint32_t));
> - gem_close(i915, scratch);
> + /*
> + * If we created the new context with the old GTT, the write
> + * into the stale location of scratch will have landed in the right
> + * object. Otherwise, it should read the previous value of
> + * MI_BATCH_BUFFER_END.
> + *
> + * Setting .write = CPU to paper over our write hazard lies above.
> + */
> + gem_set_domain(i915, scratch, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU);
> + igt_assert_eq_u32(*s, 0xc0ffee);
>
> - igt_assert_eq_u32(*batch, 0xc0ffee);
> + munmap(s, 4096);
> + gem_close(i915, scratch);
> }
>
> static int nop_sync(int i915, uint32_t ctx, unsigned int ring, int64_t timeout)
> --
> 2.20.1
>
> _______________________________________________
> igt-dev mailing list
> igt-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/igt-dev
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [Intel-gfx] [igt-dev] [PATCH i-g-t] i915/gem_ctx_shared: Prefer explicit domain control
@ 2019-06-14 13:18 ` Mika Kuoppala
0 siblings, 0 replies; 6+ messages in thread
From: Mika Kuoppala @ 2019-06-14 13:18 UTC (permalink / raw)
To: Chris Wilson, intel-gfx; +Cc: igt-dev
Chris Wilson <chris@chris-wilson.co.uk> writes:
> Since we are fiddling behind the scenes, we are writing to objects that
> are not part of the execbuffer, do not rely on implicit domain
> management being able to track the appropriate CPU cache status.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110890
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> ---
> tests/i915/gem_ctx_shared.c | 32 ++++++++++++++++++++++----------
> 1 file changed, 22 insertions(+), 10 deletions(-)
>
> diff --git a/tests/i915/gem_ctx_shared.c b/tests/i915/gem_ctx_shared.c
> index 069964546..ed43e8903 100644
> --- a/tests/i915/gem_ctx_shared.c
> +++ b/tests/i915/gem_ctx_shared.c
> @@ -184,27 +184,30 @@ static void exhaust_shared_gtt(int i915, unsigned int flags)
> static void exec_shared_gtt(int i915, unsigned int ring)
> {
> const int gen = intel_gen(intel_get_drm_devid(i915));
> - const uint32_t bbe = MI_BATCH_BUFFER_END;
> - struct drm_i915_gem_exec_object2 obj = {
> - .handle = gem_create(i915, 4096)
> - };
> + struct drm_i915_gem_exec_object2 obj = {};
> struct drm_i915_gem_execbuffer2 execbuf = {
> .buffers_ptr = to_user_pointer(&obj),
> .buffer_count = 1,
> .flags = ring,
> };
> - uint32_t scratch = obj.handle;
> + uint32_t scratch, *s;
> uint32_t batch[16];
> int i;
>
> gem_require_ring(i915, ring);
> igt_require(gem_can_store_dword(i915, ring));
>
> + scratch = gem_create(i915, 4096);
> + s = gem_mmap__cpu(i915, scratch, 0, 4096, PROT_WRITE);
> +
> + gem_set_domain(i915, scratch, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU);
> + *s = MI_BATCH_BUFFER_END;
> +
> /* Load object into place in the GTT */
> - gem_write(i915, obj.handle, 0, &bbe, sizeof(bbe));
> + obj.handle = scratch;
> gem_execbuf(i915, &execbuf);
>
> - /* Presume nothing causes an eviction in the meantime */
> + /* Presume nothing causes an eviction in the meantime! */
>
> obj.handle = gem_create(i915, 4096);
>
> @@ -235,10 +238,19 @@ static void exec_shared_gtt(int i915, unsigned int ring)
> gem_sync(i915, obj.handle); /* write hazard lies */
> gem_close(i915, obj.handle);
>
> - gem_read(i915, scratch, 0, batch, sizeof(uint32_t));
> - gem_close(i915, scratch);
> + /*
> + * If we created the new context with the old GTT, the write
> + * into the stale location of scratch will have landed in the right
> + * object. Otherwise, it should read the previous value of
> + * MI_BATCH_BUFFER_END.
> + *
> + * Setting .write = CPU to paper over our write hazard lies above.
> + */
> + gem_set_domain(i915, scratch, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU);
> + igt_assert_eq_u32(*s, 0xc0ffee);
>
> - igt_assert_eq_u32(*batch, 0xc0ffee);
> + munmap(s, 4096);
> + gem_close(i915, scratch);
> }
>
> static int nop_sync(int i915, uint32_t ctx, unsigned int ring, int64_t timeout)
> --
> 2.20.1
>
> _______________________________________________
> igt-dev mailing list
> igt-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/igt-dev
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2019-06-14 13:18 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-06-11 8:17 [PATCH i-g-t] i915/gem_ctx_shared: Prefer explicit domain control Chris Wilson
2019-06-11 8:17 ` [Intel-gfx] " Chris Wilson
2019-06-11 8:50 ` [igt-dev] ✓ Fi.CI.BAT: success for " Patchwork
2019-06-12 10:35 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
2019-06-14 13:18 ` [igt-dev] [PATCH i-g-t] " Mika Kuoppala
2019-06-14 13:18 ` [Intel-gfx] " Mika Kuoppala
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