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From: Anup Patel <Anup.Patel@wdc.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v3 3/5] clk: sifive: Sync-up DT bindings header with upstream Linux
Date: Wed, 19 Jun 2019 07:01:37 +0000	[thread overview]
Message-ID: <20190619070037.11730-4-anup.patel@wdc.com> (raw)
In-Reply-To: <20190619070037.11730-1-anup.patel@wdc.com>

The location and license header of DT bindings header for SiFive
clock driver has changed in upstream Linux hence this patch.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 drivers/clk/sifive/fu540-prci.c               |  2 +-
 include/dt-bindings/clk/sifive-fu540-prci.h   | 29 -------------------
 include/dt-bindings/clock/sifive-fu540-prci.h | 18 ++++++++++++
 3 files changed, 19 insertions(+), 30 deletions(-)
 delete mode 100644 include/dt-bindings/clk/sifive-fu540-prci.h
 create mode 100644 include/dt-bindings/clock/sifive-fu540-prci.h

diff --git a/drivers/clk/sifive/fu540-prci.c b/drivers/clk/sifive/fu540-prci.c
index cdbf35e871..ceb318e062 100644
--- a/drivers/clk/sifive/fu540-prci.c
+++ b/drivers/clk/sifive/fu540-prci.c
@@ -38,7 +38,7 @@
 
 #include <linux/math64.h>
 #include <linux/clk/analogbits-wrpll-cln28hpc.h>
-#include <dt-bindings/clk/sifive-fu540-prci.h>
+#include <dt-bindings/clock/sifive-fu540-prci.h>
 
 /*
  * EXPECTED_CLK_PARENT_COUNT: how many parent clocks this driver expects:
diff --git a/include/dt-bindings/clk/sifive-fu540-prci.h b/include/dt-bindings/clk/sifive-fu540-prci.h
deleted file mode 100644
index 531523ea62..0000000000
--- a/include/dt-bindings/clk/sifive-fu540-prci.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (c) 2019 Western Digital Corporation or its affiliates.
- *
- * Copyright (C) 2018 SiFive, Inc.
- * Wesley Terpstra
- * Paul Walmsley
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef __LINUX_CLK_SIFIVE_FU540_PRCI_H
-#define __LINUX_CLK_SIFIVE_FU540_PRCI_H
-
-/* Clock indexes for use by Device Tree data */
-
-#define PRCI_CLK_COREPLL		0
-#define PRCI_CLK_DDRPLL			1
-#define PRCI_CLK_GEMGXLPLL		2
-#define PRCI_CLK_TLCLK			3
-
-#endif
diff --git a/include/dt-bindings/clock/sifive-fu540-prci.h b/include/dt-bindings/clock/sifive-fu540-prci.h
new file mode 100644
index 0000000000..6a0b70a37d
--- /dev/null
+++ b/include/dt-bindings/clock/sifive-fu540-prci.h
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2018-2019 SiFive, Inc.
+ * Wesley Terpstra
+ * Paul Walmsley
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_SIFIVE_FU540_PRCI_H
+#define __DT_BINDINGS_CLOCK_SIFIVE_FU540_PRCI_H
+
+/* Clock indexes for use by Device Tree data and the PRCI driver */
+
+#define PRCI_CLK_COREPLL	       0
+#define PRCI_CLK_DDRPLL		       1
+#define PRCI_CLK_GEMGXLPLL	       2
+#define PRCI_CLK_TLCLK		       3
+
+#endif
-- 
2.17.1

  parent reply	other threads:[~2019-06-19  7:01 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-06-19  7:01 [U-Boot] [PATCH v3 0/5] Update SiFive Unleashed Drivers Anup Patel
2019-06-19  7:01 ` [U-Boot] [PATCH v3 1/5] clk: sifive: Factor-out PLL library as separate module Anup Patel
2019-06-19  7:01 ` [U-Boot] [PATCH v3 2/5] clk: sifive: Sync-up WRPLL library with upstream Linux Anup Patel
2019-06-19  7:01 ` Anup Patel [this message]
2019-06-19  7:01 ` [U-Boot] [PATCH v3 4/5] clk: sifive: Sync-up main driver " Anup Patel
2019-06-19  7:01 ` [U-Boot] [PATCH v3 5/5] clk: sifive: Drop GEMGXL clock driver Anup Patel
2019-06-19  7:03 ` [U-Boot] [PATCH v3 0/5] Update SiFive Unleashed Drivers Bin Meng
2019-06-19  8:24   ` Anup Patel

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