* [U-Boot] [PATCH 01/13] powerpc: Enable device tree support for T2080RDB
2019-06-20 8:19 [U-Boot] [PATCH 00/13] powerpc: Enable device tree support Z.q. Hou
@ 2019-06-20 8:19 ` Z.q. Hou
2019-06-20 8:19 ` [U-Boot] [PATCH 02/13] powerpc: Enable device tree support for T4240RDB Z.q. Hou
` (12 subsequent siblings)
13 siblings, 0 replies; 19+ messages in thread
From: Z.q. Hou @ 2019-06-20 8:19 UTC (permalink / raw)
To: u-boot
From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Add device tree for T2080RDB board and enable CONFIG_OF_CONTROL
so that device tree can be compiled.
Update board README for device tree usage.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
arch/powerpc/dts/Makefile | 1 +
arch/powerpc/dts/t2080rdb.dts | 17 +++++++++++++++++
board/freescale/t208xrdb/README | 19 +++++++++++++++++++
configs/T2080RDB_NAND_defconfig | 2 ++
configs/T2080RDB_SDCARD_defconfig | 2 ++
configs/T2080RDB_SPIFLASH_defconfig | 2 ++
configs/T2080RDB_defconfig | 3 +++
7 files changed, 46 insertions(+)
create mode 100644 arch/powerpc/dts/t2080rdb.dts
diff --git a/arch/powerpc/dts/Makefile b/arch/powerpc/dts/Makefile
index 6a28f802c2..388a4b2739 100644
--- a/arch/powerpc/dts/Makefile
+++ b/arch/powerpc/dts/Makefile
@@ -1,6 +1,7 @@
# SPDX-License-Identifier: GPL-2.0+
dtb-$(CONFIG_TARGET_T2080QDS) += t2080qds.dtb
+dtb-$(CONFIG_TARGET_T2080RDB) += t2080rdb.dtb
dtb-$(CONFIG_TARGET_MCR3000) += mcr3000.dtb
dtb-$(CONFIG_TARGET_GAZERBEAM) += gazerbeam.dtb
diff --git a/arch/powerpc/dts/t2080rdb.dts b/arch/powerpc/dts/t2080rdb.dts
new file mode 100644
index 0000000000..49c1765b29
--- /dev/null
+++ b/arch/powerpc/dts/t2080rdb.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * T2080RDB Device Tree Source
+ *
+ * Copyright 2013 - 2015 Freescale Semiconductor Inc.
+ * Copyright 2019 NXP
+ */
+
+/include/ "t2080.dtsi"
+
+/ {
+ model = "fsl,T2080RDB";
+ compatible = "fsl,T2080RDB";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ interrupt-parent = <&mpic>;
+};
diff --git a/board/freescale/t208xrdb/README b/board/freescale/t208xrdb/README
index 42b2b92396..9e4b28faf4 100644
--- a/board/freescale/t208xrdb/README
+++ b/board/freescale/t208xrdb/README
@@ -262,3 +262,22 @@ How to update the ucode of Freescale FMAN
For more details, please refer to T2080PCIe-RDB User Guide and access
website www.freescale.com and Freescale QorIQ SDK Infocenter document.
+
+Device tree support and how to enable it for different configs
+--------------------------------------------------------------
+Device tree support is available for t2080rdb for below mentioned boot,
+1. NOR Boot
+2. NAND Boot
+3. SD Boot
+4. SPIFLASH Boot
+
+To enable device tree support for other boot, below configs need to be
+enabled in relative defconfig file,
+1. CONFIG_DEFAULT_DEVICE_TREE="t2080rdb" (Change default device tree name if required)
+2. CONFIG_OF_CONTROL
+3. CONFIG_MPC85XX_HAVE_RESET_VECTOR if reset vector is located at
+ CONFIG_RESET_VECTOR_ADDRESS - 0xffc
+
+If device tree support is enabled in defconfig,
+1. use 'u-boot-with-dtb.bin' for NOR boot.
+2. use 'u-boot-with-spl-pbl.bin' for other boot.
diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig
index 1bb90f390d..7eb7058a84 100644
--- a/configs/T2080RDB_NAND_defconfig
+++ b/configs/T2080RDB_NAND_defconfig
@@ -10,10 +10,12 @@ CONFIG_TARGET_T2080RDB=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_CONTROL=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_DEFAULT_DEVICE_TREE="t2080rdb"
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL_ENV_SUPPORT=y
diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig
index 1a7070c816..9ea6698f71 100644
--- a/configs/T2080RDB_SDCARD_defconfig
+++ b/configs/T2080RDB_SDCARD_defconfig
@@ -11,6 +11,8 @@ CONFIG_TARGET_T2080RDB=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="t2080rdb"
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
CONFIG_BOOTDELAY=10
diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig
index ceb0230f93..988897b536 100644
--- a/configs/T2080RDB_SPIFLASH_defconfig
+++ b/configs/T2080RDB_SPIFLASH_defconfig
@@ -13,6 +13,8 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="t2080rdb"
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_R=y
diff --git a/configs/T2080RDB_defconfig b/configs/T2080RDB_defconfig
index e782ba0997..3f7e282c85 100644
--- a/configs/T2080RDB_defconfig
+++ b/configs/T2080RDB_defconfig
@@ -2,9 +2,11 @@ CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xEFF40000
CONFIG_MPC85xx=y
CONFIG_TARGET_T2080RDB=y
+CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_CONTROL=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_R=y
@@ -26,6 +28,7 @@ CONFIG_CMD_MTDPARTS=y
CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.1"
CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);spife110000.1:1m(uboot),5m(kernel),128k(dtb),-(user)"
# CONFIG_CMD_IRQ is not set
+CONFIG_DEFAULT_DEVICE_TREE="t2080rdb"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_FSL_CAAM=y
CONFIG_FSL_ESDHC=y
--
2.17.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [U-Boot] [PATCH 02/13] powerpc: Enable device tree support for T4240RDB
2019-06-20 8:19 [U-Boot] [PATCH 00/13] powerpc: Enable device tree support Z.q. Hou
2019-06-20 8:19 ` [U-Boot] [PATCH 01/13] powerpc: Enable device tree support for T2080RDB Z.q. Hou
@ 2019-06-20 8:19 ` Z.q. Hou
2019-06-20 8:19 ` [U-Boot] [PATCH 03/13] powerpc: Enable device tree support for T1024RDB Z.q. Hou
` (11 subsequent siblings)
13 siblings, 0 replies; 19+ messages in thread
From: Z.q. Hou @ 2019-06-20 8:19 UTC (permalink / raw)
To: u-boot
From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Add device tree for T4240RDB board and enable CONFIG_OF_CONTROL
so that device tree can be compiled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
arch/powerpc/dts/Makefile | 1 +
arch/powerpc/dts/t4240.dtsi | 102 ++++++++++++++++++++++++++++++
arch/powerpc/dts/t4240rdb.dts | 17 +++++
configs/T4240RDB_SDCARD_defconfig | 2 +
configs/T4240RDB_defconfig | 3 +
5 files changed, 125 insertions(+)
create mode 100644 arch/powerpc/dts/t4240.dtsi
create mode 100644 arch/powerpc/dts/t4240rdb.dts
diff --git a/arch/powerpc/dts/Makefile b/arch/powerpc/dts/Makefile
index 388a4b2739..90023936bf 100644
--- a/arch/powerpc/dts/Makefile
+++ b/arch/powerpc/dts/Makefile
@@ -2,6 +2,7 @@
dtb-$(CONFIG_TARGET_T2080QDS) += t2080qds.dtb
dtb-$(CONFIG_TARGET_T2080RDB) += t2080rdb.dtb
+dtb-$(CONFIG_TARGET_T4240RDB) += t4240rdb.dtb
dtb-$(CONFIG_TARGET_MCR3000) += mcr3000.dtb
dtb-$(CONFIG_TARGET_GAZERBEAM) += gazerbeam.dtb
diff --git a/arch/powerpc/dts/t4240.dtsi b/arch/powerpc/dts/t4240.dtsi
new file mode 100644
index 0000000000..4d8fc7192e
--- /dev/null
+++ b/arch/powerpc/dts/t4240.dtsi
@@ -0,0 +1,102 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * T4240 Silicon/SoC Device Tree Source (pre include)
+ *
+ * Copyright 2013 Freescale Semiconductor Inc.
+ * Copyright 2019 NXP
+ */
+
+/dts-v1/;
+
+/include/ "e6500_power_isa.dtsi"
+
+/ {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ interrupt-parent = <&mpic>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu0: PowerPC,e6500 at 0 {
+ device_type = "cpu";
+ reg = <0 1>;
+ fsl,portid-mapping = <0x80000000>;
+ };
+ cpu1: PowerPC,e6500 at 2 {
+ device_type = "cpu";
+ reg = <2 3>;
+ fsl,portid-mapping = <0x80000000>;
+ };
+ cpu2: PowerPC,e6500 at 4 {
+ device_type = "cpu";
+ reg = <4 5>;
+ fsl,portid-mapping = <0x80000000>;
+ };
+ cpu3: PowerPC,e6500 at 6 {
+ device_type = "cpu";
+ reg = <6 7>;
+ fsl,portid-mapping = <0x80000000>;
+ };
+ cpu4: PowerPC,e6500 at 8 {
+ device_type = "cpu";
+ reg = <8 9>;
+ fsl,portid-mapping = <0x80000000>;
+ };
+ cpu5: PowerPC,e6500 at 10 {
+ device_type = "cpu";
+ reg = <10 11>;
+ fsl,portid-mapping = <0x80000000>;
+ };
+ cpu6: PowerPC,e6500 at 12 {
+ device_type = "cpu";
+ reg = <12 13>;
+ fsl,portid-mapping = <0x80000000>;
+ };
+ cpu7: PowerPC,e6500 at 14 {
+ device_type = "cpu";
+ reg = <14 15>;
+ fsl,portid-mapping = <0x80000000>;
+ };
+ cpu8: PowerPC,e6500 at 16 {
+ device_type = "cpu";
+ reg = <16 17>;
+ fsl,portid-mapping = <0x80000000>;
+ };
+ cpu9: PowerPC,e6500 at 18 {
+ device_type = "cpu";
+ reg = <18 19>;
+ fsl,portid-mapping = <0x80000000>;
+ };
+ cpu10: PowerPC,e6500 at 20 {
+ device_type = "cpu";
+ reg = <20 21>;
+ fsl,portid-mapping = <0x80000000>;
+ };
+ cpu11: PowerPC,e6500 at 22 {
+ device_type = "cpu";
+ reg = <22 23>;
+ fsl,portid-mapping = <0x80000000>;
+ };
+ };
+
+ soc: soc at ffe000000 {
+ ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
+ reg = <0xf 0xfe000000 0 0x00001000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ device_type = "soc";
+ compatible = "simple-bus";
+
+ mpic: pic at 40000 {
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <4>;
+ reg = <0x40000 0x40000>;
+ compatible = "fsl,mpic";
+ device_type = "open-pic";
+ clock-frequency = <0x0>;
+ };
+ };
+};
diff --git a/arch/powerpc/dts/t4240rdb.dts b/arch/powerpc/dts/t4240rdb.dts
new file mode 100644
index 0000000000..f67d7ce2ae
--- /dev/null
+++ b/arch/powerpc/dts/t4240rdb.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * T4240RDB Device Tree Source
+ *
+ * Copyright 2013 - 2015 Freescale Semiconductor Inc.
+ * Copyright 2019 NXP
+ */
+
+/include/ "t4240.dtsi"
+
+/ {
+ model = "fsl,T4240RDB";
+ compatible = "fsl,T4240RDB";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ interrupt-parent = <&mpic>;
+};
diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig
index eeab2ec720..a70c237c89 100644
--- a/configs/T4240RDB_SDCARD_defconfig
+++ b/configs/T4240RDB_SDCARD_defconfig
@@ -33,6 +33,8 @@ CONFIG_CMD_PING=y
CONFIG_MP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
+CONFIG_DEFAULT_DEVICE_TREE="t4240rdb"
+CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_FSL_CAAM=y
CONFIG_FSL_ESDHC=y
diff --git a/configs/T4240RDB_defconfig b/configs/T4240RDB_defconfig
index ef26e7cd69..d4ce1766ee 100644
--- a/configs/T4240RDB_defconfig
+++ b/configs/T4240RDB_defconfig
@@ -1,6 +1,7 @@
CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xEFF40000
CONFIG_MPC85xx=y
+CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_TARGET_T4240RDB=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
@@ -21,6 +22,8 @@ CONFIG_CMD_PING=y
CONFIG_MP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
+CONFIG_DEFAULT_DEVICE_TREE="t4240rdb"
+CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_FSL_CAAM=y
CONFIG_FSL_ESDHC=y
--
2.17.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [U-Boot] [PATCH 03/13] powerpc: Enable device tree support for T1024RDB
2019-06-20 8:19 [U-Boot] [PATCH 00/13] powerpc: Enable device tree support Z.q. Hou
2019-06-20 8:19 ` [U-Boot] [PATCH 01/13] powerpc: Enable device tree support for T2080RDB Z.q. Hou
2019-06-20 8:19 ` [U-Boot] [PATCH 02/13] powerpc: Enable device tree support for T4240RDB Z.q. Hou
@ 2019-06-20 8:19 ` Z.q. Hou
2019-06-20 8:19 ` [U-Boot] [PATCH 04/13] powerpc: Enable device tree support for T1042D4RDB Z.q. Hou
` (10 subsequent siblings)
13 siblings, 0 replies; 19+ messages in thread
From: Z.q. Hou @ 2019-06-20 8:19 UTC (permalink / raw)
To: u-boot
From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Add device tree for T1024RDB board and enable CONFIG_OF_CONTROL
so that device tree can be compiled.
Update board README for device tree usage.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
arch/powerpc/dts/Makefile | 1 +
arch/powerpc/dts/e5500_power_isa.dtsi | 34 ++++++++++++++++++
arch/powerpc/dts/t1024rdb.dts | 17 +++++++++
arch/powerpc/dts/t102x.dtsi | 52 +++++++++++++++++++++++++++
board/freescale/t102xrdb/README | 19 ++++++++++
configs/T1024RDB_NAND_defconfig | 2 ++
configs/T1024RDB_SDCARD_defconfig | 2 ++
configs/T1024RDB_SPIFLASH_defconfig | 2 ++
configs/T1024RDB_defconfig | 3 ++
9 files changed, 132 insertions(+)
create mode 100644 arch/powerpc/dts/e5500_power_isa.dtsi
create mode 100644 arch/powerpc/dts/t1024rdb.dts
create mode 100644 arch/powerpc/dts/t102x.dtsi
diff --git a/arch/powerpc/dts/Makefile b/arch/powerpc/dts/Makefile
index 90023936bf..b7acba54e4 100644
--- a/arch/powerpc/dts/Makefile
+++ b/arch/powerpc/dts/Makefile
@@ -1,5 +1,6 @@
# SPDX-License-Identifier: GPL-2.0+
+dtb-$(CONFIG_TARGET_T1024RDB) += t1024rdb.dtb
dtb-$(CONFIG_TARGET_T2080QDS) += t2080qds.dtb
dtb-$(CONFIG_TARGET_T2080RDB) += t2080rdb.dtb
dtb-$(CONFIG_TARGET_T4240RDB) += t4240rdb.dtb
diff --git a/arch/powerpc/dts/e5500_power_isa.dtsi b/arch/powerpc/dts/e5500_power_isa.dtsi
new file mode 100644
index 0000000000..0a0943b0bb
--- /dev/null
+++ b/arch/powerpc/dts/e5500_power_isa.dtsi
@@ -0,0 +1,34 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * e5500 Power ISA Device Tree Source (include)
+ *
+ * Copyright 2012 Freescale Semiconductor Inc.
+ * Copyright 2019 NXP
+ */
+
+/ {
+ cpus {
+ power-isa-version = "2.06";
+ power-isa-b; // Base
+ power-isa-e; // Embedded
+ power-isa-atb; // Alternate Time Base
+ power-isa-cs; // Cache Specification
+ power-isa-ds; // Decorated Storage
+ power-isa-e.ed; // Embedded.Enhanced Debug
+ power-isa-e.pd; // Embedded.External PID
+ power-isa-e.hv; // Embedded.Hypervisor
+ power-isa-e.le; // Embedded.Little-Endian
+ power-isa-e.pm; // Embedded.Performance Monitor
+ power-isa-e.pc; // Embedded.Processor Control
+ power-isa-ecl; // Embedded Cache Locking
+ power-isa-exp; // External Proxy
+ power-isa-fp; // Floating Point
+ power-isa-fp.r; // Floating Point.Record
+ power-isa-mmc; // Memory Coherence
+ power-isa-scpm; // Store Conditional Page Mobility
+ power-isa-wt; // Wait
+ power-isa-64; // 64-bit
+ fsl,eref-deo; // Data Cache Extended Operations
+ mmu-type = "power-embedded";
+ };
+};
diff --git a/arch/powerpc/dts/t1024rdb.dts b/arch/powerpc/dts/t1024rdb.dts
new file mode 100644
index 0000000000..19a6652a23
--- /dev/null
+++ b/arch/powerpc/dts/t1024rdb.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * T1024RDB Device Tree Source
+ *
+ * Copyright 2013 - 2015 Freescale Semiconductor Inc.
+ * Copyright 2019 NXP
+ */
+
+/include/ "t102x.dtsi"
+
+/ {
+ model = "fsl,T1024RDB";
+ compatible = "fsl,T1024RDB";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ interrupt-parent = <&mpic>;
+};
diff --git a/arch/powerpc/dts/t102x.dtsi b/arch/powerpc/dts/t102x.dtsi
new file mode 100644
index 0000000000..2393e316f8
--- /dev/null
+++ b/arch/powerpc/dts/t102x.dtsi
@@ -0,0 +1,52 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * T102X Silicon/SoC Device Tree Source (pre include)
+ *
+ * Copyright 2013 Freescale Semiconductor Inc.
+ * Copyright 2019 NXP
+ */
+
+/dts-v1/;
+
+/include/ "e5500_power_isa.dtsi"
+
+/ {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ interrupt-parent = <&mpic>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu0: PowerPC,e5500 at 0 {
+ device_type = "cpu";
+ reg = <0>;
+ #cooling-cells = <2>;
+ };
+ cpu1: PowerPC,e5500 at 1 {
+ device_type = "cpu";
+ reg = <1>;
+ #cooling-cells = <2>;
+ };
+ };
+
+ soc: soc at ffe000000 {
+ ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
+ reg = <0xf 0xfe000000 0 0x00001000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ device_type = "soc";
+ compatible = "simple-bus";
+
+ mpic: pic at 40000 {
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <4>;
+ reg = <0x40000 0x40000>;
+ compatible = "fsl,mpic", "chrp,open-pic";
+ device_type = "open-pic";
+ clock-frequency = <0x0>;
+ };
+ };
+};
diff --git a/board/freescale/t102xrdb/README b/board/freescale/t102xrdb/README
index a0af25a432..dde3f8ca37 100644
--- a/board/freescale/t102xrdb/README
+++ b/board/freescale/t102xrdb/README
@@ -251,6 +251,25 @@ Software configurations and board settings
SW3[3] = '0' for eMMC (or 'switch emmc' by software)
+device tree support and how to enable it for different configs
+--------------------------------------------------------------
+device tree support is available for t1024rdb for below mentioned boot,
+1. nor boot
+2. nand boot
+3. sd boot
+4. spiflash boot
+
+to enable device tree support for other boot, below configs need to be
+enabled in relative defconfig file,
+1. config_default_device_tree="t1024rdb" (change default device tree name if required)
+2. config_of_control
+3. config_mpc85xx_have_reset_vector if reset vector is located at
+ config_reset_vector_address - 0xffc
+
+if device tree support is enabled in defconfig,
+1. use 'u-boot-with-dtb.bin' for nor boot.
+2. use 'u-boot-with-spl-pbl.bin' for other boot.
+
2-stage NAND/SPI/SD boot loader
-------------------------------
PBL initializes the internal CPC-SRAM and copy SPL(160K) to SRAM.
diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig
index ea00def211..30acd0ed4f 100644
--- a/configs/T1024RDB_NAND_defconfig
+++ b/configs/T1024RDB_NAND_defconfig
@@ -7,6 +7,8 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T1024RDB=y
+CONFIG_DEFAULT_DEVICE_TREE="t1024rdb"
+CONFIG_OF_CONTROL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig
index 6b966b60d7..7569e4e813 100644
--- a/configs/T1024RDB_SDCARD_defconfig
+++ b/configs/T1024RDB_SDCARD_defconfig
@@ -8,6 +8,8 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T1024RDB=y
+CONFIG_DEFAULT_DEVICE_TREE="t1024rdb"
+CONFIG_OF_CONTROL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig
index 59e1e77db4..470674b6de 100644
--- a/configs/T1024RDB_SPIFLASH_defconfig
+++ b/configs/T1024RDB_SPIFLASH_defconfig
@@ -9,6 +9,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T1024RDB=y
+CONFIG_DEFAULT_DEVICE_TREE="t1024rdb"
+CONFIG_OF_CONTROL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
diff --git a/configs/T1024RDB_defconfig b/configs/T1024RDB_defconfig
index 683a61978f..146551d15b 100644
--- a/configs/T1024RDB_defconfig
+++ b/configs/T1024RDB_defconfig
@@ -1,6 +1,7 @@
CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xEFF40000
CONFIG_MPC85xx=y
+CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_TARGET_T1024RDB=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
@@ -29,6 +30,8 @@ CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.1"
CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);spife110000.0:1m(uboot),5m(kernel),128k(dtb),-(user)"
+CONFIG_DEFAULT_DEVICE_TREE="t1024rdb"
+CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_FSL_CAAM=y
CONFIG_SYS_FSL_DDR3=y
--
2.17.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [U-Boot] [PATCH 04/13] powerpc: Enable device tree support for T1042D4RDB
2019-06-20 8:19 [U-Boot] [PATCH 00/13] powerpc: Enable device tree support Z.q. Hou
` (2 preceding siblings ...)
2019-06-20 8:19 ` [U-Boot] [PATCH 03/13] powerpc: Enable device tree support for T1024RDB Z.q. Hou
@ 2019-06-20 8:19 ` Z.q. Hou
2019-06-20 8:19 ` [U-Boot] [PATCH 05/13] powerpc: Enable device tree support for P1020RDB Z.q. Hou
` (9 subsequent siblings)
13 siblings, 0 replies; 19+ messages in thread
From: Z.q. Hou @ 2019-06-20 8:19 UTC (permalink / raw)
To: u-boot
From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Add device tree for T1042D4RDB board and enable CONFIG_OF_CONTROL
so that device tree can be compiled.
Update board README for device tree usage.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
arch/powerpc/dts/Makefile | 1 +
arch/powerpc/dts/t1042d4rdb.dts | 17 ++++++++
arch/powerpc/dts/t104x.dtsi | 62 +++++++++++++++++++++++++++
board/freescale/t104xrdb/README | 19 ++++++++
configs/T1042D4RDB_NAND_defconfig | 2 +
configs/T1042D4RDB_SDCARD_defconfig | 2 +
configs/T1042D4RDB_SPIFLASH_defconfig | 2 +
configs/T1042D4RDB_defconfig | 3 ++
8 files changed, 108 insertions(+)
create mode 100644 arch/powerpc/dts/t1042d4rdb.dts
create mode 100644 arch/powerpc/dts/t104x.dtsi
diff --git a/arch/powerpc/dts/Makefile b/arch/powerpc/dts/Makefile
index b7acba54e4..f0d49aa31c 100644
--- a/arch/powerpc/dts/Makefile
+++ b/arch/powerpc/dts/Makefile
@@ -1,6 +1,7 @@
# SPDX-License-Identifier: GPL-2.0+
dtb-$(CONFIG_TARGET_T1024RDB) += t1024rdb.dtb
+dtb-$(CONFIG_TARGET_T1042D4RDB) += t1042d4rdb.dtb
dtb-$(CONFIG_TARGET_T2080QDS) += t2080qds.dtb
dtb-$(CONFIG_TARGET_T2080RDB) += t2080rdb.dtb
dtb-$(CONFIG_TARGET_T4240RDB) += t4240rdb.dtb
diff --git a/arch/powerpc/dts/t1042d4rdb.dts b/arch/powerpc/dts/t1042d4rdb.dts
new file mode 100644
index 0000000000..16a8ed4c79
--- /dev/null
+++ b/arch/powerpc/dts/t1042d4rdb.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * T1042D4RDB Device Tree Source
+ *
+ * Copyright 2013 - 2015 Freescale Semiconductor Inc.
+ * Copyright 2019 NXP
+ */
+
+/include/ "t104x.dtsi"
+
+/ {
+ model = "fsl,T1042D4RDB";
+ compatible = "fsl,T1042D4RDB";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ interrupt-parent = <&mpic>;
+};
diff --git a/arch/powerpc/dts/t104x.dtsi b/arch/powerpc/dts/t104x.dtsi
new file mode 100644
index 0000000000..ff0da9397e
--- /dev/null
+++ b/arch/powerpc/dts/t104x.dtsi
@@ -0,0 +1,62 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * T104X Silicon/SoC Device Tree Source (pre include)
+ *
+ * Copyright 2013 Freescale Semiconductor Inc.
+ * Copyright 2019 NXP
+ */
+
+/dts-v1/;
+
+/include/ "e5500_power_isa.dtsi"
+
+/ {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ interrupt-parent = <&mpic>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu0: PowerPC,e5500 at 0 {
+ device_type = "cpu";
+ reg = <0>;
+ #cooling-cells = <2>;
+ };
+ cpu1: PowerPC,e5500 at 1 {
+ device_type = "cpu";
+ reg = <1>;
+ #cooling-cells = <2>;
+ };
+ cpu2: PowerPC,e5500 at 2 {
+ device_type = "cpu";
+ reg = <2>;
+ #cooling-cells = <2>;
+ };
+ cpu3: PowerPC,e5500 at 3 {
+ device_type = "cpu";
+ reg = <3>;
+ #cooling-cells = <2>;
+ };
+ };
+
+ soc: soc at ffe000000 {
+ ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
+ reg = <0xf 0xfe000000 0 0x00001000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ device_type = "soc";
+ compatible = "simple-bus";
+
+ mpic: pic at 40000 {
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <4>;
+ reg = <0x40000 0x40000>;
+ compatible = "fsl,mpic", "chrp,open-pic";
+ device_type = "open-pic";
+ clock-frequency = <0x0>;
+ };
+ };
+};
diff --git a/board/freescale/t104xrdb/README b/board/freescale/t104xrdb/README
index 98b3f63db2..09cb98e33d 100644
--- a/board/freescale/t104xrdb/README
+++ b/board/freescale/t104xrdb/README
@@ -365,3 +365,22 @@ to
2. SPI does not support flush so remove flush from pbl, make changes in
tools/pblimage.c file, Update value of pbl_end_cmd[0] = 0x09138000
with 0x091380c0
+
+Device tree support and how to enable it for different configs
+--------------------------------------------------------------
+Device tree support is available for t1042d4rdb for below mentioned boot,
+1. NOR Boot
+2. NAND Boot
+3. SD Boot
+4. SPIFLASH Boot
+
+To enable device tree support for other boot, below configs need to be
+enabled in relative defconfig file,
+1. CONFIG_DEFAULT_DEVICE_TREE="t1042d4rdb" (Change default device tree name if required)
+2. CONFIG_OF_CONTROL
+3. CONFIG_MPC85XX_HAVE_RESET_VECTOR if reset vector is located at
+ CONFIG_RESET_VECTOR_ADDRESS - 0xffc
+
+If device tree support is enabled in defconfig,
+1. use 'u-boot-with-dtb.bin' for NOR boot.
+2. use 'u-boot-with-spl-pbl.bin' for other boot.
diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig
index 9d9e5602a4..2edd3b3ba4 100644
--- a/configs/T1042D4RDB_NAND_defconfig
+++ b/configs/T1042D4RDB_NAND_defconfig
@@ -40,6 +40,8 @@ CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:2m(uboot),9m(kernel),128k(dtb),96m(fs),-(user);spife110000.0:2m(uboot),9m(kernel),128k(dtb),-(user)"
+CONFIG_DEFAULT_DEVICE_TREE="t1042d4rdb"
+CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_FSL_CAAM=y
CONFIG_FSL_ESDHC=y
diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig
index fc3e188b1f..f5a8613ad5 100644
--- a/configs/T1042D4RDB_SDCARD_defconfig
+++ b/configs/T1042D4RDB_SDCARD_defconfig
@@ -40,6 +40,8 @@ CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:2m(uboot),9m(kernel),128k(dtb),96m(fs),-(user);spife110000.0:2m(uboot),9m(kernel),128k(dtb),-(user)"
+CONFIG_DEFAULT_DEVICE_TREE="t1042d4rdb"
+CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_FSL_CAAM=y
CONFIG_FSL_ESDHC=y
diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig
index fdb894304c..945740a2eb 100644
--- a/configs/T1042D4RDB_SPIFLASH_defconfig
+++ b/configs/T1042D4RDB_SPIFLASH_defconfig
@@ -9,6 +9,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T1042D4RDB=y
+CONFIG_DEFAULT_DEVICE_TREE="t1042d4rdb"
+CONFIG_OF_CONTROL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
diff --git a/configs/T1042D4RDB_defconfig b/configs/T1042D4RDB_defconfig
index 466aea2ee6..3be988c6df 100644
--- a/configs/T1042D4RDB_defconfig
+++ b/configs/T1042D4RDB_defconfig
@@ -1,6 +1,7 @@
CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xEFF40000
CONFIG_MPC85xx=y
+CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_TARGET_T1042D4RDB=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
@@ -28,6 +29,8 @@ CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:2m(uboot),9m(kernel),128k(dtb),96m(fs),-(user);spife110000.0:2m(uboot),9m(kernel),128k(dtb),-(user)"
+CONFIG_DEFAULT_DEVICE_TREE="t1042d4rdb"
+CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_FSL_CAAM=y
CONFIG_FSL_ESDHC=y
--
2.17.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [U-Boot] [PATCH 05/13] powerpc: Enable device tree support for P1020RDB
2019-06-20 8:19 [U-Boot] [PATCH 00/13] powerpc: Enable device tree support Z.q. Hou
` (3 preceding siblings ...)
2019-06-20 8:19 ` [U-Boot] [PATCH 04/13] powerpc: Enable device tree support for T1042D4RDB Z.q. Hou
@ 2019-06-20 8:19 ` Z.q. Hou
2019-06-20 8:19 ` [U-Boot] [PATCH 06/13] powerpc: Enable device tree support for P2020RDB Z.q. Hou
` (8 subsequent siblings)
13 siblings, 0 replies; 19+ messages in thread
From: Z.q. Hou @ 2019-06-20 8:19 UTC (permalink / raw)
To: u-boot
From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Add device tree for P1020RDB boards and enable CONFIG_OF_CONTROL
so that device tree can be compiled.
Update board README for device tree usage.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
arch/powerpc/dts/Makefile | 2 ++
arch/powerpc/dts/e500v2_power_isa.dtsi | 26 ++++++++++++++++
arch/powerpc/dts/p1020-post.dtsi | 27 +++++++++++++++++
arch/powerpc/dts/p1020.dtsi | 31 ++++++++++++++++++++
arch/powerpc/dts/p1020rdb-pc.dts | 23 +++++++++++++++
arch/powerpc/dts/p1020rdb-pc_36b.dts | 23 +++++++++++++++
arch/powerpc/dts/p1020rdb-pd.dts | 23 +++++++++++++++
board/freescale/p1_p2_rdb_pc/README | 19 ++++++++++++
configs/P1020RDB-PC_36BIT_NAND_defconfig | 2 ++
configs/P1020RDB-PC_36BIT_SDCARD_defconfig | 2 ++
configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig | 2 ++
configs/P1020RDB-PC_36BIT_defconfig | 3 ++
configs/P1020RDB-PC_NAND_defconfig | 2 ++
configs/P1020RDB-PC_SDCARD_defconfig | 2 ++
configs/P1020RDB-PC_SPIFLASH_defconfig | 2 ++
configs/P1020RDB-PC_defconfig | 3 ++
configs/P1020RDB-PD_NAND_defconfig | 2 ++
configs/P1020RDB-PD_SDCARD_defconfig | 2 ++
configs/P1020RDB-PD_SPIFLASH_defconfig | 2 ++
configs/P1020RDB-PD_defconfig | 3 ++
20 files changed, 201 insertions(+)
create mode 100644 arch/powerpc/dts/e500v2_power_isa.dtsi
create mode 100644 arch/powerpc/dts/p1020-post.dtsi
create mode 100644 arch/powerpc/dts/p1020.dtsi
create mode 100644 arch/powerpc/dts/p1020rdb-pc.dts
create mode 100644 arch/powerpc/dts/p1020rdb-pc_36b.dts
create mode 100644 arch/powerpc/dts/p1020rdb-pd.dts
diff --git a/arch/powerpc/dts/Makefile b/arch/powerpc/dts/Makefile
index f0d49aa31c..3a806bdddf 100644
--- a/arch/powerpc/dts/Makefile
+++ b/arch/powerpc/dts/Makefile
@@ -1,5 +1,7 @@
# SPDX-License-Identifier: GPL-2.0+
+dtb-$(CONFIG_TARGET_P1020RDB_PC) += p1020rdb-pc.dtb p1020rdb-pc_36b.dtb
+dtb-$(CONFIG_TARGET_P1020RDB_PD) += p1020rdb-pd.dtb
dtb-$(CONFIG_TARGET_T1024RDB) += t1024rdb.dtb
dtb-$(CONFIG_TARGET_T1042D4RDB) += t1042d4rdb.dtb
dtb-$(CONFIG_TARGET_T2080QDS) += t2080qds.dtb
diff --git a/arch/powerpc/dts/e500v2_power_isa.dtsi b/arch/powerpc/dts/e500v2_power_isa.dtsi
new file mode 100644
index 0000000000..010e8e5f3f
--- /dev/null
+++ b/arch/powerpc/dts/e500v2_power_isa.dtsi
@@ -0,0 +1,26 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * e500v2 Power ISA Device Tree Source (include)
+ *
+ * Copyright 2012 Freescale Semiconductor Inc.
+ * Copyright 2019 NXP
+ */
+
+/ {
+ cpus {
+ power-isa-version = "2.03";
+ power-isa-b; // Base
+ power-isa-e; // Embedded
+ power-isa-atb; // Alternate Time Base
+ power-isa-cs; // Cache Specification
+ power-isa-e.le; // Embedded.Little-Endian
+ power-isa-e.pm; // Embedded.Performance Monitor
+ power-isa-ecl; // Embedded Cache Locking
+ power-isa-mmc; // Memory Coherence
+ power-isa-sp; // Signal Processing Engine
+ power-isa-sp.fd; // SPE.Embedded Float Scalar Double
+ power-isa-sp.fs; // SPE.Embedded Float Scalar Single
+ power-isa-sp.fv; // SPE.Embedded Float Vector
+ mmu-type = "power-embedded";
+ };
+};
diff --git a/arch/powerpc/dts/p1020-post.dtsi b/arch/powerpc/dts/p1020-post.dtsi
new file mode 100644
index 0000000000..e1a4f500a6
--- /dev/null
+++ b/arch/powerpc/dts/p1020-post.dtsi
@@ -0,0 +1,27 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * P1020 Silicon/SoC Device Tree Source (post include)
+ *
+ * Copyright 2013 Freescale Semiconductor Inc.
+ * Copyright 2019 NXP
+ */
+
+&soc {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ device_type = "soc";
+ compatible = "fsl,p1020-immr", "simple-bus";
+ bus-frequency = <0x0>;
+
+ mpic: pic at 40000 {
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <4>;
+ reg = <0x40000 0x40000>;
+ compatible = "fsl,mpic";
+ device_type = "open-pic";
+ big-endian;
+ single-cpu-affinity;
+ last-interrupt-source = <255>;
+ };
+};
diff --git a/arch/powerpc/dts/p1020.dtsi b/arch/powerpc/dts/p1020.dtsi
new file mode 100644
index 0000000000..ee2b6f4945
--- /dev/null
+++ b/arch/powerpc/dts/p1020.dtsi
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * P1020 Silicon/SoC Device Tree Source (pre include)
+ *
+ * Copyright 2013 Freescale Semiconductor Inc.
+ * Copyright 2019 NXP
+ */
+
+/dts-v1/;
+
+/include/ "e500v2_power_isa.dtsi"
+
+/ {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ interrupt-parent = <&mpic>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu0: PowerPC,P1020 at 0 {
+ device_type = "cpu";
+ reg = <0>;
+ };
+ cpu1: PowerPC,P1020 at 1 {
+ device_type = "cpu";
+ reg = <1>;
+ };
+ };
+};
diff --git a/arch/powerpc/dts/p1020rdb-pc.dts b/arch/powerpc/dts/p1020rdb-pc.dts
new file mode 100644
index 0000000000..fd68b8b440
--- /dev/null
+++ b/arch/powerpc/dts/p1020rdb-pc.dts
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * P1020RDB-PC Device Tree Source
+ *
+ * Copyright 2013 - 2015 Freescale Semiconductor Inc.
+ * Copyright 2019 NXP
+ */
+
+/include/ "p1020.dtsi"
+
+/ {
+ model = "fsl,P1020RDB-PC";
+ compatible = "fsl,P1020RDB-PC";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ interrupt-parent = <&mpic>;
+
+ soc: soc at ffe00000 {
+ ranges = <0x0 0x0 0xffe00000 0x100000>;
+ };
+};
+
+/include/ "p1020-post.dtsi"
diff --git a/arch/powerpc/dts/p1020rdb-pc_36b.dts b/arch/powerpc/dts/p1020rdb-pc_36b.dts
new file mode 100644
index 0000000000..a23d031eee
--- /dev/null
+++ b/arch/powerpc/dts/p1020rdb-pc_36b.dts
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * P1020RDB-PC (36-bit address map) Device Tree Source
+ *
+ * Copyright 2013 - 2015 Freescale Semiconductor Inc.
+ * Copyright 2019 NXP
+ */
+
+/include/ "p1020.dtsi"
+
+/ {
+ model = "fsl,P1020RDB-PC";
+ compatible = "fsl,P1020RDB-PC";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ interrupt-parent = <&mpic>;
+
+ soc: soc at fffe00000 {
+ ranges = <0x0 0xf 0xffe00000 0x100000>;
+ };
+};
+
+/include/ "p1020-post.dtsi"
diff --git a/arch/powerpc/dts/p1020rdb-pd.dts b/arch/powerpc/dts/p1020rdb-pd.dts
new file mode 100644
index 0000000000..81f25a3866
--- /dev/null
+++ b/arch/powerpc/dts/p1020rdb-pd.dts
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * P1020RDB-PD Device Tree Source
+ *
+ * Copyright 2013 - 2015 Freescale Semiconductor Inc.
+ * Copyright 2019 NXP
+ */
+
+/include/ "p1020.dtsi"
+
+/ {
+ model = "fsl,P1020RDB-PD";
+ compatible = "fsl,P1020RDB-PD";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ interrupt-parent = <&mpic>;
+
+ soc: soc at ffe00000 {
+ ranges = <0x0 0x0 0xffe00000 0x100000>;
+ };
+};
+
+/include/ "p1020-post.dtsi"
diff --git a/board/freescale/p1_p2_rdb_pc/README b/board/freescale/p1_p2_rdb_pc/README
index f4cc43fbfa..26902ded8d 100644
--- a/board/freescale/p1_p2_rdb_pc/README
+++ b/board/freescale/p1_p2_rdb_pc/README
@@ -45,3 +45,22 @@ enable QE-TDM for linux kernel, set "qe;tdm" in hwconfig. Syntax is as below
'setenv hwconfig qe' to enable QE UEC/UART and disable Nor-Flash/CPLD.
'setenv hwconfig 'qe;tdm'' to enalbe QE TDM and disable Nor-Flash/CPLD.
+
+Device tree support and how to enable it for different configs
+--------------------------------------------------------------
+Device tree support is available for p1020rdb for below mentioned boot,
+1. NOR Boot
+2. NAND Boot
+3. SD Boot
+4. SPIFLASH Boot
+
+To enable device tree support for other boot, below configs need to be
+enabled in relative defconfig file,
+1. CONFIG_DEFAULT_DEVICE_TREE="p1020rdb" (Change default device tree name if required)
+2. CONFIG_OF_CONTROL
+3. CONFIG_MPC85XX_HAVE_RESET_VECTOR if reset vector is located at
+ CONFIG_RESET_VECTOR_ADDRESS - 0xffc
+
+If device tree support is enabled in defconfig,
+1. use 'u-boot-with-dtb.bin' for NOR boot.
+2. use 'u-boot-with-spl.bin' for other boot.
diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig
index a1b61f9d7f..8fce49dbcf 100644
--- a/configs/P1020RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig
@@ -7,6 +7,8 @@ CONFIG_SPL=y
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_P1020RDB_PC=y
+CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc_36b"
+CONFIG_OF_CONTROL=y
CONFIG_PHYS_64BIT=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
index c1e4386d00..80a4a0aa24 100644
--- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
+++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
@@ -8,6 +8,8 @@ CONFIG_SPL=y
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_P1020RDB_PC=y
+CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc_36b"
+CONFIG_OF_CONTROL=y
CONFIG_PHYS_64BIT=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
index 4c97d997f5..ee565d470f 100644
--- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
@@ -9,6 +9,8 @@ CONFIG_SPL_SPI_SUPPORT=y
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_P1020RDB_PC=y
+CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc_36b"
+CONFIG_OF_CONTROL=y
CONFIG_PHYS_64BIT=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig
index 8ada9bbf38..7d7c55f28f 100644
--- a/configs/P1020RDB-PC_36BIT_defconfig
+++ b/configs/P1020RDB-PC_36BIT_defconfig
@@ -1,8 +1,11 @@
CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xEFF40000
CONFIG_MPC85xx=y
+CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_P1020RDB_PC=y
+CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc_36b"
+CONFIG_OF_CONTROL=y
CONFIG_PHYS_64BIT=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig
index 409c7c0d81..b7290899e4 100644
--- a/configs/P1020RDB-PC_NAND_defconfig
+++ b/configs/P1020RDB-PC_NAND_defconfig
@@ -7,6 +7,8 @@ CONFIG_SPL=y
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_P1020RDB_PC=y
+CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc"
+CONFIG_OF_CONTROL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig
index 1dd5b69367..4622efdc77 100644
--- a/configs/P1020RDB-PC_SDCARD_defconfig
+++ b/configs/P1020RDB-PC_SDCARD_defconfig
@@ -8,6 +8,8 @@ CONFIG_SPL=y
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_P1020RDB_PC=y
+CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc"
+CONFIG_OF_CONTROL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig
index 5f30b8abae..9cd897f62f 100644
--- a/configs/P1020RDB-PC_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PC_SPIFLASH_defconfig
@@ -9,6 +9,8 @@ CONFIG_SPL_SPI_SUPPORT=y
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_P1020RDB_PC=y
+CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc"
+CONFIG_OF_CONTROL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig
index dec97c4d81..595ff5fa2b 100644
--- a/configs/P1020RDB-PC_defconfig
+++ b/configs/P1020RDB-PC_defconfig
@@ -1,8 +1,11 @@
CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xEFF40000
CONFIG_MPC85xx=y
+CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_P1020RDB_PC=y
+CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc"
+CONFIG_OF_CONTROL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig
index 1d7fa4dac8..b45122dfd3 100644
--- a/configs/P1020RDB-PD_NAND_defconfig
+++ b/configs/P1020RDB-PD_NAND_defconfig
@@ -7,6 +7,8 @@ CONFIG_SPL=y
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_P1020RDB_PD=y
+CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pd"
+CONFIG_OF_CONTROL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig
index 137527b58f..c559879691 100644
--- a/configs/P1020RDB-PD_SDCARD_defconfig
+++ b/configs/P1020RDB-PD_SDCARD_defconfig
@@ -8,6 +8,8 @@ CONFIG_SPL=y
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_P1020RDB_PD=y
+CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pd"
+CONFIG_OF_CONTROL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig
index a822d44b5f..1de88fc831 100644
--- a/configs/P1020RDB-PD_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PD_SPIFLASH_defconfig
@@ -9,6 +9,8 @@ CONFIG_SPL_SPI_SUPPORT=y
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_P1020RDB_PD=y
+CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pd"
+CONFIG_OF_CONTROL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig
index 0f25faf207..096355308c 100644
--- a/configs/P1020RDB-PD_defconfig
+++ b/configs/P1020RDB-PD_defconfig
@@ -2,7 +2,10 @@ CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xEFF40000
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
+CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_TARGET_P1020RDB_PD=y
+CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pd"
+CONFIG_OF_CONTROL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
--
2.17.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [U-Boot] [PATCH 06/13] powerpc: Enable device tree support for P2020RDB
2019-06-20 8:19 [U-Boot] [PATCH 00/13] powerpc: Enable device tree support Z.q. Hou
` (4 preceding siblings ...)
2019-06-20 8:19 ` [U-Boot] [PATCH 05/13] powerpc: Enable device tree support for P1020RDB Z.q. Hou
@ 2019-06-20 8:19 ` Z.q. Hou
2019-06-20 8:19 ` [U-Boot] [PATCH 07/13] powerpc: Enable device tree support for P2041RDB Z.q. Hou
` (7 subsequent siblings)
13 siblings, 0 replies; 19+ messages in thread
From: Z.q. Hou @ 2019-06-20 8:19 UTC (permalink / raw)
To: u-boot
From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Add device tree for P1020RDB boards and enable CONFIG_OF_CONTROL
so that device tree can be compiled.
Update board README for device tree usage.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
arch/powerpc/dts/Makefile | 1 +
arch/powerpc/dts/p2020-post.dtsi | 27 +++++++++++++++++
arch/powerpc/dts/p2020.dtsi | 31 ++++++++++++++++++++
arch/powerpc/dts/p2020rdb-pc.dts | 23 +++++++++++++++
arch/powerpc/dts/p2020rdb-pc_36b.dts | 23 +++++++++++++++
board/freescale/p1_p2_rdb_pc/README | 2 +-
configs/P2020RDB-PC_36BIT_NAND_defconfig | 2 ++
configs/P2020RDB-PC_36BIT_SDCARD_defconfig | 2 ++
configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 2 ++
configs/P2020RDB-PC_36BIT_defconfig | 3 ++
configs/P2020RDB-PC_NAND_defconfig | 2 ++
configs/P2020RDB-PC_SDCARD_defconfig | 2 ++
configs/P2020RDB-PC_SPIFLASH_defconfig | 2 ++
configs/P2020RDB-PC_defconfig | 3 ++
14 files changed, 124 insertions(+), 1 deletion(-)
create mode 100644 arch/powerpc/dts/p2020-post.dtsi
create mode 100644 arch/powerpc/dts/p2020.dtsi
create mode 100644 arch/powerpc/dts/p2020rdb-pc.dts
create mode 100644 arch/powerpc/dts/p2020rdb-pc_36b.dts
diff --git a/arch/powerpc/dts/Makefile b/arch/powerpc/dts/Makefile
index 3a806bdddf..bee1e2d793 100644
--- a/arch/powerpc/dts/Makefile
+++ b/arch/powerpc/dts/Makefile
@@ -2,6 +2,7 @@
dtb-$(CONFIG_TARGET_P1020RDB_PC) += p1020rdb-pc.dtb p1020rdb-pc_36b.dtb
dtb-$(CONFIG_TARGET_P1020RDB_PD) += p1020rdb-pd.dtb
+dtb-$(CONFIG_TARGET_P2020RDB) += p2020rdb-pc.dtb p2020rdb-pc_36b.dtb
dtb-$(CONFIG_TARGET_T1024RDB) += t1024rdb.dtb
dtb-$(CONFIG_TARGET_T1042D4RDB) += t1042d4rdb.dtb
dtb-$(CONFIG_TARGET_T2080QDS) += t2080qds.dtb
diff --git a/arch/powerpc/dts/p2020-post.dtsi b/arch/powerpc/dts/p2020-post.dtsi
new file mode 100644
index 0000000000..f20d1fa20d
--- /dev/null
+++ b/arch/powerpc/dts/p2020-post.dtsi
@@ -0,0 +1,27 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * P2020 Silicon/SoC Device Tree Source (post include)
+ *
+ * Copyright 2013 Freescale Semiconductor Inc.
+ * Copyright 2019 NXP
+ */
+
+&soc {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ device_type = "soc";
+ compatible = "fsl,p2020-immr", "simple-bus";
+ bus-frequency = <0x0>;
+
+ mpic: pic at 40000 {
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <4>;
+ reg = <0x40000 0x40000>;
+ compatible = "fsl,mpic";
+ device_type = "open-pic";
+ big-endian;
+ single-cpu-affinity;
+ last-interrupt-source = <255>;
+ };
+};
diff --git a/arch/powerpc/dts/p2020.dtsi b/arch/powerpc/dts/p2020.dtsi
new file mode 100644
index 0000000000..7c4c2061d4
--- /dev/null
+++ b/arch/powerpc/dts/p2020.dtsi
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * P2020 Silicon/SoC Device Tree Source (pre include)
+ *
+ * Copyright 2013 Freescale Semiconductor Inc.
+ * Copyright 2019 NXP
+ */
+
+/dts-v1/;
+
+/include/ "e500v2_power_isa.dtsi"
+
+/ {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ interrupt-parent = <&mpic>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu0: PowerPC,P2020 at 0 {
+ device_type = "cpu";
+ reg = <0>;
+ };
+ cpu1: PowerPC,P2020 at 1 {
+ device_type = "cpu";
+ reg = <1>;
+ };
+ };
+};
diff --git a/arch/powerpc/dts/p2020rdb-pc.dts b/arch/powerpc/dts/p2020rdb-pc.dts
new file mode 100644
index 0000000000..4800b76c1c
--- /dev/null
+++ b/arch/powerpc/dts/p2020rdb-pc.dts
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * P2020RDB-PC Device Tree Source
+ *
+ * Copyright 2013 - 2015 Freescale Semiconductor Inc.
+ * Copyright 2019 NXP
+ */
+
+/include/ "p2020.dtsi"
+
+/ {
+ model = "fsl,P2020RDB-PC";
+ compatible = "fsl,P2020RDB-PC";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ interrupt-parent = <&mpic>;
+
+ soc: soc at ffe00000 {
+ ranges = <0x0 0x0 0xffe00000 0x100000>;
+ };
+};
+
+/include/ "p2020-post.dtsi"
diff --git a/arch/powerpc/dts/p2020rdb-pc_36b.dts b/arch/powerpc/dts/p2020rdb-pc_36b.dts
new file mode 100644
index 0000000000..8323b90e6d
--- /dev/null
+++ b/arch/powerpc/dts/p2020rdb-pc_36b.dts
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * P2020RDB-PC (36-bit address map) Device Tree Source
+ *
+ * Copyright 2013 - 2015 Freescale Semiconductor Inc.
+ * Copyright 2019 NXP
+ */
+
+/include/ "p2020.dtsi"
+
+/ {
+ model = "fsl,P2020RDB-PC";
+ compatible = "fsl,P2020RDB-PC";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ interrupt-parent = <&mpic>;
+
+ soc: soc at fffe00000 {
+ ranges = <0x0 0xf 0xffe00000 0x100000>;
+ };
+};
+
+/include/ "p2020-post.dtsi"
diff --git a/board/freescale/p1_p2_rdb_pc/README b/board/freescale/p1_p2_rdb_pc/README
index 26902ded8d..b85cf0209e 100644
--- a/board/freescale/p1_p2_rdb_pc/README
+++ b/board/freescale/p1_p2_rdb_pc/README
@@ -48,7 +48,7 @@ enable QE-TDM for linux kernel, set "qe;tdm" in hwconfig. Syntax is as below
Device tree support and how to enable it for different configs
--------------------------------------------------------------
-Device tree support is available for p1020rdb for below mentioned boot,
+Device tree support is available for p1020rdb and p2020rdb for below mentioned boot,
1. NOR Boot
2. NAND Boot
3. SD Boot
diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig
index 4865a0e62d..d8c04e2fe1 100644
--- a/configs/P2020RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig
@@ -7,6 +7,8 @@ CONFIG_SPL=y
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_P2020RDB=y
+CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc_36b"
+CONFIG_OF_CONTROL=y
CONFIG_PHYS_64BIT=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
index 59764df362..7c45996a3f 100644
--- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
+++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
@@ -8,6 +8,8 @@ CONFIG_SPL=y
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_P2020RDB=y
+CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc_36b"
+CONFIG_OF_CONTROL=y
CONFIG_PHYS_64BIT=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
index 664eec0617..5372d98474 100644
--- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
@@ -9,6 +9,8 @@ CONFIG_SPL_SPI_SUPPORT=y
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_P2020RDB=y
+CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc_36b"
+CONFIG_OF_CONTROL=y
CONFIG_PHYS_64BIT=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig
index a9c21fbadb..79f4f3c9ac 100644
--- a/configs/P2020RDB-PC_36BIT_defconfig
+++ b/configs/P2020RDB-PC_36BIT_defconfig
@@ -1,8 +1,11 @@
CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xEFF40000
CONFIG_MPC85xx=y
+CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_P2020RDB=y
+CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc_36b"
+CONFIG_OF_CONTROL=y
CONFIG_PHYS_64BIT=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig
index a5cfd10d0e..2f91691b9f 100644
--- a/configs/P2020RDB-PC_NAND_defconfig
+++ b/configs/P2020RDB-PC_NAND_defconfig
@@ -7,6 +7,8 @@ CONFIG_SPL=y
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_P2020RDB=y
+CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc"
+CONFIG_OF_CONTROL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig
index f8f727ebf7..a5cee06b7b 100644
--- a/configs/P2020RDB-PC_SDCARD_defconfig
+++ b/configs/P2020RDB-PC_SDCARD_defconfig
@@ -8,6 +8,8 @@ CONFIG_SPL=y
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_P2020RDB=y
+CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc"
+CONFIG_OF_CONTROL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig
index 6f18acf16d..a2f9d87637 100644
--- a/configs/P2020RDB-PC_SPIFLASH_defconfig
+++ b/configs/P2020RDB-PC_SPIFLASH_defconfig
@@ -9,6 +9,8 @@ CONFIG_SPL_SPI_SUPPORT=y
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_P2020RDB=y
+CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc"
+CONFIG_OF_CONTROL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig
index 706a27dd1b..40004597d1 100644
--- a/configs/P2020RDB-PC_defconfig
+++ b/configs/P2020RDB-PC_defconfig
@@ -1,8 +1,11 @@
CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xEFF40000
CONFIG_MPC85xx=y
+CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_P2020RDB=y
+CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc"
+CONFIG_OF_CONTROL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
--
2.17.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [U-Boot] [PATCH 07/13] powerpc: Enable device tree support for P2041RDB
2019-06-20 8:19 [U-Boot] [PATCH 00/13] powerpc: Enable device tree support Z.q. Hou
` (5 preceding siblings ...)
2019-06-20 8:19 ` [U-Boot] [PATCH 06/13] powerpc: Enable device tree support for P2020RDB Z.q. Hou
@ 2019-06-20 8:19 ` Z.q. Hou
2019-06-20 8:19 ` [U-Boot] [PATCH 08/13] powerpc: Enable device tree support for P3041DS Z.q. Hou
` (6 subsequent siblings)
13 siblings, 0 replies; 19+ messages in thread
From: Z.q. Hou @ 2019-06-20 8:19 UTC (permalink / raw)
To: u-boot
From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Add device tree for P1041RDB board and enable CONFIG_OF_CONTROL
so that device tree can be compiled.
Update board README for device tree usage.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
arch/powerpc/dts/Makefile | 1 +
arch/powerpc/dts/e500mc_power_isa.dtsi | 33 ++++++++++++++
arch/powerpc/dts/p2041.dtsi | 63 ++++++++++++++++++++++++++
arch/powerpc/dts/p2041rdb.dts | 18 ++++++++
board/freescale/p2041rdb/README | 18 ++++++++
configs/P2041RDB_NAND_defconfig | 3 ++
configs/P2041RDB_SDCARD_defconfig | 3 ++
configs/P2041RDB_SPIFLASH_defconfig | 3 ++
configs/P2041RDB_defconfig | 3 ++
9 files changed, 145 insertions(+)
create mode 100644 arch/powerpc/dts/e500mc_power_isa.dtsi
create mode 100644 arch/powerpc/dts/p2041.dtsi
create mode 100644 arch/powerpc/dts/p2041rdb.dts
diff --git a/arch/powerpc/dts/Makefile b/arch/powerpc/dts/Makefile
index bee1e2d793..3123249bd4 100644
--- a/arch/powerpc/dts/Makefile
+++ b/arch/powerpc/dts/Makefile
@@ -3,6 +3,7 @@
dtb-$(CONFIG_TARGET_P1020RDB_PC) += p1020rdb-pc.dtb p1020rdb-pc_36b.dtb
dtb-$(CONFIG_TARGET_P1020RDB_PD) += p1020rdb-pd.dtb
dtb-$(CONFIG_TARGET_P2020RDB) += p2020rdb-pc.dtb p2020rdb-pc_36b.dtb
+dtb-$(CONFIG_TARGET_P2041RDB) += p2041rdb.dtb
dtb-$(CONFIG_TARGET_T1024RDB) += t1024rdb.dtb
dtb-$(CONFIG_TARGET_T1042D4RDB) += t1042d4rdb.dtb
dtb-$(CONFIG_TARGET_T2080QDS) += t2080qds.dtb
diff --git a/arch/powerpc/dts/e500mc_power_isa.dtsi b/arch/powerpc/dts/e500mc_power_isa.dtsi
new file mode 100644
index 0000000000..e486ae501a
--- /dev/null
+++ b/arch/powerpc/dts/e500mc_power_isa.dtsi
@@ -0,0 +1,33 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * e500mc Power ISA Device Tree Source (include)
+ *
+ * Copyright 2012 Freescale Semiconductor Inc.
+ * Copyright 2019 NXP
+ */
+
+/ {
+ cpus {
+ power-isa-version = "2.06";
+ power-isa-b; // Base
+ power-isa-e; // Embedded
+ power-isa-atb; // Alternate Time Base
+ power-isa-cs; // Cache Specification
+ power-isa-ds; // Decorated Storage
+ power-isa-e.ed; // Embedded.Enhanced Debug
+ power-isa-e.pd; // Embedded.External PID
+ power-isa-e.hv; // Embedded.Hypervisor
+ power-isa-e.le; // Embedded.Little-Endian
+ power-isa-e.pm; // Embedded.Performance Monitor
+ power-isa-e.pc; // Embedded.Processor Control
+ power-isa-ecl; // Embedded Cache Locking
+ power-isa-exp; // External Proxy
+ power-isa-fp; // Floating Point
+ power-isa-fp.r; // Floating Point.Record
+ power-isa-mmc; // Memory Coherence
+ power-isa-scpm; // Store Conditional Page Mobility
+ power-isa-wt; // Wait
+ fsl,eref-deo; // Data Cache Extended Operations
+ mmu-type = "power-embedded";
+ };
+};
diff --git a/arch/powerpc/dts/p2041.dtsi b/arch/powerpc/dts/p2041.dtsi
new file mode 100644
index 0000000000..9aa0422821
--- /dev/null
+++ b/arch/powerpc/dts/p2041.dtsi
@@ -0,0 +1,63 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * P2041 Silicon/SoC Device Tree Source (pre include)
+ *
+ * Copyright 2011 - 2015 Freescale Semiconductor Inc.
+ * Copyright 2019 NXP
+ */
+
+/dts-v1/;
+
+/include/ "e500mc_power_isa.dtsi"
+
+/ {
+ compatible = "fsl,P2041";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ interrupt-parent = <&mpic>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu0: PowerPC,e500mc at 0 {
+ device_type = "cpu";
+ reg = <0>;
+ fsl,portid-mapping = <0x80000000>;
+ };
+ cpu1: PowerPC,e500mc at 1 {
+ device_type = "cpu";
+ reg = <1>;
+ fsl,portid-mapping = <0x40000000>;
+ };
+ cpu2: PowerPC,e500mc at 2 {
+ device_type = "cpu";
+ reg = <2>;
+ fsl,portid-mapping = <0x20000000>;
+ };
+ cpu3: PowerPC,e500mc at 3 {
+ device_type = "cpu";
+ reg = <3>;
+ fsl,portid-mapping = <0x10000000>;
+ };
+ };
+
+ soc: soc at ffe000000 {
+ ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
+ reg = <0xf 0xfe000000 0 0x00001000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ device_type = "soc";
+ compatible = "simple-bus";
+
+ mpic: pic at 40000 {
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <4>;
+ reg = <0x40000 0x40000>;
+ compatible = "fsl,mpic", "chrp,open-pic";
+ device_type = "open-pic";
+ clock-frequency = <0x0>;
+ };
+ };
+};
diff --git a/arch/powerpc/dts/p2041rdb.dts b/arch/powerpc/dts/p2041rdb.dts
new file mode 100644
index 0000000000..6e9d9c058a
--- /dev/null
+++ b/arch/powerpc/dts/p2041rdb.dts
@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * P2041RDB Device Tree Source
+ *
+ * Copyright 2011 - 2015 Freescale Semiconductor Inc.
+ * Copyright 2019 NXP
+ */
+
+/include/ "p2041.dtsi"
+
+/ {
+ model = "fsl,P2041RDB";
+ compatible = "fsl,P2041RDB";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ interrupt-parent = <&mpic>;
+
+};
diff --git a/board/freescale/p2041rdb/README b/board/freescale/p2041rdb/README
index 9b5539fff3..79f77e4961 100644
--- a/board/freescale/p2041rdb/README
+++ b/board/freescale/p2041rdb/README
@@ -85,6 +85,24 @@ Boot from SPI flash
SW1[1-5] = 10100
Note: 1 stands for 'on', 0 stands for 'off'
+Device tree support and how to enable it for different configs
+--------------------------------------------------------------
+Device tree support is available for p2041rdb for below mentioned boot,
+1. NOR Boot
+2. NAND Boot
+3. SD Boot
+4. SPIFLASH Boot
+
+To enable device tree support for other boot, below configs need to be
+enabled in relative defconfig file,
+1. CONFIG_DEFAULT_DEVICE_TREE="p2041rdb" (Change default device tree name if required)
+2. CONFIG_OF_CONTROL
+3. CONFIG_MPC85XX_HAVE_RESET_VECTOR if reset vector is located at
+ CONFIG_RESET_VECTOR_ADDRESS - 0xffc
+
+If device tree support is enabled in defconfig, use 'u-boot-with-dtb.bin'
+instead of u-boot.bin for all boot.
+
CPLD command
============
The CPLD is used to control the power sequence and some serdes lane
diff --git a/configs/P2041RDB_NAND_defconfig b/configs/P2041RDB_NAND_defconfig
index 44966d88f4..73baf49783 100644
--- a/configs/P2041RDB_NAND_defconfig
+++ b/configs/P2041RDB_NAND_defconfig
@@ -1,7 +1,10 @@
CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xFFF40000
CONFIG_MPC85xx=y
+CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_TARGET_P2041RDB=y
+CONFIG_DEFAULT_DEVICE_TREE="p2041rdb"
+CONFIG_OF_CONTROL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
diff --git a/configs/P2041RDB_SDCARD_defconfig b/configs/P2041RDB_SDCARD_defconfig
index 3d558c5784..d75f8b16cc 100644
--- a/configs/P2041RDB_SDCARD_defconfig
+++ b/configs/P2041RDB_SDCARD_defconfig
@@ -1,7 +1,10 @@
CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xFFF40000
CONFIG_MPC85xx=y
+CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_TARGET_P2041RDB=y
+CONFIG_DEFAULT_DEVICE_TREE="p2041rdb"
+CONFIG_OF_CONTROL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
diff --git a/configs/P2041RDB_SPIFLASH_defconfig b/configs/P2041RDB_SPIFLASH_defconfig
index 4fb379417f..925f0cdfef 100644
--- a/configs/P2041RDB_SPIFLASH_defconfig
+++ b/configs/P2041RDB_SPIFLASH_defconfig
@@ -1,7 +1,10 @@
CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xFFF40000
CONFIG_MPC85xx=y
+CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_TARGET_P2041RDB=y
+CONFIG_DEFAULT_DEVICE_TREE="p2041rdb"
+CONFIG_OF_CONTROL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
diff --git a/configs/P2041RDB_defconfig b/configs/P2041RDB_defconfig
index 2a70296780..1923b7a45e 100644
--- a/configs/P2041RDB_defconfig
+++ b/configs/P2041RDB_defconfig
@@ -1,7 +1,10 @@
CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xEFF40000
CONFIG_MPC85xx=y
+CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_TARGET_P2041RDB=y
+CONFIG_DEFAULT_DEVICE_TREE="p2041rdb"
+CONFIG_OF_CONTROL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
--
2.17.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [U-Boot] [PATCH 08/13] powerpc: Enable device tree support for P3041DS
2019-06-20 8:19 [U-Boot] [PATCH 00/13] powerpc: Enable device tree support Z.q. Hou
` (6 preceding siblings ...)
2019-06-20 8:19 ` [U-Boot] [PATCH 07/13] powerpc: Enable device tree support for P2041RDB Z.q. Hou
@ 2019-06-20 8:19 ` Z.q. Hou
2019-06-20 8:19 ` [U-Boot] [PATCH 09/13] powerpc: Enable device tree support for P4080DS Z.q. Hou
` (5 subsequent siblings)
13 siblings, 0 replies; 19+ messages in thread
From: Z.q. Hou @ 2019-06-20 8:19 UTC (permalink / raw)
To: u-boot
From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Add device tree for P3041DS board and enable CONFIG_OF_CONTROL
so that device tree can be compiled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
arch/powerpc/dts/Makefile | 1 +
arch/powerpc/dts/p3041.dtsi | 63 ++++++++++++++++++++++++++++++
arch/powerpc/dts/p3041ds.dts | 18 +++++++++
configs/P3041DS_NAND_defconfig | 3 ++
configs/P3041DS_SDCARD_defconfig | 3 ++
configs/P3041DS_SPIFLASH_defconfig | 3 ++
configs/P3041DS_defconfig | 3 ++
7 files changed, 94 insertions(+)
create mode 100644 arch/powerpc/dts/p3041.dtsi
create mode 100644 arch/powerpc/dts/p3041ds.dts
diff --git a/arch/powerpc/dts/Makefile b/arch/powerpc/dts/Makefile
index 3123249bd4..fe2d4e40dd 100644
--- a/arch/powerpc/dts/Makefile
+++ b/arch/powerpc/dts/Makefile
@@ -4,6 +4,7 @@ dtb-$(CONFIG_TARGET_P1020RDB_PC) += p1020rdb-pc.dtb p1020rdb-pc_36b.dtb
dtb-$(CONFIG_TARGET_P1020RDB_PD) += p1020rdb-pd.dtb
dtb-$(CONFIG_TARGET_P2020RDB) += p2020rdb-pc.dtb p2020rdb-pc_36b.dtb
dtb-$(CONFIG_TARGET_P2041RDB) += p2041rdb.dtb
+dtb-$(CONFIG_TARGET_P3041DS) += p3041ds.dtb
dtb-$(CONFIG_TARGET_T1024RDB) += t1024rdb.dtb
dtb-$(CONFIG_TARGET_T1042D4RDB) += t1042d4rdb.dtb
dtb-$(CONFIG_TARGET_T2080QDS) += t2080qds.dtb
diff --git a/arch/powerpc/dts/p3041.dtsi b/arch/powerpc/dts/p3041.dtsi
new file mode 100644
index 0000000000..7d5c7134aa
--- /dev/null
+++ b/arch/powerpc/dts/p3041.dtsi
@@ -0,0 +1,63 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * P3041 Silicon/SoC Device Tree Source (pre include)
+ *
+ * Copyright 2010 - 2015 Freescale Semiconductor Inc.
+ * Copyright 2019 NXP
+ */
+
+/dts-v1/;
+
+/include/ "e500mc_power_isa.dtsi"
+
+/ {
+ compatible = "fsl,P3041";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ interrupt-parent = <&mpic>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu0: PowerPC,e500mc at 0 {
+ device_type = "cpu";
+ reg = <0>;
+ fsl,portid-mapping = <0x80000000>;
+ };
+ cpu1: PowerPC,e500mc at 1 {
+ device_type = "cpu";
+ reg = <1>;
+ fsl,portid-mapping = <0x40000000>;
+ };
+ cpu2: PowerPC,e500mc at 2 {
+ device_type = "cpu";
+ reg = <2>;
+ fsl,portid-mapping = <0x20000000>;
+ };
+ cpu3: PowerPC,e500mc at 3 {
+ device_type = "cpu";
+ reg = <3>;
+ fsl,portid-mapping = <0x10000000>;
+ };
+ };
+
+ soc: soc at ffe000000 {
+ ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
+ reg = <0xf 0xfe000000 0 0x00001000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ device_type = "soc";
+ compatible = "simple-bus";
+
+ mpic: pic at 40000 {
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <4>;
+ reg = <0x40000 0x40000>;
+ compatible = "fsl,mpic", "chrp,open-pic";
+ device_type = "open-pic";
+ clock-frequency = <0x0>;
+ };
+ };
+};
diff --git a/arch/powerpc/dts/p3041ds.dts b/arch/powerpc/dts/p3041ds.dts
new file mode 100644
index 0000000000..c30bf7ac77
--- /dev/null
+++ b/arch/powerpc/dts/p3041ds.dts
@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * P3041DS Device Tree Source
+ *
+ * Copyright 2010 - 2015 Freescale Semiconductor Inc.
+ * Copyright 2019 NXP
+ */
+
+/include/ "p3041.dtsi"
+
+/ {
+ model = "fsl,P3041DS";
+ compatible = "fsl,P3041DS";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ interrupt-parent = <&mpic>;
+
+};
diff --git a/configs/P3041DS_NAND_defconfig b/configs/P3041DS_NAND_defconfig
index 81ce703046..b31584023d 100644
--- a/configs/P3041DS_NAND_defconfig
+++ b/configs/P3041DS_NAND_defconfig
@@ -1,7 +1,10 @@
CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xFFF40000
CONFIG_MPC85xx=y
+CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_TARGET_P3041DS=y
+CONFIG_DEFAULT_DEVICE_TREE="p3041ds"
+CONFIG_OF_CONTROL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
diff --git a/configs/P3041DS_SDCARD_defconfig b/configs/P3041DS_SDCARD_defconfig
index 7392948fa7..50dee40a93 100644
--- a/configs/P3041DS_SDCARD_defconfig
+++ b/configs/P3041DS_SDCARD_defconfig
@@ -1,7 +1,10 @@
CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xFFF40000
CONFIG_MPC85xx=y
+CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_TARGET_P3041DS=y
+CONFIG_DEFAULT_DEVICE_TREE="p3041ds"
+CONFIG_OF_CONTROL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
diff --git a/configs/P3041DS_SPIFLASH_defconfig b/configs/P3041DS_SPIFLASH_defconfig
index c89ee84d92..984ff5f379 100644
--- a/configs/P3041DS_SPIFLASH_defconfig
+++ b/configs/P3041DS_SPIFLASH_defconfig
@@ -1,7 +1,10 @@
CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xFFF40000
CONFIG_MPC85xx=y
+CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_TARGET_P3041DS=y
+CONFIG_DEFAULT_DEVICE_TREE="p3041ds"
+CONFIG_OF_CONTROL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
diff --git a/configs/P3041DS_defconfig b/configs/P3041DS_defconfig
index 6bae5a57f6..5728cbb91d 100644
--- a/configs/P3041DS_defconfig
+++ b/configs/P3041DS_defconfig
@@ -1,7 +1,10 @@
CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xEFF40000
CONFIG_MPC85xx=y
+CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_TARGET_P3041DS=y
+CONFIG_DEFAULT_DEVICE_TREE="p3041ds"
+CONFIG_OF_CONTROL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
--
2.17.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [U-Boot] [PATCH 09/13] powerpc: Enable device tree support for P4080DS
2019-06-20 8:19 [U-Boot] [PATCH 00/13] powerpc: Enable device tree support Z.q. Hou
` (7 preceding siblings ...)
2019-06-20 8:19 ` [U-Boot] [PATCH 08/13] powerpc: Enable device tree support for P3041DS Z.q. Hou
@ 2019-06-20 8:19 ` Z.q. Hou
2019-06-20 8:19 ` [U-Boot] [PATCH 10/13] powerpc: Enable device tree support for P5040DS Z.q. Hou
` (4 subsequent siblings)
13 siblings, 0 replies; 19+ messages in thread
From: Z.q. Hou @ 2019-06-20 8:19 UTC (permalink / raw)
To: u-boot
From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Add device tree for P4080DS board and enable CONFIG_OF_CONTROL
so that device tree can be compiled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
arch/powerpc/dts/Makefile | 1 +
arch/powerpc/dts/p4080.dtsi | 83 ++++++++++++++++++++++++++++++
arch/powerpc/dts/p4080ds.dts | 18 +++++++
configs/P4080DS_SDCARD_defconfig | 3 ++
configs/P4080DS_SPIFLASH_defconfig | 3 ++
configs/P4080DS_defconfig | 3 ++
6 files changed, 111 insertions(+)
create mode 100644 arch/powerpc/dts/p4080.dtsi
create mode 100644 arch/powerpc/dts/p4080ds.dts
diff --git a/arch/powerpc/dts/Makefile b/arch/powerpc/dts/Makefile
index fe2d4e40dd..ffd929c2ba 100644
--- a/arch/powerpc/dts/Makefile
+++ b/arch/powerpc/dts/Makefile
@@ -5,6 +5,7 @@ dtb-$(CONFIG_TARGET_P1020RDB_PD) += p1020rdb-pd.dtb
dtb-$(CONFIG_TARGET_P2020RDB) += p2020rdb-pc.dtb p2020rdb-pc_36b.dtb
dtb-$(CONFIG_TARGET_P2041RDB) += p2041rdb.dtb
dtb-$(CONFIG_TARGET_P3041DS) += p3041ds.dtb
+dtb-$(CONFIG_TARGET_P4080DS) += p4080ds.dtb
dtb-$(CONFIG_TARGET_T1024RDB) += t1024rdb.dtb
dtb-$(CONFIG_TARGET_T1042D4RDB) += t1042d4rdb.dtb
dtb-$(CONFIG_TARGET_T2080QDS) += t2080qds.dtb
diff --git a/arch/powerpc/dts/p4080.dtsi b/arch/powerpc/dts/p4080.dtsi
new file mode 100644
index 0000000000..7c8dbae442
--- /dev/null
+++ b/arch/powerpc/dts/p4080.dtsi
@@ -0,0 +1,83 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * P4080/P4040 Silicon/SoC Device Tree Source (pre include)
+ *
+ * Copyright 2011 - 2015 Freescale Semiconductor Inc.
+ * Copyright 2019 NXP
+ */
+
+/dts-v1/;
+
+/include/ "e500mc_power_isa.dtsi"
+
+/ {
+ compatible = "fsl,P4080";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ interrupt-parent = <&mpic>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu0: PowerPC,e500mc at 0 {
+ device_type = "cpu";
+ reg = <0>;
+ fsl,portid-mapping = <0x80000000>;
+ };
+ cpu1: PowerPC,e500mc at 1 {
+ device_type = "cpu";
+ reg = <1>;
+ fsl,portid-mapping = <0x40000000>;
+ };
+ cpu2: PowerPC,e500mc at 2 {
+ device_type = "cpu";
+ reg = <2>;
+ fsl,portid-mapping = <0x20000000>;
+ };
+ cpu3: PowerPC,e500mc at 3 {
+ device_type = "cpu";
+ reg = <3>;
+ fsl,portid-mapping = <0x10000000>;
+ };
+ cpu4: PowerPC,e500mc at 4 {
+ device_type = "cpu";
+ reg = <4>;
+ fsl,portid-mapping = <0x08000000>;
+ };
+ cpu5: PowerPC,e500mc at 5 {
+ device_type = "cpu";
+ reg = <5>;
+ fsl,portid-mapping = <0x04000000>;
+ };
+ cpu6: PowerPC,e500mc at 6 {
+ device_type = "cpu";
+ reg = <6>;
+ fsl,portid-mapping = <0x02000000>;
+ };
+ cpu7: PowerPC,e500mc at 7 {
+ device_type = "cpu";
+ reg = <7>;
+ fsl,portid-mapping = <0x01000000>;
+ };
+ };
+
+ soc: soc at ffe000000 {
+ ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
+ reg = <0xf 0xfe000000 0 0x00001000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ device_type = "soc";
+ compatible = "simple-bus";
+
+ mpic: pic at 40000 {
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <4>;
+ reg = <0x40000 0x40000>;
+ compatible = "fsl,mpic", "chrp,open-pic";
+ device_type = "open-pic";
+ clock-frequency = <0x0>;
+ };
+ };
+};
diff --git a/arch/powerpc/dts/p4080ds.dts b/arch/powerpc/dts/p4080ds.dts
new file mode 100644
index 0000000000..15a0f66fb6
--- /dev/null
+++ b/arch/powerpc/dts/p4080ds.dts
@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * P4080DS Device Tree Source
+ *
+ * Copyright 2011 - 2015 Freescale Semiconductor Inc.
+ * Copyright 2019 NXP
+ */
+
+/include/ "p4080.dtsi"
+
+/ {
+ model = "fsl,P4080DS";
+ compatible = "fsl,P4080DS";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ interrupt-parent = <&mpic>;
+
+};
diff --git a/configs/P4080DS_SDCARD_defconfig b/configs/P4080DS_SDCARD_defconfig
index b67e12afab..0aaf09ac39 100644
--- a/configs/P4080DS_SDCARD_defconfig
+++ b/configs/P4080DS_SDCARD_defconfig
@@ -1,7 +1,10 @@
CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xFFF40000
CONFIG_MPC85xx=y
+CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_TARGET_P4080DS=y
+CONFIG_DEFAULT_DEVICE_TREE="p4080ds"
+CONFIG_OF_CONTROL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
diff --git a/configs/P4080DS_SPIFLASH_defconfig b/configs/P4080DS_SPIFLASH_defconfig
index b10836717d..3a91df2914 100644
--- a/configs/P4080DS_SPIFLASH_defconfig
+++ b/configs/P4080DS_SPIFLASH_defconfig
@@ -1,7 +1,10 @@
CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xFFF40000
CONFIG_MPC85xx=y
+CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_TARGET_P4080DS=y
+CONFIG_DEFAULT_DEVICE_TREE="p4080ds"
+CONFIG_OF_CONTROL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
diff --git a/configs/P4080DS_defconfig b/configs/P4080DS_defconfig
index ee4f51d4df..d89d69f439 100644
--- a/configs/P4080DS_defconfig
+++ b/configs/P4080DS_defconfig
@@ -1,7 +1,10 @@
CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xEFF40000
CONFIG_MPC85xx=y
+CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_TARGET_P4080DS=y
+CONFIG_DEFAULT_DEVICE_TREE="p4080ds"
+CONFIG_OF_CONTROL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
--
2.17.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [U-Boot] [PATCH 10/13] powerpc: Enable device tree support for P5040DS
2019-06-20 8:19 [U-Boot] [PATCH 00/13] powerpc: Enable device tree support Z.q. Hou
` (8 preceding siblings ...)
2019-06-20 8:19 ` [U-Boot] [PATCH 09/13] powerpc: Enable device tree support for P4080DS Z.q. Hou
@ 2019-06-20 8:19 ` Z.q. Hou
2019-06-20 8:19 ` [U-Boot] [PATCH 11/13] powerpc: dts: add default definition of CONFIG_RESET_VECTOR_ADDRESS Z.q. Hou
` (3 subsequent siblings)
13 siblings, 0 replies; 19+ messages in thread
From: Z.q. Hou @ 2019-06-20 8:19 UTC (permalink / raw)
To: u-boot
From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Add device tree for P5040DS board and enable CONFIG_OF_CONTROL
so that device tree can be compiled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
arch/powerpc/dts/Makefile | 1 +
arch/powerpc/dts/p5040.dtsi | 62 ++++++++++++++++++++++++++++++
arch/powerpc/dts/p5040ds.dts | 18 +++++++++
configs/P5040DS_NAND_defconfig | 3 ++
configs/P5040DS_SDCARD_defconfig | 3 ++
configs/P5040DS_SPIFLASH_defconfig | 3 ++
configs/P5040DS_defconfig | 3 ++
7 files changed, 93 insertions(+)
create mode 100644 arch/powerpc/dts/p5040.dtsi
create mode 100644 arch/powerpc/dts/p5040ds.dts
diff --git a/arch/powerpc/dts/Makefile b/arch/powerpc/dts/Makefile
index ffd929c2ba..0e234cce55 100644
--- a/arch/powerpc/dts/Makefile
+++ b/arch/powerpc/dts/Makefile
@@ -6,6 +6,7 @@ dtb-$(CONFIG_TARGET_P2020RDB) += p2020rdb-pc.dtb p2020rdb-pc_36b.dtb
dtb-$(CONFIG_TARGET_P2041RDB) += p2041rdb.dtb
dtb-$(CONFIG_TARGET_P3041DS) += p3041ds.dtb
dtb-$(CONFIG_TARGET_P4080DS) += p4080ds.dtb
+dtb-$(CONFIG_TARGET_P5040DS) += p5040ds.dtb
dtb-$(CONFIG_TARGET_T1024RDB) += t1024rdb.dtb
dtb-$(CONFIG_TARGET_T1042D4RDB) += t1042d4rdb.dtb
dtb-$(CONFIG_TARGET_T2080QDS) += t2080qds.dtb
diff --git a/arch/powerpc/dts/p5040.dtsi b/arch/powerpc/dts/p5040.dtsi
new file mode 100644
index 0000000000..b6f6c5dd58
--- /dev/null
+++ b/arch/powerpc/dts/p5040.dtsi
@@ -0,0 +1,62 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * P5040 Silicon/SoC Device Tree Source (pre include)
+ *
+ * Copyright 2012 - 2015 Freescale Semiconductor Inc.
+ * Copyright 2019 NXP
+ */
+
+/dts-v1/;
+
+/include/ "e5500_power_isa.dtsi"
+
+/ {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ interrupt-parent = <&mpic>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu0: PowerPC,e5500 at 0 {
+ device_type = "cpu";
+ reg = <0>;
+ fsl,portid-mapping = <0x80000000>;
+ };
+ cpu1: PowerPC,e5500 at 1 {
+ device_type = "cpu";
+ reg = <1>;
+ fsl,portid-mapping = <0x40000000>;
+ };
+ cpu2: PowerPC,e5500 at 2 {
+ device_type = "cpu";
+ reg = <2>;
+ fsl,portid-mapping = <0x20000000>;
+ };
+ cpu3: PowerPC,e5500 at 3 {
+ device_type = "cpu";
+ reg = <3>;
+ fsl,portid-mapping = <0x10000000>;
+ };
+ };
+
+ soc: soc at ffe000000 {
+ ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
+ reg = <0xf 0xfe000000 0 0x00001000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ device_type = "soc";
+ compatible = "simple-bus";
+
+ mpic: pic at 40000 {
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <4>;
+ reg = <0x40000 0x40000>;
+ compatible = "fsl,mpic", "chrp,open-pic";
+ device_type = "open-pic";
+ clock-frequency = <0x0>;
+ };
+ };
+};
diff --git a/arch/powerpc/dts/p5040ds.dts b/arch/powerpc/dts/p5040ds.dts
new file mode 100644
index 0000000000..723d31d5fb
--- /dev/null
+++ b/arch/powerpc/dts/p5040ds.dts
@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * P5040DS Device Tree Source
+ *
+ * Copyright 2012 - 2015 Freescale Semiconductor Inc.
+ * Copyright 2019 NXP
+ */
+
+/include/ "p5040.dtsi"
+
+/ {
+ model = "fsl,P5040DS";
+ compatible = "fsl,P5040DS";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ interrupt-parent = <&mpic>;
+
+};
diff --git a/configs/P5040DS_NAND_defconfig b/configs/P5040DS_NAND_defconfig
index b2c61d78c6..cbccb4c420 100644
--- a/configs/P5040DS_NAND_defconfig
+++ b/configs/P5040DS_NAND_defconfig
@@ -1,7 +1,10 @@
CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xFFF40000
CONFIG_MPC85xx=y
+CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_TARGET_P5040DS=y
+CONFIG_DEFAULT_DEVICE_TREE="p5040ds"
+CONFIG_OF_CONTROL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
diff --git a/configs/P5040DS_SDCARD_defconfig b/configs/P5040DS_SDCARD_defconfig
index dbff8f72e7..cdefb2df28 100644
--- a/configs/P5040DS_SDCARD_defconfig
+++ b/configs/P5040DS_SDCARD_defconfig
@@ -1,7 +1,10 @@
CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xFFF40000
CONFIG_MPC85xx=y
+CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_TARGET_P5040DS=y
+CONFIG_DEFAULT_DEVICE_TREE="p5040ds"
+CONFIG_OF_CONTROL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
diff --git a/configs/P5040DS_SPIFLASH_defconfig b/configs/P5040DS_SPIFLASH_defconfig
index 1552f84e02..c636b16d2c 100644
--- a/configs/P5040DS_SPIFLASH_defconfig
+++ b/configs/P5040DS_SPIFLASH_defconfig
@@ -1,7 +1,10 @@
CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xFFF40000
CONFIG_MPC85xx=y
+CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_TARGET_P5040DS=y
+CONFIG_DEFAULT_DEVICE_TREE="p5040ds"
+CONFIG_OF_CONTROL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
diff --git a/configs/P5040DS_defconfig b/configs/P5040DS_defconfig
index e8ff36e575..6572ff1d63 100644
--- a/configs/P5040DS_defconfig
+++ b/configs/P5040DS_defconfig
@@ -1,7 +1,10 @@
CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xEFF40000
CONFIG_MPC85xx=y
+CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_TARGET_P5040DS=y
+CONFIG_DEFAULT_DEVICE_TREE="p5040ds"
+CONFIG_OF_CONTROL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
--
2.17.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [U-Boot] [PATCH 11/13] powerpc: dts: add default definition of CONFIG_RESET_VECTOR_ADDRESS
2019-06-20 8:19 [U-Boot] [PATCH 00/13] powerpc: Enable device tree support Z.q. Hou
` (9 preceding siblings ...)
2019-06-20 8:19 ` [U-Boot] [PATCH 10/13] powerpc: Enable device tree support for P5040DS Z.q. Hou
@ 2019-06-20 8:19 ` Z.q. Hou
2019-06-20 8:20 ` [U-Boot] [PATCH 12/13] powerpc: mpc8548cds: extend the reserved length for monitor Z.q. Hou
` (2 subsequent siblings)
13 siblings, 0 replies; 19+ messages in thread
From: Z.q. Hou @ 2019-06-20 8:19 UTC (permalink / raw)
To: u-boot
From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Add CONFIG_RESET_VECTOR_ADDRESS definition with the default value
in u-boot.dtsi to fix the build error below. In the configuration
header file of some MPC85xx boards, there is not the definition
of CONFIG_RESET_VECTOR_ADDRESS, while CONFIG_SYS_MPC85XX_NO_RESETVEC
is also not defined. In this case, it will lack of definition of
CONFIG_RESET_VECTOR_ADDRESS in u-boot.dtsi, and the address
0xfffffffc will be used as the boot page by default.
Error log:
DTC arch/powerpc/dts/mpc8548cds.dtb
DTC arch/powerpc/dts/mpc8548cds_36b.dtb
Error: arch/powerpc/dts/u-boot.dtsi:28.15-16 syntax error
FATAL ERROR: Unable to parse input tree
Error: arch/powerpc/dts/u-boot.dtsi:28.15-16 syntax error
FATAL ERROR: Unable to parse input tree
scripts/Makefile.lib:308: recipe for target 'arch/powerpc/dts/mpc8548cds.dtb' failed
make[2]: *** [arch/powerpc/dts/mpc8548cds.dtb] Error 1
make[2]: *** Waiting for unfinished jobs....
scripts/Makefile.lib:308: recipe for target 'arch/powerpc/dts/mpc8548cds_36b.dtb' failed
make[2]: *** [arch/powerpc/dts/mpc8548cds_36b.dtb] Error 1
dts/Makefile:38: recipe for target 'arch-dtbs' failed
make[1]: *** [arch-dtbs] Error 2
Makefile:1038: recipe for target 'dts/dt.dtb' failed
make: *** [dts/dt.dtb] Error 2
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
arch/powerpc/dts/u-boot.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/powerpc/dts/u-boot.dtsi b/arch/powerpc/dts/u-boot.dtsi
index 213d543c6d..9661f4dc88 100644
--- a/arch/powerpc/dts/u-boot.dtsi
+++ b/arch/powerpc/dts/u-boot.dtsi
@@ -24,6 +24,9 @@
#endif
};
#ifdef CONFIG_MPC85XX_HAVE_RESET_VECTOR
+#ifndef CONFIG_RESET_VECTOR_ADDRESS
+#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc
+#endif
powerpc-mpc85xx-bootpg-resetvec {
offset = <(CONFIG_RESET_VECTOR_ADDRESS - 0xffc)>;
};
--
2.17.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [U-Boot] [PATCH 12/13] powerpc: mpc8548cds: extend the reserved length for monitor
2019-06-20 8:19 [U-Boot] [PATCH 00/13] powerpc: Enable device tree support Z.q. Hou
` (10 preceding siblings ...)
2019-06-20 8:19 ` [U-Boot] [PATCH 11/13] powerpc: dts: add default definition of CONFIG_RESET_VECTOR_ADDRESS Z.q. Hou
@ 2019-06-20 8:20 ` Z.q. Hou
2019-06-20 8:20 ` [U-Boot] [PATCH 13/13] powerpc: Enable device tree support for MPC8548CDS Z.q. Hou
2019-08-16 6:04 ` [U-Boot] [PATCH 00/13] powerpc: Enable device tree support Jagdish Gediya
13 siblings, 0 replies; 19+ messages in thread
From: Z.q. Hou @ 2019-06-20 8:20 UTC (permalink / raw)
To: u-boot
From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Extend the reserved length for monitor to fix the following
build error:
BINMAN u-boot-with-dtb.bin
Wrote map file './image.map' to show errors
binman: Section '/binman': contents size 0x80000 (524288) exceeds section size 0x40000 (262144)
Makefile:1373: recipe for target 'u-boot-with-dtb.bin' failed
make: *** [u-boot-with-dtb.bin] Error 1
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
include/configs/MPC8548CDS.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h
index be600becfe..2f15ef50bc 100644
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -290,7 +290,7 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */
+#define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Mon */
#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserved for malloc */
/* Serial Port */
--
2.17.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [U-Boot] [PATCH 13/13] powerpc: Enable device tree support for MPC8548CDS
2019-06-20 8:19 [U-Boot] [PATCH 00/13] powerpc: Enable device tree support Z.q. Hou
` (11 preceding siblings ...)
2019-06-20 8:20 ` [U-Boot] [PATCH 12/13] powerpc: mpc8548cds: extend the reserved length for monitor Z.q. Hou
@ 2019-06-20 8:20 ` Z.q. Hou
2019-08-16 6:04 ` [U-Boot] [PATCH 00/13] powerpc: Enable device tree support Jagdish Gediya
13 siblings, 0 replies; 19+ messages in thread
From: Z.q. Hou @ 2019-06-20 8:20 UTC (permalink / raw)
To: u-boot
From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Add device tree for MPC8548CDS board and enable CONFIG_OF_CONTROL
so that device tree can be compiled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
arch/powerpc/dts/Makefile | 1 +
arch/powerpc/dts/mpc8548-post.dtsi | 27 +++++++++++++++++++++++++++
arch/powerpc/dts/mpc8548.dtsi | 27 +++++++++++++++++++++++++++
arch/powerpc/dts/mpc8548cds.dts | 23 +++++++++++++++++++++++
arch/powerpc/dts/mpc8548cds_36b.dts | 23 +++++++++++++++++++++++
configs/MPC8548CDS_36BIT_defconfig | 3 +++
configs/MPC8548CDS_defconfig | 3 +++
configs/MPC8548CDS_legacy_defconfig | 3 +++
8 files changed, 110 insertions(+)
create mode 100644 arch/powerpc/dts/mpc8548-post.dtsi
create mode 100644 arch/powerpc/dts/mpc8548.dtsi
create mode 100644 arch/powerpc/dts/mpc8548cds.dts
create mode 100644 arch/powerpc/dts/mpc8548cds_36b.dts
diff --git a/arch/powerpc/dts/Makefile b/arch/powerpc/dts/Makefile
index 0e234cce55..021c85f00f 100644
--- a/arch/powerpc/dts/Makefile
+++ b/arch/powerpc/dts/Makefile
@@ -1,5 +1,6 @@
# SPDX-License-Identifier: GPL-2.0+
+dtb-$(CONFIG_TARGET_MPC8548CDS) += mpc8548cds.dtb mpc8548cds_36b.dtb
dtb-$(CONFIG_TARGET_P1020RDB_PC) += p1020rdb-pc.dtb p1020rdb-pc_36b.dtb
dtb-$(CONFIG_TARGET_P1020RDB_PD) += p1020rdb-pd.dtb
dtb-$(CONFIG_TARGET_P2020RDB) += p2020rdb-pc.dtb p2020rdb-pc_36b.dtb
diff --git a/arch/powerpc/dts/mpc8548-post.dtsi b/arch/powerpc/dts/mpc8548-post.dtsi
new file mode 100644
index 0000000000..5533a4b598
--- /dev/null
+++ b/arch/powerpc/dts/mpc8548-post.dtsi
@@ -0,0 +1,27 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * MPC8548 Silicon/SoC Device Tree Source (post include)
+ *
+ * Copyright 2012 Freescale Semiconductor Inc.
+ * Copyright 2019 NXP
+ */
+
+&soc {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ device_type = "soc";
+ compatible = "fsl,mpc8548-immr", "simple-bus";
+ bus-frequency = <0x0>;
+
+ mpic: pic at 40000 {
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <4>;
+ reg = <0x40000 0x40000>;
+ compatible = "fsl,mpic";
+ device_type = "open-pic";
+ big-endian;
+ single-cpu-affinity;
+ last-interrupt-source = <255>;
+ };
+};
diff --git a/arch/powerpc/dts/mpc8548.dtsi b/arch/powerpc/dts/mpc8548.dtsi
new file mode 100644
index 0000000000..b24567dc65
--- /dev/null
+++ b/arch/powerpc/dts/mpc8548.dtsi
@@ -0,0 +1,27 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * MPC8548CDS Silicon/SoC Device Tree Source (pre include)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ * Copyright 2019 NXP
+ */
+
+/dts-v1/;
+
+/include/ "e500v2_power_isa.dtsi"
+
+/ {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ interrupt-parent = <&mpic>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ PowerPC,8548 at 0 {
+ device_type = "cpu";
+ reg = <0>;
+ };
+ };
+};
diff --git a/arch/powerpc/dts/mpc8548cds.dts b/arch/powerpc/dts/mpc8548cds.dts
new file mode 100644
index 0000000000..cceea345c8
--- /dev/null
+++ b/arch/powerpc/dts/mpc8548cds.dts
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * MPC8548CDS Device Tree Source
+ *
+ * Copyright 2006 - 2012 Freescale Semiconductor Inc.
+ * Copyright 2019 NXP
+ */
+
+/include/ "mpc8548.dtsi"
+
+/ {
+ model = "fsl,MPC8548CDS";
+ compatible = "fsl,MPC8548CDS";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ interrupt-parent = <&mpic>;
+
+ soc: soc8548 at e0000000 {
+ ranges = <0x0 0x0 0xe0000000 0x100000>;
+ };
+};
+
+/include/ "mpc8548-post.dtsi"
diff --git a/arch/powerpc/dts/mpc8548cds_36b.dts b/arch/powerpc/dts/mpc8548cds_36b.dts
new file mode 100644
index 0000000000..faff35cc36
--- /dev/null
+++ b/arch/powerpc/dts/mpc8548cds_36b.dts
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * MPC8548CDS (36-bit address map) Device Tree Source
+ *
+ * Copyright 2012 - 2015 Freescale Semiconductor Inc.
+ * Copyright 2019 NXP
+ */
+
+/include/ "mpc8548.dtsi"
+
+/ {
+ model = "fsl,MPC8548CDS";
+ compatible = "fsl,MPC8548CDS";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ interrupt-parent = <&mpic>;
+
+ soc: soc8548 at fe0000000 {
+ ranges = <0x0 0xf 0xe0000000 0x100000>;
+ };
+};
+
+/include/ "mpc8548-post.dtsi"
diff --git a/configs/MPC8548CDS_36BIT_defconfig b/configs/MPC8548CDS_36BIT_defconfig
index 672dc78211..f259f1992c 100644
--- a/configs/MPC8548CDS_36BIT_defconfig
+++ b/configs/MPC8548CDS_36BIT_defconfig
@@ -1,8 +1,11 @@
CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xFFF80000
CONFIG_MPC85xx=y
+CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_MPC8548CDS=y
+CONFIG_DEFAULT_DEVICE_TREE="mpc8548cds_36b"
+CONFIG_OF_CONTROL=y
CONFIG_PHYS_64BIT=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
diff --git a/configs/MPC8548CDS_defconfig b/configs/MPC8548CDS_defconfig
index 09726d2830..72239da0c3 100644
--- a/configs/MPC8548CDS_defconfig
+++ b/configs/MPC8548CDS_defconfig
@@ -1,8 +1,11 @@
CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xFFF80000
CONFIG_MPC85xx=y
+CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_MPC8548CDS=y
+CONFIG_DEFAULT_DEVICE_TREE="mpc8548cds"
+CONFIG_OF_CONTROL=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=10
diff --git a/configs/MPC8548CDS_legacy_defconfig b/configs/MPC8548CDS_legacy_defconfig
index 4a2d11f1b6..f2420c3ad2 100644
--- a/configs/MPC8548CDS_legacy_defconfig
+++ b/configs/MPC8548CDS_legacy_defconfig
@@ -1,8 +1,11 @@
CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xFFF80000
CONFIG_MPC85xx=y
+CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_MPC8548CDS=y
+CONFIG_DEFAULT_DEVICE_TREE="mpc8548cds"
+CONFIG_OF_CONTROL=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="LEGACY"
--
2.17.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [U-Boot] [PATCH 00/13] powerpc: Enable device tree support
2019-06-20 8:19 [U-Boot] [PATCH 00/13] powerpc: Enable device tree support Z.q. Hou
` (12 preceding siblings ...)
2019-06-20 8:20 ` [U-Boot] [PATCH 13/13] powerpc: Enable device tree support for MPC8548CDS Z.q. Hou
@ 2019-08-16 6:04 ` Jagdish Gediya
2019-08-16 6:27 ` Z.q. Hou
13 siblings, 1 reply; 19+ messages in thread
From: Jagdish Gediya @ 2019-08-16 6:04 UTC (permalink / raw)
To: u-boot
Hi Zhiqiang,
> -----Original Message-----
> From: Z.q. Hou
> Sent: Thursday, June 20, 2019 1:49 PM
> To: u-boot at lists.denx.de; sjg at chromium.org; Prabhakar Kushwaha
> <prabhakar.kushwaha@nxp.com>; Shengzhou Liu
> <shengzhou.liu@nxp.com>; bmeng.cn at gmail.com; Jagdish Gediya
> <jagdish.gediya@nxp.com>; Jiafei Pan <jiafei.pan@nxp.com>; Priyanka Jain
> <priyanka.jain@nxp.com>
> Cc: Z.q. Hou <zhiqiang.hou@nxp.com>
> Subject: [PATCH 00/13] powerpc: Enable device tree support
>
> From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
>
> This patch is to enable device tree support for the Freescale PowerPC
> platforms below.
>
> Hou Zhiqiang (13):
> powerpc: Enable device tree support for T2080RDB
> powerpc: Enable device tree support for T4240RDB
> powerpc: Enable device tree support for T1024RDB
> powerpc: Enable device tree support for T1042D4RDB
> powerpc: Enable device tree support for P1020RDB
> powerpc: Enable device tree support for P2020RDB
> powerpc: Enable device tree support for P2041RDB
> powerpc: Enable device tree support for P3041DS
> powerpc: Enable device tree support for P4080DS
> powerpc: Enable device tree support for P5040DS
> powerpc: dts: add default definition of CONFIG_RESET_VECTOR_ADDRESS
> powerpc: mpc8548cds: extend the reserved length for monitor
> powerpc: Enable device tree support for MPC8548CDS
>
> arch/powerpc/dts/Makefile | 12 +++
> arch/powerpc/dts/e500mc_power_isa.dtsi | 33 ++++++
> arch/powerpc/dts/e500v2_power_isa.dtsi | 26 +++++
> arch/powerpc/dts/e5500_power_isa.dtsi | 34 +++++++
> arch/powerpc/dts/mpc8548-post.dtsi | 27 +++++
> arch/powerpc/dts/mpc8548.dtsi | 27 +++++
> arch/powerpc/dts/mpc8548cds.dts | 23 +++++
> arch/powerpc/dts/mpc8548cds_36b.dts | 23 +++++
> arch/powerpc/dts/p1020-post.dtsi | 27 +++++
> arch/powerpc/dts/p1020.dtsi | 31 ++++++
> arch/powerpc/dts/p1020rdb-pc.dts | 23 +++++
> arch/powerpc/dts/p1020rdb-pc_36b.dts | 23 +++++
> arch/powerpc/dts/p1020rdb-pd.dts | 23 +++++
> arch/powerpc/dts/p2020-post.dtsi | 27 +++++
> arch/powerpc/dts/p2020.dtsi | 31 ++++++
> arch/powerpc/dts/p2020rdb-pc.dts | 23 +++++
> arch/powerpc/dts/p2020rdb-pc_36b.dts | 23 +++++
> arch/powerpc/dts/p2041.dtsi | 63 ++++++++++++
> arch/powerpc/dts/p2041rdb.dts | 18 ++++
> arch/powerpc/dts/p3041.dtsi | 63 ++++++++++++
> arch/powerpc/dts/p3041ds.dts | 18 ++++
> arch/powerpc/dts/p4080.dtsi | 83 +++++++++++++++
> arch/powerpc/dts/p4080ds.dts | 18 ++++
> arch/powerpc/dts/p5040.dtsi | 62 +++++++++++
> arch/powerpc/dts/p5040ds.dts | 18 ++++
> arch/powerpc/dts/t1024rdb.dts | 17 ++++
> arch/powerpc/dts/t102x.dtsi | 52 ++++++++++
> arch/powerpc/dts/t1042d4rdb.dts | 17 ++++
> arch/powerpc/dts/t104x.dtsi | 62 +++++++++++
> arch/powerpc/dts/t2080rdb.dts | 17 ++++
> arch/powerpc/dts/t4240.dtsi | 102 +++++++++++++++++++
> arch/powerpc/dts/t4240rdb.dts | 17 ++++
> arch/powerpc/dts/u-boot.dtsi | 3 +
> board/freescale/p1_p2_rdb_pc/README | 19 ++++
> board/freescale/p2041rdb/README | 18 ++++
> board/freescale/t102xrdb/README | 19 ++++
> board/freescale/t104xrdb/README | 19 ++++
> board/freescale/t208xrdb/README | 19 ++++
> configs/MPC8548CDS_36BIT_defconfig | 3 +
> configs/MPC8548CDS_defconfig | 3 +
> configs/MPC8548CDS_legacy_defconfig | 3 +
> configs/P1020RDB-PC_36BIT_NAND_defconfig | 2 +
> configs/P1020RDB-PC_36BIT_SDCARD_defconfig | 2 +
> configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig | 2 +
> configs/P1020RDB-PC_36BIT_defconfig | 3 +
> configs/P1020RDB-PC_NAND_defconfig | 2 +
> configs/P1020RDB-PC_SDCARD_defconfig | 2 +
> configs/P1020RDB-PC_SPIFLASH_defconfig | 2 +
> configs/P1020RDB-PC_defconfig | 3 +
> configs/P1020RDB-PD_NAND_defconfig | 2 +
> configs/P1020RDB-PD_SDCARD_defconfig | 2 +
> configs/P1020RDB-PD_SPIFLASH_defconfig | 2 +
> configs/P1020RDB-PD_defconfig | 3 +
> configs/P2020RDB-PC_36BIT_NAND_defconfig | 2 +
> configs/P2020RDB-PC_36BIT_SDCARD_defconfig | 2 +
> configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 2 +
> configs/P2020RDB-PC_36BIT_defconfig | 3 +
> configs/P2020RDB-PC_NAND_defconfig | 2 +
> configs/P2020RDB-PC_SDCARD_defconfig | 2 +
> configs/P2020RDB-PC_SPIFLASH_defconfig | 2 +
> configs/P2020RDB-PC_defconfig | 3 +
> configs/P2041RDB_NAND_defconfig | 3 +
> configs/P2041RDB_SDCARD_defconfig | 3 +
> configs/P2041RDB_SPIFLASH_defconfig | 3 +
> configs/P2041RDB_defconfig | 3 +
> configs/P3041DS_NAND_defconfig | 3 +
> configs/P3041DS_SDCARD_defconfig | 3 +
> configs/P3041DS_SPIFLASH_defconfig | 3 +
> configs/P3041DS_defconfig | 3 +
> configs/P4080DS_SDCARD_defconfig | 3 +
> configs/P4080DS_SPIFLASH_defconfig | 3 +
> configs/P4080DS_defconfig | 3 +
> configs/P5040DS_NAND_defconfig | 3 +
> configs/P5040DS_SDCARD_defconfig | 3 +
> configs/P5040DS_SPIFLASH_defconfig | 3 +
> configs/P5040DS_defconfig | 3 +
> configs/T1024RDB_NAND_defconfig | 2 +
> configs/T1024RDB_SDCARD_defconfig | 2 +
> configs/T1024RDB_SPIFLASH_defconfig | 2 +
> configs/T1024RDB_defconfig | 3 +
> configs/T1042D4RDB_NAND_defconfig | 2 +
> configs/T1042D4RDB_SDCARD_defconfig | 2 +
> configs/T1042D4RDB_SPIFLASH_defconfig | 2 +
> configs/T1042D4RDB_defconfig | 3 +
> configs/T2080RDB_NAND_defconfig | 2 +
> configs/T2080RDB_SDCARD_defconfig | 2 +
> configs/T2080RDB_SPIFLASH_defconfig | 2 +
> configs/T2080RDB_defconfig | 3 +
> configs/T4240RDB_SDCARD_defconfig | 2 +
> configs/T4240RDB_defconfig | 3 +
> include/configs/MPC8548CDS.h | 2 +-
These changes looks good to me however I am concerned about the testing. Can you please tell what testing you did to verify these changes?
--Jagdish
^ permalink raw reply [flat|nested] 19+ messages in thread* [U-Boot] [PATCH 00/13] powerpc: Enable device tree support
2019-08-16 6:04 ` [U-Boot] [PATCH 00/13] powerpc: Enable device tree support Jagdish Gediya
@ 2019-08-16 6:27 ` Z.q. Hou
2019-08-16 8:25 ` Jagdish Gediya
0 siblings, 1 reply; 19+ messages in thread
From: Z.q. Hou @ 2019-08-16 6:27 UTC (permalink / raw)
To: u-boot
Hi Jagdish,
Thanks a lot for your comments!
> -----Original Message-----
> From: Jagdish Gediya
> Sent: 2019年8月16日 14:05
> To: Z.q. Hou <zhiqiang.hou@nxp.com>; u-boot at lists.denx.de;
> sjg at chromium.org; Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>;
> Shengzhou Liu <shengzhou.liu@nxp.com>; bmeng.cn at gmail.com; Jiafei Pan
> <jiafei.pan@nxp.com>; Priyanka Jain <priyanka.jain@nxp.com>
> Subject: RE: [PATCH 00/13] powerpc: Enable device tree support
>
> Hi Zhiqiang,
>
> > -----Original Message-----
> > From: Z.q. Hou
> > Sent: Thursday, June 20, 2019 1:49 PM
> > To: u-boot at lists.denx.de; sjg at chromium.org; Prabhakar Kushwaha
> > <prabhakar.kushwaha@nxp.com>; Shengzhou Liu
> <shengzhou.liu@nxp.com>;
> > bmeng.cn at gmail.com; Jagdish Gediya <jagdish.gediya@nxp.com>; Jiafei
> > Pan <jiafei.pan@nxp.com>; Priyanka Jain <priyanka.jain@nxp.com>
> > Cc: Z.q. Hou <zhiqiang.hou@nxp.com>
> > Subject: [PATCH 00/13] powerpc: Enable device tree support
> >
> > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> >
> > This patch is to enable device tree support for the Freescale PowerPC
> > platforms below.
> >
> > Hou Zhiqiang (13):
> > powerpc: Enable device tree support for T2080RDB
> > powerpc: Enable device tree support for T4240RDB
> > powerpc: Enable device tree support for T1024RDB
> > powerpc: Enable device tree support for T1042D4RDB
> > powerpc: Enable device tree support for P1020RDB
> > powerpc: Enable device tree support for P2020RDB
> > powerpc: Enable device tree support for P2041RDB
> > powerpc: Enable device tree support for P3041DS
> > powerpc: Enable device tree support for P4080DS
> > powerpc: Enable device tree support for P5040DS
> > powerpc: dts: add default definition of
> CONFIG_RESET_VECTOR_ADDRESS
> > powerpc: mpc8548cds: extend the reserved length for monitor
> > powerpc: Enable device tree support for MPC8548CDS
> >
> > arch/powerpc/dts/Makefile | 12 +++
> > arch/powerpc/dts/e500mc_power_isa.dtsi | 33 ++++++
> > arch/powerpc/dts/e500v2_power_isa.dtsi | 26 +++++
> > arch/powerpc/dts/e5500_power_isa.dtsi | 34 +++++++
> > arch/powerpc/dts/mpc8548-post.dtsi | 27 +++++
> > arch/powerpc/dts/mpc8548.dtsi | 27 +++++
> > arch/powerpc/dts/mpc8548cds.dts | 23 +++++
> > arch/powerpc/dts/mpc8548cds_36b.dts | 23 +++++
> > arch/powerpc/dts/p1020-post.dtsi | 27 +++++
> > arch/powerpc/dts/p1020.dtsi | 31 ++++++
> > arch/powerpc/dts/p1020rdb-pc.dts | 23 +++++
> > arch/powerpc/dts/p1020rdb-pc_36b.dts | 23 +++++
> > arch/powerpc/dts/p1020rdb-pd.dts | 23 +++++
> > arch/powerpc/dts/p2020-post.dtsi | 27 +++++
> > arch/powerpc/dts/p2020.dtsi | 31 ++++++
> > arch/powerpc/dts/p2020rdb-pc.dts | 23 +++++
> > arch/powerpc/dts/p2020rdb-pc_36b.dts | 23 +++++
> > arch/powerpc/dts/p2041.dtsi | 63 ++++++++++++
> > arch/powerpc/dts/p2041rdb.dts | 18 ++++
> > arch/powerpc/dts/p3041.dtsi | 63 ++++++++++++
> > arch/powerpc/dts/p3041ds.dts | 18 ++++
> > arch/powerpc/dts/p4080.dtsi | 83
> +++++++++++++++
> > arch/powerpc/dts/p4080ds.dts | 18 ++++
> > arch/powerpc/dts/p5040.dtsi | 62 +++++++++++
> > arch/powerpc/dts/p5040ds.dts | 18 ++++
> > arch/powerpc/dts/t1024rdb.dts | 17 ++++
> > arch/powerpc/dts/t102x.dtsi | 52 ++++++++++
> > arch/powerpc/dts/t1042d4rdb.dts | 17 ++++
> > arch/powerpc/dts/t104x.dtsi | 62 +++++++++++
> > arch/powerpc/dts/t2080rdb.dts | 17 ++++
> > arch/powerpc/dts/t4240.dtsi | 102
> +++++++++++++++++++
> > arch/powerpc/dts/t4240rdb.dts | 17 ++++
> > arch/powerpc/dts/u-boot.dtsi | 3 +
> > board/freescale/p1_p2_rdb_pc/README | 19 ++++
> > board/freescale/p2041rdb/README | 18 ++++
> > board/freescale/t102xrdb/README | 19 ++++
> > board/freescale/t104xrdb/README | 19 ++++
> > board/freescale/t208xrdb/README | 19 ++++
> > configs/MPC8548CDS_36BIT_defconfig | 3 +
> > configs/MPC8548CDS_defconfig | 3 +
> > configs/MPC8548CDS_legacy_defconfig | 3 +
> > configs/P1020RDB-PC_36BIT_NAND_defconfig | 2 +
> > configs/P1020RDB-PC_36BIT_SDCARD_defconfig | 2 +
> > configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig | 2 +
> > configs/P1020RDB-PC_36BIT_defconfig | 3 +
> > configs/P1020RDB-PC_NAND_defconfig | 2 +
> > configs/P1020RDB-PC_SDCARD_defconfig | 2 +
> > configs/P1020RDB-PC_SPIFLASH_defconfig | 2 +
> > configs/P1020RDB-PC_defconfig | 3 +
> > configs/P1020RDB-PD_NAND_defconfig | 2 +
> > configs/P1020RDB-PD_SDCARD_defconfig | 2 +
> > configs/P1020RDB-PD_SPIFLASH_defconfig | 2 +
> > configs/P1020RDB-PD_defconfig | 3 +
> > configs/P2020RDB-PC_36BIT_NAND_defconfig | 2 +
> > configs/P2020RDB-PC_36BIT_SDCARD_defconfig | 2 +
> > configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 2 +
> > configs/P2020RDB-PC_36BIT_defconfig | 3 +
> > configs/P2020RDB-PC_NAND_defconfig | 2 +
> > configs/P2020RDB-PC_SDCARD_defconfig | 2 +
> > configs/P2020RDB-PC_SPIFLASH_defconfig | 2 +
> > configs/P2020RDB-PC_defconfig | 3 +
> > configs/P2041RDB_NAND_defconfig | 3 +
> > configs/P2041RDB_SDCARD_defconfig | 3 +
> > configs/P2041RDB_SPIFLASH_defconfig | 3 +
> > configs/P2041RDB_defconfig | 3 +
> > configs/P3041DS_NAND_defconfig | 3 +
> > configs/P3041DS_SDCARD_defconfig | 3 +
> > configs/P3041DS_SPIFLASH_defconfig | 3 +
> > configs/P3041DS_defconfig | 3 +
> > configs/P4080DS_SDCARD_defconfig | 3 +
> > configs/P4080DS_SPIFLASH_defconfig | 3 +
> > configs/P4080DS_defconfig | 3 +
> > configs/P5040DS_NAND_defconfig | 3 +
> > configs/P5040DS_SDCARD_defconfig | 3 +
> > configs/P5040DS_SPIFLASH_defconfig | 3 +
> > configs/P5040DS_defconfig | 3 +
> > configs/T1024RDB_NAND_defconfig | 2 +
> > configs/T1024RDB_SDCARD_defconfig | 2 +
> > configs/T1024RDB_SPIFLASH_defconfig | 2 +
> > configs/T1024RDB_defconfig | 3 +
> > configs/T1042D4RDB_NAND_defconfig | 2 +
> > configs/T1042D4RDB_SDCARD_defconfig | 2 +
> > configs/T1042D4RDB_SPIFLASH_defconfig | 2 +
> > configs/T1042D4RDB_defconfig | 3 +
> > configs/T2080RDB_NAND_defconfig | 2 +
> > configs/T2080RDB_SDCARD_defconfig | 2 +
> > configs/T2080RDB_SPIFLASH_defconfig | 2 +
> > configs/T2080RDB_defconfig | 3 +
> > configs/T4240RDB_SDCARD_defconfig | 2 +
> > configs/T4240RDB_defconfig | 3 +
> > include/configs/MPC8548CDS.h | 2 +-
>
> These changes looks good to me however I am concerned about the testing.
> Can you please tell what testing you did to verify these changes?
The NOR boot have been verified on all platforms.
Thanks,
Zhiqiang
>
> --Jagdish
^ permalink raw reply [flat|nested] 19+ messages in thread
* [U-Boot] [PATCH 00/13] powerpc: Enable device tree support
2019-08-16 6:27 ` Z.q. Hou
@ 2019-08-16 8:25 ` Jagdish Gediya
2019-08-16 12:25 ` Z.q. Hou
2019-08-16 12:41 ` Z.q. Hou
0 siblings, 2 replies; 19+ messages in thread
From: Jagdish Gediya @ 2019-08-16 8:25 UTC (permalink / raw)
To: u-boot
Hi Zhiqiang,
> -----Original Message-----
> From: Z.q. Hou
> Sent: Friday, August 16, 2019 11:58 AM
> To: Jagdish Gediya <jagdish.gediya@nxp.com>; u-boot at lists.denx.de;
> sjg at chromium.org; Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>;
> Shengzhou Liu <shengzhou.liu@nxp.com>; bmeng.cn at gmail.com; Jiafei Pan
> <jiafei.pan@nxp.com>; Priyanka Jain <priyanka.jain@nxp.com>
> Subject: RE: [PATCH 00/13] powerpc: Enable device tree support
>
> Hi Jagdish,
>
> Thanks a lot for your comments!
>
> > -----Original Message-----
> > From: Jagdish Gediya
> > Sent: 2019年8月16日 14:05
> > To: Z.q. Hou <zhiqiang.hou@nxp.com>; u-boot at lists.denx.de;
> > sjg at chromium.org; Prabhakar Kushwaha
> <prabhakar.kushwaha@nxp.com>;
> > Shengzhou Liu <shengzhou.liu@nxp.com>; bmeng.cn at gmail.com; Jiafei
> Pan
> > <jiafei.pan@nxp.com>; Priyanka Jain <priyanka.jain@nxp.com>
> > Subject: RE: [PATCH 00/13] powerpc: Enable device tree support
> >
> > Hi Zhiqiang,
> >
> > > -----Original Message-----
> > > From: Z.q. Hou
> > > Sent: Thursday, June 20, 2019 1:49 PM
> > > To: u-boot at lists.denx.de; sjg at chromium.org; Prabhakar Kushwaha
> > > <prabhakar.kushwaha@nxp.com>; Shengzhou Liu
> > <shengzhou.liu@nxp.com>;
> > > bmeng.cn at gmail.com; Jagdish Gediya <jagdish.gediya@nxp.com>; Jiafei
> > > Pan <jiafei.pan@nxp.com>; Priyanka Jain <priyanka.jain@nxp.com>
> > > Cc: Z.q. Hou <zhiqiang.hou@nxp.com>
> > > Subject: [PATCH 00/13] powerpc: Enable device tree support
> > >
> > > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> > >
> > > This patch is to enable device tree support for the Freescale
> > > PowerPC platforms below.
> > >
> > > Hou Zhiqiang (13):
> > > powerpc: Enable device tree support for T2080RDB
> > > powerpc: Enable device tree support for T4240RDB
> > > powerpc: Enable device tree support for T1024RDB
> > > powerpc: Enable device tree support for T1042D4RDB
> > > powerpc: Enable device tree support for P1020RDB
> > > powerpc: Enable device tree support for P2020RDB
> > > powerpc: Enable device tree support for P2041RDB
> > > powerpc: Enable device tree support for P3041DS
> > > powerpc: Enable device tree support for P4080DS
> > > powerpc: Enable device tree support for P5040DS
> > > powerpc: dts: add default definition of
> > CONFIG_RESET_VECTOR_ADDRESS
> > > powerpc: mpc8548cds: extend the reserved length for monitor
> > > powerpc: Enable device tree support for MPC8548CDS
> > >
> > > arch/powerpc/dts/Makefile | 12 +++
> > > arch/powerpc/dts/e500mc_power_isa.dtsi | 33 ++++++
> > > arch/powerpc/dts/e500v2_power_isa.dtsi | 26 +++++
> > > arch/powerpc/dts/e5500_power_isa.dtsi | 34 +++++++
> > > arch/powerpc/dts/mpc8548-post.dtsi | 27 +++++
> > > arch/powerpc/dts/mpc8548.dtsi | 27 +++++
> > > arch/powerpc/dts/mpc8548cds.dts | 23 +++++
> > > arch/powerpc/dts/mpc8548cds_36b.dts | 23 +++++
> > > arch/powerpc/dts/p1020-post.dtsi | 27 +++++
> > > arch/powerpc/dts/p1020.dtsi | 31 ++++++
> > > arch/powerpc/dts/p1020rdb-pc.dts | 23 +++++
> > > arch/powerpc/dts/p1020rdb-pc_36b.dts | 23 +++++
> > > arch/powerpc/dts/p1020rdb-pd.dts | 23 +++++
> > > arch/powerpc/dts/p2020-post.dtsi | 27 +++++
> > > arch/powerpc/dts/p2020.dtsi | 31 ++++++
> > > arch/powerpc/dts/p2020rdb-pc.dts | 23 +++++
> > > arch/powerpc/dts/p2020rdb-pc_36b.dts | 23 +++++
> > > arch/powerpc/dts/p2041.dtsi | 63 ++++++++++++
> > > arch/powerpc/dts/p2041rdb.dts | 18 ++++
> > > arch/powerpc/dts/p3041.dtsi | 63 ++++++++++++
> > > arch/powerpc/dts/p3041ds.dts | 18 ++++
> > > arch/powerpc/dts/p4080.dtsi | 83
> > +++++++++++++++
> > > arch/powerpc/dts/p4080ds.dts | 18 ++++
> > > arch/powerpc/dts/p5040.dtsi | 62 +++++++++++
> > > arch/powerpc/dts/p5040ds.dts | 18 ++++
> > > arch/powerpc/dts/t1024rdb.dts | 17 ++++
> > > arch/powerpc/dts/t102x.dtsi | 52 ++++++++++
> > > arch/powerpc/dts/t1042d4rdb.dts | 17 ++++
> > > arch/powerpc/dts/t104x.dtsi | 62 +++++++++++
> > > arch/powerpc/dts/t2080rdb.dts | 17 ++++
> > > arch/powerpc/dts/t4240.dtsi | 102
> > +++++++++++++++++++
> > > arch/powerpc/dts/t4240rdb.dts | 17 ++++
> > > arch/powerpc/dts/u-boot.dtsi | 3 +
> > > board/freescale/p1_p2_rdb_pc/README | 19 ++++
> > > board/freescale/p2041rdb/README | 18 ++++
> > > board/freescale/t102xrdb/README | 19 ++++
> > > board/freescale/t104xrdb/README | 19 ++++
> > > board/freescale/t208xrdb/README | 19 ++++
> > > configs/MPC8548CDS_36BIT_defconfig | 3 +
> > > configs/MPC8548CDS_defconfig | 3 +
> > > configs/MPC8548CDS_legacy_defconfig | 3 +
> > > configs/P1020RDB-PC_36BIT_NAND_defconfig | 2 +
> > > configs/P1020RDB-PC_36BIT_SDCARD_defconfig | 2 +
> > > configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig | 2 +
> > > configs/P1020RDB-PC_36BIT_defconfig | 3 +
> > > configs/P1020RDB-PC_NAND_defconfig | 2 +
> > > configs/P1020RDB-PC_SDCARD_defconfig | 2 +
> > > configs/P1020RDB-PC_SPIFLASH_defconfig | 2 +
> > > configs/P1020RDB-PC_defconfig | 3 +
> > > configs/P1020RDB-PD_NAND_defconfig | 2 +
> > > configs/P1020RDB-PD_SDCARD_defconfig | 2 +
> > > configs/P1020RDB-PD_SPIFLASH_defconfig | 2 +
> > > configs/P1020RDB-PD_defconfig | 3 +
> > > configs/P2020RDB-PC_36BIT_NAND_defconfig | 2 +
> > > configs/P2020RDB-PC_36BIT_SDCARD_defconfig | 2 +
> > > configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 2 +
> > > configs/P2020RDB-PC_36BIT_defconfig | 3 +
> > > configs/P2020RDB-PC_NAND_defconfig | 2 +
> > > configs/P2020RDB-PC_SDCARD_defconfig | 2 +
> > > configs/P2020RDB-PC_SPIFLASH_defconfig | 2 +
> > > configs/P2020RDB-PC_defconfig | 3 +
> > > configs/P2041RDB_NAND_defconfig | 3 +
> > > configs/P2041RDB_SDCARD_defconfig | 3 +
> > > configs/P2041RDB_SPIFLASH_defconfig | 3 +
> > > configs/P2041RDB_defconfig | 3 +
> > > configs/P3041DS_NAND_defconfig | 3 +
> > > configs/P3041DS_SDCARD_defconfig | 3 +
> > > configs/P3041DS_SPIFLASH_defconfig | 3 +
> > > configs/P3041DS_defconfig | 3 +
> > > configs/P4080DS_SDCARD_defconfig | 3 +
> > > configs/P4080DS_SPIFLASH_defconfig | 3 +
> > > configs/P4080DS_defconfig | 3 +
> > > configs/P5040DS_NAND_defconfig | 3 +
> > > configs/P5040DS_SDCARD_defconfig | 3 +
> > > configs/P5040DS_SPIFLASH_defconfig | 3 +
> > > configs/P5040DS_defconfig | 3 +
> > > configs/T1024RDB_NAND_defconfig | 2 +
> > > configs/T1024RDB_SDCARD_defconfig | 2 +
> > > configs/T1024RDB_SPIFLASH_defconfig | 2 +
> > > configs/T1024RDB_defconfig | 3 +
> > > configs/T1042D4RDB_NAND_defconfig | 2 +
> > > configs/T1042D4RDB_SDCARD_defconfig | 2 +
> > > configs/T1042D4RDB_SPIFLASH_defconfig | 2 +
> > > configs/T1042D4RDB_defconfig | 3 +
> > > configs/T2080RDB_NAND_defconfig | 2 +
> > > configs/T2080RDB_SDCARD_defconfig | 2 +
> > > configs/T2080RDB_SPIFLASH_defconfig | 2 +
> > > configs/T2080RDB_defconfig | 3 +
> > > configs/T4240RDB_SDCARD_defconfig | 2 +
> > > configs/T4240RDB_defconfig | 3 +
> > > include/configs/MPC8548CDS.h | 2 +-
> >
> > These changes looks good to me however I am concerned about the
> testing.
> > Can you please tell what testing you did to verify these changes?
>
> The NOR boot have been verified on all platforms.
Can you please verify the NAND, SD and SPIFLASH boot on at-least one of the platform where you have defined CONFIG_MPC85XX_HAVE_RESET_VECTOR for NAND, SD and SPIFLASH configs e.g. P2041RDB. I think this testing should be done on at least one of the platforms to eliminate any possibility of breaking the booting.
Thanks,
Jagdish
^ permalink raw reply [flat|nested] 19+ messages in thread
* [U-Boot] [PATCH 00/13] powerpc: Enable device tree support
2019-08-16 8:25 ` Jagdish Gediya
@ 2019-08-16 12:25 ` Z.q. Hou
2019-08-16 12:41 ` Z.q. Hou
1 sibling, 0 replies; 19+ messages in thread
From: Z.q. Hou @ 2019-08-16 12:25 UTC (permalink / raw)
To: u-boot
Hi Jagdish,
Thanks a lot for your comments!
> -----Original Message-----
> From: Jagdish Gediya
> Sent: 2019年8月16日 16:26
> To: Z.q. Hou <zhiqiang.hou@nxp.com>; u-boot at lists.denx.de;
> sjg at chromium.org; Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>;
> Shengzhou Liu <shengzhou.liu@nxp.com>; bmeng.cn at gmail.com; Jiafei Pan
> <jiafei.pan@nxp.com>; Priyanka Jain <priyanka.jain@nxp.com>
> Subject: RE: [PATCH 00/13] powerpc: Enable device tree support
>
> Hi Zhiqiang,
>
> > -----Original Message-----
> > From: Z.q. Hou
> > Sent: Friday, August 16, 2019 11:58 AM
> > To: Jagdish Gediya <jagdish.gediya@nxp.com>; u-boot at lists.denx.de;
> > sjg at chromium.org; Prabhakar Kushwaha
> <prabhakar.kushwaha@nxp.com>;
> > Shengzhou Liu <shengzhou.liu@nxp.com>; bmeng.cn at gmail.com; Jiafei
> Pan
> > <jiafei.pan@nxp.com>; Priyanka Jain <priyanka.jain@nxp.com>
> > Subject: RE: [PATCH 00/13] powerpc: Enable device tree support
> >
> > Hi Jagdish,
> >
> > Thanks a lot for your comments!
> >
> > > -----Original Message-----
> > > From: Jagdish Gediya
> > > Sent: 2019年8月16日 14:05
> > > To: Z.q. Hou <zhiqiang.hou@nxp.com>; u-boot at lists.denx.de;
> > > sjg at chromium.org; Prabhakar Kushwaha
> > <prabhakar.kushwaha@nxp.com>;
> > > Shengzhou Liu <shengzhou.liu@nxp.com>; bmeng.cn at gmail.com; Jiafei
> > Pan
> > > <jiafei.pan@nxp.com>; Priyanka Jain <priyanka.jain@nxp.com>
> > > Subject: RE: [PATCH 00/13] powerpc: Enable device tree support
> > >
> > > Hi Zhiqiang,
> > >
> > > > -----Original Message-----
> > > > From: Z.q. Hou
> > > > Sent: Thursday, June 20, 2019 1:49 PM
> > > > To: u-boot at lists.denx.de; sjg at chromium.org; Prabhakar Kushwaha
> > > > <prabhakar.kushwaha@nxp.com>; Shengzhou Liu
> > > <shengzhou.liu@nxp.com>;
> > > > bmeng.cn at gmail.com; Jagdish Gediya <jagdish.gediya@nxp.com>;
> > > > Jiafei Pan <jiafei.pan@nxp.com>; Priyanka Jain
> > > > <priyanka.jain@nxp.com>
> > > > Cc: Z.q. Hou <zhiqiang.hou@nxp.com>
> > > > Subject: [PATCH 00/13] powerpc: Enable device tree support
> > > >
> > > > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> > > >
> > > > This patch is to enable device tree support for the Freescale
> > > > PowerPC platforms below.
> > > >
> > > > Hou Zhiqiang (13):
> > > > powerpc: Enable device tree support for T2080RDB
> > > > powerpc: Enable device tree support for T4240RDB
> > > > powerpc: Enable device tree support for T1024RDB
> > > > powerpc: Enable device tree support for T1042D4RDB
> > > > powerpc: Enable device tree support for P1020RDB
> > > > powerpc: Enable device tree support for P2020RDB
> > > > powerpc: Enable device tree support for P2041RDB
> > > > powerpc: Enable device tree support for P3041DS
> > > > powerpc: Enable device tree support for P4080DS
> > > > powerpc: Enable device tree support for P5040DS
> > > > powerpc: dts: add default definition of
> > > CONFIG_RESET_VECTOR_ADDRESS
> > > > powerpc: mpc8548cds: extend the reserved length for monitor
> > > > powerpc: Enable device tree support for MPC8548CDS
> > > >
> > > > arch/powerpc/dts/Makefile | 12 +++
> > > > arch/powerpc/dts/e500mc_power_isa.dtsi | 33 ++++++
> > > > arch/powerpc/dts/e500v2_power_isa.dtsi | 26 +++++
> > > > arch/powerpc/dts/e5500_power_isa.dtsi | 34 +++++++
> > > > arch/powerpc/dts/mpc8548-post.dtsi | 27 +++++
> > > > arch/powerpc/dts/mpc8548.dtsi | 27 +++++
> > > > arch/powerpc/dts/mpc8548cds.dts | 23 +++++
> > > > arch/powerpc/dts/mpc8548cds_36b.dts | 23 +++++
> > > > arch/powerpc/dts/p1020-post.dtsi | 27 +++++
> > > > arch/powerpc/dts/p1020.dtsi | 31 ++++++
> > > > arch/powerpc/dts/p1020rdb-pc.dts | 23 +++++
> > > > arch/powerpc/dts/p1020rdb-pc_36b.dts | 23 +++++
> > > > arch/powerpc/dts/p1020rdb-pd.dts | 23 +++++
> > > > arch/powerpc/dts/p2020-post.dtsi | 27 +++++
> > > > arch/powerpc/dts/p2020.dtsi | 31 ++++++
> > > > arch/powerpc/dts/p2020rdb-pc.dts | 23 +++++
> > > > arch/powerpc/dts/p2020rdb-pc_36b.dts | 23 +++++
> > > > arch/powerpc/dts/p2041.dtsi | 63
> ++++++++++++
> > > > arch/powerpc/dts/p2041rdb.dts | 18 ++++
> > > > arch/powerpc/dts/p3041.dtsi | 63
> ++++++++++++
> > > > arch/powerpc/dts/p3041ds.dts | 18 ++++
> > > > arch/powerpc/dts/p4080.dtsi | 83
> > > +++++++++++++++
> > > > arch/powerpc/dts/p4080ds.dts | 18 ++++
> > > > arch/powerpc/dts/p5040.dtsi | 62
> +++++++++++
> > > > arch/powerpc/dts/p5040ds.dts | 18 ++++
> > > > arch/powerpc/dts/t1024rdb.dts | 17 ++++
> > > > arch/powerpc/dts/t102x.dtsi | 52
> ++++++++++
> > > > arch/powerpc/dts/t1042d4rdb.dts | 17 ++++
> > > > arch/powerpc/dts/t104x.dtsi | 62
> +++++++++++
> > > > arch/powerpc/dts/t2080rdb.dts | 17 ++++
> > > > arch/powerpc/dts/t4240.dtsi | 102
> > > +++++++++++++++++++
> > > > arch/powerpc/dts/t4240rdb.dts | 17 ++++
> > > > arch/powerpc/dts/u-boot.dtsi | 3 +
> > > > board/freescale/p1_p2_rdb_pc/README | 19 ++++
> > > > board/freescale/p2041rdb/README | 18 ++++
> > > > board/freescale/t102xrdb/README | 19 ++++
> > > > board/freescale/t104xrdb/README | 19 ++++
> > > > board/freescale/t208xrdb/README | 19 ++++
> > > > configs/MPC8548CDS_36BIT_defconfig | 3 +
> > > > configs/MPC8548CDS_defconfig | 3 +
> > > > configs/MPC8548CDS_legacy_defconfig | 3 +
> > > > configs/P1020RDB-PC_36BIT_NAND_defconfig | 2 +
> > > > configs/P1020RDB-PC_36BIT_SDCARD_defconfig | 2 +
> > > > configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig | 2 +
> > > > configs/P1020RDB-PC_36BIT_defconfig | 3 +
> > > > configs/P1020RDB-PC_NAND_defconfig | 2 +
> > > > configs/P1020RDB-PC_SDCARD_defconfig | 2 +
> > > > configs/P1020RDB-PC_SPIFLASH_defconfig | 2 +
> > > > configs/P1020RDB-PC_defconfig | 3 +
> > > > configs/P1020RDB-PD_NAND_defconfig | 2 +
> > > > configs/P1020RDB-PD_SDCARD_defconfig | 2 +
> > > > configs/P1020RDB-PD_SPIFLASH_defconfig | 2 +
> > > > configs/P1020RDB-PD_defconfig | 3 +
> > > > configs/P2020RDB-PC_36BIT_NAND_defconfig | 2 +
> > > > configs/P2020RDB-PC_36BIT_SDCARD_defconfig | 2 +
> > > > configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 2 +
> > > > configs/P2020RDB-PC_36BIT_defconfig | 3 +
> > > > configs/P2020RDB-PC_NAND_defconfig | 2 +
> > > > configs/P2020RDB-PC_SDCARD_defconfig | 2 +
> > > > configs/P2020RDB-PC_SPIFLASH_defconfig | 2 +
> > > > configs/P2020RDB-PC_defconfig | 3 +
> > > > configs/P2041RDB_NAND_defconfig | 3 +
> > > > configs/P2041RDB_SDCARD_defconfig | 3 +
> > > > configs/P2041RDB_SPIFLASH_defconfig | 3 +
> > > > configs/P2041RDB_defconfig | 3 +
> > > > configs/P3041DS_NAND_defconfig | 3 +
> > > > configs/P3041DS_SDCARD_defconfig | 3 +
> > > > configs/P3041DS_SPIFLASH_defconfig | 3 +
> > > > configs/P3041DS_defconfig | 3 +
> > > > configs/P4080DS_SDCARD_defconfig | 3 +
> > > > configs/P4080DS_SPIFLASH_defconfig | 3 +
> > > > configs/P4080DS_defconfig | 3 +
> > > > configs/P5040DS_NAND_defconfig | 3 +
> > > > configs/P5040DS_SDCARD_defconfig | 3 +
> > > > configs/P5040DS_SPIFLASH_defconfig | 3 +
> > > > configs/P5040DS_defconfig | 3 +
> > > > configs/T1024RDB_NAND_defconfig | 2 +
> > > > configs/T1024RDB_SDCARD_defconfig | 2 +
> > > > configs/T1024RDB_SPIFLASH_defconfig | 2 +
> > > > configs/T1024RDB_defconfig | 3 +
> > > > configs/T1042D4RDB_NAND_defconfig | 2 +
> > > > configs/T1042D4RDB_SDCARD_defconfig | 2 +
> > > > configs/T1042D4RDB_SPIFLASH_defconfig | 2 +
> > > > configs/T1042D4RDB_defconfig | 3 +
> > > > configs/T2080RDB_NAND_defconfig | 2 +
> > > > configs/T2080RDB_SDCARD_defconfig | 2 +
> > > > configs/T2080RDB_SPIFLASH_defconfig | 2 +
> > > > configs/T2080RDB_defconfig | 3 +
> > > > configs/T4240RDB_SDCARD_defconfig | 2 +
> > > > configs/T4240RDB_defconfig | 3 +
> > > > include/configs/MPC8548CDS.h | 2 +-
> > >
> > > These changes looks good to me however I am concerned about the
> > testing.
> > > Can you please tell what testing you did to verify these changes?
> >
> > The NOR boot have been verified on all platforms.
> Can you please verify the NAND, SD and SPIFLASH boot on at-least one of
> the platform where you have defined
> CONFIG_MPC85XX_HAVE_RESET_VECTOR for NAND, SD and SPIFLASH
> configs e.g. P2041RDB. I think this testing should be done on at least one of
> the platforms to eliminate any possibility of breaking the booting.
Sure, but none of these board in my hand, they are too old and do not support
remote switch boot device. I'll try to borrow one from BF.
Thanks,
Zhiqiang
>
> Thanks,
> Jagdish
^ permalink raw reply [flat|nested] 19+ messages in thread
* [U-Boot] [PATCH 00/13] powerpc: Enable device tree support
2019-08-16 8:25 ` Jagdish Gediya
2019-08-16 12:25 ` Z.q. Hou
@ 2019-08-16 12:41 ` Z.q. Hou
1 sibling, 0 replies; 19+ messages in thread
From: Z.q. Hou @ 2019-08-16 12:41 UTC (permalink / raw)
To: u-boot
> -----Original Message-----
> From: Jagdish Gediya
> Sent: 2019年8月16日 16:26
> To: Z.q. Hou <zhiqiang.hou@nxp.com>; u-boot at lists.denx.de;
> sjg at chromium.org; Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>;
> Shengzhou Liu <shengzhou.liu@nxp.com>; bmeng.cn at gmail.com; Jiafei Pan
> <jiafei.pan@nxp.com>; Priyanka Jain <priyanka.jain@nxp.com>
> Subject: RE: [PATCH 00/13] powerpc: Enable device tree support
>
> Hi Zhiqiang,
>
> > -----Original Message-----
> > From: Z.q. Hou
> > Sent: Friday, August 16, 2019 11:58 AM
> > To: Jagdish Gediya <jagdish.gediya@nxp.com>; u-boot at lists.denx.de;
> > sjg at chromium.org; Prabhakar Kushwaha
> <prabhakar.kushwaha@nxp.com>;
> > Shengzhou Liu <shengzhou.liu@nxp.com>; bmeng.cn at gmail.com; Jiafei
> Pan
> > <jiafei.pan@nxp.com>; Priyanka Jain <priyanka.jain@nxp.com>
> > Subject: RE: [PATCH 00/13] powerpc: Enable device tree support
> >
> > Hi Jagdish,
> >
> > Thanks a lot for your comments!
> >
> > > -----Original Message-----
> > > From: Jagdish Gediya
> > > Sent: 2019年8月16日 14:05
> > > To: Z.q. Hou <zhiqiang.hou@nxp.com>; u-boot at lists.denx.de;
> > > sjg at chromium.org; Prabhakar Kushwaha
> > <prabhakar.kushwaha@nxp.com>;
> > > Shengzhou Liu <shengzhou.liu@nxp.com>; bmeng.cn at gmail.com; Jiafei
> > Pan
> > > <jiafei.pan@nxp.com>; Priyanka Jain <priyanka.jain@nxp.com>
> > > Subject: RE: [PATCH 00/13] powerpc: Enable device tree support
> > >
> > > Hi Zhiqiang,
> > >
> > > > -----Original Message-----
> > > > From: Z.q. Hou
> > > > Sent: Thursday, June 20, 2019 1:49 PM
> > > > To: u-boot at lists.denx.de; sjg at chromium.org; Prabhakar Kushwaha
> > > > <prabhakar.kushwaha@nxp.com>; Shengzhou Liu
> > > <shengzhou.liu@nxp.com>;
> > > > bmeng.cn at gmail.com; Jagdish Gediya <jagdish.gediya@nxp.com>;
> > > > Jiafei Pan <jiafei.pan@nxp.com>; Priyanka Jain
> > > > <priyanka.jain@nxp.com>
> > > > Cc: Z.q. Hou <zhiqiang.hou@nxp.com>
> > > > Subject: [PATCH 00/13] powerpc: Enable device tree support
> > > >
> > > > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> > > >
> > > > This patch is to enable device tree support for the Freescale
> > > > PowerPC platforms below.
> > > >
> > > > Hou Zhiqiang (13):
> > > > powerpc: Enable device tree support for T2080RDB
> > > > powerpc: Enable device tree support for T4240RDB
> > > > powerpc: Enable device tree support for T1024RDB
> > > > powerpc: Enable device tree support for T1042D4RDB
> > > > powerpc: Enable device tree support for P1020RDB
> > > > powerpc: Enable device tree support for P2020RDB
> > > > powerpc: Enable device tree support for P2041RDB
> > > > powerpc: Enable device tree support for P3041DS
> > > > powerpc: Enable device tree support for P4080DS
> > > > powerpc: Enable device tree support for P5040DS
> > > > powerpc: dts: add default definition of
> > > CONFIG_RESET_VECTOR_ADDRESS
> > > > powerpc: mpc8548cds: extend the reserved length for monitor
> > > > powerpc: Enable device tree support for MPC8548CDS
> > > >
> > > > arch/powerpc/dts/Makefile | 12 +++
> > > > arch/powerpc/dts/e500mc_power_isa.dtsi | 33 ++++++
> > > > arch/powerpc/dts/e500v2_power_isa.dtsi | 26 +++++
> > > > arch/powerpc/dts/e5500_power_isa.dtsi | 34 +++++++
> > > > arch/powerpc/dts/mpc8548-post.dtsi | 27 +++++
> > > > arch/powerpc/dts/mpc8548.dtsi | 27 +++++
> > > > arch/powerpc/dts/mpc8548cds.dts | 23 +++++
> > > > arch/powerpc/dts/mpc8548cds_36b.dts | 23 +++++
> > > > arch/powerpc/dts/p1020-post.dtsi | 27 +++++
> > > > arch/powerpc/dts/p1020.dtsi | 31 ++++++
> > > > arch/powerpc/dts/p1020rdb-pc.dts | 23 +++++
> > > > arch/powerpc/dts/p1020rdb-pc_36b.dts | 23 +++++
> > > > arch/powerpc/dts/p1020rdb-pd.dts | 23 +++++
> > > > arch/powerpc/dts/p2020-post.dtsi | 27 +++++
> > > > arch/powerpc/dts/p2020.dtsi | 31 ++++++
> > > > arch/powerpc/dts/p2020rdb-pc.dts | 23 +++++
> > > > arch/powerpc/dts/p2020rdb-pc_36b.dts | 23 +++++
> > > > arch/powerpc/dts/p2041.dtsi | 63
> ++++++++++++
> > > > arch/powerpc/dts/p2041rdb.dts | 18 ++++
> > > > arch/powerpc/dts/p3041.dtsi | 63
> ++++++++++++
> > > > arch/powerpc/dts/p3041ds.dts | 18 ++++
> > > > arch/powerpc/dts/p4080.dtsi | 83
> > > +++++++++++++++
> > > > arch/powerpc/dts/p4080ds.dts | 18 ++++
> > > > arch/powerpc/dts/p5040.dtsi | 62
> +++++++++++
> > > > arch/powerpc/dts/p5040ds.dts | 18 ++++
> > > > arch/powerpc/dts/t1024rdb.dts | 17 ++++
> > > > arch/powerpc/dts/t102x.dtsi | 52
> ++++++++++
> > > > arch/powerpc/dts/t1042d4rdb.dts | 17 ++++
> > > > arch/powerpc/dts/t104x.dtsi | 62
> +++++++++++
> > > > arch/powerpc/dts/t2080rdb.dts | 17 ++++
> > > > arch/powerpc/dts/t4240.dtsi | 102
> > > +++++++++++++++++++
> > > > arch/powerpc/dts/t4240rdb.dts | 17 ++++
> > > > arch/powerpc/dts/u-boot.dtsi | 3 +
> > > > board/freescale/p1_p2_rdb_pc/README | 19 ++++
> > > > board/freescale/p2041rdb/README | 18 ++++
> > > > board/freescale/t102xrdb/README | 19 ++++
> > > > board/freescale/t104xrdb/README | 19 ++++
> > > > board/freescale/t208xrdb/README | 19 ++++
> > > > configs/MPC8548CDS_36BIT_defconfig | 3 +
> > > > configs/MPC8548CDS_defconfig | 3 +
> > > > configs/MPC8548CDS_legacy_defconfig | 3 +
> > > > configs/P1020RDB-PC_36BIT_NAND_defconfig | 2 +
> > > > configs/P1020RDB-PC_36BIT_SDCARD_defconfig | 2 +
> > > > configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig | 2 +
> > > > configs/P1020RDB-PC_36BIT_defconfig | 3 +
> > > > configs/P1020RDB-PC_NAND_defconfig | 2 +
> > > > configs/P1020RDB-PC_SDCARD_defconfig | 2 +
> > > > configs/P1020RDB-PC_SPIFLASH_defconfig | 2 +
> > > > configs/P1020RDB-PC_defconfig | 3 +
> > > > configs/P1020RDB-PD_NAND_defconfig | 2 +
> > > > configs/P1020RDB-PD_SDCARD_defconfig | 2 +
> > > > configs/P1020RDB-PD_SPIFLASH_defconfig | 2 +
> > > > configs/P1020RDB-PD_defconfig | 3 +
> > > > configs/P2020RDB-PC_36BIT_NAND_defconfig | 2 +
> > > > configs/P2020RDB-PC_36BIT_SDCARD_defconfig | 2 +
> > > > configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 2 +
> > > > configs/P2020RDB-PC_36BIT_defconfig | 3 +
> > > > configs/P2020RDB-PC_NAND_defconfig | 2 +
> > > > configs/P2020RDB-PC_SDCARD_defconfig | 2 +
> > > > configs/P2020RDB-PC_SPIFLASH_defconfig | 2 +
> > > > configs/P2020RDB-PC_defconfig | 3 +
> > > > configs/P2041RDB_NAND_defconfig | 3 +
> > > > configs/P2041RDB_SDCARD_defconfig | 3 +
> > > > configs/P2041RDB_SPIFLASH_defconfig | 3 +
> > > > configs/P2041RDB_defconfig | 3 +
> > > > configs/P3041DS_NAND_defconfig | 3 +
> > > > configs/P3041DS_SDCARD_defconfig | 3 +
> > > > configs/P3041DS_SPIFLASH_defconfig | 3 +
> > > > configs/P3041DS_defconfig | 3 +
> > > > configs/P4080DS_SDCARD_defconfig | 3 +
> > > > configs/P4080DS_SPIFLASH_defconfig | 3 +
> > > > configs/P4080DS_defconfig | 3 +
> > > > configs/P5040DS_NAND_defconfig | 3 +
> > > > configs/P5040DS_SDCARD_defconfig | 3 +
> > > > configs/P5040DS_SPIFLASH_defconfig | 3 +
> > > > configs/P5040DS_defconfig | 3 +
> > > > configs/T1024RDB_NAND_defconfig | 2 +
> > > > configs/T1024RDB_SDCARD_defconfig | 2 +
> > > > configs/T1024RDB_SPIFLASH_defconfig | 2 +
> > > > configs/T1024RDB_defconfig | 3 +
> > > > configs/T1042D4RDB_NAND_defconfig | 2 +
> > > > configs/T1042D4RDB_SDCARD_defconfig | 2 +
> > > > configs/T1042D4RDB_SPIFLASH_defconfig | 2 +
> > > > configs/T1042D4RDB_defconfig | 3 +
> > > > configs/T2080RDB_NAND_defconfig | 2 +
> > > > configs/T2080RDB_SDCARD_defconfig | 2 +
> > > > configs/T2080RDB_SPIFLASH_defconfig | 2 +
> > > > configs/T2080RDB_defconfig | 3 +
> > > > configs/T4240RDB_SDCARD_defconfig | 2 +
> > > > configs/T4240RDB_defconfig | 3 +
> > > > include/configs/MPC8548CDS.h | 2 +-
> > >
> > > These changes looks good to me however I am concerned about the
> > testing.
> > > Can you please tell what testing you did to verify these changes?
> >
> > The NOR boot have been verified on all platforms.
> Can you please verify the NAND, SD and SPIFLASH boot on at-least one of
> the platform where you have defined
> CONFIG_MPC85XX_HAVE_RESET_VECTOR for NAND, SD and SPIFLASH
> configs e.g. P2041RDB. I think this testing should be done on at least one of
> the platforms to eliminate any possibility of breaking the booting.
Reviewed u-boot main Makefile, and found a problem: for platforms P2041RDB,
P3041DS, P4080DS, and P5040DS, the SD/NAND/SPIFLASH boot should not work,
as the final image u-boot-with-dtb.bin does NOT include RCW and PBIs.
Will fix this problem in next version.
Thanks,
Zhiqiang
> Thanks,
> Jagdish
^ permalink raw reply [flat|nested] 19+ messages in thread